Chip test stability detection method and device, and storage medium

Abstract

This invention proposes a chip testing stability detection method, apparatus, and storage medium, relating to the semiconductor testing field. The invention obtains a structured test data set by acquiring target measured data for each chip in the current production batch. Using a preset number of chips as a sliding window, multiple consecutive sliding window target measured statistical values ​​are obtained from the structured test data set. The target measured data characterizes the measured data of any chip across multiple target monitoring test items. Then, based on the target measured statistical values ​​of the sliding windows, the invention determines whether there are any anomalies in the testing process corresponding to each sliding window. If an anomaly is found, the testing machine's operation is paused, and the current production batch is blocked from passing through the testing station. Based on this, the invention ensures the chip's factory quality by detecting chip testing stability.

Description

Technical Field

[0001] This invention relates to the field of chip fabrication technology, and more specifically, to a chip testing stability detection method, apparatus, and storage medium. Background Technology

[0002] With the continuous evolution of semiconductor manufacturing processes, chip integration has significantly increased, and performance parameters have become increasingly complex, thus raising the technical requirements for chip testing. In modern chip manufacturing processes, the testing stage, as the final critical process to ensure chip quality and reliability, is becoming increasingly important.

[0003] Currently, the industry widely uses automated testing equipment to perform parameter testing on large batches of chips. During the testing process, the equipment rigorously tests the key performance indicators of each chip (including operating voltage, leakage current, operating frequency, and power consumption), and only chips that meet the design specifications can proceed to the subsequent packaging process. However, existing testing systems mainly focus on improving testing algorithms to shorten the testing time of a single chip in order to increase overall production capacity. These methods are all based on an implicit assumption: that the measurement accuracy and stability of the testing equipment itself remain at an ideal state at all times.

[0004] However, the performance of testing equipment in actual production environments will gradually change over time. This is manifested in various ways, such as changes in contact resistance caused by mechanical wear of test probes, drift of circuit parameters caused by fluctuations in ambient temperature and humidity, and signal attenuation caused by aging of electronic components. As a result, the test results of a single chip may still be within the specification range, making it difficult to identify in a timely manner through conventional data analysis methods.

[0005] Therefore, there is an urgent need for a solution to test the stability of chips in order to ensure the quality of chips leaving the factory. Summary of the Invention

[0006] In view of this, the purpose of the present invention is to provide a chip testing stability detection method, device and storage medium, which ensures that the test data of each chip is detected by acquiring the key test item field values ​​and comparing anomalies, thereby ensuring the quality of each chip leaving the semiconductor testing plant.

[0007] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows: In a first aspect, the present invention provides a chip testing stability detection method, applied to a testing machine, the testing machine including multiple test heads, each test head including multiple test stations, the chip testing stability detection method including: Obtain the target measured data of each chip in the current production batch to obtain a structured test data set; among which, the target measured data is used to characterize the measured data of any chip on multiple target monitoring test items; Using a preset number of chips as a sliding window, multiple consecutive sliding windows of target measured statistical values ​​are obtained from the structured test data set; Based on the target measured statistical values ​​of each sliding window, it is determined whether there are any abnormalities in the testing process of the test machine in each sliding window. If there are any abnormalities, the operation of the test machine is suspended and the current production batch is blocked from passing through the station.

[0008] Optionally, when the target measured statistics include the sliding window mean, the steps for obtaining the target measured statistics for each sliding window from the structured test dataset include: For any target monitoring test item, calculate the global average and global standard deviation of all chips within each sliding window under the current target monitoring test item, and obtain the sliding window mean corresponding to the current target monitoring test item.

[0009] Optionally, the step of determining whether the testing machine has any abnormalities in the testing process corresponding to each sliding window based on the target measured statistical values ​​of each sliding window includes: For any target monitoring test item, determine whether the global average and global standard deviation corresponding to the current target monitoring test item are both within the corresponding preset global threshold range. If so, determine that the test process corresponding to the current sliding window is in a normal state; otherwise, determine that the test process corresponding to the current sliding window is in an abnormal state. The preset global threshold range is determined by the control threshold corresponding to the same target monitoring test item in historical good product batches.

[0010] Optionally, when the target measured statistics include the station statistics corresponding to each test station under any sliding window, the step of obtaining the target measured statistics of each sliding window from the structured test dataset further includes: All chips within the sliding window are assigned to various test stations according to the order in which they entered the test machine, resulting in multiple test station groups; For any target monitoring test item, calculate the average value of all chips under each test site group under the current target monitoring test item, and obtain the site average value of each test site group under the current target monitoring test item, so as to determine the target measured statistical value of each sliding window.

[0011] Optionally, when the target measured statistical value includes the mean of the sliding window, the step of determining whether the testing machine has any abnormalities in the testing process corresponding to each sliding window based on the target measured statistical value of each sliding window further includes: For any target monitoring test item, determine whether the mean value of the sliding window corresponding to the current target monitoring test item is within the preset global threshold range, and sequentially determine whether the mean value of the site corresponding to the current target monitoring test item is within the preset site threshold range. If the average value of the sliding window corresponding to the current target monitoring test item is within the preset global threshold range, and the average value of the site corresponding to the current target monitoring test item is within the preset site threshold range, then the test process corresponding to the current sliding window is determined to be in a normal state; otherwise, the test process corresponding to the current sliding window is determined to be in an abnormal state.

[0012] Optionally, the steps to obtain the target test data of each chip in the current production batch and obtain a structured test data set include: Obtain the raw chip test data file for any production batch from the chip test data FTP server; For any production batch, the target test data of each chip in the current production batch is obtained from the chip test raw data file to obtain a structured test data set.

[0013] Optionally, after determining whether there are any abnormalities in the testing process of the test machine in each sliding window based on the target measured statistical values ​​of each sliding window, the chip test stability detection method further includes: If the testing machine encounters an anomaly during the testing process corresponding to each sliding window, it will intercept the current production batch and trigger the production anomaly handling process to ensure that the abnormal production batch is handled in a timely manner.

[0014] Secondly, the present invention also provides a chip testing stability detection device, applied to a testing machine, the testing machine including multiple test heads and multiple probe cards, each test head corresponding to one probe card and connected to the corresponding probe card, each test head including multiple test stations, the chip testing stability detection device including: The structured test data set generation module is used to obtain the target test data of each chip in the current production batch and obtain the structured test data set; among which, the target test data is used to characterize the test data of any chip on multiple target monitoring test items; The statistical value generation module is used to obtain target measured statistical values ​​for multiple consecutive sliding windows from a structured test data set, using a preset number of chips as a sliding window. The anomaly detection module is used to determine whether there are any anomalies in the testing process of the test machine in each sliding window based on the target measured statistical values ​​of each sliding window. If there are any anomalies, the operation of the test machine is paused and the current production batch is blocked from passing through the station.

[0015] Optionally, when the target measured statistical value includes the sliding window mean, the statistical value generation module is also used to calculate the global average and global standard deviation of all chips in each sliding window under the current target monitoring test item for any target monitoring test item, so as to obtain the sliding window mean corresponding to the current target monitoring test item.

[0016] Thirdly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the chip testing stability detection method as described in any of the first aspects above.

[0017] The chip testing stability detection method, apparatus, and storage medium provided in this invention have the following beneficial effects: This invention obtains a structured test data set by acquiring the target measured data of each chip in the current production batch. Using a preset number of chips as a sliding window, multiple consecutive sliding window target measured statistical values ​​are obtained from the structured test data set. The target measured data characterizes the measured data of any chip across multiple target monitoring test items. Then, based on the target measured statistical values ​​of the sliding windows, the system determines whether there are any anomalies in the testing process corresponding to each sliding window. If an anomaly is found, the testing machine's operation is paused, and the current production batch is blocked from passing through the testing station. Based on this, this invention ensures the quality of chip testing in the semiconductor chip testing industry by detecting chip testing stability, ensuring that the measured values ​​of each produced chip are within the standard specification range and are traceable. This effectively prevents the impact of deteriorating testing machine conditions, thus ensuring the factory quality of the chips.

[0018] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This invention provides a flowchart of one of the steps of a chip testing stability detection method. Figure 2 A flowchart of step 100 provided in an embodiment of the present invention is shown; Figure 3 This is a second flowchart illustrating the steps of the chip testing stability detection method provided in this embodiment of the invention; Figure 4 The third step of the chip testing stability detection method provided in this embodiment of the invention is shown in the flowchart. Figure 5 The fourth step of the chip testing stability detection method provided in this embodiment of the invention is shown in the flowchart. Figure 6 A block diagram of the chip testing stability detection device provided in an embodiment of the present invention is shown; Figure 7 A block diagram of a server provided in an embodiment of the present invention is shown.

[0021] Icons: 10-Chip testing stability detection device; 101-Structured test data set generation module; 102-Statistical value generation module; 103-Anomaly judgment module; 20-Server; 201-Memory; 202-Processor; 203-Communication module. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0023] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0024] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0025] As described in the background section, most existing solutions optimize chip testing process stability by improving test procedures, while neglecting to detect chip testing stability. As a result, they cannot avoid chip instability caused by deterioration of the test machine's condition (e.g., test machine pressure and / or temperature and / or inaccurate calibration of the test machine board). Based on this, this application provides a solution for detecting the stability of chip testing, namely, by detecting whether the chip testing machine maintains consistent measurement results without drift during continuous testing, thereby ensuring the quality of the chip before it leaves the factory.

[0026] The following will describe in detail the method for testing the stability of the detection chip through specific embodiments.

[0027] The chip testing stability detection method provided in this embodiment is applied to a testing machine. This embodiment does not limit the specific structure of the testing machine. In one possible implementation, the testing machine includes multiple test heads, and each test head corresponds to multiple test sites.

[0028] In this embodiment, the testing machine is also equipped with a spring-loaded pogo pin, a socket, and a load board. Each spring-loaded pogo pin is disposed in the socket, the socket is mounted on the load board, and the load board is mounted on the test head.

[0029] Each test head contains an independent detection component, the same number as the number of test sites. In one possible implementation, the detection component includes: digital signal board, analog signal board, mixed digital-analog signal board, power supply board, etc., to test the corresponding number of chips.

[0030] Based on this, please refer to Figure 1 , Figure 1 The flowchart of the chip testing stability detection method provided in this embodiment of the invention is shown. The chip testing stability detection method provided in this embodiment includes steps 100 to 300.

[0031] Step 100: Obtain the target test data of each chip in the current production batch to obtain a structured test data set.

[0032] In this embodiment, the target measured data is used to characterize the measured data of any chip on multiple target monitoring test items.

[0033] In one possible implementation, the target monitoring test items in this embodiment include, but are not limited to, parameters such as power supply voltage, signal rise time, input low-level voltage, and output high-level voltage.

[0034] Step 200: Using a preset number of chips as a sliding window, obtain the target measured statistical values ​​of multiple consecutive sliding windows from the structured test data set.

[0035] Step 300: Based on the target measured statistical values ​​of each sliding window, determine whether there is any abnormality in the testing process of the test machine in each sliding window. If there is an abnormality, suspend the operation of the test machine and intercept the current production batch from passing through the station.

[0036] Assuming the sliding window includes 100 chips, in this embodiment, the consecutive sliding windows can be understood as follows: for any two adjacent sliding windows, the current sliding window consists of chips with chip numbers in the range of 0-100, and the next sliding window consists of chips with chip numbers in the range of 101-200.

[0037] It should be noted that, in order to improve testing efficiency, the chips in this embodiment are good chips marked as Pass in each production batch, that is, bare chips whose electrical parameters meet the specifications.

[0038] Based on this, this application ensures that the test data of each chip is checked by obtaining the key test item field values ​​and performing anomaly comparison, thereby ensuring the quality of each chip leaving the semiconductor testing plant.

[0039] Please refer to Figure 2 , Figure 2 The flowchart of step 100 provided in the embodiment of the present invention is shown. In this embodiment, the step of obtaining the target test data of each chip in the current production batch and obtaining the structured test data set includes steps 101 and 102.

[0040] Step 101: Obtain the raw chip test data file for any production batch from the chip test data FTP server; Step 102: For any production batch, obtain the target test data of each chip in the current production batch from the chip test raw data file to obtain a structured test data set.

[0041] This embodiment can obtain the chip test raw data file of any production batch from the chip test data FTP server, then parse the information of the chip test raw data file (Standard Test Data Format, STDF) to identify the chip number, test item name, measured data and other contents, and filter out the target monitoring test items from each test item to obtain the measured data of each chip corresponding to the current target monitoring test item, and construct a structured test data set containing the measured data of multiple chips in each target monitoring test item.

[0042] It should be noted that this embodiment does not limit the number of target monitoring test items, nor does it limit the category of each target monitoring test item. It can be flexibly set according to user needs, including but not limited to parameters such as power supply voltage, signal rise time, input low-level voltage, and output high-level voltage.

[0043] To further improve data retrieval and processing efficiency, in one possible implementation, this embodiment can store the above-mentioned structured test data set in an SQL database for users to query and retrieve.

[0044] Once the structured test dataset is determined, the data from each structured test dataset needs to be statistically analyzed to obtain parameters that can be used to quantify the stability of chip testing.

[0045] Example 1 When the measured statistical value of the target includes the sliding window mean, please refer to... Figure 3 , Figure 3 The flowchart of another step of the chip testing stability detection method provided by the embodiment of the present invention is shown. Step 200, which obtains the target measured statistical values ​​of each sliding window from the structured test data set, includes step 201.

[0046] Step 201: For any target monitoring test item, calculate the global average and global standard deviation of all chips in each sliding window under the current target monitoring test item, and obtain the sliding window mean corresponding to the current target monitoring test item.

[0047] Assuming that each sliding window in this embodiment contains 100 chips, the chips in the current production batch are divided into multiple groups according to the sliding window. Then, the global average value and global standard deviation of all chips in each sliding window under each target monitoring test item are calculated to obtain the above-mentioned target measured statistical values.

[0048] In one possible implementation, assuming the current production batch includes 5000 chips and the target monitoring test item is the power supply voltage, this application can divide all chips into 50 groups according to the serial number of each chip based on the above-mentioned sliding window setting. That is, the first sliding window includes chips with serial numbers from 1 to 100. Then, the average power supply voltage of the 100 chips in the first sliding window is calculated to obtain the global average value of the first sliding window. The global average values ​​of the other sliding windows are not described here, but can be referred to the calculation method of the global average value of the first sliding window.

[0049] Based on this, this embodiment can use the global average value as the global stability index to determine whether the current test machine has experienced systematic drift, such as temperature control changes, voltage control changes, power supply voltage fluctuations, global calibration failures, etc.

[0050] After obtaining the global average value corresponding to each sliding window, this embodiment can calculate the global standard deviation corresponding to the current sliding window based on the global average value to evaluate the dispersion or scattering of each target monitoring test item within each sliding window.

[0051] In one possible implementation, the global standard deviation is obtained by: calculating the deviation between the measured data of each chip in the current sliding window and the corresponding global average value under the current target monitoring test item; then calculating the sum of the squares of each deviation; then calculating the mean of the sum of the squares of all deviations; and finally taking the square root of the mean value. The result is the global standard deviation corresponding to the current sliding window.

[0052] Furthermore, this embodiment does not limit the calculation order of the global average value of each sliding window. That is, this embodiment can calculate the global average value of each sliding window in sequence according to the sliding window order, or it can execute the calculation of the global average value of each sliding window in parallel.

[0053] In one possible implementation, to improve detection efficiency, this embodiment performs the calculation of the global average value of each sliding window in parallel.

[0054] Similarly, this embodiment does not restrict the order in which the global standard deviation of each sliding window is calculated. That is, this embodiment can calculate the global standard deviation of each sliding window sequentially according to the sliding window order, or it can execute the calculation of the global standard deviation of each sliding window in parallel.

[0055] In one possible implementation, to improve detection efficiency, this embodiment performs the calculation of the global standard deviation of each sliding window in parallel.

[0056] Based on this, after determining the global average value of each sliding window, the step 300 in this embodiment, which determines whether there is an anomaly in the testing process corresponding to each sliding window based on the target measured statistical value of each sliding window, includes: For any target monitoring test item, determine whether the global average and global standard deviation corresponding to the current target monitoring test item are both within the corresponding preset global threshold range. If so, determine that the test process corresponding to the current sliding window is in a normal state; otherwise, determine that the test process corresponding to the current sliding window is in an abnormal state.

[0057] This embodiment does not limit the range of values ​​for the preset global threshold intervals corresponding to the global average and global standard deviation. In this embodiment, the preset global threshold interval is determined by the control threshold corresponding to the same target monitoring test item in historical good product batches.

[0058] Assuming the global average corresponds to a first preset global threshold interval and the global standard deviation corresponds to a second preset global threshold interval, this embodiment can determine whether the global average corresponding to the current target monitoring test item is greater than the upper limit of the first preset global threshold interval or less than the lower limit of the first preset global threshold interval, and simultaneously determine whether the global standard deviation corresponding to the current target monitoring test item is greater than the upper limit of the second preset global threshold interval or less than the lower limit of the second preset global threshold interval. Only when both the global average and global standard deviation under the current sliding window meet the corresponding preset global threshold intervals will the test process corresponding to the current sliding window be determined to be in a normal state; all other results will be determined to be in an abnormal state.

[0059] Example 2 The target measured statistical value also includes the site statistical value corresponding to each test site under any sliding window, that is, the target measured statistical value includes the site statistical value in addition to the sliding window mean.

[0060] It should be noted that this embodiment does not limit the execution method of obtaining the sliding window mean and station statistics; they can be executed in parallel or sequentially.

[0061] The calculation and acquisition process of the sliding window mean will not be repeated in this embodiment; please refer to the description in the previous embodiment for details.

[0062] Regarding the site statistics, it is understandable that, since each test head includes multiple test sites, for each chip in any production batch, this embodiment can sequentially allocate them to each test site according to each chip number.

[0063] Based on this, please Figure 3 Based on, refer to Figure 4 , Figure 4 The flowchart of step 200 provided in the embodiment of the present invention is shown. Step 200, which obtains the target measured statistical values ​​of each sliding window from the structured test data set, includes steps 202 and 203.

[0064] Step 202: All chips in the sliding window are assigned to various test stations in the order they entered the test machine, resulting in multiple test station groups; Step 203: For any target monitoring test item, calculate the average value of all chips under each test site group under the current target monitoring test item, and obtain the site average value of each test site group under the current target monitoring test item, so as to determine the target measured statistical value of each sliding window.

[0065] Assuming each test head includes eight test sites, the chips can be sequentially assigned to each test site according to the order in which they enter the test machine, resulting in corresponding test site groups. In this embodiment, each test site group can be considered as multiple consecutive sliding windows.

[0066] For example, the first chip entering the test machine is assigned to the first test site, Site1; the second chip entering the test machine is assigned to the second test site, Site2; ..., the eighth chip entering the test machine is assigned to the eighth test site, Site8; subsequently, the ninth chip entering the test machine is assigned to the first test site, Site1; the tenth chip entering the test machine is assigned to the second test site, Site2; and so on, 100 chips can be divided into 8 test sites according to the above cycle, resulting in test site groups that include multiple chips.

[0067] Then, calculate the average value of all chips in each test site group under any target monitoring test item, and obtain the site average value of each test site group under the current target monitoring test item.

[0068] It should be noted that this embodiment does not restrict the order of calculation of the site mean of each test site group. That is, this embodiment can calculate the site mean of each test site group in the order of test site grouping, or it can execute the calculation of the site mean of each test site group in parallel.

[0069] In one possible implementation, to improve detection efficiency, this embodiment performs the calculation of the site mean for each test site group in parallel.

[0070] Based on this, this embodiment can not only evaluate the global stability index from the time / quantity dimension to determine whether the current test machine has experienced systematic drift, but also evaluate whether the individual physical site of the test machine has problems based on the site average of each test site group, thereby improving the accuracy of detection.

[0071] Based on this, the step 300 in this embodiment, which determines whether there is an anomaly in the testing process corresponding to each sliding window based on the target measured statistical values ​​of each sliding window, includes: For any target monitoring test item, determine whether the mean value of the sliding window corresponding to the current target monitoring test item is within the preset global threshold range, and sequentially determine whether the mean value of the site corresponding to the current target monitoring test item is within the preset site threshold range. If the average value of the sliding window corresponding to the current target monitoring test item is within the preset global threshold range, and the average value of the site corresponding to the current target monitoring test item is within the preset site threshold range, then the test process corresponding to the current sliding window is determined to be in a normal state; otherwise, the test process corresponding to the current sliding window is determined to be in an abnormal state.

[0072] Based on this, in this embodiment, the test process is determined to be in a normal state only when the average value of the sliding window corresponding to each target monitoring test item is within a preset global threshold range and the average value of the site corresponding to each target monitoring test item is within a preset site threshold range.

[0073] In summary, this embodiment can improve detection accuracy while achieving the goal of detecting chip testing stability by using both site average and sliding window average.

[0074] Example 3 The difference between this embodiment and embodiment two is that in this embodiment, the target measured statistical value is only the site statistical value corresponding to each test site under any sliding window.

[0075] The calculation and acquisition process of the above-mentioned site statistics will not be repeated in this embodiment; please refer to the description in Embodiment 2 for details.

[0076] Based on this, the step 300 in this embodiment, which determines whether there is an anomaly in the testing process corresponding to each sliding window based on the target measured statistical values ​​of each sliding window, includes: For any target monitoring test item, determine in order of station station whether the average value of the current target monitoring test item is within the preset station threshold range. If the average value of the site corresponding to the current target monitoring test item is within the preset site threshold range, the test process corresponding to the current sliding window is determined to be in a normal state; otherwise, the test process corresponding to the current sliding window is determined to be in an abnormal state.

[0077] Based on this, this embodiment can determine the stability of the detection chip test solely by the average value of the stations.

[0078] Furthermore, since the performance degradation of existing testing equipment usually does not trigger system alarms, the testing process can still run "normally," resulting in some non-compliant chips being mistakenly judged as qualified products. Consequently, when these potentially defective chips are applied to terminal devices, they induce a series of quality problems, including but not limited to serious consequences such as device performance degradation, abnormal power consumption, and even functional failure.

[0079] Based on this, please refer to Figure 5 , Figure 5 The flowchart of another step of the chip testing stability detection method provided in this embodiment of the invention is shown. The chip testing stability detection method in this embodiment also includes step 400.

[0080] Step 400: If the testing machine has any abnormalities in the testing process corresponding to each sliding window, the production abnormality handling process will be triggered to ensure that the abnormal production batch is handled in a timely manner.

[0081] In one possible implementation, the production exception handling process in this embodiment is implemented as follows: Once a chip test stability anomaly is triggered, a structured warning package can be sent to the MES system. This package includes, but is not limited to, the production batch number, the abnormal window or abnormal test site, and the presence of abnormal monitoring test items. After the MES system receives the structured warning package, the production operator will further confirm whether the chip test stability anomaly is true. If it is true, the product engineer will confirm the cause of the anomaly.

[0082] In summary, this invention obtains a structured test data set by acquiring the target measured data of each chip in the current production batch. Using a preset number of chips as a sliding window, it acquires multiple consecutive target measured statistical values ​​from the structured test data set. The target measured data characterizes the measured data of any chip across multiple target monitoring test items. Then, based on the target measured statistical values ​​of the sliding windows, it determines whether the testing machine exhibits any anomalies in the testing process corresponding to each sliding window. If an anomaly is found, the testing machine's operation is paused, and the current production batch is blocked from passing through the testing station, thereby detecting chip testing stability and ensuring the chip's factory quality.

[0083] The same idea applies as the previous embodiment; please refer to [the previous embodiment]. Figure 6 , Figure 6 This diagram shows a block illustration of a chip testing stability detection device provided in an embodiment of the present invention. In this embodiment, the chip testing stability detection device 10 includes: The structured test data set generation module 101 is used to acquire the target test data of each chip in the current production batch to obtain a structured test data set. The target test data is used to characterize the test data of any chip on multiple target monitoring test items.

[0084] The statistical value generation module 102 is used to obtain target measured statistical values ​​of multiple consecutive sliding windows from the structured test data set, using a preset number of chips as a sliding window. The anomaly detection module 103 is used to determine whether there is an anomaly in the testing process of the test machine in each sliding window based on the target measured statistical value of the sliding window. If there is an anomaly, the operation of the test machine is suspended and the current production batch is blocked from passing through the station.

[0085] In this embodiment, when the measured statistical value of the target includes the mean of the sliding window, the statistical value generation module 102 is also used to calculate the global average value and global standard deviation of all chips in each sliding window under the current target monitoring test item for any target monitoring test item, so as to obtain the mean of the sliding window corresponding to the current target monitoring test item.

[0086] In summary, this invention ensures the quality of chip testing in the semiconductor chip testing industry by detecting the stability of chip testing, ensuring that the measured values ​​of each chip produced are within the standard specification range and are traceable. It can effectively prevent the impact caused by the deterioration of test equipment conditions, thereby ensuring the quality of the chips leaving the factory.

[0087] The same idea applies as the previous embodiment; please refer to [the previous embodiment]. Figure 7 , Figure 7 A block diagram of a server provided in an embodiment of the present invention is shown. The server 20 includes a memory 201, a processor 202, and a communication module 203. The memory 201, processor 202, and communication module 203 are electrically connected to each other directly or indirectly to realize data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses or signal lines.

[0088] The memory 201 is used to store programs or data. The memory may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0089] The processor 202 is used to read / write data or programs stored in the memory and execute corresponding functions, namely, acquiring the target measured data of each chip in the current production batch to obtain a structured test data set. Using a preset number of chips as a sliding window, it acquires target measured statistical values ​​for multiple consecutive sliding windows from the structured test data set; wherein, the target measured data is used to characterize the measured data of any chip on multiple target monitoring test items. Then, based on the target measured statistical values ​​of the sliding windows, it determines whether there are any abnormalities in the testing process corresponding to each sliding window. If an abnormality is found, the operation of the testing machine is paused, and the current production batch is intercepted.

[0090] The communication module 203 is used to establish a communication connection between the server and other communication terminals through the network, and to send and receive data through the network.

[0091] It should be understood that, Figure 7 The structure shown is only a schematic diagram of the server structure; the server may also include components such as... Figure 7 The more or fewer components shown, or having the same Figure 7 The different configurations shown. Figure 7 The components shown can be implemented using hardware, software, or a combination thereof.

[0092] Similar to the previous embodiment, this invention also provides a computer-readable storage medium storing a computer program. When executed by a processor, the computer program implements the chip testing stability detection method as described in any of the first aspects above, namely, acquiring target measured data for each chip in the current production batch to obtain a structured test data set. Using a preset number of chips as a sliding window, multiple consecutive sliding window target measured statistical values ​​are obtained from the structured test data set; wherein, the target measured data is used to characterize the measured data of any chip on multiple target monitoring test items. Then, based on the target measured statistical values ​​of the sliding windows, it is determined whether there are any abnormalities in the testing process corresponding to each sliding window. If an abnormality is found, the operation of the testing machine is paused, and the current production batch is intercepted.

[0093] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0094] In addition, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0095] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0096] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A chip testing stability detection method, applied to a testing machine, the testing machine comprising multiple test heads, each test head comprising multiple test stations, characterized in that, The chip stability testing method includes: Obtain the target measured data of each chip in the current production batch to obtain a structured test data set; wherein, the target measured data is used to characterize the measured data of any chip on multiple target monitoring test items; Using a preset number of chips as a sliding window, multiple consecutive sliding windows of target measured statistical values ​​are obtained from the structured test data set; Based on the target measured statistical values ​​of each sliding window, it is determined whether there is any abnormality in the testing process of the test machine corresponding to each sliding window. If there is an abnormality, the operation of the test machine is suspended and the current production batch is blocked from passing through the station.

2. The chip testing stability detection method according to claim 1, characterized in that, When the target measured statistical value includes the sliding window mean, the steps for obtaining the target measured statistical value of each sliding window from the structured test data set include: For any target monitoring test item, calculate the global average and global standard deviation of all chips within each sliding window under the current target monitoring test item to obtain the sliding window mean corresponding to the current target monitoring test item.

3. The chip testing stability detection method according to claim 2, characterized in that, The steps for determining whether the testing machine exhibits any abnormalities in the testing process corresponding to each sliding window based on the target measured statistical values ​​of each sliding window include: For any target monitoring test item, determine whether the global average and global standard deviation corresponding to the current target monitoring test item are both within the corresponding preset global threshold range; if yes, determine that the test process corresponding to the current sliding window is in a normal state; if no, determine that the test process corresponding to the current sliding window is in an abnormal state. The preset global threshold range is determined by the control threshold corresponding to the same target monitoring test item in historical good product batches.

4. The chip testing stability detection method according to claim 1 or 2, characterized in that, When the target measured statistical value includes the site statistical value corresponding to each test site under any sliding window, the step of obtaining the target measured statistical value of each sliding window from the structured test data set further includes: All chips within the sliding window are assigned to various test stations according to the order in which they entered the test machine, resulting in multiple test station groups; For any target monitoring test item, calculate the average value of all chips under each test site group under the current target monitoring test item, and obtain the site average value of each test site group under the current target monitoring test item, so as to determine the target measured statistical value of each sliding window.

5. The chip testing stability detection method according to claim 4, characterized in that, When the target measured statistical value includes the sliding window mean, the step of determining whether the testing machine has any abnormalities in the testing process corresponding to each sliding window based on the target measured statistical value of each sliding window further includes: For any target monitoring test item, determine whether the mean value of the sliding window corresponding to the current target monitoring test item is within the preset global threshold range, and sequentially determine whether the mean value of the site corresponding to the current target monitoring test item is within the preset site threshold range. If the average value of the sliding window corresponding to the current target monitoring test item is within the preset global threshold range, and the average value of the site corresponding to the current target monitoring test item is within the preset site threshold range, then the test process corresponding to the current sliding window is determined to be in a normal state; otherwise, the test process corresponding to the current sliding window is determined to be in an abnormal state.

6. The chip testing stability detection method according to claim 1 or 2, characterized in that, The step of obtaining the target test data of each chip in the current production batch to obtain a structured test data set includes: Obtain the raw chip test data file for any production batch from the chip test data FTP server; For any production batch, the target test data of each chip in the current production batch is obtained from the chip test raw data file to obtain a structured test data set.

7. The chip testing stability detection method according to claim 1 or 2, characterized in that, After determining whether the testing process of the test machine is abnormal in each sliding window based on the target measured statistical values ​​of each sliding window, the chip test stability detection method further includes: If the testing machine encounters an anomaly during the testing process corresponding to each sliding window, it will intercept the current production batch from passing through the station and trigger the production anomaly handling process to ensure that the abnormal production batch is handled in a timely manner.

8. A chip testing stability detection device, applied to a testing machine, the testing machine comprising multiple test heads and multiple probe cards, each test head corresponding to and connected to a corresponding probe card, each test head comprising multiple test stations, characterized in that, The chip testing stability detection device includes: The structured test data set generation module is used to obtain the target test data of each chip in the current production batch to obtain the structured test data set; wherein, the target test data is used to characterize the test data of any chip on multiple target monitoring test items; The statistical value generation module is used to obtain target measured statistical values ​​of multiple consecutive sliding windows from the structured test data set, using a preset number of chips as a sliding window. The anomaly detection module is used to determine whether there is an anomaly in the testing process of the test machine in each sliding window based on the target measured statistical value of each sliding window. If there is an anomaly, the operation of the test machine is paused and the current production batch is blocked from passing through the station.

9. The chip testing stability detection device according to claim 8, characterized in that, When the target measured statistical value includes the sliding window mean, the statistical value generation module is also used to calculate the global average value and global standard deviation of all chips in each sliding window under the current target monitoring test item for any target monitoring test item, so as to obtain the sliding window mean corresponding to the current target monitoring test item.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the chip testing stability detection method as described in any one of claims 1-7.

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