Pixel circuit

Abstract

A pixel circuit includes a constant current control circuit, which includes a first thin-film transistor (TFT). The constant current control circuit is configured to control the current flowing in a light-emitting element. The pixel circuit also includes a pulse width modulation (PWM) circuit, which is configured to output a control signal for the first TFT based on a grayscale data voltage and a ramp signal input to the PWM circuit. The first TFT is configured to control the current flowing in the light-emitting element. The PWM circuit includes a PWM driving TFT and a second TFT disposed between the PWM driving TFT and the output node of the control signal. The gate of the second TFT is configured to be provided with a constant voltage.

Description

Technical Field

[0001] This disclosure relates to a pixel circuit. Background Technology

[0002] Display devices utilizing miniature light-emitting diodes (micro-LEDs) employ pulse-width modulation (PWM) driving, which modulates the duration of their emission to display halftones. Among the various methods of PWM driving, analog PWM driving, which modulates the width of the emission pulses in an analog manner based on grayscale data, has been standardized in recent years.

[0003] The pixel circuit driven by analog PWM includes a constant current generation (CCG) unit, a PWM unit, and a switch. The CCG unit generates a constant current. The PWM unit compares the grayscale data voltage representing the grayscale data with a ramp signal and converts the grayscale data voltage into a pulse signal. When the pulse signal from the PWM unit varies according to the width of the pulse signal, the switch cuts off the current generated by the CCG unit.

[0004] Analog PWM driving requires rectangular pulses as the ideal drive current; however, the current in actual circuits drops slowly, which raises the problem that its finite fall time (switching time) leads to a degraded display quality, especially in the low grayscale range. Summary of the Invention

[0005] The PWM drive of a light-emitting element requires a technique to sharpen the smooth falling edge of the pulse waveform of the drive current.

[0006] One aspect of this disclosure is a pixel circuit configured to control a light-emitting element. The pixel circuit includes a constant current control circuit comprising a first thin-film transistor (TFT). The constant current control circuit is configured to control the current flowing in the light-emitting element. The pixel circuit includes a pulse width modulation (PWM) circuit configured to output a control signal for the first TFT based on a grayscale data voltage and a ramp signal input to the PWM circuit. The first TFT is configured to control the current flowing in the light-emitting element. The PWM circuit includes a PWM driving TFT and a second TFT disposed between the PWM driving TFT and the output node of the control signal. The gate of the second TFT is configured to be provided with a constant voltage.

[0007] One aspect of this disclosure is an improvement to the PWM drive of a light-emitting element with a sharp falling edge of a pulse waveform having a drive current.

[0008] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory, and do not limit the content of this disclosure. Attached Figure Description

[0009] Figure 1 The configuration of the pixel circuitry in an embodiment of this disclosure is illustrated schematically.

[0010] Figure 2 The diagram shows the input signal voltages VRAMP and VDATA to the PWM circuit, the control signal voltage VOUT output from the PWM circuit, and the time variation of the drive current ILED to the micro LED.

[0011] Figure 3A It shows Figure 2 The state of the pixel circuit at time T1.

[0012] Figure 3B It shows Figure 2 The state of the pixel circuit at time T2.

[0013] Figure 3C It shows Figure 2 The state of the pixel circuit at time T3.

[0014] Figure 3D It shows Figure 2 The state of the pixel circuit at time T4.

[0015] Figure 3E It shows Figure 2 The state of the pixel circuit at time T5.

[0016] Figure 4 The waveforms of the ramp signal VRAMP and the LED current ILED in response to different grayscale data voltages are schematically shown.

[0017] Figure 5 It shows how to get from Figure 1 The pixel circuit in the pixel circuit is configured by removing the supplementary thin-film transistors.

[0018] Figure 6 The characteristics of pixel circuits in related technologies are shown.

[0019] Figure 7 A detailed configuration example of the pixel circuitry in the embodiment is shown.

[0020] Figure 8A It is a sequence diagram showing the time variation of a frame of signal in a pixel circuit.

[0021] Figure 8B Instructions in Figure 8A A graph shows the temporal variation of the signal within the time period enclosed by the dashed line, and in... Figure 8A Another graph shows the time variation of the signal within the time period enclosed by the dashed line.

[0022] Figure 9 It shows Figure 7 The simplified circuit configuration of the pixel circuit is shown.

[0023] Figure 10A This is a diagram explaining the function of a thin-film transistor.

[0024] Figure 10B Pixel circuits with and without supplemental thin-film transistors are provided. Simulation results of the characteristics.

[0025] Figure 11 This is a diagram illustrating the effect of the pixel circuit 10 in the embodiments of this disclosure.

[0026] Figure 12 Simulated waveforms of the gate voltage, source voltage, and drain voltage of the supplementary thin-film transistor in this embodiment are provided.

[0027] Figure 13A Simulation results are provided showing the relationship between the constant voltage VREF and the fall time of the LED current ILED when a 9 V power supply voltage VH2 is supplied to the PWM circuit in the pixel circuit of Example 2.

[0028] Figure 13B Simulation results are provided showing the relationship between the constant voltage VREF and the fall time of the LED current ILED when a 5 V power supply voltage VH2 is supplied to the PWM circuit in the pixel circuit.

[0029] Figure 13C Simulation results are provided showing the relationship between the constant voltage VREF and the fall time of the LED current ILED when a 1 V power supply voltage VH2 is supplied to the PWM circuit in the pixel circuit.

[0030] Figure 14 An example configuration of the pixel circuit is shown with the positive supply voltage VH2 of the PWM circuit being 9 V.

[0031] Figure 15 An example configuration of the pixel circuit is shown with the positive supply voltage VH2 of the PWM circuit being 1 V.

[0032] Figure 16 Simulation results are provided for the relationship between the capacitance C of the capacitor and the fall time in Example 3.

[0033] Figure 17 Simulation results of the LED current ILED are provided for different capacitor Cs in the pixel circuit including the supplementary thin-film transistor in this embodiment.

[0034] Figure 18 An example from Embodiment 4 is shown, in which Figure 9 In the simplified pixel circuit shown, the p-type transistors are replaced by n-type thin-film transistors.

[0035] Figure 19 Simulation results are provided for the relationship between the channel length of the PWM-driven thin-film transistor and the LED current fall time in Example 5.

[0036] Figure 20 This is a circuit diagram showing the configuration of a PWM-driven thin-film transistor with a dual-gate structure.

[0037] Figure 21 This is a plan view showing an example configuration of a micro LED display device.

[0038] Figure 22 The configuration of the pixel circuitry in another embodiment of this disclosure is illustrated schematically.

[0039] Figure 23 It shows Figure 22 The pixel circuit shown exhibits the time variations of LED current, drain voltage of PWM-driven thin-film transistor, and gate voltage of constant-current-driven thin-film transistor.

[0040] Figure 24 The configuration of the pixel circuitry in another embodiment of this disclosure is illustrated schematically.

[0041] Figure 25 The configuration of the pixel circuitry in another embodiment of this disclosure is illustrated schematically.

[0042] Figure 26 It shows Figure 25 The pixel circuit shown exhibits the time variations of LED current, drain voltage of PWM-driven thin-film transistor, and gate voltage of constant-current-driven thin-film transistor.

[0043] Figure 27 Provided Figure 25 The simulation results show the relationship between the LED current fall time and the constant voltage DIVH in the pixel circuit shown.

[0044] Figure 28A Provided Figure 22 The simulation results of the pixel circuit shown are presented.

[0045] Figure 28B Provided Figure 25 The simulation results of the pixel circuit shown are presented.

[0046] Figure 29A Provided Figure 22 The simulation results of the pixel circuit shown are presented.

[0047] Figure 29B Provided Figure 25 The simulation results of the pixel circuit shown are presented.

[0048] Figure 30 The configuration of the pixel circuitry in another embodiment of this disclosure is illustrated schematically. Detailed Implementation

[0049] One aspect of this disclosure describes the light emission control of a micro light-emitting diode (microLED). Pixel circuitry for controlling the light emission of the microLED illuminates the microLED for a period of time having a length based on grayscale data within a frame time interval, and then de-illuminates the microLED. A longer light emission period implies higher brightness. A frame time interval is a period of time during which one frame of video data (for moving or still images) input from outside the display device is displayed.

[0050] One embodiment of this disclosure controls the light-emitting period (brightness) of a micro-LED based on grayscale data using pulse width modulation (PWM). A method of driving a micro-LED using PWM control (PWM driving) provides the micro-LED with a pulsed drive current (also referred to as lighting current or LED current) having a pulse width based on the grayscale data to light the micro-LED.

[0051] The pulse width is the length between the median rise and fall of the drive current pulse; a longer pulse width means a longer emission period or higher brightness. The drive current in the low grayscale range does not reach the highest value in the high grayscale range; its waveform can consist of a steep rise edge and a gentle fall edge.

[0052] Analog PWM driving requires a rectangular waveform as the ideal drive current. However, in real circuits, the current decreases slowly; there is a finite fall time (transition region) during which the drive current gradually decreases. During the fall time, the drive current gradually decreases.

[0053] As the drive current density increases, the emission wavelength of the micro-LED shifts to shorter wavelengths, and then shifts to longer wavelengths with further increases. When the drive current density is low, the external quantum efficiency (EQE) of the micro-LED decreases significantly. This is particularly detrimental to the luminescence of the micro-LED when the supply period of the drive current for low grayscale levels consists only of the fall time. Therefore, the length of this fall time is a major issue in the PWM driving of micro-LEDs.

[0054] The pixel circuit in the embodiments of this disclosure includes a supplementary thin-film transistor located between the output node of the PWM circuit and the driving thin-film transistor. The gate of the supplementary thin-film transistor is provided with a constant voltage during a frame period. The supplementary thin-film transistor reduces the fall time of the driving current of the micro-LED.

[0055] In a circuit, two circuit elements can be directly connected without any other circuit elements (excluding lines), or they can be connected via one or more other circuit elements. To distinguish between a connection of two circuit elements connected via or without other circuit elements, this connection can be called a circuit connection or an electrical connection. To distinguish between a connection without any other circuit elements, this connection can be called a direct connection or a physical connection.

[0056] by Figure 7 Taking M15 as an example, its gate is connected to .when When the voltage is low, the gate-source voltage of M15 is sufficiently high; M15 is fully turned on. Within the PWM circuit 12, the maximum current flowing from the positive power supply voltage VH2 to VOUT is a tiny current of 20 nA; at M15... The absolute value of the voltage drop is approximately 0.5 mV, which is small enough to be negligible compared to the absolute value of the voltage between the positive supply voltage VH2 and VOUT of the PWM circuit 12, which is 13 V. In other words, when M15 is fully turned on, the voltage drop caused by M15 is negligible. When the voltage drop is significant, even if M15 is actually used, its circuit symbol can be omitted from the circuit diagram, and the explanation of its operation can also be omitted. In the following description, unless otherwise stated, connections in the circuit mean electrical connections or circuit connections.

[0057] Example 1

[0058] Figure 1 The configuration of the pixel circuitry in an embodiment of this disclosure is illustrated schematically. Besides... Figure 1 In addition to the components shown, the pixel circuitry of this disclosure may include other components and / or exclude others. Figure 1 One or more elements as shown. Figure 1 The direct connection of circuit elements can be an electrical connection or a circuit connection.

[0059] The display area of ​​the display device includes micro-LEDs arranged in a predefined layout (e.g., in a matrix). 11. The micro LED 11 is a light-emitting element or pixel. The features of this disclosure can be applied to light-emitting elements of a different kind than the micro LED. The display device includes pixel circuits 10 for individually controlling the micro LEDs 11. Each pixel circuit 10 includes a constant current circuit 14, a PWM circuit 12, and a current control switch 16 (an example of a first thin-film transistor). The constant current circuit 14 and the current control switch 16 are included in a constant current control circuit 13.

[0060] All micro-LEDs 11 can be used for the same color of light, or the display area can include micro-LEDs 11 for different colors of light (e.g., red, blue, and green). In this example, one micro-LED 11 corresponds to a single pixel.

[0061] The miniature LED 11 includes an anode and a cathode. The cathode of the miniature LED 11 is supplied with a constant power supply voltage PVEE. The constant current circuit 14 can have any internal configuration. The constant current circuit 14 generates a constant current. A current control switch 16 is disposed between the miniature LED 11 and the constant current circuit 14. The current control switch 16 is a thin-film transistor (also simply referred to as a transistor), and... Figure 1 In the configuration example, it is a p-type thin-film transistor. The active layer of a p-type thin-film transistor can be made of, for example, low-temperature polycrystalline silicon.

[0062] exist Figure 1 In the configuration example, the source of the current-controlled switch 16 is connected to the constant current circuit 14, and the drain is connected to the anode of the micro LED 11. The current-controlled switch 16 is configured to turn on / off the current path in the power path from the constant current circuit 14 to the power line used to provide the power supply voltage PVEE via the micro LED 11.

[0063] A current-controlled switch 16 can be positioned between the micro-LED 11 and the power line providing the power supply voltage PVEE. The current-controlled switch 16 can be an n-type thin-film transistor. The active layer of the n-type thin-film transistor can be made of, for example, oxide semiconductor or low-temperature polycrystalline silicon.

[0064] The PWM circuit 12 includes a PWM driving thin-film transistor 121, a supplementary thin-film transistor 122 (an example of a second thin-film transistor), capacitors 123 and 124, and switching thin-film transistors 125 and 126. The PWM driving thin-film transistor 121 operates as a comparator.

[0065] One source / drain of the switching thin-film transistor 126 and one end of the capacitor 123 are connected to the gate of the PWM driving thin-film transistor 121. In a thin-film transistor, the source and drain are interchanged according to the direction of the current; therefore, either one is referred to as the source / drain.

[0066] One source / drain of the switching thin-film transistor 125 and one end of the capacitor 124 are connected to the gate of the current-controlled switch 16. The gate of the switching thin-film transistor 126 is provided with a control signal S2, and the gate of the switching thin-film transistor 125 is provided with a control signal SET. Switching thin-film transistors 126 and 125 are controlled by control signals S2 and SET, and as will be referred to... Figures 3A to 3E It is set as described.

[0067] The gate of the PWM-driven thin-film transistor 121 corresponds to the inverting input of the comparator and is supplied with an input signal voltage VIN. The source of the thin-film transistor 121 is supplied with a constant voltage (high voltage) VH2.

[0068] The drain of the PWM driving thin-film transistor 121 is connected to the source of the supplementary thin-film transistor 122. The drain of the supplementary thin-film transistor 122 is connected to the gate of the current control switch 16. The PWM driving thin-film transistor 121 outputs a control signal voltage VOUT through the supplementary thin-film transistor 122 to control the on / off state of the current control switch 16.

[0069] although Figure 1 All the thin-film transistors included in the pixel circuit 10 are p-type thin-film transistors, but one or more, or even all, of the thin-film transistors can be n-type thin-film transistors. This configuration makes all the thin-film transistors in the backplane unipolar, thereby reducing manufacturing costs. Besides... Figure 1 In addition to the components shown, the pixel circuit 10 may also include components such as thin-film transistors and capacitors, and / or from Figure 1 Some components are excluded from the components shown. The same applies to the control signals of pixel circuit 10; one or more control signals can be added and / or one or more signals can be excluded.

[0070] The PWM-driven thin-film transistor 121 compares the gate input signal voltage VIN with the source constant voltage VH2, and outputs an output signal voltage VOUT indicating the comparison result through the supplementary thin-film transistor 122. The gate of the supplementary thin-film transistor 122 is provided with a constant voltage VREF. The output signal voltage VOUT is provided to the gate of the current control switch 16 as a control signal voltage for controlling the on / off state of the current control switch 16.

[0071] The switching thin-film transistor 126 turns on / off the path between the transmission line for the grayscale data voltage VDATA and the gate of the PWM-driven thin-film transistor 121. The other end of capacitor 123 is provided with a ramp signal VRAMP. This ramp signal VRAMP is a voltage that increases or decreases linearly with time, and the grayscale data voltage VDATA is the voltage corresponding to the grayscale level of a pixel in a video frame. The example of the ramp signal described below primarily uses a decreasing voltage ramp signal, but a increasing voltage ramp signal can also be used. When the transistor polarity is p-type, the transistor changes state from off to on as the ramp signal decreases.

[0072] Capacitor 124 is configured between the gate of current-controlled switch 16 and the line (power supply line) used to provide a constant voltage VSET. The constant voltage VSET is lower than the constant voltage VH2. One end of capacitor 124 is connected to the node between the gate of current-controlled switch 16 and the source / drain (comparator output) of supplementary thin-film transistor 122. The other end is connected to the line used to provide the constant voltage VSET.

[0073] The switching thin-film transistor 125 forms a path between the gate of the current-controlling switch 16 and the line used to provide a constant voltage VSET. One end of the switching thin-film transistor 125 is connected to the node between the gate of the current-controlling switch 16 and the output of the PWM circuit 12, and the other end is connected to the line used to provide the constant voltage VSET. The switching thin-film transistor 125 writes the voltage VSET (low) to the voltage VOUT to turn on the current-controlling switch 16.

[0074] The PWM circuit 12 controls the width of the control signal voltage VOUT based on the grayscale data voltage VDATA and outputs the control signal voltage VOUT. The signal voltage input to the PWM circuit 12 includes the grayscale data voltage VDATA and the change in the ramp signal. The PWM circuit 12 modulates the grayscale data voltage VDATA, representing the grayscale data, with the change of the ramp signal. A comparison is made. In response to the PWM drive thin-film transistor 121 turning on, the control signal voltage VOUT changes.

[0075] Figure 1 The PWM circuit 12 in the middle uses PWM to drive the thin-film transistor 121 to control the changes in grayscale data voltage VDATA and ramp signal. The sum of the voltages is compared with the constant voltage VH2, and a control signal voltage VOUT is output by supplementing the thin-film transistor 122 based on the amplitude relationship between the two. This operation corresponds to the change in grayscale data voltage VDATA with the ramp signal VRAMP. The comparison is as follows. The PWM circuit 12 turns off the current control switch 16 by using the PWM drive thin film transistor 121 and the supplementary thin film transistor 122 to output a high (H) level voltage VH2, thereby stopping the supply of current to the micro LED 11.

[0076] Figure 2 The diagram illustrates the time variations of the input signal voltages VRAMP and VDATA to the PWM circuit 12, the control signal voltage VOUT output from the PWM circuit 12, and the drive current ILED to the micro LED 11. The input signal voltage VIN of the PWM-driven thin-film transistor 121 is a variation of the grayscale data voltage VDATA and the ramp signal VRAMP. The sum of voltages.

[0077] Figures 3A to 3E It shows Figure 2 The state of pixel circuit 10 at times T1 to T5. Refer to the following text... Figure 2 and Figures 3A to 3E Describe the circuit operation of pixel circuit 10.

[0078] Reference Figure 3A This shows the state at time T1, where the microLED 11 is not emitting light. Time T1 is included in the non-light-emitting period. The switching thin-film transistors 126 and 125 are in the off state. (See reference...) Figure 2 The control signal voltage VOUT from the PWM circuit 12 is at level H of VH2 at time T1. The current control switch 16 is open, therefore, the drive current ILED to the micro LED 11 is cut off.

[0079] Reference Figure 3B This shows the state at time T2, where switching thin-film transistors 126 and 125 are turned on. (Refer to...) Figure 2 The grayscale data voltage VDATA, corresponding to the grayscale level in the video frame data, is written to the PWM circuit 12 at time T2. The period from time T2 to time T3 is the period during which the grayscale data voltage is written. Since the switching thin-film transistor 125 is turned on, the control signal voltage VOUT from the PWM circuit 12 is at the low level of VSET. Therefore, the current control switch 16 is turned on; the drive current ILED is provided to the microLED 11, and the microLED 11 begins to emit light. Note that the switching thin-film transistors 125 and 126 can be turned on at different times during the period from time T2 to time T3.

[0080] Reference Figure 3C This shows the state at time T3, where thin-film transistors 126 and 125 are turned off. (Refer to...) Figure 2The ramp signal VRAMP begins input at time T3. The changes in grayscale data voltage VDATA and the ramp signal are shown. The sum of the voltages is higher than voltage VH2. The control signal voltage VOUT from PWM circuit 12 remains at level L at VSET. Current control switch 16 remains on, and miniature LED 11 remains lit.

[0081] Reference Figure 3D This shows the state at time T4, where switching thin-film transistors 126 and 125 remain off. (See reference...) Figure 2 Changes in grayscale data voltage VDATA and ramp signal The sum of the voltages is higher than voltage VH2. The control signal voltage VOUT from PWM circuit 12 remains at level L at VSET. Current control switch 16 remains on, and miniature LED 11 remains lit.

[0082] Reference Figure 3E This shows the state at time T5, where switching thin-film transistors 126 and 125 remain off. (Refer to...) Figure 2 Changes in grayscale data voltage VDATA and ramp signal The total voltage has decreased to voltage VH2. For simplicity, assume that the threshold voltage of the PWM driving thin-film transistor 121 is 0 V, the PWM driving thin-film transistor 121 is turned on, and the control signal voltage VOUT from the PWM circuit 12 changes from the L level VSET to the H level VH2. In response to the change in the control signal voltage VOUT, the current control switch 16 is turned off, and the micro LED 11 stops emitting light.

[0083] As described above, the pulse width of the driving current of the micro LED 11 depends on the grayscale data voltage VDATA. In other words, the light-emitting period of the micro LED 11 is controlled by the grayscale data voltage VDATA.

[0084] exist Figure 2 In the waveform, the drive current ILED of the micro LED 11 drops sharply at time T5. This waveform is ideal; in reality, the drive current ILED drops much more gradually. Unlike the falling edge, the rising edge of the drive current ILED has an almost ideal steep gradient. This can be achieved by providing [something] along the path of the LED current. Figure 1 This is implemented using a switching thin-film transistor (not shown). The voltage of the control signal to the gate of the switching thin-film transistor is a signal output from the gate driver, and it can vary rapidly from high to low on the order of submicroseconds. For this purpose, the drive current ILED can rise with a nearly ideal steep gradient.

[0085] In conventional configurations, the drive current ILED gradually decreases from its maximum value to zero. Driven by conventional constant-current PWM, the drive current ILED is not immediately cut off, thus providing a period of inconsistency. An ideal constant-current PWM drive is not achieved. Regarding the pulse width modulation of the micro-LED 11, the long fall time of the drive current ILED, especially in low grayscale regions, can lead to considerable variations in luminous efficiency and chromaticity between micro-LEDs. As a result, display quality degrades. This is because the LED current has a low density during the fall time.

[0086] Figure 4 The waveforms of the ramp signal VRAMP and the LED current ILED in response to different grayscale data voltages are schematically shown. Waveform 201 is the drive current waveform for high grayscale levels; waveform 202 is the drive current waveform for intermediate grayscale levels; and waveform 203 is the drive current waveform for low grayscale levels. For example, the maximum grayscale level is 255, and the minimum grayscale level is 0.

[0087] Waveforms 201 and 202, representing high and medium gray levels, have pulse widths longer than their fall times, and their peak values ​​(maximum current values) are the same. Waveforms 201 and 202 exhibit periods displaying constant (maximum) current values. In waveforms 201 and 202, the drive current rises to its maximum value, remains at its maximum value, and then falls. Here, the pulse width is defined as the time width (half-value width) between the midpoint of the rising and falling edges of the waveform (half the maximum value). The rising edge can be considered essentially vertical.

[0088] The low grayscale driving current waveform 203 has a pulse width shorter than its fall time, and its peak value (maximum current value) is lower than that of other waveforms 201 and 202. Waveform 203 begins to fall immediately after reaching its peak value and does not have a period of displaying a constant value. When the pulse width of the driving current is shorter than its fall time in this case, the peak value of the driving current becomes lower. That is, the current density flowing through the LED is low, resulting in variations in brightness and chromaticity between LEDs. The long fall time of the LED current has a significant impact on the luminous emission in the low grayscale range.

[0089] The fall time of the LED current ILED depends on the response time (rise time) of the control signal voltage VOUT output from the PWM circuit 12. Therefore, reducing the response time of the control signal voltage VOUT output from the PWM circuit 12 is important.

[0090] Through their research on constant current PWM driving of micro LEDs, the inventors discovered that the response of the PWM circuit 12, or the decrease in the LED current ILED, is related to the drain current of the driving thin-film transistor 121 in the PWM circuit 12. Specifically, they found that when the absolute value of the gate-source voltage of the PWM driving thin-film transistor 121... One reason for the slow drop (long fall time) of LED current ILED over hours is the unwanted drain current Id.

[0091] Figure 5 It shows how to get from Figure 1 The pixel circuit 101 of the related technology is configured by removing the supplementary thin-film transistor 122 in the pixel circuit 10. Figure 5 In the middle, the following was omitted. Figure 1 Some of the components shown. Figure 6 The characteristics of the pixel circuit 101 of the related technology are shown. Figure 6 Graphs are provided showing the characteristics of the PWM-driven thin-film transistor 121 versus the waveform of the LED current. In each graph, solid lines represent simulation results of pixel circuits of related technologies, and dashed lines represent ideal values.

[0092] Graph 251 indicates the gate-source voltage of the PWM-driven thin-film transistor 121. The time variation. The gate voltage Vg of the PWM-driven thin-film transistor 121 and... Figure 2 The VIN values ​​are the same. Graph 252 indicates the time variation of the drain current Id of the PWM-driven thin-film transistor 121.

[0093] Graph 253 indicates the drain voltage of the PWM-driven thin-film transistor 121. The time variation of drain voltage. This is equal to the control signal voltage VOUT in the pixel circuit, excluding the related technology of the supplementary thin-film transistor 122. Graph 254 indicates the time variation of the LED current ILED. The reference potential for the voltage not referenced to a specific reference is system ground (0V in this example).

[0094] The drain current Id of the PWM-driven thin-film transistor 121 increases with the increase of the absolute value of the gate-source voltage of the PWM-driven thin-film transistor 121. The charge stored in capacitor 124 due to the drain current Id... It can be expressed by the following formula:

[0095] ,

[0096] Where C represents the capacitance of capacitor 124. This corresponds to the constant voltage VSET.

[0097] By differentiating both sides of the above formula with respect to t, we obtain the following relationship:

[0098] .

[0099] When capacitor 124 is charged, the drain-source voltage of PWM drives thin-film transistor 121. The drain current Id becomes 0, causing it to rapidly approach zero and stop flowing. Since the charge Q of capacitor 124 is CV, the waveform of the drain current Id is important for the rise of the control signal voltage VOUT of PWM circuit 12 or the decrease of LED current.

[0100] like Figure 6 As indicated by graph 252, during the period when the ramp signal begins to decline, an unnecessarily high drain current Id flows within the pixel circuit 101 of the related technology. This drain current Id is caused by the kinking effect when the gate voltage Vg of the PWM-driven thin-film transistor 121 is higher than the source voltage VH2; in other words, the absolute value of the gate-source voltage... Small absolute value of drain voltage Large. Due to this unnecessary drain current Id, capacitor 124 is gradually charged; as indicated by graph 253, the drain voltage... Alternatively, the control signal voltage VOUT begins to rise slowly over a period of approximately 13 ms. As a result, the LED current ILED cannot maintain a high current (peak) and begins to decline slowly, as indicated by graph 254.

[0101] like Figure 1 As shown, the pixel circuit in the embodiments of this disclosure includes a supplementary thin-film transistor 122 located between the drain of the driving thin-film transistor 121 of the PWM circuit 12 and the capacitor 124. The gate of the supplementary thin-film transistor 122 is provided with a constant voltage VREF. As will be described later, the supplementary thin-film transistor 122 is used to maintain the drain current Id of the PWM driving thin-film transistor 121 constant, thereby when the absolute value of the gate-source voltage of the PWM driving thin-film transistor 121 changes... Hours, reduce unnecessary current.

[0102] Now, a detailed configuration example of the pixel circuit 10 in an embodiment of the present disclosure will be described. Figure 7 A detailed configuration example of pixel circuit 10 is shown. (It can be seen in...) Figure 7 One or more circuit elements can be added between directly connected circuit elements, and / or can be obtained from Figure 7 Exclude one or more circuit elements from the circuit elements shown.

[0103] Figure 7In the configuration example, the PWM circuit 12 consists of eight thin-film transistors and two capacitors. The constant current circuit 14 consists of five thin-film transistors and one capacitor. Both circuits 12 and 14 can include any number of transistors and capacitors; the numbers can be the same or different between the two circuits 12 and 14. These circuits can include other types of circuit elements such as resistors.

[0104] In addition to reference Figure 1 In addition to the thin-film transistors 121, 122, and 125 described, Figure 7 The PWM circuit 12 also includes transistors M11 to M15. Thin-film transistor 126 is excluded. The PWM circuit 12 also includes a reference... Figure 1 The capacitors 123 and 124 are described. Transistors M11 to M15 are p-type switching thin-film transistors.

[0105] In the following description, the term "source / drain" refers to either the source or the drain. In some thin-film transistors, the source and drain are interchanged depending on the direction of current flow. Although the source and drain are fixed in some thin-film transistors, the term "source / drain" is used for convenience of description.

[0106] The source of thin-film transistor M11 is supplied with a power supply voltage VH2, and its drain is connected to the source of thin-film transistor 121 and one source / drain of transistor M12. A control signal is provided to the gate of thin-film transistor M11. .

[0107] The gate of thin-film transistor M12 is supplied with a scan signal PWM_S2. One source / drain of thin-film transistor M12 is connected to the drain of thin-film transistor M11 and the source of thin-film transistor M121; the other source / drain is supplied with a grayscale data voltage. The grayscale data voltage Corresponding to Figure 1 The grayscale data voltage VDATA in the data.

[0108] The gate of the PWM-driven thin-film transistor 121 is connected to one end of capacitor 123, the source / drain of thin-film transistor M13, and the source / drain of thin-film transistor M14. The other end of capacitor 123 is provided with a ramp signal (ramp voltage) VRAMP. The source of the PWM-driven thin-film transistor 121 is connected to the drain of transistor M11 and the source / drain of transistor M12. The drain of the PWM-driven thin-film transistor 121 is connected to the source / drain of thin-film transistor M13 and the source of thin-film transistor M15.

[0109] The gate of thin-film transistor M13 is provided with a scan signal. One source / drain of thin-film transistor M13 is connected to the drain of thin-film transistor 121 and the source of thin-film transistor M15; the other source / drain is connected to the gate of thin-film transistor 121 and the source / drain of thin-film transistor M14.

[0110] The gate of the thin-film transistor M14 is provided with a scan signal. Scan signal It is compared to the scan signal The scan signal is from one horizontal time period earlier. The source of thin-film transistor M14 is connected to the gate of thin-film transistor 121 and the source / drain of transistor M13. The drain of thin-film transistor M14 is provided with a constant initialization voltage VINI3.

[0111] The gate of the thin-film transistor M15 is provided with a control signal. The source of thin-film transistor M15 is connected to the drain of thin-film transistor 121 and the source / drain of thin-film transistor M13. The drain of thin-film transistor M15 is connected to the source of supplementary thin-film transistor 122.

[0112] The gate of supplementary thin-film transistor 122 is provided with a constant voltage VREF. The source of supplementary thin-film transistor 122 is connected to the drain of thin-film transistor M15. The drain of supplementary thin-film transistor 122 is connected to the source of thin-film transistor 125. The control signal voltage VOUT is output from node N1 between the drain of thin-film transistor 122 and the source of thin-film transistor 125.

[0113] The gate of the thin-film transistor 125 is provided with a control signal. The source of thin-film transistor 125 is connected to the gate of thin-film transistor 16 and the drain of thin-film transistor 122. A constant voltage VSET is provided at the drain of thin-film transistor 125. A capacitor 124 is connected between the source and drain of thin-film transistor 125.

[0114] The grayscale data voltage is transmitted via thin-film transistors M12, M121, and M13. Write to capacitor 123. Subsequently, the change in the ramp signal VRAMP is superimposed on capacitor 123.

[0115] The constant current control circuit 13 includes a constant current circuit 14, a current control switch 16, and thin-film transistors M31 and M32. The constant current circuit 14 includes thin-film transistors M21 to M25 and a capacitor C21. Thin-film transistors M21 to M25 are p-type thin-film transistors, and thin-film transistor M23 is a drive transistor that determines the magnitude of the constant current. The constant current circuit 14 controls the constant current through pulse amplitude modulation (PAM). This control is called PAM control.

[0116] The gate of the thin-film transistor M21 is provided with a control signal. The source of thin-film transistor M21 is supplied with a constant power supply voltage PVDD; the drain is connected to the source / drain of thin-film transistor M22 and the source of thin-film transistor M23.

[0117] The gate of the thin-film transistor M22 is provided with a scan signal. One source / drain of the thin-film transistor M22 is supplied with a data voltage for controlling a constant current. Another source / drain is connected to the drain of thin-film transistor M21 and the source of thin-film transistor M23.

[0118] The gate of transistor M23 is connected to capacitor C21, the source / drain of thin-film transistor M24, and the source / drain of thin-film transistor M25. The source of thin-film transistor M23 is connected to the drain of thin-film transistor M21 and the source / drain of thin-film transistor M22. The drain of thin-film transistor M23 is connected to the output node N2 of constant current circuit 14.

[0119] The gate of transistor M24 is provided with a scan signal. One source / drain of thin-film transistor M24 is connected to the output node N2 of constant current circuit 14; the other source / drain is connected to the gate of thin-film transistor M23, capacitor C21, and the source / drain of transistor M25.

[0120] The gate of the thin-film transistor M25 is provided with a scan signal. Scan signal It is a scan signal that precedes the scan signal PAM_S2 by one horizontal time interval. One source / drain of thin-film transistor M25 is provided with a constant voltage VINI2; the other source / drain is connected to the gate of thin-film transistor M23, capacitor C21, and the source / drain of thin-film transistor M24.

[0121] Current value data The current is written to capacitor C21 via thin-film transistors M22, M23, and M24. Thin-film transistor M23 outputs current to output node N2 based on the voltage of capacitor C21.

[0122] The current-controlled switch 16 is a p-type thin-film transistor; its source is connected to the output node N2 of the constant current circuit 14, and its drain is connected to the source of the thin-film transistor M31. The gate of the current-controlled switch 16 is supplied with a control signal voltage VOUT from the PWM circuit 12.

[0123] A p-type thin-film transistor M31 is connected between the anode of the micro-LED 11 and the current control switch 16. The thin-film transistor M31 is a switch; its gate is provided with a control signal PAM_EM. The source of transistor M31 is connected to the drain of the current control switch 16, and the drain is connected to the anode of the micro-LED 11.

[0124] Thin-film transistor M32 is a switch; its gate is supplied with a scan signal PAM_S2. Thin-film transistor M32 is a p-type thin-film transistor. The source of thin-film transistor M32 is connected to the anode of miniature LED 11, and its drain is supplied with a constant power supply voltage VINI1.

[0125] Figure 8A This is a sequence diagram showing the time variation of a frame signal in pixel circuit 10. In graphs 51 to 54, the horizontal axis represents time, and the vertical axis represents voltage. In graph 55, the horizontal axis represents time, and the vertical axis represents current. Graph 51 indicates the time variation of the control signal (CC) of constant current circuit 14. Graph 52 indicates the time variation of the control signal (PWM) of PWM circuit 12. Figure 8A In the figures 51 and 52, each graph schematically illustrates the time variations of multiple control signals. Figure 8B The diagram shows the details of the signals in the time period enclosed by dashed line 510 in graph 51 and in the time period enclosed by dashed line 520 in graph 52.

[0126] Curve 53 indicates the time variation of the ramp signal VRAMP input to PWM circuit 12. Curve 54 indicates the time variation of the control signal VOUT output from PWM circuit 12. Curve 55 indicates the time variation of the drive current ILED of micro LED 11.

[0127] Figure 8B The graphs 510 and 520 indicate the time variation of the signal within the time period enclosed by the dashed line 510 in graph 51 and by the dashed line 520 in graph 52. The horizontal axis of graphs 510 and 520 represents time, and the vertical axis represents the voltage of the signal.

[0128] Graph 510 indicates the time variation of the control signal (CC) of the constant current circuit 14. In graph 510, line 511 indicates the signal... Time variation; Line 512 indicator signal Time variation; and line 513 indicates the signal. Changes over time.

[0129] Signal (Line 511) is a pulse signal that changes from high to low at time t1 and then from low to high at time t2. (Line 512) is a pulse signal that changes from high to low at time t2 and returns from low to high at time t3. (Line 513) is a pulse signal that transitions from high to low at time t9 and from low to high at a predefined time (not shown in the frame period). In one example, the signal... and The pulse width is a horizontal time interval.

[0130] Graph 520 indicates the time variation of the control signal (PWM) of the PWM circuit 12. In graph 520, line 521 indicates the signal... Time variation; line 522 indicates the time variation of the PWM_S2 signal; line 523 indicates the signal Time variation; and line 524 indicates the signal. Changes over time.

[0131] Signal (Line 521) is a pulse signal that changes from high to low at time t4 and then from low to high at time t5. (Line 522) is a pulse signal that changes from high to low at time t5 and returns from low to high at time t6. (Line 523) is a pulse signal that changes from high to low at time t6 and returns from low to high at time t7. (Line 524) is a pulse signal that transitions from high to low at time t8 and from low to high at a predefined time (not shown in the frame period). In one example, the signal... , and The pulse width is a horizontal time interval.

[0132] Figure 9 It shows Figure 7 The simplified circuit configuration of the pixel circuit 10 is shown. Figure 9 Only the thin-film transistors (TFTs) that are in a conductive state and play an important role when the micro LED 11 receives a high current and emits light are shown. During the light-emitting period, TFTs M21, M23, M31, M11, 121, M15, and 122 are in a conducting (non-blocking) state. Among these TFTs, transistors M21, M23, M31, M11, and M15 can be considered as short-circuited. Figure 9 The switching thin-film transistor in the blocking state and the power supply voltage supplied to it are also omitted.

[0133] Figure 9 The light-emitting control switch thin-film transistor M15 between the driving thin-film transistor 121 and the supplementary thin-film transistor 122 of the PWM circuit 12 is omitted. The light-emitting control switch thin-film transistor M15 is optional. In either configuration, the drain of the PWM driving thin-film transistor 121 is connected to the source of the supplementary thin-film transistor 122 by electrical or circuit connection.

[0134] Figure 9 The gate voltage Vg of the PWM-driven thin-film transistor 121, the drain current Id of the supplementary thin-film transistor 122, and the drain voltage are also shown. The intermediate node N22 between thin-film transistors 121 and 122, and the LED current ILED.

[0135] Figure 10A This is a diagram explaining the function of the supplementary thin-film transistor 122. Section 531 provides an example of the characteristic values ​​of a pixel circuit excluding the related technology of the supplementary thin-film transistor 122 when the driving thin-film transistor 121 of the PWM circuit is turned on. Section 532 provides an example of the characteristic values ​​of a pixel circuit including the PWM driving thin-film transistor 121 and the supplementary thin-film transistor 122 when the series circuit is turned on.

[0136] In section 531 of the related technology, it is assumed that the gate voltage Vg of the PWM-driven thin-film transistor 121 is -1.4 V, and the source voltage Vs is constant at 0 V. Furthermore, it is assumed that for the drain-source voltage... absolute value The maximum value is 11.5 V. Due to the kink effect, the drain current Id of the PWM-driven thin-film transistor 121 increases with... The unnecessary drain current Id gradually increases with the control signal voltage VOUT, resulting in an increase in the rise time of the control signal voltage VOUT.

[0137] In part 532 of the embodiments of this disclosure, it is assumed that the gate voltage Vg of the PWM-driven thin-film transistor 121 is -1.4 V, and the source voltage... The voltage is kept constant at 0 V, and the gate voltage Vg of the supplementary thin-film transistor 122 is -4 V. The drain-source voltage of the PWM-driven thin-film transistor 121 is... absolute value It remains at approximately 2.7 V. This phenomenon will be explained below.

[0138] In this embodiment, the drain voltage is divided among two thin-film transistors 121 and 122. This is because the drain voltage of the series circuit (supplementary thin-film transistor 122) is... As capacitor 124 is charged, the potential at the intermediate node between the two thin-film transistors 121 and 122 is automatically adjusted to keep the drain current Id constant.

[0139] Because the PWM drives the thin-film transistor 121 Maintaining a low load (maximum 2.7 V) connected to the drain of the PWM drive thin-film transistor 121 prevents changes in drain current Id and reduces unnecessary drain current. In other words, the PWM drive thin-film transistor 121 acts as a current source. Because a constant current flows in the supplementary thin-film transistor 122, and the gate potential of the supplementary thin-film transistor 122 is fixed, the source potential of the supplementary thin-film transistor 122 changes automatically.

[0140] Supplement the drain voltage of thin-film transistor 122 As time increases. Even with the addition of thin-film transistor 122 To make it smaller, supplementing the thin-film transistor 122 It will also increase slightly. In other words, it supplements the thin-film transistor 122. It becomes larger in order to keep the drain current Id constant.

[0141] Specifically, unlike the supplementary thin-film transistor 122 To make it smaller, supplementing the thin-film transistor 122 Increasing the voltage will not change the drain current Id. Even with the addition of the threshold voltage of the thin-film transistor 122... An offset occurs, supplementing the thin-film transistor 22. It will also automatically adjust to ensure that the drain current of the supplementary thin-film transistor 122 is equal to the drain current of the PWM-driven thin-film transistor 121. When the PWM-driven thin-film transistor 121... When the current is small, maintaining a constant drain current Id suppresses unnecessary drain current Id and makes the control signal voltage VOUT from the PWM circuit 12 more stable. The rise is steeper as the current increases.

[0142] Figure 10B Pixel circuits without supplementary thin-film transistor 122 and pixel circuits with supplementary thin-film transistor 122 are provided. Simulation results of the characteristics. Figure 10B In the curve graph, the horizontal axis represents the drain voltage. The vertical axis represents the drain current Id. Curve 641 shows the simulation results for the pixel circuit including the supplementary thin-film transistor 122. Curve 642 shows the simulation results for the pixel circuit without the supplementary thin-film transistor 122.

[0143] like Figure 10BAs indicated by curve 642, the pixel circuit without the additional thin-film transistor 122 has a minimum absolute value of drain voltage. Over a large range, an increase in drain current Id is observed due to the kinking effect. Conversely, as indicated by curve 641, the pixel circuitry, including the supplementary thin-film transistor 122, maintains a constant drain current Id. That is, in curve 641, when At 11.5 V, there is an unnecessary low Id.

[0144] Figure 11 These are graphs illustrating the effect of pixel circuit 10 in embodiments of this disclosure. Graphs 551 to 554 provide simulation results for pixel circuits in embodiments of this disclosure that do not include related technologies such as supplementary thin-film transistor 122 and those that include supplementary thin-film transistor 122.

[0145] Graph 551 indicates the time variation of the gate voltage Vg of the PWM-driven thin-film transistor 121 in the related technology and this embodiment. Graph 552 indicates the time variation of the drain current Id of the PWM-driven thin-film transistor 121 in the related technology and the series circuit (supplementary thin-film transistor 122) in this embodiment. In graph 552, curve 561 represents the drain current Id in the related technology, and curve 562 represents the drain current Id in this embodiment. The two waveforms have equal areas. This is because the time integral value of Id, or the charge stored in capacitor 124, is determined only by capacitance VH2 and VSET. To distinguish the waveforms, two leads from two points are shown on curve 562. The waveform 561 of the related technology and... Figure 6 The waveform in the solid line of graph 252 is the same.

[0146] Graph 553 indicates the drain voltage of the PWM-driven thin-film transistor 121 in the related technology. The drain voltage of the series circuit (supplementary thin-film transistor 122) in this embodiment. The time variation. Curve 565 represents the drain voltage in related technologies. Curve 566 represents the drain voltage in this embodiment. Curve 554 indicates the time variation of LED current ILED. Curve 567 represents the LED current ILED in related technologies, while curve 568 represents the LED current ILED in this embodiment.

[0147] In related technologies and this embodiment, when the gate voltage Vg of the PWM-driven thin-film transistor 121 decreases or the absolute value of the gate-source voltage decreases... The drain current Id increases with time. Figure 6 In the related technologies shown, when the PWM drives the thin-film transistor 121... Over the course of hours, due to unnecessary drain current Id, capacitor 124 is gradually charged, causing the LED current ILED to begin to decrease slowly.

[0148] In the series circuit of this embodiment, compared with the current waveform of related technologies, the drain current Id waveform is shifted to the right and has a high peak value. This embodiment initially maintains a low drain current Id until... This reaches a value that increases the drain current Id and charges capacitor 124 for a short time. For this reason, a sharp drop in LED current is achieved.

[0149] According to simulation results, in this embodiment, the pixel circuit 10 with supplementary thin-film transistor 122 reduces the average fall time of LED current by 31% across the entire grayscale region, compared to a pixel circuit without supplementary thin-film transistor 122.

[0150] Figure 12 Simulated waveforms of the gate voltage, source voltage, and drain voltage of the supplementary thin-film transistor 122 in this embodiment are provided. Figure 12 The waveforms are provided for two frames. Graph 581 indicates the time variation of the input voltage Vg at the gate of the PWM-driven thin-film transistor 121. Graph 582 indicates the time variation of the input voltage VREF at the gate of the supplementary thin-film transistor 122.

[0151] Curve 583 indicates Figure 9 The graph 584 shows the time-varying potential at the intermediate node N22 (the source of supplementary thin-film transistor 122) between the two thin-film transistors 121 and 122. The graph 585 indicates the time-varying control signal voltage VOUT from the PWM circuit 12. This is the drain voltage of supplementary thin-film transistor 122. The graph 585 indicates the time-varying LED current ILED.

[0152] As indicated by graph 582, the input voltage VREF of the gate of the supplementary thin-film transistor 122 is fixed within each frame period.

[0153] Example 2

[0154] Example 2 describes the control voltage VREF for the supplementary thin-film transistor 122 described in Example 1. As described in Example 1, the supplementary thin-film transistor 122, with a constant control voltage VREF provided at its gate, can reduce the fall time of the LED current ILED. The inventors' research shows that the gate voltage VREF of the supplementary thin-film transistor 122 has an appropriate range to more effectively reduce the fall time.

[0155] Specifically, the inventors discovered that when VREF is at least equal to or higher than the negative supply voltage VGL (minimum voltage) to be supplied to the PWM circuit 12, VREF has the effect of reducing the fall time of the LED current ILED. The inventors also discovered that the upper limit of the constant gate voltage VREF decreases as the positive supply voltage VH2 of the PWM circuit 12 decreases. The following ranges of gate voltage VREF can more effectively reduce the fall time of the LED current ILED:

[0156] .

[0157] Figure 13A , 13B 13C provides simulation results of the relationship between constant voltage VREF and the fall time of LED current ILED when different power supply voltages VH2 are supplied to PWM circuit 12 in pixel circuit according to embodiments of this disclosure. Figure 13A Simulation results are provided when the power supply voltage VH2 is 9 V. Figure 13B Simulation results are provided when the power supply voltage VH2 is 5 V. Figure 13C Simulation results are provided when the power supply voltage VH2 is 1 V.

[0158] Reference Figure 13A When the constant voltage VREF exceeds 7.5 V, the fall time increases sharply. (Refer to...) Figure 13B When the constant voltage VREF exceeds 3.5 V, the fall time increases sharply. (Refer to...) Figure 13C When the constant voltage VREF exceeds -0.5 V, the fall time increases sharply.

[0159] like Figure 13A , 13B As indicated by the simulation results in 13C, the fall time increases sharply when the gate voltage VREF exceeds a voltage 1.5 V lower than the positive supply voltage VH2 of the PWM circuit 12 (VH2 – 1.5). The same results were obtained when the positive supply voltage VH2 took other values. Regarding the lower limit, a significant reduction in fall time was achieved when the gate voltage VREF was -5 V or higher. When the gate voltage VREF was less than VGL, the fall time was almost equal to the fall time in conventional techniques. This is because the supplementary thin-film transistor 122 is fully turned on, and the supplementary thin-film transistor 122 only has a short-circuit function.

[0160] Provided to be provided Figure 7Examples of constant voltage values ​​for pixel circuit 10. An example of a negative supply voltage VGL is -12 V. At the start of illumination, the output voltage VOUT of PWM circuit 12, voltage VSET, can be equal to the negative supply voltage VGL. An example of a negative supply voltage PVEE for the cathode of micro LED 11 is -8 V. An example of a positive supply voltage VH2 for PWM circuit 12 is 1 V. An example of a positive supply voltage PVDD for constant current circuit 14 is 0 V. An example of initialization voltages VINI1, VINI2, and VINI3 is -3 V.

[0161] One embodiment of this disclosure shares a power line for providing the gate voltage to the supplementary thin-film transistor 122 with another power supply voltage (constant voltage). Sharing an existing power line without adding a new power line achieves a smaller circuit layout area (coverage area).

[0162] Figure 14 An example configuration of the pixel circuit is shown with the positive supply voltage VH2 of the PWM circuit 12 being 9 V. The gate of the supplementary thin-film transistor 122 is provided with a positive supply voltage PVDD = 4.6 V for the constant current circuit 14. A power line for the positive supply voltage PVDD is connected to the gate of the supplementary thin-film transistor 122 to provide the positive supply voltage PVDD as the gate voltage VREF.

[0163] Figure 15 An example configuration of the pixel circuit is shown with the positive supply voltage VH2 of the PWM circuit 12 being 1 V. The gate of the supplementary thin-film transistor 122 is provided with the initialization supply voltage VINI3 = -3 V required by the PWM circuit 12. The power supply line for the initialization supply voltage VINI3 is connected to the gate of the supplementary thin-film transistor 122 to provide the initialization supply voltage VINI3 as the gate voltage VREF.

[0164] Example 3

[0165] Capacitor 124 serves to keep the output voltage VOUT of PWM circuit 12 low. PWM circuit 12 writes a negative supply voltage VSET to VOUT to turn on thin-film transistor 16. As a result, LED current begins to flow to illuminate the micro LED 11. The inventors' research shows that the capacitance C of capacitor 124 has an appropriate range to more effectively reduce the fall time of LED current in pixel circuits including supplementary thin-film transistor 122. Specifically, the fall time of LED current is more effectively reduced when the capacitance C of capacitor 124 meets the following condition:

[0166] .

[0167] Figure 16Simulation results are provided showing the relationship between the capacitance C of capacitor 124 and the fall time. Curve 601 represents the simulation results for a pixel circuit 10 including a supplementary thin-film transistor 122 in an embodiment of this disclosure. Curve 602 represents the simulation results for a pixel circuit of the related art without the supplementary thin-film transistor 122. From Figure 16 It is understandable that even if the capacitance C of capacitor 124 changes, the fall time in the related technology remains almost the same.

[0168] However, in this embodiment, the fall time of the LED current in the pixel circuit 10 decreases as the capacitance C of capacitor 124 decreases. Incidentally, when the capacitance C is 0 fF, the waveform of the LED current ILED collapses.

[0169] Figure 17 Simulation results for the LED current ILED are provided in this embodiment with different capacitance Cs in the pixel circuit 10 including the supplementary thin-film transistor 122. The horizontal axis represents time, and the vertical axis represents the amount of LED current ILED. Curve 611 indicates the LED current ILED when capacitance C = 300 fF. Curve 612 indicates the LED current ILED when capacitance C = 10 fF. Curve 613 indicates the LED current ILED when capacitance C = 0 fF.

[0170] like Figure 17 The simulation results indicate that when the capacitance C = 0 fF, the LED current waveform collapses immediately after the LED current begins to rise. A certain amount of capacitance is needed to maintain the gate potential of the current control switch 16. Figure 17 Simulation results show that a 10 fF capacitor C achieves a suitable LED current waveform. When transistor 125 is turned on and writes the negative supply voltage VSET to VOUT, parasitic capacitances (such as the capacitance between the gate and source of transistor 125) affect the write operation. If the capacitance of capacitor 124 is insufficient, VOUT cannot be sufficiently reduced. Consequently, thin-film transistor 16 does not fully turn on, resulting in a lower peak value for the rising LED current. Therefore, capacitor 124 requires a certain amount of capacitance.

[0171] Example 4

[0172] Examples 1, 2, and 3 describe pixel circuits including p-type thin-film transistors. Example 4 describes a pixel circuit including n-type thin-film transistors. For example, Figure 7 All thin-film transistors in the pixel circuit 10 shown can be n-type thin-film transistors, or only one or more thin-film transistors can be n-type thin-film transistors. These apply to all embodiments.

[0173] Figure 18 It shows Figure 9An example of a simplified pixel circuit 10 where p-type transistors are replaced by n-type thin-film transistors. Figure 18 In the PWM circuit 12, the driving thin-film transistor 221 and the supplementary thin-film transistor 222 are n-type thin-film transistors. Furthermore, the current control switch 26 is an n-type thin-film transistor.

[0174] The source of the driving thin-film transistor 221 is supplied with a negative power supply voltage VL2, instead of... Figure 9 The positive supply voltage VH2 is indicated in the figure. The supply voltage VSET is the positive supply voltage. A positive voltage is written to VOUT to turn on the thin-film transistor 26, thereby causing the LED current (lighting current) to start flowing to light up the micro LED 11. The fall time of the LED current can be reduced more effectively when the gate voltage of the supplementary thin-film transistor 222 meets the following conditions:

[0175] ,

[0176] Here, VGH represents the high voltage of the control signal (pulse signal), for example, it can be 8 V. The power supply voltage VSET can be VGH, and VL2 can be -12 V.

[0177] Example 5

[0178] Example 5 describes the configuration of the driving thin-film transistor 121 of the PWM circuit 12. In Example 5, the supplementary thin-film transistor 122 can be excluded from or retained in the pixel circuit 10.

[0179] The inventors discovered that the structure of the PWM-driven thin-film transistor 121 affects the fall time of the LED current. Specifically, they found that within a certain range, the channel length L of the PWM-driven thin-film transistor 121 can more effectively reduce the fall time of the LED current.

[0180] Figure 19 Simulation results are provided regarding the relationship between the channel length of the PWM-driven thin-film transistor 121 and the LED current fall time. Figure 19 In the graph, the horizontal axis represents the channel length, and the vertical axis represents the LED current fall time. This simulation was performed using a pixel circuit excluding the supplementary thin-film transistor 122.

[0181] Reference Figure 19 The fall time monotonically decreases as the channel length L increases from 0, reaching a minimum when L is 25 μm, and then monotonically increases. Conversely, as the channel length L decreases from 100 μm, the fall time monotonically decreases, reaching a minimum, and then monotonically increases.

[0182] One reason for the long fall time in the short-channel range is that capacitor 124 is charged with unnecessary current due to the kinking effect. Another reason for the increase in fall time from a minimum with increasing channel length L of the PWM-driven thin-film transistor 121 is the inference that the S value of transistor 121 increases with increasing channel length L. As the S value increases, this means that the Id-Vg characteristic becomes smoother below the threshold voltage, and the change in VOUT also becomes smoother.

[0183] Figure 19 The graphs show that the fall time increases sharply as the channel length L decreases from 8.5 μm. Furthermore, the fall time at a channel length L of 70 μm is almost equal to the fall time at a channel length L of 8.5 μm. The channel length L used for the PWM drive thin-film transistor 121 can be selected from the following range, including values ​​that minimize the fall time (optimal):

[0184] .

[0185] Another feature of the structure of the PWM-driven thin-film transistor 121 can be a dual-gate structure. The dual-gate structure includes two separate gates, and these two gates are provided with the same gate potential. Both gates are disposed above or below the channel relative to the substrate. Note that the description provided so far is based on the assumption that all thin-film transistors, including the PWM-driven thin-film transistor 121, have a single-gate structure.

[0186] Figure 20 This is a circuit diagram illustrating a configuration of a PWM-driven thin-film transistor 121 with a dual-gate structure. In this circuit diagram, the PWM-driven thin-film transistor 121 consists of two thin-film transistors 128A and 128B connected in series, and their gates are provided with the same gate voltage Vg. An example of the device structure may include two separate gates opposite a single high-resistivity semiconductor region, and these gates are connected to a common gate line. It is not excluded that thin-film transistors other than the PWM-driven thin-film transistor 121 may have a dual-gate structure.

[0187] The following describes an example configuration of a micro LED display device. The description applies to all the foregoing embodiments. Figure 21 This is a plan view illustrating an example configuration of a micro LED display device. The micro LED display device includes a display area, signal circuitry 31, and scanning circuitry 32. The display area includes an array of pixel circuitry 10 and micro LEDs 11.

[0188] Each of the signal circuit 31 and the scanning circuit 32, or a combination thereof, is a driver circuit (also referred to as a control circuit) for driving and controlling the pixel circuit 10. The signal circuit 31 and the scanning circuit 32 provide control signals and power supply voltages for controlling the pixel circuit 10. For example, the signal circuit 31 provides each pixel circuit 10 with a power supply voltage (constant voltage) and data voltages PWM_DATA and PAM_DATA for the PWM circuit 12 and the constant current circuit 14.

[0189] The scanning circuit 32 outputs scan signals, such as selection signals for the PWM circuit 12 and the constant current circuit 14, and light emission control signals. The scan signals include PWM_S1, PWM_S2, PWM_EM, PWM_SE, PAM_S1, PAM_S2, and PAM_EM. The types of output signals from the driver circuit depend on the configuration of the pixel circuit.

[0190] Pixel circuit 10 controls micro LED 11. The components of pixel circuit 10 are fabricated on thin-film transistor (TFT) substrate. Micro LED 11 is connected to connection pads 111 and 112 on the TFT substrate to be electrically connected to pixel circuit 10 via connection pads 111 and 112.

[0191] Example 6

[0192] Figure 22 The configuration of the pixel circuitry in another embodiment of this disclosure is illustrated schematically. Besides... Figure 22 In addition to the components shown, the pixel circuitry of this disclosure may also include other components and / or exclude others. Figure 22 One or more elements as shown. Figure 22 The direct connection between the circuit elements shown can be an electrical connection or a circuit connection.

[0193] It mainly describes the relationship with Figure 1 The differences between the pixel circuit configuration example shown and the actual configuration. Figure 1 Compared to the pixel circuit in the previous version, the supplementary thin-film transistor 122 in the PWM circuit 12 has been removed, and a thin-film transistor M41 for controlling the constant current circuit 14 has been added. Figure 1 Compared to the pixel circuit configuration in the current circuit, the constant current control switch 16 is excluded from the constant current control circuit 13.

[0194] The constant current circuit 14 includes Figure 7 The circuit configuration includes thin-film transistors M21 and M23, and capacitor C21. Thin-film transistor M23 is a constant current drive transistor used to determine the magnitude of the constant current. The gate of thin-film transistor M23 is connected to one end of capacitor C21, and the other end of capacitor C21 is connected to the power supply line of the constant voltage PVDD.

[0195] The constant current control circuit 13 includes Figure 7 The thin-film transistor M31 is shown. The source of the thin-film transistor M31 is connected to the drain of the thin-film transistor M23, and the drain of the thin-film transistor M31 is connected to the anode of the micro LED 11.

[0196] exist Figure 22 In the pixel circuit, the gate of thin-film transistor M41 is electrically connected to one source / drain of thin-film transistor M41. The source / drain of thin-film transistor M41, which is electrically connected to its gate, is connected to the gate of thin-film transistor M23, which is the driving transistor of constant current circuit 14. The other source / drain of thin-film transistor M41 is connected to the drain of PWM driving thin-film transistor 121. Due to the change in the drain potential of PWM driving thin-film transistor 121, each source / drain of p-type thin-film transistor M41 changes between the source and drain according to the relationship between the drain potential of thin-film transistor 121 and the gate potential of thin-film transistor M23, such that the source / drain connected to the higher potential becomes the source, and the source / drain connected to the lower potential becomes the drain.

[0197] The drain of the PWM driving thin-film transistor 121 is connected to the source of the switching thin-film transistor 125 and one end of the capacitor 124. A constant voltage VSET is provided to the drain of the switching thin-film transistor 125 and the other end of the capacitor 124. The gate of the PWM driving thin-film transistor 121 is connected to... Figure 1 The gates in the pixel circuit are controlled in the same way.

[0198] The pixel circuit in this embodiment is characterized in that the thin-film transistor M41 is located between the drain of the PWM driving thin-film transistor 121 and the gate of the constant current driving thin-film transistor M23, and the gate of the thin-film transistor M41 is connected to the gate of the constant current driving thin-film transistor M23.

[0199] When the thin-film transistor M41 changes from off to on, the drain of the PWM driving thin-film transistor 121 and the gate of the constant current driving thin-film transistor M23 are electrically connected. In other words, the constant current driving thin-film transistor M23 not only controls the magnitude of the LED current but also controls the on / off state of the LED current. Therefore, a dedicated thin-film transistor for LED current on / off control is not required (e.g., Figure 1 or Figure 7 The current control switch 16 in the pixel circuit.

[0200] Figure 23 It shows Figure 22The graph shows the time-varying variations of LED current, drain voltage (PWM-D voltage) of PWM-driven thin-film transistor 121, and gate voltage (PAM-G voltage) of constant-current-driven thin-film transistor M23 in the pixel circuit. Graph 700 indicates the time-varying variation of LED current. Graph 710 indicates the time-varying variations of PWM-D voltage and PAM-G voltage. The horizontal and vertical axes of graph 700 represent time and LED current, respectively.

[0201] The horizontal and vertical axes of graph 710 represent time and node voltage, respectively. In graph 710, curves 711 and 712 represent the PAM-G voltage and PWM-D voltage, respectively. During time period T1, the gate potential (VOUT) of transistor M23 remains higher than the drain potential of transistor M21. Since VOUT is the source potential of transistor M41, and the source and gate of transistor M41 are connected, the gate-source voltage of transistor M41 is 0 V. Therefore, the constant current circuit controls the thin-film transistor M41 to be turned off during time period T1 and turned on during time period T2, which follows T1.

[0202] Initially, the PWM-D voltage 712 increases slowly, but is blocked by the thin-film transistor M41, and does not affect the PAM-G voltage 711.

[0203] Subsequently, the PWM-D voltage 712 further increases and exceeds the PAM-G voltage 711. Then, the drain and source of the thin-film transistor M41 are interchanged. In other words, the drain of the PWM-driven thin-film transistor 121 becomes the source of the thin-film transistor M41. When the gate-source voltage of the thin-film transistor M41 drops below the threshold voltage ( When the constant current circuit turns on the thin-film transistor M41, the charge stored in capacitor 124 moves to capacitor C21, increasing the PAM-G voltage 711. That is, even after the PWM-D voltage 712 starts increasing, the LED current can remain high for a period of time. Therefore, the LED current drops sharply in a short period.

[0204] As described above, the constant current circuit controlling the thin-film transistor M41 allows for the exclusion of the control switch or current control switch 16 used for constant current. According to the inventors' research, the current control switch 16 located on the LED current path... The large voltage drop causes the pixel circuit to consume a lot of power. The pixel circuit in this embodiment eliminates the power consumption of the constant current control switch. In addition, the thin-film transistor M41 operating as described above makes the falling edge of the LED current waveform steeper.

[0205] Figure 24 The configuration of the pixel circuitry in another embodiment of this disclosure is schematically illustrated. Description and Figure 22The differences in the pixel circuits shown. Besides Figure 22 In addition to the pixel circuit, Figure 24 The pixel circuitry also includes Figure 1 Thin-film transistor 122 in the pixel circuit. Thin-film transistor 122 is connected to... Figure 1 The thin-film transistors in the pixel circuit work in the same way; including thin-film transistor M41 (the third thin-film transistor). Figure 24 The pixel circuitry improves the steepness of the falling edge of the LED current waveform, especially when displaying low grayscale levels.

[0206] Figure 25 The configuration of the pixel circuitry in another embodiment of this disclosure is schematically illustrated. Description and Figure 22 The differences in the pixel circuits shown. Figure 25 The pixel circuitry includes a thin-film transistor M51 (an example of a second thin-film transistor) instead of thin-film transistor M41, and its gate is provided with a constant voltage (supply voltage) DIVH. Other configurations are the same as those for the constant current circuit controlling the thin-film transistor M41, and the constant current circuit controlling the thin-film transistor M51 controls the gate voltage of the constant current driving thin-film transistor M23 (an example of a first thin-film transistor). Figure 25 The pixel circuitry may also include, for example, Figure 24 The thin-film transistor 122 shown is illustrated.

[0207] One embodiment of this disclosure specifies a constant voltage DIVH within the following range:

[0208] ,

[0209] Wherein, the PAM-G voltage is defined as ,and It is the threshold voltage for constant current driving thin-film transistor M23; and PAM_DATA is the reference. Figure 7 The described current value data.

[0210] For example, suppose , , The constant voltage DIVH should be included in the following range:

[0211] .

[0212] Figure 26 It shows Figure 25The diagram shows the time-varying variations of LED current, drain voltage (PWM-D voltage) of PWM-driven thin-film transistor 121, and gate voltage (PAM-G voltage) of constant-current-driven thin-film transistor M23 in the pixel circuit. Assume the constant voltage DIVH is -3 V. Curve 760 indicates the time variation of LED current. Curve 770 indicates the time variations of PWM-D voltage and PAM-G voltage. The horizontal and vertical axes of curve 760 represent time and LED current, respectively. The horizontal and vertical axes of curve 770 represent time and node voltage, respectively. In curve 770, curves 771 and 772 represent PAM-G voltage and PWM-D voltage, respectively.

[0213] Initially, the PWM-D voltage 772 increases slowly, but is blocked by the constant current circuit-controlled thin-film transistor M51, thus not affecting the PAM-G voltage 771. Subsequently, the PWM-D voltage 772 increases further and exceeds the PAM-G voltage 771. Then, the PWM-D voltage changes from the source voltage to the drain voltage of the thin-film transistor M51. When the gate-source voltage of the thin-film transistor M51 drops below the threshold voltage (… When the charge stored in capacitor 124 is turned on, the thin-film transistor M51 is turned on, and the charge stored in capacitor 124 is moved to capacitor C21 to increase the PAM-G voltage 771.

[0214] and Figure 22 Compared to the pixel circuit, the constant current circuit controls the gate voltage of the thin-film transistor M51 to be higher, thus cutting off the rise of the PWM-D voltage of the constant current circuit controlling the thin-film transistor M51. After the PWM-D voltage has reached the voltage that completely cuts off the constant current drive thin-film transistor M23, the charge in capacitor 124 moves to capacitor C21, achieving a shorter fall time for the LED current.

[0215] Figure 27 Simulation results are provided regarding the relationship between LED current fall time and constant voltage DIVH. Figure 27 In the graph, the horizontal axis represents the constant voltage DIVH, and the vertical axis represents the fall time of the LED current. Assume the positive power supply voltage VH2 of PWM circuit 12 is... The area enclosed by the dashed line satisfies the condition for achieving a shorter fall time for the LED current.

[0216] The inventor also used Figure 22 and Figure 25 The pixel circuit in the simulation was performed. The simulation results are described below. Figure 28A Provided when Figure 22 Simulation results of LED current waveforms when using thin-film transistors M41 with different threshold voltages in a pixel circuit. The horizontal axis represents time, and the vertical axis represents LED current.

[0217] Simulations were performed when the threshold voltage of the thin-film transistor M41 was at the reference value, and when the threshold voltage of the thin-film transistor M41 was offset from the reference value. The waveform of the LED current at the specified value. For example... Figure 28A As indicated, the threshold voltage offset of the thin-film transistor M41 has a minimal impact on the waveform of the LED current.

[0218] Figure 28B Provided in Figure 25 Simulation results of LED current waveforms when using thin-film transistors M51 with different threshold voltages in a pixel circuit. The horizontal axis represents time, and the vertical axis represents LED current. The simulation calculates the threshold voltage of the thin-film transistor M51 when it is at the reference value and when it is offset from the reference value. The waveform of the LED current at the specified value. For example... Figure 28B As indicated, the threshold voltage offset of the thin-film transistor M51 has a minimal impact on the waveform of the LED current.

[0219] Figure 29A Provided Figure 22 Simulation results show the effect of threshold voltage shift of different thin-film transistors on average LED current in pixel circuits. The vertical axis represents the rate of change (fluctuation) of average LED current. Figure 29A The graph indicates the rate of change of average LED current caused by threshold voltage shifts occurring individually in thin-film transistors 121, M23, and M41. Figure 29A The graph also indicates the rate of change of average LED current caused by the threshold voltage shift of all thin-film transistors (others) except those mentioned above, and the rate of change of average LED current caused by the threshold voltage shift of all thin-film transistors (all).

[0220] Reference Figure 29A The curves show that the rate of change of average LED current caused by the threshold voltage shift of all thin-film transistors is positive. However, the rate of change of average LED current caused only by the threshold voltage shift of thin-film transistor M41 is negative; it partially offsets the effect of the threshold voltage shifts of the other thin-film transistors.

[0221] Figure 29B Provided Figure 25 Simulation results show the effect of threshold voltage shift of different thin-film transistors on average LED current in pixel circuits. The vertical axis represents the rate of change of average LED current. Figure 29B The graph indicates the rate of change of average LED current caused by threshold voltage shifts occurring individually in thin-film transistors 121, M23, and M51. Figure 29BThe graph also indicates the rate of change of average LED current caused by the threshold voltage shift of all thin-film transistors (others) except for the aforementioned thin-film transistors, and the rate of change of average LED current caused by the threshold voltage shift of all thin-film transistors (all).

[0222] Reference Figure 29B The curves show that the rate of change of average LED current caused by the threshold voltage shift of all thin-film transistors is positive. However, the rate of change of average LED current caused only by the threshold voltage shift of thin-film transistor M51 is negative; it partially offsets the effect of the threshold voltage shifts of the other thin-film transistors.

[0223] Figure 30 The configuration of the pixel circuitry in another embodiment of this disclosure is illustrated schematically. Figure 30 The pixel circuit in the image is achieved by replacing the curve with an n-type thin-film transistor. Figure 25 The pixel circuit is configured using p-type thin-film transistors. Due to the change in the conductivity type of the thin-film transistors, the polarity of the power supply voltages VSET and VH2 is reversed.

[0224] Figure 30 The thin-film transistors N121, N125, N126, N51, N21, N23, and N31 in the pixel circuit correspond to respectively Figure 25 The thin-film transistors 121, 125, 126, M51, M21, M23 and M31 in the pixel circuit. Figure 30 In the pixel circuit, capacitors N123, N124, and NC 21 correspond to respectively Figure 25 Capacitors 123, 124 and C21 in the pixel circuit. Figure 30 The H and L levels of the control signals of the switching transistors in the pixel circuit are related to... Figure 25 The opposite of the pixel circuit in the image.

[0225] exist Figure 30 In the pixel circuit, the drain of the PWM driving thin-film transistor N121 is connected to capacitor N124. The gate of the constant-current driving thin-film transistor N23 is connected to capacitor NC21. Thin-film transistor N51 is positioned between the drain of the PWM driving thin-film transistor N121 and the gate of the constant-current driving thin-film transistor N23. The gate of the constant-current control thin-film transistor N51 is connected to the power supply line used to provide a constant voltage DIVH.

[0226] Figure 25 The numerical specifications of the mid-pixel circuit have changed to accommodate the change in thin-film transistor polarity, as shown below:

[0227] ,

[0228] in, .

[0229] For reference Figure 22 and 24 In the described pixel circuit, at least one p-type thin-film transistor can be replaced by an n-type thin-film transistor. (Regarding the reference...) Figure 25 and Figure 30 In the described pixel circuit, one or more thin-film transistors can be p-type thin-film transistors, while the other thin-film transistors can be n-type thin-film transistors. For example, in Figure 22 If the thin-film transistor M41 in the pixel circuit of embodiment 24 is an n-type thin-film transistor, its gate is connected to the gate of the constant current drive transistor. The capacitance C condition of the capacitor 124 described in embodiment 3 can be applied to the pixel circuit of embodiment 6.

[0230] As described above, embodiments of the present disclosure have been presented; however, the present disclosure is not limited to the foregoing embodiments. Those skilled in the art can readily modify, add to, or transform each element in the foregoing embodiments within the scope of this disclosure. A portion of the configuration of one embodiment may be replaced by the configuration of another embodiment, or the configuration of one embodiment may be incorporated into the configuration of another embodiment.

Claims

1. A pixel circuit configured to control a light-emitting element, the pixel circuit comprising: A constant current control circuit, the constant current control circuit including a first thin film transistor, the constant current control circuit being configured to control the current flowing in the light-emitting element; as well as A pulse width modulation circuit, configured to output a control signal for the first thin-film transistor based on grayscale data voltage and a ramp signal input to the pulse width modulation circuit. The first thin-film transistor is configured to control the current flowing in the light-emitting element, and The pulse width modulation circuit includes: Pulse width modulation drives thin-film transistors; and A second thin-film transistor is disposed between the pulse width modulation driving thin-film transistor and the output node of the control signal, and the gate of the second thin-film transistor is configured to be provided with a constant voltage.

2. The pixel circuit of claim 1, wherein, The first thin-film transistor is a switch.

3. The pixel circuit of claim 1, wherein, The first thin-film transistor is configured to control the magnitude of the current flowing in the light-emitting element and whether to cut off the current.

4. The pixel circuit of claim 1, wherein, The first thin-film transistor, the pulse width modulation driving thin-film transistor, and the second thin-film transistor have the same conductivity type.

5. The pixel circuit of claim 1, wherein, A switching thin-film transistor is disposed between the pulse width modulation driving thin-film transistor and the second thin-film transistor.

6. The pixel circuit according to claim 2, wherein The second thin-film transistor is a p-type thin-film transistor, and wherein the relationship wherein VREF represents the constant voltage, VH2 represents a positive power supply voltage for the pulse width modulation circuit, and VGL represents a low voltage of the control signal.

7. The pixel circuit according to claim 2, wherein The second thin-film transistor is an n-type thin-film transistor, and wherein the relationship wherein VREF represents the constant voltage, VL2 represents a negative power supply voltage for the pulse width modulation circuit, and VGH represents a high voltage of the control signal.

8. The pixel circuit according to claim 1, further comprising: The capacitor between the gate of the first thin-film transistor and the power supply line. In this configuration, the drain of the pulse-width modulation driving thin-film transistor and the source of the second thin-film transistor are connected, and The source or drain of the second thin-film transistor is connected to one end of the capacitor and the gate of the first thin-film transistor.

9. The pixel circuit of claim 8, wherein, The capacitor has a capacitance of not less than 10 fF and not more than 300 fF.

10. The pixel circuit according to claim 2, wherein, The constant voltage supplied to the gate of the second thin-film transistor is the same as the other power supply voltage used for the pixel circuit, and The constant voltage and the power supply voltage share the same power line.

11. The pixel circuit according to claim 2, wherein The constant current control circuit also includes a constant current circuit, and The first thin-film transistor is a switching thin-film transistor disposed between the constant current circuit and the light-emitting element.

12. The pixel circuit according to claim 3, wherein, The second thin-film transistor is a p-type thin-film transistor, and wherein the following is satisfied wherein DIVH denotes the constant voltage, VH2 denotes a positive power supply voltage for the pulse width modulation circuit, denotes a gate voltage for the first thin film transistor, and Vth denotes a threshold voltage of the first thin film transistor.

13. The pixel circuit according to claim 3, wherein, The second thin-film transistor is an n-type thin-film transistor, and wherein the following is satisfied wherein DIVH denotes the constant voltage, VH2 denotes a negative power supply voltage for the pulse width modulation circuit, denotes a gate voltage for the first thin film transistor, and Vth denotes a threshold voltage of the first thin film transistor.

14. The pixel circuit according to claim 1, further comprising: A third thin-film transistor is connected between the gate of the first thin-film transistor and the source or drain of the second thin-film transistor. The gate of the third thin-film transistor is electrically connected to the source or drain of the third thin-film transistor.

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