Display panel and display device

By setting non-penetrating grooves and through-hole structures in the display panel substrate, double-sided electrical connections across the substrate are achieved, solving the problems of unstable electrical signal transmission and insufficient mechanical strength, and improving the electrical signal stability, mechanical strength and power consumption performance of the display panel.

CN122294779APending Publication Date: 2026-06-26JIANGSU HUIXIAN DISPLAY TECHNOLOGY CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
JIANGSU HUIXIAN DISPLAY TECHNOLOGY CO LTD
Filing Date
2026-03-26
Publication Date
2026-06-26

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  • Figure CN122294779A_ABST
    Figure CN122294779A_ABST
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Abstract

This application provides a display panel and a display device. The display panel includes a substrate, bonding traces, and a driver chip. The substrate includes a first sub-layer and a second sub-layer. The first sub-layer has a first via, and the second sub-layer has a second via. The first sub-layer has a first surface facing away from the second sub-layer and a second surface facing the second sub-layer. The first via includes a first through-hole and a groove. The first through-hole penetrates the first and second surfaces, and the groove is located on the first surface and communicates with the first via. The bonding traces are disposed on the second sub-layer facing away from the first sub-layer. The driver chip is disposed on the first sub-layer facing away from the second sub-layer. At least a portion of the conductive portion is located in the first through-hole and the groove. The bonding traces are electrically connected to the driver chip through the second via and the conductive portion to achieve dual-sided electrical connection across the substrate. The groove accommodates more conductive material while ensuring the structural strength of the first sub-layer, reducing contact resistance and improving the performance of the display panel.
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Description

Technical Field

[0001] This application relates to the field of display device technology, and more particularly to a display panel and display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices.

[0003] However, the performance of current display products needs to be improved. Summary of the Invention

[0004] This application provides a display panel and a display device, which aim to improve the performance of the display panel.

[0005] An embodiment of the first aspect of this application provides a display panel, including: a substrate, bonding traces, a driver chip, and a conductive portion. The substrate includes a first sub-layer and a second sub-layer stacked together. The first sub-layer has a first via, and the second sub-layer has a second via. The first sub-layer has a first surface facing away from the second sub-layer and a second surface facing the second sub-layer. The first via includes a first through-hole and a groove. The first through-hole penetrates the first surface and the second surface, and the groove is located on the first surface and is connected to the groove. The bonding traces are disposed on the second sub-layer facing away from the first sub-layer. The driver chip is disposed on the first sub-layer facing away from the second sub-layer. The conductive portion is disposed on the first surface, and at least a portion of the conductive portion is located in the first through-hole and the groove. The bonding traces are electrically connected to the driver chip through the second via and the conductive portion.

[0006] According to an embodiment of this application, an intermediate connection trace is provided between the first sub-layer and the second sub-layer. A first through-hole penetrates the first sub-layer and exposes a portion of the intermediate connection trace, and a second via penetrates the second sub-layer and exposes a portion of the intermediate connection trace. The bonding trace is electrically connected to the conductive part through the intermediate connection trace.

[0007] According to the embodiments of this application, the orthographic projection of the first through hole on a reference surface perpendicular to the thickness direction of the display panel and the orthographic projection of the second through hole on the reference surface perpendicular to the thickness direction of the display panel at least partially overlap, or the orthographic projection of the first through hole on the reference surface perpendicular to the thickness direction of the display panel and the orthographic projection of the second through hole on the reference surface perpendicular to the thickness direction of the display panel are spaced apart.

[0008] According to an embodiment of this application, the orthographic projection of the first through hole on a reference surface perpendicular to the thickness direction of the display panel at least partially overlaps with the orthographic projection of the second through hole on a reference surface perpendicular to the thickness direction of the display panel.

[0009] According to the embodiments of this application, the first through hole is connected to the second via hole, and the bonding trace is set to contact the conductive part.

[0010] According to the embodiments of this application, the display panel further includes conductive adhesive, which is located on the side of the conductive portion away from the second sub-layer, and the driving chip is electrically connected to the conductive portion through the conductive adhesive.

[0011] According to an embodiment of this application, the conductive adhesive extends from the conductive portion away from the second sublayer to the first sublayer away from the second sublayer.

[0012] According to the embodiments of this application, a pad is provided on the side of the driver chip facing the conductive adhesive, and a protrusion is provided on the side of the pad facing the conductive part. The protrusion protrudes in a direction away from the driver chip, and the orthographic projection of the protrusion on the second sublayer at least partially overlaps with the orthographic projection of the conductive part on the second sublayer.

[0013] According to the embodiments of this application, the display panel includes multiple bonding traces arranged side by side along a first direction. A first sub-layer has multiple first vias arranged at intervals along the first direction. A second sub-layer has multiple second vias arranged at intervals along the first direction. Each bonding trace is electrically connected to the driving chip through a corresponding conductive part. The first direction, the second direction, and the thickness direction of the display panel intersect each other.

[0014] According to the embodiments of this application, the intermediate connection traces extend along the second direction, and multiple intermediate connection traces are arranged side by side along the first direction.

[0015] According to an embodiment of this application, the groove is located on at least one side of the first through hole along the second direction.

[0016] According to an embodiment of this application, the groove is located on both sides of the first through hole along the second direction.

[0017] According to an embodiment of this application, the dimension of the groove along the second direction is greater than the dimension of the first through hole along the second direction.

[0018] According to an embodiment of this application, the orthographic projection of the second via on a reference surface perpendicular to the thickness direction of the display panel is located within the orthographic projection of the groove on the reference surface perpendicular to the thickness direction of the display panel.

[0019] According to an embodiment of this application, the display panel includes a display area and a non-display area located on at least one side of the display area, a bonding trace extends from the display area to the non-display area, and a second via is located in the non-display area.

[0020] According to an embodiment of this application, a dam is provided on the side of the second sublayer away from the first sublayer, the dam surrounds the display area, and the second via is located on the side of the dam away from the display area.

[0021] According to embodiments of this application, at least a portion of the first via is located in a non-display area.

[0022] According to an embodiment of this application, the first through hole is located in the non-display area, and the groove extends from the non-display area to the display area.

[0023] According to an embodiment of this application, a light-emitting layer is provided on the side of the second sub-layer opposite to the first sub-layer, and the light-emitting layer is located in the display area.

[0024] An embodiment of the second aspect of this application also provides a display device, including the display panel in any of the embodiments of the first aspect described above.

[0025] In the embodiments of this application, the first via in the first sub-layer includes a groove and a first through-hole. The thickness of the groove is less than the thickness of the first sub-layer, and the first through-hole penetrates the first sub-layer. Both the groove and the first through-hole are filled with conductive portions. The electrical signal output by the driver chip is conducted through the conductive portion in the first via to the bonding trace on the second sub-layer to achieve electrical connection, realizing a two-sided electrical connection across the substrate, which helps to reduce the size of the non-display area of ​​the display panel. The setting of the first through-hole can ensure that the conductive portion forms effective contact with the bonding trace and the driver chip, ensuring the conductivity and stability of the electrical signal transmission. The groove is a non-penetrating structure, which can retain part of the body structure of the first sub-layer, effectively maintaining the overall mechanical structural strength of the first sub-layer, reducing deformation and cracking problems caused by large-area openings in the substrate. At the same time, the non-penetrating design of the groove can reduce the intrusion of moisture and contaminants into the panel from the opening area. The simultaneous setting of the groove and the first through-hole ensures the structural strength of the first sub-layer while accommodating more conductive material, increasing the contact area between the driver chip and the conductive portion, reducing contact resistance, thereby reducing the power consumption of the display panel and improving the performance of the display panel. Attached Figure Description

[0026] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, wherein the same or similar reference numerals denote the same or similar features.

[0027] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application; Figure 2 This is a schematic diagram of another display panel structure provided in an embodiment of this application; Figure 3This is a schematic diagram of the structure of another display panel provided in the embodiments of this application; Figure 4 This is a schematic diagram of the structure of another display panel provided in the embodiments of this application; Figure 5 This is a schematic diagram of the structure of another display panel provided in the embodiments of this application; Figure 6 This is a schematic diagram of the structure of another display panel provided in the embodiments of this application; Figure 7 This is a schematic diagram of the structure of another display panel provided in the embodiments of this application; Figure 8 This is a schematic diagram of the structure of another display panel provided in the embodiments of this application.

[0028] Explanation of reference numerals in the attached figures: AA, Display area; NA, Non-display area; 100, Substrate; 110, First sublayer; 111, First via; 111a, Groove; 111b, First through-hole; 120, Second sublayer; 121, Second via; 130, Conductive part; 140, Inorganic layer; 200, Bonding trace; 300, Intermediate connection trace; 400, Conductive adhesive; 500, Driver chip; 510, Pad; 511, Protrusion; 600, Dam; 700, Light-emitting layer; 800, Second encapsulation layer; X, First direction; Y, Second direction; Z, Thickness direction. Detailed Implementation

[0029] The features and exemplary embodiments of various aspects of this application will now be described in detail. Numerous specific details are set forth in the following detailed description to provide a comprehensive understanding of this application. However, it will be apparent to those skilled in the art that this application can be implemented without requiring some of these specific details. The following description of embodiments is merely intended to provide a better understanding of this application by illustrating examples. In the accompanying drawings and the following description, at least some well-known structures and techniques are not shown to avoid unnecessarily obscuring the application; and, for clarity, the dimensions of some structures may be exaggerated. Furthermore, the features, structures, or characteristics described below can be combined in any suitable manner in one or more embodiments.

[0030] In the description of this application, it should be noted that, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," "outer," etc., indicating orientation or positional relationships are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0031] The directional terms appearing in the following description refer to the directions shown in the figures and are not intended to limit the specific structure of the embodiments of this application. It should also be noted in the description of this application that, unless otherwise explicitly specified and limited, the terms "installation" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0032] like Figure 1 As shown in the first aspect embodiment of this application, a display panel includes: a substrate 100, bonding traces 200, conductive portions 130, and a driver chip 500. The substrate 100 includes a first sub-layer 110 and a second sub-layer 120 stacked together. The first sub-layer 110 has a first via 111, and the second sub-layer 120 has a second via 121. The first sub-layer 110 has a first surface facing away from the second sub-layer 120 and a second surface facing the second sub-layer 120. The first via 111 includes a groove 111a and a... A first through-hole 111b and a groove 111a are located on the first surface, and the first through-hole 111b penetrates through the first surface and the second surface; a bonding trace 200 is disposed on the side of the second sub-layer 120 away from the first sub-layer 110; a driver chip 500 is disposed on the side of the first sub-layer 110 away from the second sub-layer 120; a conductive part 130 is disposed on the first surface, and at least a portion of the conductive part 130 is located in the first through-hole 111b and the groove 111a, and the bonding trace 200 is electrically connected to the driver chip 500 through the second via 121 and the conductive part 130.

[0033] In this embodiment, the first via 111 opened in the first sub-layer 110 includes a groove 111a and a first through hole 111b. The thickness of the groove 111a is less than the thickness of the first sub-layer 110. The opening of the groove 111a faces away from the second sub-layer 120. The first through hole 111b penetrates the first sub-layer 110. Both the groove 111a and the first through hole 111b of the first via 111 are filled with conductive portions 130. The electrical signal output by the driving chip 500 is conducted through the conductive portion 130 in the first via 111 to the second via 121 and achieves electrical connection with the bonding trace 200, realizing the double-sided electrical connection across the substrate 100, which helps to reduce the size of the non-display area NA of the display panel. The first through-hole 111b ensures an effective electrical connection between the conductive part 130, the bonding trace 200, and the driver chip 500, guaranteeing the conductivity and stability of electrical signal transmission. The groove 111a is a non-penetrating structure, preserving part of the main structure of the first sub-layer 110 and effectively maintaining the overall mechanical strength of the first sub-layer 110. This reduces deformation and cracking caused by large-area openings in the substrate 100. Simultaneously, the non-penetrating design of the groove 111a reduces the intrusion of moisture and contaminants into the panel from the opening area. The combination of the first through-hole 111b and the groove 111a ensures the structural strength of the first sub-layer 110 while accommodating more conductive material, increasing the contact area between the driver chip 500 and the conductive part 130, reducing contact resistance, thereby reducing the power consumption of the display panel and improving its performance.

[0034] Optionally, the materials of the first sub-layer 110 and the second sub-layer 120 include polyimide, which has good flexible support and is suitable for the bending and rolling requirements of flexible display panels.

[0035] Optional, such as Figure 1 As shown, the slot depth d is 30% to 70% of the thickness D of the first sublayer 110, and the slot depth is 30%, 40%, 50%, 60%, 70% of the thickness of the first sublayer 110, etc.

[0036] like Figure 2 As shown, in some optional embodiments, the display panel includes a plurality of bonding traces 200 arranged side by side along a first direction X, a plurality of first vias 111 are provided on a first sub-layer 110, the plurality of first vias 111 are spaced apart along the first direction X, and a plurality of second vias 121 are provided on a second sub-layer 120, the plurality of second vias 121 are spaced apart along the first direction X.

[0037] In these optional embodiments, the display panel includes a plurality of bonding traces 200 arranged side-by-side along a first direction X. A second sub-layer 120 has a plurality of second vias 121 spaced apart along the first direction X and corresponding one-to-one with the bonding traces 200. A first sub-layer 110 has a plurality of first vias 111 spaced apart along the first direction X and corresponding one-to-one with the second vias 121. The bonding traces 200 can pass through the conductive paths in their respective second vias 121 and first vias 111. The section 130 achieves independent electrical connections. This layout design makes the electrical signal transmission paths of each bonded trace 200 independent and reduces electrical signal interference. It ensures the accuracy and stability of the electrical signal output of the driver chip 500 to each bonded trace 200. At the same time, the multiple first vias 111 and second vias 121 arranged at intervals along the first direction X are adapted to the bonded traces 200 arranged side by side. This can adapt to the wiring requirements of the display panel, make full use of the bezel area space of the substrate 100, further optimize the structural layout of the bezel, and the spaced via structure can reduce the impact on the structural strength of the substrate 100.

[0038] like Figure 1 and Figure 3 As shown, in some optional embodiments, the groove 111a is located on at least one side of the first through hole 111b along the second direction Y, and the first direction X, the second direction Y and the thickness direction Z of the display panel intersect each other.

[0039] In these optional embodiments, a plurality of first vias 111 are spaced apart along a first direction X, and a groove 111a is provided on at least one side of the first through hole 111b along a second direction Y, thereby reducing the influence of the groove 111a on the arrangement density of the first vias 111 along the first direction X, such as Figure 1 As shown, the groove 111a can be located on one side of the first through hole 111b along the second direction Y; as Figure 3 As shown, the groove 111a can also be located on both sides of the first through hole 111b along the second direction Y, thereby increasing the hole area of ​​the first through hole 111, thereby increasing the exposed area of ​​the conductive part 130 material and reducing contact resistance. This retains a larger portion of the body structure of the first sublayer 110, effectively maintaining the overall mechanical strength of the substrate 100, reducing the intrusion of moisture and contaminants from the first through hole 111, and thus improving the reliability of the display panel.

[0040] Optionally, the first direction X, the second direction Y, and the thickness direction Z of the display panel are all perpendicular to each other.

[0041] like Figure 1 and Figure 3As shown, in some optional embodiments, the dimension of the groove 111a along the second direction Y is larger than the dimension of the first through hole 111b along the second direction Y.

[0042] In these optional embodiments, the groove 111a is disposed on at least one side of the first through hole 111b along the second direction Y, and the size of the groove 111a along the second direction Y is larger than the size of the first through hole 111b along the second direction Y. The larger size of the groove 111a increases the exposed area of ​​the conductive part 130 material while ensuring the structural stability of the first sub-layer 110. Furthermore, two adjacent first through holes 111 are spaced apart along the first direction X, and the larger size of the groove 111a along the second direction Y has little impact on the arrangement density of the first through holes 111.

[0043] like Figure 3 As shown, in some optional embodiments, the orthographic projection of the second via 121 onto a reference plane perpendicular to the thickness direction Z of the display panel is located within the orthographic projection of the groove 111a onto a reference plane perpendicular to the thickness direction Z of the display panel.

[0044] In these alternative embodiments, the projected area of ​​the groove 111a on the reference plane perpendicular to the thickness direction Z of the display panel is greater than the projected area of ​​the second via 121 on the reference plane perpendicular to the thickness direction Z of the display panel, thereby improving the contact surface of the conductive part 130.

[0045] like Figure 1 As shown, in some alternative embodiments, the orthographic projection of the first through-hole 111b onto a reference plane perpendicular to the thickness direction Z of the display panel at least partially overlaps with the orthographic projection of the second through-hole 121 onto a reference plane perpendicular to the thickness direction Z of the display panel.

[0046] In these alternative embodiments, the first via 111b is connected to the second via 121, the bonding trace 200 is located in the second via 121, and the conductive part 130 is located in the first via 111. The bonding trace 200 can directly contact and electrically connect with the conductive part 130, thereby simplifying the manufacturing process of the display panel.

[0047] like Figure 3 and Figure 4 As shown, in some alternative embodiments, an intermediate connection trace 300 is provided between the first sub-layer 110 and the second sub-layer 120. A first through-hole 111b penetrates the first sub-layer 110 and exposes a portion of the intermediate connection trace 300. A second via 121 penetrates the second sub-layer 120 and exposes a portion of the intermediate connection trace 300. The bonding trace 200 is electrically connected to the conductive part 130 through the intermediate connection trace 300.

[0048] In these optional embodiments, the first through-hole 111b penetrates the first sub-layer 110 and exposes a portion of the intermediate connection trace 300. The second via 121, corresponding to the first through-hole 111b, penetrates the second sub-layer 120 and exposes the same intermediate connection trace 300. The bonding trace 200 and the corresponding conductive part 130 are connected to the same intermediate connection trace 300 to achieve electrical connection. The intermediate connection trace 300 serves as a transition point for the connection between the bonding trace 200 and the conductive part 130, effectively compensating for alignment deviations during processing and further ensuring the conductivity stability of the electrical connection.

[0049] Optional, such as Figure 4 As shown, an inorganic layer 140 is disposed on the side of the first sublayer 110 facing the second sublayer 120, and the intermediate connection trace 300 is located between the inorganic layer 140 and the second sublayer 120. The inorganic layer 140 is formed on the first sublayer 110. When the intermediate connection trace 300 is formed, the inorganic layer 140 can protect the first sublayer 110 and reduce the etching damage to the first sublayer 110.

[0050] Optional, such as Figure 4 As shown, the first through-hole 111b penetrates the first sub-layer 110 and the inorganic layer 140 and exposes the intermediate connection trace 300.

[0051] like Figure 5 As shown, in some optional embodiments, the intermediate connection trace 300 extends along the second direction Y, and multiple intermediate connection traces 300 are arranged side by side along the first direction X.

[0052] In these optional embodiments, the intermediate connection traces 300 extend along the second direction Y and are arranged side by side along the first direction X. This layout makes the arrangement of each intermediate connection trace 300 the same as that of the bonding traces 200. The extension of the intermediate connection traces 300 along the second direction Y provides more contact area for the bonding traces 200 and the conductive part 130, reducing contact resistance. The side-by-side arrangement of multiple intermediate connection traces 300 along the first direction X is in line with the multi-line wiring requirements of the panel, realizing independent transmission of electrical signals of each line and reducing signal interference between different lines. At the same time, this arrangement can make full use of the wiring space in the frame area and further optimize the frame structure layout.

[0053] like Figure 6 As shown, in some optional embodiments, the orthographic projection of the first through hole 111b on a reference plane perpendicular to the thickness direction Z of the display panel at least partially overlaps with the orthographic projection of the second through hole 121 on a reference plane perpendicular to the thickness direction Z of the display panel.

[0054] In these optional embodiments, the orthographic projection of the first via 111b on a reference plane perpendicular to the thickness direction Z of the display panel overlaps with the orthographic projection of the second via 121 on the same reference plane. Alternatively, the orthographic projections of the first via 111b and the second via 121 partially overlap, such that the first via 111b and the second via 121 occupy less space on the substrate 100, which helps reduce the bezel size of the display panel and accommodates the narrowing bezel design requirements. The overlapping projections of the first via 111b and the second via 121 can help reduce the trace length of the intermediate connection trace 300, thereby reducing voltage drop.

[0055] like Figure 4 As shown, in some alternative embodiments, the orthographic projection of the first through hole 111b on a reference plane perpendicular to the thickness direction Z of the display panel is spaced apart from the orthographic projection of the second through hole 121 on the reference plane perpendicular to the thickness direction Z of the display panel.

[0056] In these optional embodiments, the first via 111b penetrates the first sublayer 110, and the second via 121 penetrates the second sublayer 120. Both the first via 111b and the second via 121 affect the structural strength of the substrate 100. The first via 111b and the second via 121 are spaced apart along the second direction Y, effectively reducing the local structural strength reduction of the substrate 100 caused by excessive concentration of openings in the corresponding area of ​​the substrate 100 due to their overlapping projections. The spaced arrangement of the first via 111b and the second via 121 can reduce the probability of moisture and other substances intruding into the panel, improving the reliability of the display panel. The spaced design can also reduce the accuracy requirements for opening processing, thereby improving production efficiency and product yield.

[0057] like Figure 1 As shown, in some optional embodiments, the display panel includes a display area AA and a non-display area NA located on at least one side of the display area AA, the bonding trace 200 extends from the display area AA to the non-display area NA, and the second via 121 is located in the non-display area NA.

[0058] In these optional embodiments, the second via 121 is disposed in the non-display area NA without display function, reducing the interference of the opening structure on the pixel arrangement density, transistors, etc. of the display area AA, thereby improving the display effect of the display panel. The bonding trace 200 extends from the display area AA to the non-display area NA and connects with the second via 121 in the non-display area NA, so that the electrical signals of the display area AA are transmitted to the non-display area NA to complete the electrical connection with the intermediate connecting trace 300. Optionally, the second via 121 is located in the non-display area NA on the side of the display area AA along the second direction Y.

[0059] like Figure 1 As shown, in some optional embodiments, a dam 600 is provided on the side of the second sub-layer 120 away from the first sub-layer 110, the dam 600 surrounds the display area AA, and the second via 121 is located on the side of the dam 600 away from the display area AA.

[0060] In these optional embodiments, the second via 121 is located on the side of the dam 600 away from the display area AA. The dam 600 forms a physical barrier, blocking some moisture and other impurities that enter through the first via 111 and the second via 121, thereby ensuring the display effect and reliability of the display panel. Placing the second via 121 in the non-display area NA outside the dam 600 allows for a hierarchical spatial layout of the display area AA, the dam 600, and the electrical connection structure. This rationally divides the spatial boundaries of each functional area, utilizing the frame space outside the dam 600 to complete the electrical connection structure layout, reducing the space occupied by the electrical connection structure in the display area AA inside the dam 600.

[0061] like Figure 1 and Figure 3 As shown, in some optional embodiments, at least a portion of the first via 111 is located in the non-display area NA.

[0062] In these alternative embodiments, such as Figure 3 As shown, the first via 111 can be partially located in the non-display area NA, such as... Figure 1 As shown, the first via 111 can also be entirely located in the non-display area NA. Having at least a portion of the first via 111 located in the non-display area NA can reduce the spacing between the first via 111 and the second via 121, thereby reducing the transmission path of electrical signals.

[0063] like Figure 7 As shown, in some optional embodiments, the first through hole 111b is located in the non-display area NA, and the groove 111a extends from the non-display area NA to the display area AA.

[0064] In these optional embodiments, the first via 111b being located in the non-display area NA can reduce the distance between the first via 111b and the second via 121. The design of the groove 111a extending from the non-display area NA to the display area AA can increase the contact area between the conductive part 130 and the pad 510 of the driver chip 500, thereby improving the stability and conduction efficiency of the electrical connection. Since the groove 111a does not penetrate the first sub-layer 110, it has little impact on the structural integrity and display function of the first sub-layer 110. Furthermore, the groove 111a is only located on the side of the first via 111b facing the display area AA along the second direction Y. The groove 111a extends from the non-display area NA along the second direction Y towards the display area AA, which is beneficial for reducing the bezel size.

[0065] Optional, such as Figure 1 As shown, a light-emitting layer 700 is provided on the side of the second sub-layer 120 away from the first sub-layer 110. The light-emitting layer 700 is located in the display area AA. A first encapsulation layer is provided on the side of the light-emitting layer 700 away from the first sub-layer 110. A second encapsulation layer 800 is provided on the side of the first encapsulation layer away from the first sub-layer 110. The second encapsulation layer 800 extends from the side of the light-emitting layer 700 away from the first sub-layer 110 to the side of the dam 600 away from the second via 121, thereby isolating water vapor and other impurities that enter through the second via 121.

[0066] Optionally, the material of the first encapsulation layer includes inorganic materials, and the material of the second encapsulation layer 800 includes organic materials.

[0067] like Figure 1 As shown, in some optional embodiments, the display panel further includes a conductive adhesive 400, which is located on the side of the conductive portion 130 away from the second sub-layer 120, and the driving chip 500 is electrically connected to the conductive portion 130 through the conductive adhesive 400.

[0068] In these optional embodiments, the conductive adhesive 400 serves as the electrical connection medium between the driver chip 500 and the conductive portion 130. The conductive adhesive 400 can fully fill the contact gap between the driver chip 500 and the conductive portion 130, increasing the effective contact area and ensuring the conductivity and stability of electrical signal transmission. The conductive adhesive 400 can be anisotropic and possesses good adhesion, firmly adhering the driver chip 500 to the surface of the first sublayer 110, improving the structural stability of the connection between the driver chip 500 and the substrate 100, and adapting to flexible applications. In display panel bending and vibration scenarios, the flexible connection characteristics of conductive adhesive 400 can buffer the stress transmission between driver chip 500 and substrate 100, reduce cracking and detachment caused by stress due to thermal expansion and contraction and mechanical bending, and ensure the long-term reliability of electrical connection. In addition, the conductive adhesive 400 realizes the electrical connection between driver chip 500 and conductive part 130 without the need for hard contact connection method, which reduces the processing accuracy requirements of driver chip 500 bonding process, reduces mechanical damage during bonding process, and improves the production yield of display panel.

[0069] like Figure 1 As shown, in some optional embodiments, the conductive adhesive 400 extends from the conductive portion 130 away from the side opposite to the second sublayer 120 to the side of the first sublayer 110 away from the second sublayer 120.

[0070] In these optional embodiments, the conductive adhesive 400 not only achieves effective electrical contact with the conductive portion 130, but also extends to cover at least a portion of the surface of the first sublayer 110 on the side opposite to the second sublayer 120. This ensures stable electrical signal transmission between the driver chip 500 and the conductive portion 130, while also enhancing the bonding strength of the driver chip 500 to the first sublayer 110 via the conductive adhesive 400. The large distribution area of ​​the conductive adhesive 400 can form a protective coating at the junction of the conductive portion 130 and the first sublayer 110, reducing the probability of moisture or other contaminants penetrating the first via 111. Optionally, the conductive adhesive 400 extends from the non-display area NA to the display area AA, thereby increasing the coverage area of ​​the conductive adhesive 400.

[0071] like Figure 8 As shown, in some optional embodiments, the driver chip 500 is provided with a pad 510 on the side facing the conductive adhesive 400, and the pad 510 is provided with a protrusion 511 on the side facing the conductive portion 130. The protrusion 511 protrudes in a direction away from the driver chip 500, and the orthographic projection of the protrusion 511 on the second sublayer 120 at least partially overlaps with the orthographic projection of the conductive portion 130 on the second sublayer 120.

[0072] In these optional embodiments, by providing a protrusion 511 on the pad 510, the protrusion 511 is disposed opposite to the conductive portion 130. The protrusion 511 forms a local compression on the conductive adhesive 400, so that the conductive adhesive 400 achieves a tighter fit in the contact area between the protrusion 511 and the conductive portion 130. The thickness of the conductive adhesive 400 between the protrusion 511 and the conductive portion 130 is less than the thickness of the conductive adhesive 400 between the pad 510 and the first sublayer 110, thereby ensuring the stability of electrical signal transmission, reducing the transmission loss of electrical signals in the conductive adhesive 400, and optimizing the electrical signal transmission efficiency. The conductive adhesive 400 surrounds the periphery of the protrusion 511, which can enhance the mechanical bonding force between the pad 510 and the conductive adhesive 400, thereby improving reliability.

[0073] Optional, such as Figure 8 As shown, the conductive portion 130 protrudes in a direction away from the second sublayer 120 relative to the first sublayer 110, thereby facilitating a reduction in the spacing between the conductive portion 130 and the pad 510 and facilitating electrical connection between the conductive portion 130 and the pad 510.

[0074] Optional, such as Figure 8 As shown, the conductive portion 130 extends from the area where the first via 111 is located toward the first surface, and the conductive portion 130 covers part of the first surface, thereby increasing the contact area between the conductive portion 130 and the conductive adhesive 400. The conductive portion 130 protrudes relative to the first sub-layer 110, and the conductive adhesive 400 covers the surface of the conductive portion 130 facing away from the second sub-layer 120 and is disposed around the periphery of the conductive portion 130.

[0075] The second aspect of this application also provides a display device, including the display panel of any of the first aspect embodiments described above. Since the display device provided in the second aspect of this application includes the display panel of any of the first aspect embodiments described above, it has the beneficial effects of the display panel of any of the first aspect embodiments described above, which will not be elaborated further here.

[0076] The display devices in this application include, but are not limited to, mobile phones, personal digital assistants (PDAs), tablet computers, e-books, televisions, access control systems, smart landline phones, control consoles, and other devices with display functions.

[0077] Although this application has been described with reference to preferred embodiments, various modifications can be made thereto and components can be replaced with equivalents without departing from the scope of this application. In particular, the technical features mentioned in the various embodiments can be combined in any manner, provided there is no structural conflict. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A display panel, characterized in that, include: The substrate includes a first sublayer and a second sublayer stacked together. The first sublayer has a first via, and the second sublayer has a second via. The first sublayer has a first surface facing away from the second sublayer and a second surface facing the second sublayer. The first via includes a first through-hole and a groove. The first through-hole penetrates the first surface and the second surface. The groove is located on the first surface, and the first through-hole is connected to the groove. The wiring is bound and positioned on the side of the second sub-layer opposite to the first sub-layer. The driver chip is located on the side of the first sub-layer opposite to the second sub-layer; A conductive portion is disposed on the first surface, and at least a portion of the conductive portion is located in the first through hole and the groove. The bonding trace is electrically connected to the driver chip through the second through hole and the conductive portion.

2. The display panel according to claim 1, characterized in that, An intermediate connection trace is provided between the first sub-layer and the second sub-layer. The first via penetrates the first sub-layer and exposes part of the intermediate connection trace. The second via penetrates the second sub-layer and exposes part of the intermediate connection trace. The bonding trace is electrically connected to the conductive part through the intermediate connection trace.

3. The display panel according to claim 2, characterized in that, The orthographic projection of the first through hole on a reference plane perpendicular to the thickness direction of the display panel at least partially overlaps with the orthographic projection of the second through hole on the reference plane perpendicular to the thickness direction of the display panel, or the orthographic projection of the first through hole on the reference plane perpendicular to the thickness direction of the display panel and the orthographic projection of the second through hole on the reference plane perpendicular to the thickness direction of the display panel are spaced apart.

4. The display panel according to claim 1, characterized in that, The orthographic projection of the first through hole on a reference plane perpendicular to the thickness direction of the display panel at least partially overlaps with the orthographic projection of the second via on the reference plane perpendicular to the thickness direction of the display panel; Preferably, the first through hole is connected to the second via hole, and the bonding trace is disposed in contact with the conductive part.

5. The display panel according to claim 1, characterized in that, The display panel also includes conductive adhesive, which is located on the side of the conductive portion away from the second sub-layer, and the driving chip is electrically connected to the conductive portion through the conductive adhesive; Preferably, the conductive adhesive extends from the conductive portion on the side away from the second sublayer to the side of the first sublayer away from the second sublayer; Preferably, the driving chip has a pad on the side facing the conductive adhesive, and the pad has a protrusion on the side facing the conductive part. The protrusion protrudes in a direction away from the driving chip, and the orthographic projection of the protrusion on the second sub-layer at least partially overlaps with the orthographic projection of the conductive part on the second sub-layer.

6. The display panel according to claim 2, characterized in that, The display panel includes a plurality of bonding traces, which are arranged side by side along a first direction. A plurality of first vias are provided on the first sub-layer, which are spaced apart along the first direction. A plurality of second vias are provided on the second sub-layer, which are spaced apart along the first direction. Each bonding trace is electrically connected to the driver chip through a corresponding conductive part. Preferably, the intermediate connection traces extend along the second direction, and a plurality of intermediate connection traces are arranged side by side along the first direction, wherein the first direction, the second direction, and the thickness direction of the display panel intersect each other.

7. The display panel according to claim 6, characterized in that, The groove is located on at least one side of the first through hole along the second direction; Preferably, the groove is located on both sides of the first through hole along the second direction.

8. The display panel according to claim 7, characterized in that, The dimension of the groove along the second direction is greater than the dimension of the first through hole along the second direction; Preferably, the orthographic projection of the second via on a reference surface perpendicular to the thickness direction of the display panel is located within the orthographic projection of the groove on the reference surface perpendicular to the thickness direction of the display panel.

9. The display panel according to claim 1, characterized in that, The display panel includes a display area and a non-display area located on at least one side of the display area, the bonding trace extends from the display area to the non-display area, and the second via is located in the non-display area; Preferably, a dam is provided on the side of the second sub-layer away from the first sub-layer, the dam surrounds the display area, and the second via is located on the side of the dam away from the display area; Preferably, at least a portion of the first via is located in the non-display area; Preferably, the first through hole is located in the non-display area, and the groove extends from the non-display area to the display area; Preferably, the second sub-layer has a light-emitting layer on the side opposite to the first sub-layer, and the light-emitting layer is located in the display area.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.