LED chip aging prediction system based on dynamic modeling

Abstract

This invention relates to the field of electrical fault detection technology, specifically to an LED chip aging prediction system based on dynamic modeling. The system includes a harmonic feature acquisition module, which applies a single-frequency sinusoidal electrical signal to the LED chip, acquires the response electrical signal, performs a Fourier transform on the response electrical signal, extracts the amplitude and phase information of each harmonic, and constructs a nonlinear harmonic distortion fingerprint characterizing carrier transport properties. In this invention, by applying a single-frequency sinusoidal electrical signal to the LED chip, acquiring and Fourier transforming the response electrical signal, the amplitude and phase information of harmonics are effectively extracted, establishing a nonlinear harmonic distortion fingerprint, which can sensitively capture non-ideal characteristics of carrier transport. Subsequently, the nonlinear harmonic distortion fingerprint is further fused with local slope sets to construct a device state feature vector, achieving comprehensive quantification of the charge distribution in the depletion region.

Description

Technical Field

[0001] This invention relates to the field of electrical fault detection technology, and in particular to an LED chip aging prediction system based on dynamic modeling. Background Technology

[0002] The field of electrical fault detection technology involves using electrical parameter monitoring and analysis techniques to capture, in real time or periodically, voltage, current, frequency, impedance and related electrical characteristic parameters of electronic and electrical equipment or devices during operation, and using signal processing and feature extraction methods to identify early performance change trends of equipment and detect potential electrical faults caused by factors such as aging, wear, material degradation, device defects or external stress.

[0003] Current technologies lack the ability to identify and integrate the nonlinear characteristics and micro-state changes within devices, making it difficult to achieve a deep understanding of chip performance trends. Furthermore, existing technologies typically only perform difference analysis on single-point or short-term data during data processing, lacking dynamic tracking of long-term state changes and the deduction of evolution trajectories. This makes them sensitive to noise interference during monitoring and difficult to effectively filter out the influence of anomalies. Therefore, improvements are needed. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of existing technologies and propose an LED chip aging prediction system based on dynamic modeling.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: An LED chip aging prediction system based on dynamic modeling includes:

[0006] The harmonic feature acquisition module applies a single-frequency sinusoidal electrical signal to the LED chip, acquires the response electrical signal, performs a Fourier transform on the response electrical signal, extracts the amplitude and phase information of each harmonic, and constructs a nonlinear harmonic distortion fingerprint characterizing the carrier transport properties.

[0007] The state vector construction module calls the nonlinear harmonic distortion fingerprint, calculates and obtains the local slope set, integrates the amplitude and phase data in the nonlinear harmonic distortion fingerprint with the local slope set, and generates a device state feature vector.

[0008] The aging trend prediction module calculates the rate of change of each component in the device state feature vector over time based on the device state feature vector, establishes a feature change rate matrix, and predicts the evolution path of the device state feature vector within the target time period based on the rate and direction of change of each component in the feature change rate matrix, thereby obtaining aging trajectory evolution data.

[0009] The electrical fault early warning module receives the aging trajectory evolution data, compares it item by item with the failure judgment threshold, generates a potential fault point time series table, integrates all entries in the potential fault point time series table, and constructs an electrical fault predictive alarm.

[0010] Preferably, the steps for acquiring the nonlinear harmonic distortion fingerprint are as follows:

[0011] A single-frequency sinusoidal electrical signal is applied to the LED chip, and the response electrical signal generated by the LED chip under the action of the single-frequency sinusoidal electrical signal is acquired in real time. The instantaneous amplitude of the response electrical signal and the corresponding timestamp are recorded to generate the original response electrical signal data.

[0012] Based on the original response electrical signal data, the spectral distribution of the response electrical signal data in the frequency domain is calculated by Fourier transform, and the amplitude and phase values ​​corresponding to each harmonic in the spectrum are extracted to generate a set of harmonic amplitude values ​​and a set of harmonic phase values.

[0013] Based on the set of harmonic amplitude values ​​and the set of harmonic phase values, the amplitude and phase values ​​of each harmonic are combined one by one into corresponding amplitude-phase value pairs. Using the amplitude-phase value pairs as input parameters, a nonlinear harmonic distortion fingerprint is constructed.

[0014] Preferably, the step of obtaining the local slope set is as follows:

[0015] The amplitude and phase values ​​of each harmonic in the nonlinear harmonic distortion fingerprint are called up, and different bias voltages are applied one by one under stable bias conditions. The capacitance value and bias voltage value at each bias voltage point are collected, and the fundamental amplitude and third harmonic amplitude corresponding to the current point are recorded to generate a joint data set of capacitance value, bias voltage value, fundamental amplitude and third harmonic amplitude.

[0016] The slope value of the harmonic-enhanced capacitor is calculated based on the combined data set of capacitance value, bias voltage value, fundamental amplitude and third harmonic amplitude.

[0017] Based on the harmonic-enhanced capacitor slope values ​​calculated from all bias voltage points, the values ​​are sorted one by one according to the voltage scan order, and the data point index numbers are marked to generate a local slope set.

[0018] Preferably, the step of obtaining the device state feature vector is as follows:

[0019] The amplitude and phase values ​​of each bias voltage point in the nonlinear harmonic distortion fingerprint are called, and the corresponding harmonic enhancement capacitor slope values ​​are matched according to the time sequence to generate a fused structural feature data set.

[0020] Based on the fusion structural feature data set, a modulated complex response structure is constructed for each bias voltage point, and the complex characteristic impedance is calculated by combining the slope value of the harmonic enhancement capacitor with the harmonic phasor.

[0021] Based on the complex characteristic impedances at each bias voltage point, a sequence of complex vectors is constructed in the bias order to generate a device state characteristic vector that quantifies the charge distribution in the depletion region.

[0022] Preferably, the step of obtaining the characteristic change rate matrix is ​​as follows:

[0023] Based on the device state feature vector, the position of the same component in each feature vector is located, the value of the component is extracted one by one at all time points, and the components are arranged and combined in chronological order to generate a time series set of device state feature components.

[0024] Based on the time series set of device state feature components, a sliding window parameter is set, symmetrical data points are extracted within a window range centered at any time, and the rate of change at that time is estimated by fitting the least squares method.

[0025] Based on the rate of change of all feature components calculated at the center point of each time window, the two-dimensional structure is filled in sequentially in the order of feature components as columns and time center points as rows to generate a feature rate of change matrix.

[0026] Preferably, the steps for acquiring the aging trajectory evolution data are as follows:

[0027] Based on the feature change rate matrix, the latest change rate and corresponding direction of each device state feature component are extracted one by one, and the change increment value of each feature component per unit time is calculated to form a set of device state feature component increment values.

[0028] Based on the set of incremental values ​​of the device state feature components, the device state feature vector of the most recently measured time is called, and the incremental values ​​of each component are superimposed one by one to the values ​​of the corresponding components in the device state feature vector to generate the device state feature vector at the next prediction time.

[0029] Based on the device state feature vector at the next prediction time, the incremental calculation and vector update process is repeated cyclically until the target prediction cycle ends. The device state feature vector sequence is recorded sequentially to form a continuous prediction sequence, generating aging trajectory evolution data.

[0030] Preferably, the step of obtaining the sequence list of potential fault points is as follows:

[0031] Receive the aging trajectory evolution data, extract the value of each feature item in the device state feature vector corresponding to each predicted time point, match and align the feature item value with the corresponding failure judgment threshold value, and generate a control group of feature item value and failure judgment threshold value.

[0032] Based on the comparison between the value of the feature item and the value of the failure judgment threshold, the values ​​of each feature item are compared one by one to determine whether the value of the feature item exceeds the value of the failure judgment threshold. If the value of the feature item exceeds the value of the failure judgment threshold, the feature item is marked as a potential fault feature item, and the corresponding prediction time point is recorded at the same time to generate a potential fault point time series table.

[0033] Preferably, the step of obtaining the predictive alarm for electrical faults is as follows:

[0034] Receive the potential fault point time series list, extract the predicted occurrence timestamp and corresponding feature value of each potential fault feature item in the potential fault point time series list, sort all potential fault feature items one by one according to the predicted occurrence timestamp and mark the sequence number, and generate the sorted potential fault feature item time series.

[0035] Based on the sorted time series of potential fault features, the number of all potential fault features under each predicted occurrence time stamp is counted, and the values ​​of all potential fault features under each predicted occurrence time stamp and the type information of the corresponding items are summarized one by one to form a time series distribution set of the number of fault features and feature details.

[0036] Based on the time-series distribution set of the number and details of the fault features, the number and features of each predicted occurrence timestamp are mapped to the alarm message template one by one, generating alarm information with the predicted time point, features, and feature values, thus obtaining a predictive alarm for electrical faults.

[0037] Compared with the prior art, the advantages and positive effects of the present invention are as follows:

[0038] In this invention, a single-frequency sinusoidal electrical signal is applied to the LED chip, and the Fourier transform response signal is collected to effectively extract the amplitude and phase information of harmonics, establishing a nonlinear harmonic distortion fingerprint. This fingerprint can sensitively capture non-ideal characteristics of carrier transport. Subsequently, the nonlinear harmonic distortion fingerprint is further fused with local slope sets to construct a device state feature vector, achieving comprehensive quantification of charge distribution in the depletion region. Based on this, a feature change rate matrix is ​​constructed to dynamically analyze the changing trends and directions of feature components, deducing the chip state evolution trajectory over time and predicting potential aging paths in real time. Furthermore, the evolution trajectory is compared item by item with a preset failure judgment threshold to identify potential fault points and corresponding prediction time points for each fault feature item, thereby generating highly targeted predictive alarms for electrical faults and achieving timely early warning. This effectively reduces potential risks during equipment operation and extends the chip's lifespan. Attached Figure Description

[0039] Figure 1 This is a system flowchart of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0041] Please see Figure 1 The present invention provides a technical solution: an LED chip aging prediction system based on dynamic modeling includes:

[0042] The harmonic feature acquisition module applies a single-frequency sinusoidal electrical signal to the LED chip, acquires the response electrical signal, performs a Fourier transform on the response electrical signal, extracts the amplitude and phase information of each harmonic, and constructs a nonlinear harmonic distortion fingerprint characterizing the carrier transport properties.

[0043] The state vector construction module calls the nonlinear harmonic distortion fingerprint, calculates and obtains the local slope set, integrates the amplitude and phase data in the nonlinear harmonic distortion fingerprint with the local slope set, and generates the device state feature vector.

[0044] The aging trend prediction module calculates the rate of change of each component in the device state feature vector over time based on the device state feature vector, establishes a feature change rate matrix, and predicts the evolution path of the device state feature vector within the target time period based on the rate and direction of change of each component in the feature change rate matrix, thus obtaining aging trajectory evolution data.

[0045] The electrical fault early warning module receives aging trajectory evolution data, compares it item by item with the failure judgment threshold, generates a potential fault point time series table, integrates all entries in the potential fault point time series table, and constructs an electrical fault predictive alarm.

[0046] The steps for obtaining nonlinear harmonic distortion fingerprints are as follows:

[0047] A single-frequency sinusoidal electrical signal is applied to the LED chip, and the response electrical signal generated by the LED chip under the action of the single-frequency sinusoidal electrical signal is acquired in real time. The instantaneous amplitude of the response electrical signal and the corresponding timestamp are recorded to generate the original response electrical signal data.

[0048] Based on the original response electrical signal data, the spectral distribution of the response electrical signal data in the frequency domain is calculated by Fourier transform, and the amplitude and phase values ​​corresponding to each harmonic in the spectrum are extracted to generate a set of harmonic amplitude values ​​and a set of harmonic phase values.

[0049] Based on the set of harmonic amplitude values ​​and the set of harmonic phase values, the amplitude and phase values ​​of each harmonic are combined one by one into corresponding amplitude-phase value pairs. Using the amplitude-phase value pairs as input parameters, a nonlinear harmonic distortion fingerprint is constructed.

[0050] Specifically, a single-frequency sinusoidal electrical signal with a frequency of 1kHz and a peak voltage of 1V is applied to the LED chip. The response electrical signals at both ends of the LED chip are acquired in real time, and the acquisition is carried out for 5 signal cycles to ensure data stability. During the acquisition process, the instantaneous voltage amplitude of each sampling point is associated with a timestamp accurate to the microsecond level to form an initial time series data pair. To ensure the validity of the data, a dynamic effective voltage verification range is set. The upper limit of this range is 1.5 times the peak voltage of the input signal, and the lower limit is -1.5 times the peak voltage of the input signal, i.e., the range of 1.5V to -1.5V. Sampling data points outside this range are marked. The three-point moving average method is used to smooth the marked data points and their adjacent points to filter out sudden electrical noise interference. Finally, all the processed time series data pairs are arranged in the order of timestamps to generate a raw response electrical signal data containing accurate time and corresponding instantaneous amplitude.

[0051] Based on the original response electrical signal data, the instantaneous amplitude sequence is retrieved, and a Fast Fourier Transform (FFT) algorithm is applied to transform it from the time domain to the frequency domain, thereby calculating the spectral distribution of the response electrical signal. In the spectrum, the fundamental frequency (1 kHz) is first located, and then the exact frequency points of each harmonic component from the second harmonic (2 kHz) to the fifteenth harmonic (15 kHz) are sequentially identified. To distinguish the effective harmonic signal from background noise, a noise threshold needs to be set. This threshold is determined by calculating the average value and standard deviation of the spectral amplitude in a frequency band without harmonic signal distribution (e.g., between 1.1 kHz and 1.9 kHz). The specific threshold... The threshold is set to 1.5 times the average amplitude of the frequency band plus one standard deviation. In the spectrum, only frequency peaks with amplitudes exceeding this threshold are identified as valid harmonic components. For each valid harmonic component, its real and imaginary parts are extracted from its corresponding complex Fourier transform result. Then, its amplitude value is obtained by calculating the square root of the sum of the squares of the real and imaginary parts. Its phase value is obtained by calculating the arctangent of the imaginary and real parts. Finally, the amplitude values ​​of all valid harmonics are stored in order of harmonic order to generate a set of harmonic amplitude values. At the same time, the corresponding phase values ​​are also stored in order of harmonic order to generate a set of harmonic phase values.

[0052] Based on the harmonic amplitude and phase value sets, a successive pairing and combination process is performed. Specifically, the amplitude value of each harmonic is extracted sequentially from the harmonic amplitude value set according to its harmonic order (starting from the fundamental wave, i.e., the 1st harmonic, up to the 15th harmonic). Simultaneously, the corresponding phase value is extracted from the harmonic phase value set according to the exact same harmonic order. For example, the amplitude value and phase value of the 2nd harmonic are extracted and combined into a data pair, which represents the complete amplitude and phase information of the 2nd harmonic. This process is repeated for all extracted valid harmonic components until the highest order harmonic (the 15th harmonic) is also paired, thus forming an ordered list containing multiple amplitude and phase value pairs. The list is sorted according to the harmonic order, arranged from low to high. Finally, this ordered list containing all amplitude and phase value pairs from the fundamental wave to the highest order harmonic is structurally encapsulated to construct a multi-dimensional nonlinear harmonic distortion fingerprint that can uniquely characterize the current device state.

[0053] The steps to obtain the local slope set are as follows:

[0054] The amplitude and phase values ​​of each harmonic in the nonlinear harmonic distortion fingerprint are called. Under stable bias conditions, different bias voltages are applied one by one. The capacitance value and bias voltage value at each bias voltage point are collected, and the fundamental amplitude and third harmonic amplitude corresponding to the current point are recorded to generate a joint data set of capacitance value, bias voltage value, fundamental amplitude and third harmonic amplitude.

[0055] Based on the combined data set of capacitance value, bias voltage value, fundamental amplitude, and third harmonic amplitude, the slope value of the harmonic-enhanced capacitor is calculated using the following formula: ;

[0056] in, For the first Group harmonic enhancement capacitor slope value, For the first The capacitance value corresponding to each bias voltage point. For the first The capacitance value corresponding to each bias voltage point. For the first One bias voltage value. For the first One bias voltage value. For the first The third harmonic amplitude corresponding to each bias voltage point. For the first The fundamental amplitude corresponding to each bias voltage point. This refers to the nonlinear harmonic influence factor.

[0057] Based on the harmonic-enhanced capacitor slope values ​​calculated from all bias voltage points, the values ​​are sorted one by one according to the voltage scan order, and the data point index numbers are marked to generate a local slope set.

[0058] Specifically, the nonlinear harmonic distortion fingerprinting method involves applying a DC bias voltage scan from -5V to +1V to the LED chip at a constant ambient temperature of 25°C, with a scan step size of 0.05V. At each independent DC bias voltage point, a 50ms delay is first allowed to ensure electrical stability. Then, a small AC signal with a frequency of 1MHz and an amplitude of 30mV is applied using an LCR meter to measure and record the capacitance value at the current bias voltage. Simultaneously, while keeping the DC bias voltage constant, a single signal with a frequency of 1kHz and a peak voltage of 1V is superimposed. A sinusoidal electrical signal of a certain frequency is acquired using the previous harmonic characteristic acquisition method. The response electrical signal is then acquired and Fourier transformed. The amplitude values ​​of the fundamental wave (1kHz) and the third harmonic wave (3kHz) are extracted from the spectrum. The DC bias voltage value, the measured capacitance value, the fundamental wave amplitude value, and the third harmonic wave amplitude value at the current point are stored as a data unit. This process is repeated as the bias voltage is scanned point by point until the scan is completed. Finally, the data units of all scan points are integrated to form a joint data group containing multiple data entries of capacitance value, bias voltage value, fundamental wave amplitude, and third harmonic wave amplitude.

[0059] formula: The advantage of this formula lies in that it couples the traditional analysis method based on capacitance-voltage (CV) characteristics (the left side of the formula reflects the spatial rate of change of charge concentration in the semiconductor depletion region) with nonlinear harmonic distortion analysis (the right side of the formula reflects the nonlinear dynamic characteristics in the carrier transport process). By introducing the harmonic amplitude ratio as an enhancement factor, the calculated slope value is not only sensitive to static charge distribution, but also has higher sensitivity to changes in carrier dynamic behavior caused by defects, interface states, etc., thus enabling earlier detection of the degradation of microstructure and electrical properties of LED chips due to aging.

[0060] and For the first The and the first The capacitance values ​​corresponding to each bias voltage point are obtained by applying a 1MHz AC small signal using an LCR meter at each stable DC bias voltage point, and the units are picofarads (pF). This measurement reflects the PN junction capacitance characteristics of the LED chip under a specific bias. For example, at the first bias voltage point... The capacitance value was measured at a bias point (-2.00V). It is 25.5pF, at the... The capacitance value was measured at a bias point (-2.05V). It is 26.0 pF;

[0061] and For the first The and the first The bias voltage value, precisely set by a high-precision programmable DC power supply and monitored in real time by a voltmeter, is the independent variable for CV scanning, measured in volts (V). The range and step size of the voltage scan are preset according to the characteristics of the device under test. For example, the first bias voltage value is... bias voltage If set to -2.00V, then based on a step size of 0.05V, the previous bias voltage... It is -2.05V;

[0062] For the first The third harmonic amplitude corresponding to each bias voltage point, this value is based on the applied DC bias voltage. Simultaneously, after superimposing a 1kHz sinusoidal excitation signal, the amplitude of the 3kHz component extracted from the Fourier transform spectrum of the response electrical signal, measured in volts (V), characterizes the strength of the device's nonlinear response at that operating point. For example, in When the voltage is -2.00V, the measured value is... It is 0.0015V;

[0063] For the first The fundamental amplitude corresponding to each bias voltage point, obtained synchronously with the third harmonic amplitude, is the amplitude of the 1kHz fundamental component extracted from the response signal spectrum, measured in volts (V). It serves as a reference for the harmonic distortion ratio, reflecting the linear response strength of the device under that bias. For example, in... When the voltage is -2.00V, the measured value is... It is 0.98V;

[0064] The nonlinear harmonic influence factor is a dimensionless coefficient used to adjust the contribution weight of the harmonic distortion term to the final slope value. Its value is determined through calibration experiments on a group (e.g., 30) of brand-new, unaged LED chips of the same model and a group of chips that have undergone 500 hours of accelerated aging testing. The goal is to make the calculated... The highest degree of differentiation is achieved between the old and new chip sets. The specific setup process involves iterating through... For values ​​between 1 and 20, calculate each... The two sets of chips are below Choose the distribution whose statistical distance (such as KL divergence) maximizes that distance. Values, for example, determined through calibration experiments, when When the value is 12.5, the old and new chips... The data distribution differences are most significant, therefore we set... ;

[0065] Calculation process:

[0066] Based on the combined data set of capacitance value, bias voltage value, fundamental amplitude, and third harmonic amplitude, for the... Calculate using each data point, and substitute the values: ; ; ; ; ; ; ;

[0067] First, calculate the reciprocal of the square of the capacitance: ; ;

[0068] Next, the basic part of calculating the CV slope: ;

[0069] Then, the harmonic enhancement factor is calculated: ;

[0070] Finally, multiplying the two parts yields the slope value of the harmonic enhancement capacitor: ;

[0071] The results indicate that, near a bias voltage of -2.00V, the harmonic enhancement capacitance slope of this LED chip is [value missing]. This value quantifies the comprehensive physical characteristics related to charge distribution and nonlinear behavior of charge carriers in the local region. The magnitude of its absolute value and its trend with the bias voltage together constitute the characteristic fingerprint of the device. A higher value may indicate a steep doping interface or a high density of specific defects. In aging prediction, this value changes over time, especially with continuous growth or decrease.

[0072] Based on the harmonic enhancement capacitor slope values ​​calculated from all bias voltage points, these values ​​are associated with their corresponding bias voltage values ​​and strictly sorted according to the original voltage scan order, starting from the slope value corresponding to -5V and proceeding sequentially to the slope value corresponding to +1V. To ensure the accuracy and traceability of data processing, each sorted harmonic enhancement capacitor slope value is assigned an integer starting from 1 as a data point index number. For example, the first slope value corresponding to the -5V bias has an index number of 1, the second slope value corresponding to the -4.95V bias has an index number of 2, and so on, until the last bias point. Finally, these ordered harmonic enhancement capacitor slope values ​​with index numbers are collected to form a structured two-dimensional data table. Each row of this table contains the data point index number and the corresponding harmonic enhancement capacitor slope value, thus generating a local slope set.

[0073] The steps for obtaining the device state feature vector are as follows:

[0074] The amplitude and phase values ​​of each bias voltage point in the nonlinear harmonic distortion fingerprint are called, and the corresponding harmonic enhancement capacitor slope value is matched according to the time series to generate a fused structural feature data set.

[0075] Based on the fused structural feature data set, a modulated complex response structure is constructed for each bias voltage point. The complex characteristic impedance is calculated by combining the slope value of the harmonic-enhanced capacitor with the harmonic phasor. The calculation formula is as follows: ;

[0076] in, For the first The complex characteristic impedance corresponding to each bias voltage point For the first The slope value of the harmonic enhancement capacitor at each bias point. For the first The harmonic amplitude values ​​at each bias point For the first Harmonic phase values ​​at each bias point This is the harmonic modulation sensitivity factor. Represents the complex phase rotation factor;

[0077] Based on the complex characteristic impedances at each bias voltage point, a sequence of complex vectors is constructed in the bias order to generate a device state characteristic vector that quantifies the charge distribution in the depletion region.

[0078] Specifically, the nonlinear harmonic distortion fingerprint is invoked, extracting the amplitude and phase values ​​of specific harmonics measured at each bias voltage scan point. Here, the third harmonic, which is highly sensitive to device aging, is selected as the representative. That is, the amplitude and phase of the third harmonic corresponding to each bias voltage point are extracted. Then, the local slope set generated in the previous step is invoked. This set contains the harmonic enhancement capacitor slope values ​​that correspond one-to-one with the bias voltage scan points. Using the bias voltage value or its corresponding data point index number as the unique matching key, the third harmonic amplitude and phase values ​​extracted from the nonlinear harmonic distortion fingerprint are precisely matched with the harmonic enhancement capacitor slope values ​​with the same matching key in the local slope set. For example, for the data point with index number k, its harmonic enhancement capacitor slope value, third harmonic amplitude, and third harmonic phase are combined into a data record. This matching operation is repeated for all bias voltage points. Finally, all the matched data records are collected to generate a multi-column data table, that is, the fused structural feature data set.

[0079] formula: The advantage of the formula is that it creates a characteristic impedance in complex form that reflects the slope of the harmonic-enhanced capacitance of the static charge distribution. ) and harmonic phasors characterizing the dynamic nonlinear behavior of charge carriers ( Instead of simple linear superposition, this multiplicative modulation makes static features sensitive to changes in dynamic features, amplifying or reducing them. This allows the capture of complex electrical behavior changes caused by variations in defect state density, type, or energy location. The resulting complex number provides two mutually orthogonal feature dimensions, with its real and imaginary parts, which contain richer device state information than a single scalar parameter, improving the accuracy and robustness of aging state identification.

[0080] For the first The slope value of the harmonic enhancement capacitor at the bias point is the result of the previous step. This parameter comprehensively reflects the CV characteristics and third-order harmonic distortion of the device under a specific bias voltage. Based on the example in the previous step, at the first bias point... One bias point (-2.00V), its value is ;

[0081] For the first The harmonic amplitude values ​​at each bias point are extracted from the nonlinear harmonic distortion fingerprint and used to quantify the strength of the device's nonlinear response at that bias point. In this embodiment, to ensure... The correlation is calculated by selecting the amplitude value of the third harmonic, i.e. This value is determined by the bias voltage. The signal is obtained by superimposing a 1kHz sinusoidal excitation signal and performing a Fourier transform on the response signal. Based on the data acquired in the previous steps, At that time, its value was 0.0015V;

[0082] For the first The harmonic phase values ​​at each bias point, obtained synchronously with the harmonic amplitude values, represent the phase delay of the harmonic response relative to the fundamental excitation. This reflects the time constant of dynamic processes such as carrier recombination, capture, and emission within the device. Here, the phase values ​​of the third harmonic are also chosen, obtained through Fourier transform, with units in radians (rad). For example, at... At that time, its value was measured to be 1.2 rad;

[0083] The harmonic modulation sensitivity factor is a dimensionless coefficient used to scale the influence of harmonic terms. Its value needs to be determined through calibration experiments, aiming to maximize the sensitivity of the feature to aging conditions. The specific method is as follows: Prepare 10 brand-new LED chips and 10 chips that have undergone 1000 hours of accelerated aging (85℃ / 85%RH). Measure and calculate the sensitivity of all chips. Vector, set an objective function, which calculates the two sets of chips Inter-class distance of vector clusters in the complex plane (e.g., the distance between all new and old chip pairs) The ratio of the average Euclidean distance of the vectors to the intra-cluster distance (the sum of the average intra-cluster distances of the two chip groups) is used to find the algorithm that maximizes this ratio using an optimization algorithm (such as gradient descent). If, for a third harmonic, the optimal value is calculated to be 50, then the value is set to... This unit ensured The term is dimensionless;

[0084] Calculation process:

[0085] Based on the fusion structure feature data set, for the first Calculate the complex characteristic impedance at a bias voltage point (-2.00V), and substitute the specific values: ; ; ; ;

[0086] First, calculate the harmonic phasor part. According to Euler's formula : ;

[0087] Next, calculate the modulation term within the parentheses: ; ; ; ;

[0088] Finally, multiply the harmonic enhancement capacitor slope value by the modulation term: ; ; ;

[0089] This result indicates that the first The complex characteristic impedance corresponding to each bias voltage point is: The real and imaginary parts of this complex value constitute a two-dimensional feature. The real part is mainly determined by the static CV slope but is finely adjusted by the in-phase harmonic components, while the imaginary part is generated entirely by the out-of-phase harmonic components, representing the dynamic process related to energy loss. This complex impedance will serve as the basic unit for constructing the device state feature vector. Compared to a single scalar, the changes in its amplitude and phase angle can more comprehensively reflect the complex physical process of device aging.

[0090] Based on the complex characteristic impedances calculated at each bias voltage point, this series of complex values ​​is strictly arranged according to the order of the bias voltage scan, starting from the complex characteristic impedance corresponding to the -5V bias voltage point. Starting from -4.95V Until the last complex characteristic impedance corresponding to +1V. Arrange them sequentially to form a one-dimensional array of complex numbers. Expand this sequence of complex vectors, specifically by converting each complex characteristic impedance... Split into its real part and the virtual part Two independent real values, and according to They are concatenated in sequence to construct a real vector sequence of length 2N. This sequence completely preserves the amplitude and phase modulation information at all bias points, and finally generates a device state feature vector that can fully quantify the charge distribution in the depletion region and its dynamic response characteristics.

[0091] The steps for obtaining the characteristic rate of change matrix are as follows:

[0092] Based on the device state feature vector, the position of the same component in each feature vector is located, the value of the component is extracted one by one at all time points, and the components are arranged and combined in chronological order to generate a time series set of device state feature components.

[0093] Based on the time series set of device state characteristic components, a sliding window parameter is set, and symmetrical data points are extracted within a window centered at any time. The least squares method is used to fit and estimate the rate of change at that time. The calculation formula is as follows: ;

[0094] in, Indicates at time Next The rate of change of the state characteristic components of each device Indicates the first The state characteristic components of each device in time offset The value of , This is the relative position index within the sliding window. The continuous sampling time interval Half the width of the sliding window;

[0095] Based on the rate of change of all feature components calculated at the center point of each time window, the two-dimensional structure is filled in sequentially in the order of feature components as columns and time center points as rows to generate a feature rate of change matrix.

[0096] Specifically, based on a series of device state feature vectors acquired at different time points (e.g., measurements taken every 100 hours), these vectors are analyzed longitudinally. The specific operation is as follows: First, the total dimension of the vectors is determined. For example, if there are 121 bias scan points, the dimension of the device state feature vectors is 242. Then, for the m-th component (where m ranges from 1 to 242), all recorded device state feature vectors are traversed, and the corresponding value is extracted from the m-th position of each vector. These values ​​are then arranged in chronological order of their measurement times to form a time series specific to the m-th feature component. For example, the sequence formed by the real part of the complex characteristic impedance corresponding to the -5V bias voltage is extracted at all measurement time points. This operation is performed on each component in the vector, ultimately generating a set containing 242 independent time series, i.e., the device state feature component time series set.

[0097] formula: The advantage of the formula is that it uses a sliding window-based center difference method to estimate the instantaneous rate of change of the time series. Essentially, it performs linear fitting on the data points within the window and takes the slope of the center point as the rate of change. Compared with the simple two-point difference, this method utilizes more data point information within the window. Through least squares optimization, it smooths the measurement noise of individual data points, making the calculated rate value more stable and reliable, and able to more accurately reflect the true trend of the evolution of feature components over time.

[0098] Indicates the first The state characteristic components of each device in time offset The value of is obtained directly from the time series set of device state feature components generated in the previous step, where The index identifies the feature components. It is the center moment of the current computing speed. It is the position index within the window. It is the measurement time interval, for example, to calculate the 5th characteristic component ( ) at the 500th hour ( The rate of change of ) if the window half width Time interval If it is an hour, then extraction is required. , , , and The specific values ​​for these five time points are as follows: , , , , ;

[0099] The continuous sampling time interval refers to the period during which the device state feature vector is measured. Setting this value requires a trade-off between real-time monitoring and testing costs. Since the aging process of LEDs is a slow process, a longer time interval can be set, for example, a complete measurement every 100 hours. Hour;

[0100] The width is half the width of the sliding window, a positive integer that determines the number of data points used to calculate the rate of change (total number is...). ), The choice is a trade-off between smoothness and response speed; a larger... It can better suppress noise, but it makes the calculated rate less sensitive to abrupt changes, and smaller. Conversely, analysis of historical aging data revealed that, under conditions of high signal-to-noise ratio, selecting a smaller window allows for faster capture of changes in the aging rate. Therefore, a smaller window is set... That is, using 5 consecutive data points to calculate the rate at the center point;

[0101] The relative position index within the sliding window; it is an integer, from... Change to Used to iterate through all data points within the window, when hour, The value range is -2, -1, 0, 1, 2, which correspond to the two data points before the center point, the previous data point, the center point, the next data point, and the next two data points, respectively.

[0102] Calculation process:

[0103] Based on the time series set of device state characteristic components, the fifth characteristic component is calculated in... rate of change per hour Substitute the values ​​from the example:

[0104] Hour;

[0105] ; ; ; ; ; ; ;

[0106] First, calculate the denominator: ;

[0107] Next, calculate the molecule: ; ; ; ; ;

[0108] Finally, calculate the rate of change: ;

[0109] This result indicates that at the 500th hour, the fifth device state characteristic component is increasing at a rate per hour. The rate of increase is a quantitative representation of the aging trend of the feature component at the current moment. A positive value indicates that the component is increasing (which may correspond to the growth of a certain defect), and a negative value indicates that it is decreasing. The absolute value reflects the speed of aging.

[0110] Based on the rate of change of all feature components calculated at the center points of each time window, a two-dimensional matrix structure is constructed. Specifically, the 242 device state feature components are used as columns of the matrix, and the center points of each time window (e.g., 100h, 200h, 300h...) used for rate calculation are used as rows. Then, the rate of change of each feature component calculated at each specific time center point is sequentially filled into the corresponding cell of this two-dimensional matrix. For example, the rate of change of the m-th feature component at time t... Fill in the positions of the t-th row and m-th column of the matrix, and fill in all feature components and all time points in sequence, finally generating a feature change rate matrix that can comprehensively describe the rate and direction of change of all feature components of the device at different aging stages.

[0111] The steps for obtaining aging trajectory evolution data are as follows:

[0112] Based on the feature change rate matrix, the latest change rate and corresponding direction of each device state feature component are extracted one by one, and the change increment value of each feature component per unit time is calculated to form a set of device state feature component increment values.

[0113] Based on the set of incremental values ​​of device state feature components, the device state feature vector of the most recently measured time is called, and the incremental values ​​of each component are superimposed one by one to the values ​​of the corresponding components in the device state feature vector to generate the device state feature vector at the next prediction time.

[0114] Based on the device state feature vector at the next prediction time, the incremental calculation and vector update process is repeated cyclically until the target prediction cycle ends. The device state feature vector sequence is recorded sequentially to form a continuous prediction sequence, generating aging trajectory evolution data.

[0115] Specifically, based on the feature change rate matrix, the last row of the matrix is ​​located. This row represents the change rate of all feature components at the latest measurement time. The latest change rate of each element in this row, i.e., each device state feature component, is extracted. This rate value itself contains the magnitude and direction of the change (positive values ​​represent growth, negative values ​​represent decrease). Next, a unit prediction time step is set, for example, 10 hours. The extracted change rate of each component (in feature units / hour) is multiplied by this unit prediction time step (10 hours) to calculate the expected change of each feature component within that unit time, i.e., the increment value. For example, if the latest change rate of the 5th feature component is per hour... Then its change increment over 10 hours is The calculated increment values ​​of all 242 feature components are arranged in the order of their original components to form an increment vector with the same dimension as the device state feature vector. This set of increment vectors is the set of device state feature component increment values.

[0116] Based on the set of incremental values ​​of device state feature components, the device state feature vector obtained from the most recent measurement is first retrieved from historical measurement records as the starting point for prediction. Then, each incremental value in the set of incremental values ​​of device state feature components is arithmetically added to its corresponding component in the device state feature vector. For example, the first incremental value is added to the first component of the device state feature vector, the second incremental value is added to the second component, and so on, until all components have been superimposed. The mathematical expression for this operation is: ,in It is the predicted feature component value for the next time step. This is the latest measured value. That is the corresponding incremental value. It is the unit prediction time step. After this round of complete superposition calculation, the new vector obtained is the device state feature vector at the next prediction time (e.g., 10 hours after the current time point).

[0117] Based on the device state feature vector at the next prediction time, this is used as the new "current" state to start a new prediction cycle. In this cycle, it is assumed that the feature change rate remains constant in the short term (e.g., the next few hundred hours). Therefore, the latest change rate extracted from the feature change rate matrix in the first step is directly reused to calculate the increment value of the next time step. That is, the change rate of each component is multiplied by the unit prediction time step (10 hours) again to obtain a new set of device state feature component increment values. Subsequently, this new set of increment values ​​is superimposed on the "device state feature vector at the next prediction time" generated in the previous prediction to obtain the next prediction time. The device state feature vector (e.g., 20 hours after the current time point) is used to perform an incremental calculation and vector update process. Each time it is performed, the prediction time is advanced by one step, and the newly generated prediction vector and its corresponding time point (10 hours later, 20 hours later, 30 hours later, etc.) are recorded in sequence. The termination condition of this loop is that the total prediction time reaches the preset target prediction cycle. For example, if the target is to predict the aging situation in the next 1000 hours, the loop will be executed 100 times. Finally, all the recorded prediction device state feature vector sequences arranged in chronological order are integrated to generate a complete aging trajectory evolution data.

[0118] The steps for obtaining the sequence list at potential failure points are as follows:

[0119] Receive aging trajectory evolution data, extract the value of each feature item in the device state feature vector corresponding to each prediction time point, match and align the feature item value with the corresponding failure judgment threshold value, and generate a control group of feature item value and failure judgment threshold value.

[0120] Based on the control group of feature item values ​​and failure judgment threshold values, the values ​​of each feature item are compared one by one to determine whether the feature item value exceeds the failure judgment threshold value. If the feature item value exceeds the failure judgment threshold value, the feature item is marked as a potential fault feature item, and the corresponding prediction time point is recorded at the same time to generate a potential fault point time series table.

[0121] Specifically, the system receives aging trajectory evolution data and calls a pre-built failure judgment threshold vector. The construction process of this vector is as follows: A sample batch containing 100 brand-new LED chips of the same model is selected. Accelerated aging conditions of 85°C and 85% humidity are applied to this batch of chips until the luminous flux of each chip decays to 70% of its initial value (i.e., reaching the L70 lifespan end). In the last measurement cycle before each chip reaches the L70 lifespan end, its complete device state feature vector is collected, thereby obtaining 100 sets of feature vector data under the "critical failure" state. For each feature vector... The distribution of the feature components in these 100 sets of data is statistically analyzed. For feature components that increase with aging, the failure judgment threshold is set to the average of these 100 critical failure values ​​minus one standard deviation. For feature components that decrease with aging, the threshold is set to the average plus one standard deviation. This generates a failure judgment threshold vector with the same dimension as the device state feature vector. Then, each predicted time point in the aging trajectory evolution data is traversed, and the predicted device state feature vector corresponding to that time point is extracted. This predicted vector is then paired with the aforementioned failure judgment threshold vector component by component to generate a control group of feature item values ​​and failure judgment threshold values.

[0122] Based on the control group of feature item values ​​and failure judgment threshold values, the data at each prediction time point is reviewed item by item. Specifically, it iterates through each pair of matched feature item predicted values ​​and failure judgment threshold values ​​in the control group, and performs the corresponding comparison logic according to the aging trend (increase or decrease) of the feature item determined when constructing the threshold. For example, if the 5th feature component (corresponding to the real part of the complex feature impedance under a -4.95V bias) increases with aging, its failure judgment threshold is... When the predicted value reaches the 2500th hour of the forecast, When this value exceeds its upper limit threshold, conversely, if the 18th characteristic component (corresponding to the imaginary part of the complex characteristic impedance under a -4.25V bias) decreases with aging, its failure threshold is... When the predicted value is in the 3100th hour, it is... When the value is below its lower threshold, if any predicted value of a feature item is found to exceed the threshold, the feature item's identifier (such as its index number "5" or "18" in the vector) is immediately marked as a potential fault feature item, and the current prediction time point for comparison ("2500 hours" or "3100 hours") is recorded. All entries marked throughout the entire prediction period are collected to generate a potential fault point time series table.

[0123] The steps for obtaining predictive alarms for electrical faults are as follows:

[0124] Receive the potential fault point time sequence list, extract the predicted occurrence timestamp and corresponding feature value of each potential fault feature item in the potential fault point time sequence list, sort all potential fault feature items one by one according to the predicted occurrence timestamp and mark the sequence number, and generate the sorted potential fault feature item time series.

[0125] Based on the sorted time series of potential fault features, the number of all potential fault features under each predicted occurrence time stamp is counted, and the values ​​of all potential fault features under each predicted occurrence time stamp and the corresponding type information are summarized one by one to form a time series distribution set of the number of fault features and feature details.

[0126] Based on the time-series distribution set of the number and details of fault features, the number and features of each predicted occurrence timestamp are mapped to the alarm message template one by one, generating alarm information with the predicted time point, features, and feature values, thus obtaining a predictive alarm for electrical faults.

[0127] Specifically, the system receives a time series list of potential fault points and processes each record in the list. This involves reading the index number of the potential fault feature item, its predicted occurrence time stamp, and the predicted value at that time stamp. After extracting information from all entries, the system uses the predicted occurrence time stamp as the primary sorting key and the index number of the potential fault feature item as the secondary sorting key to sort all extracted potential fault feature items in ascending order. This dual sorting ensures that even if multiple feature items reach the threshold simultaneously, the output order is deterministic and reproducible. After sorting, starting from the first entry in the list, it is assigned a sequence number 1, the second entry is assigned a sequence number 2, and so on, until all entries are marked with a unique incrementing sequence number. Finally, this ordered list containing sequence numbers, predicted occurrence timestamps, feature item index numbers, and predicted values ​​is generated as a sorted time series of potential fault feature items.

[0128] Based on the sorted time series of potential fault feature items, data aggregation and information enrichment are performed. First, the entire sequence is traversed, and items with the same predicted occurrence time stamp are grouped together. For each time stamp group, statistical and summarization operations are performed. The statistical operation calculates the total number of items in the group, thus obtaining the number of potential fault feature items under the predicted occurrence time stamp. The summarization operation extracts the feature item index number and predicted value of each item in the group one by one, and converts each index number into its corresponding physical meaning description according to a pre-established feature item type information mapping table. This mapping table is generated during system initialization according to the construction rules of device state feature vectors. For example, index number 5 is mapped to "the real part of the complex characteristic impedance corresponding to a -4.95V bias". Through this mapping, the original numerical information is associated with the specific physical degradation mechanism. Finally, each predicted occurrence time stamp and its corresponding number of potential fault feature items, as well as a list containing detailed descriptions of all fault items (type information and predicted values), are combined into a data unit. The collection of all these data units forms the time-series distribution set of the number of fault feature items and feature details.

[0129] Based on the time-series distribution set of the number and details of fault features, each timestamp data unit in the set is traversed, and alarm information is generated according to preset alarm level rules and message templates. The alarm level rules are based on the number of all potential fault features at each predicted occurrence timestamp. These rules are established by analyzing historical accelerated aging data. For example, when the number of potential fault features is between 1 and 3, it is defined as a "Level 1 (Attention)" alarm, indicating the appearance of initial aging signs; when the number is between 4 and 10, it is defined as a "Level 2 (Warning)" alarm, indicating that the aging process is significant; when the number is between 4 and 10, it is defined as a "Level 2 (Warning)" alarm. When there are more than 10, it is defined as a "Level 3 (Critical)" alarm, indicating that the device is close to the failure threshold. The alarm message template is a standardized text structure containing placeholders, such as: "[{Alarm Level}] Predicted Time: {Predicted Time Point}, {Number of Faults} Potential Fault Points Found, Details are as follows: {Feature Details List}". During generation, the alarm level, predicted time point and number of faults extracted from the data unit are filled into the corresponding placeholders, and the feature details list is formatted and filled in. Finally, all the generated formatted alarm information is organized in chronological order to obtain a complete predictive alarm for electrical faults.

Claims

1. An LED chip aging prediction system based on dynamic modeling, characterized in that, The system includes: The harmonic feature acquisition module applies a single-frequency sinusoidal electrical signal to the LED chip, acquires the response electrical signal, performs a Fourier transform on the response electrical signal, extracts the amplitude and phase information of each harmonic, and constructs a nonlinear harmonic distortion fingerprint characterizing the carrier transport properties. The state vector construction module calls the nonlinear harmonic distortion fingerprint, calculates and obtains the local slope set, integrates the amplitude and phase data in the nonlinear harmonic distortion fingerprint with the local slope set, and generates a device state feature vector. The aging trend prediction module calculates the rate of change of each component in the device state feature vector over time based on the device state feature vector, establishes a feature change rate matrix, and predicts the evolution path of the device state feature vector within the target time period based on the rate and direction of change of each component in the feature change rate matrix, thereby obtaining aging trajectory evolution data. The electrical fault early warning module receives the aging trajectory evolution data, compares it item by item with the failure judgment threshold, generates a potential fault point time series table, integrates all entries in the potential fault point time series table, and constructs an electrical fault predictive alarm.

2. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the nonlinear harmonic distortion fingerprint are as follows: A single-frequency sinusoidal electrical signal is applied to the LED chip, and the response electrical signal generated by the LED chip under the action of the single-frequency sinusoidal electrical signal is acquired in real time. The instantaneous amplitude of the response electrical signal and the corresponding timestamp are recorded to generate the original response electrical signal data. Based on the original response electrical signal data, the spectral distribution of the response electrical signal data in the frequency domain is calculated by Fourier transform, and the amplitude and phase values ​​corresponding to each harmonic in the spectrum are extracted to generate a set of harmonic amplitude values ​​and a set of harmonic phase values. Based on the set of harmonic amplitude values ​​and the set of harmonic phase values, the amplitude and phase values ​​of each harmonic are combined one by one into corresponding amplitude-phase value pairs. Using the amplitude-phase value pairs as input parameters, a nonlinear harmonic distortion fingerprint is constructed.

3. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the local slope set are as follows: The amplitude and phase values ​​of each harmonic in the nonlinear harmonic distortion fingerprint are called up, and different bias voltages are applied one by one under stable bias conditions. The capacitance value and bias voltage value at each bias voltage point are collected, and the fundamental amplitude and third harmonic amplitude corresponding to the current point are recorded to generate a joint data set of capacitance value, bias voltage value, fundamental amplitude and third harmonic amplitude. The slope value of the harmonic-enhanced capacitor is calculated based on the combined data set of capacitance value, bias voltage value, fundamental amplitude and third harmonic amplitude. Based on the harmonic-enhanced capacitor slope values ​​calculated from all bias voltage points, the values ​​are sorted one by one according to the voltage scan order, and the data point index numbers are marked to generate a local slope set.

4. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the device state feature vector are as follows: The amplitude and phase values ​​of each bias voltage point in the nonlinear harmonic distortion fingerprint are called, and the corresponding harmonic enhancement capacitor slope values ​​are matched according to the time sequence to generate a fused structural feature data set. Based on the fusion structural feature data set, a modulated complex response structure is constructed for each bias voltage point, and the complex characteristic impedance is calculated by combining the slope value of the harmonic enhancement capacitor with the harmonic phasor. Based on the complex characteristic impedances at each bias voltage point, a sequence of complex vectors is constructed in the bias order to generate a device state characteristic vector that quantifies the charge distribution in the depletion region.

5. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the characteristic rate of change matrix are as follows: Based on the device state feature vector, the position of the same component in each feature vector is located, the value of the component is extracted one by one at all time points, and the components are arranged and combined in chronological order to generate a time series set of device state feature components. Based on the time series set of device state feature components, a sliding window parameter is set, symmetrical data points are extracted within a window range centered at any time, and the rate of change at that time is estimated by fitting the least squares method. Based on the rate of change of all feature components calculated at the center point of each time window, the two-dimensional structure is filled in sequentially in the order of feature components as columns and time center points as rows to generate a feature rate of change matrix.

6. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the aging trajectory evolution data are as follows: Based on the feature change rate matrix, the latest change rate and corresponding direction of each device state feature component are extracted one by one, and the change increment value of each feature component per unit time is calculated to form a set of device state feature component increment values. Based on the set of incremental values ​​of the device state feature components, the device state feature vector of the most recently measured time is called, and the incremental values ​​of each component are superimposed one by one to the values ​​of the corresponding components in the device state feature vector to generate the device state feature vector at the next prediction time. Based on the device state feature vector at the next prediction time, the incremental calculation and vector update process is repeated cyclically until the target prediction cycle ends. The device state feature vector sequence is recorded sequentially to form a continuous prediction sequence, generating aging trajectory evolution data.

7. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the sequence list of potential fault points are as follows: Receive the aging trajectory evolution data, extract the value of each feature item in the device state feature vector corresponding to each predicted time point, match and align the feature item value with the corresponding failure judgment threshold value, and generate a control group of feature item value and failure judgment threshold value. Based on the comparison between the value of the feature item and the value of the failure judgment threshold, the values ​​of each feature item are compared one by one to determine whether the value of the feature item exceeds the value of the failure judgment threshold. If the value of the feature item exceeds the value of the failure judgment threshold, the feature item is marked as a potential fault feature item, and the corresponding prediction time point is recorded at the same time to generate a potential fault point time series table.

8. The LED chip aging prediction system based on dynamic modeling according to claim 1, characterized in that, The steps for obtaining the predictive alarm for electrical faults are as follows: Receive the potential fault point time series list, extract the predicted occurrence timestamp and corresponding feature value of each potential fault feature item in the potential fault point time series list, sort all potential fault feature items one by one according to the predicted occurrence timestamp and mark the sequence number, and generate the sorted potential fault feature item time series. Based on the sorted time series of potential fault features, the number of all potential fault features under each predicted occurrence time stamp is counted, and the values ​​of all potential fault features under each predicted occurrence time stamp and the type information of the corresponding items are summarized one by one to form a time series distribution set of the number of fault features and feature details. Based on the time-series distribution set of the number and details of the fault features, the number and features of each predicted occurrence timestamp are mapped to the alarm message template one by one, generating alarm information with the predicted time point, features, and feature values, thus obtaining a predictive alarm for electrical faults.

Images