A Multi-Channel Fast Cooperative Control Method and System Based on Programmable Event Triggering Mechanism

By employing a programmable event triggering mechanism and a hardware synchronization signal line array in chip testing, nanosecond-level timing synchronization between digital and analog boards was achieved, solving the problem of low efficiency in existing technologies and improving the real-time response capability and flexibility of the testing system.

CN122307313APending Publication Date: 2026-06-30HANGZHOU CORE MOMENT TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HANGZHOU CORE MOMENT TECH CO LTD
Filing Date
2026-05-29
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

In existing chip testing technologies, the collaborative control of digital and analog functions suffers from frequent interactions, leading to low efficiency. The pseudo-synchronization mechanism of analog functions cannot guarantee strict timing alignment, and user customization capabilities are insufficient, making it difficult to support cross-board triggering and multi-station parallel testing.

Method used

By adopting a programmable event triggering mechanism, a full hardware event triggering message mechanism and a multi-level line and logic synchronization signal array are constructed to achieve nanosecond-level closed-loop handshake and timing synchronization of digital and analog operations across boards. The hardware synchronization signal array and event processing message packets are used for coordinated control.

Benefits of technology

It significantly improves the execution efficiency of multi-channel digital-analog collaborative testing, realizes strict timing closed-loop control of digital vectors and analog events, optimizes test scheduling efficiency in multi-workstation change scenarios, and expands complex collaborative application scenarios across functions and boards.

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Abstract

This invention relates to a multi-channel fast collaborative control method and system based on a programmable event triggering mechanism, belonging to the field of chip testing. The method aims to solve the problems of low efficiency in analog-digital collaborative testing, difficulty in achieving precise timing synchronization, and long channel switching operation time in multi-station changing scenarios. The invention mainly involves pre-storing events containing enable information for all channels at each station during the configuration phase; during the operation phase, the digital board identifies the event micro-instructions, and the main control board schedules the hardware synchronization signal line array to achieve analog-digital closed-loop handshake; the analog board performs a logical AND operation between the pre-stored information and the real-time multi-station enable information to automatically determine the target physical channel. This invention eliminates computer interaction during execution, achieving nanosecond-level synchronization, and is mainly used to improve the efficiency and real-time response capability of multi-station chip testing.
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Description

Technical Field

[0001] This invention relates to the field of chip testing technology, and more specifically, to a multi-channel fast collaborative control method and system based on a programmable event triggering mechanism. Background Technology

[0002] In the field of chip testing, to improve test coverage and efficiency, automated test equipment typically needs to comprehensively utilize digital and analog functions for collaborative testing, such as performing dynamic power consumption testing, voltage and current calibration testing, and mixed-signal loop testing. Digital functions mainly refer to the ability of digital boards to execute digital vectors, while analog functions mainly refer to the analog signal measurement and output capabilities of various boards.

[0003] In existing test architectures, the execution control of digital functions is handled by the hardware system (such as digital boards) within the test equipment, while the execution control of analog functions is handled by the host computer system; these two belong to different control domains. To achieve coordination between the two, a common approach is for the computer system to preset a loop-waiting microinstruction in the digital vector. When the hardware system executes this instruction, it enters a loop-waiting state and notifies the host computer. Subsequently, the computer system controls the analog board to perform the corresponding analog operation, and after completion, notifies the hardware system to continue executing subsequent digital vectors. Another approach is for the computer system to preset analog microinstructions and delay times in the digital vector. When the hardware system executes this instruction, it initiates a simulation operation and starts a delay wait; after the delay, it continues executing subsequent digital vectors.

[0004] The above-mentioned solutions have several problems in practical applications. First, the switching process between digital vector and analog functions requires multiple interactions between the computer system and the hardware system. Especially in test scenarios requiring frequent switching, the involvement of the computer system results in control cycles on the order of milliseconds, severely restricting test efficiency. Second, the delay waiting mechanism is essentially an asynchronous operation, which can only achieve approximate timing coordination between digital vector and analog functions, and cannot guarantee precise synchronization under strict timing relationships. This poses challenges to the stability and debugging complexity of timing-sensitive mixed-signal testing. In addition, analog micro-instructions are usually only recognized by specific boards supported by digital boards, making it difficult to support cross-board triggering or to achieve synchronous execution of differentiated operations of the same instruction on different types of boards, limiting the application scenarios of collaborative testing. At the same time, analog micro-instructions are mostly preset by the system, and users cannot define them according to test requirements, reducing the system's flexibility. In multi-station testing scenarios, due to changes in test requirements, frequent enabling and disabling of workstations is required. Existing technologies rely on the computer system to switch hardware channels on and off one by one, further increasing the interaction overhead between the host computer and the hardware, and reducing the overall efficiency of multi-station parallel testing.

[0005] Therefore, there is an urgent need for a multi-channel fast collaborative control method and system based on a programmable event triggering mechanism to solve the problems existing in the current technology. Summary of the Invention

[0006] This invention provides a multi-channel fast collaborative control method and system based on a programmable event triggering mechanism. It addresses the problems in existing technologies, such as the extremely low test execution efficiency caused by frequent interaction between the host computer and the hardware system, and the inability of pseudo-synchronization mechanisms to guarantee strict timing alignment between digital vectors and analog operations.

[0007] The core technology of this invention is to construct a hardware-independent event-triggered message mechanism and a multi-level line-and-line logic synchronization signal array, and to perform hardware-level logic operations on the lower-level machine using the pre-stored full-station channel enable mask and real-time station status, thereby realizing nanosecond-level closed-loop handshake and timing synchronization of cross-board digital and analog operations.

[0008] In a first aspect, the present invention provides a multi-channel fast collaborative control method based on a programmable event triggering mechanism, the method comprising the following steps:

[0009] Event configuration phase: Acquire user-defined event information and pre-store it to the target simulation board; the event information includes the event index and the corresponding event operation, and during the configuration process, enable the simulation board to acquire and store the channel enable information corresponding to the event operation in the full-station state; Event triggering phase: The digital board runs digital vectors. When it recognizes an event micro-instruction containing the target event index, it sends an event trigger message packet carrying the target event index to the main control board and enters a waiting state. Collaborative control phase: The main control board responds to the event trigger message packet and sends an event processing message packet to the simulation board; the simulation board calls the pre-stored event operation according to the received event processing message packet, and determines the final target physical channel to execute the simulation operation based on the corresponding channel enable information in the full workstation state and the current actual multi-workstation enable information. During the collaborative control phase, the main control board monitors the status of the hardware synchronization signal line array to coordinate the timing between the waiting state of the digital board and the analog operation execution of the analog board, thereby achieving synchronization alignment.

[0010] Furthermore, the simulation board determines the final target physical channel based on the channel enable information corresponding to the full-station state and the current actual multi-station enable information, specifically: The simulation board performs a logical AND operation on the channel enable information corresponding to the pre-stored full-station status and the current multi-station enable information carried in the event processing message packet, which reflects the current test station switch status, to obtain the final effective target physical channel.

[0011] Furthermore, the event configuration phase further includes: The host computer notifies the simulation board to enter event download mode; Before the host computer sends out event information, it broadcasts a command to enable all valid workstations to the simulation board so that the simulation board can calculate and cache the channel enable information corresponding to the event operation in the full workstation state. After the download is complete, the host computer will be restored to the current test station configuration.

[0012] Furthermore, the hardware synchronization signal line array includes multiple hardware signal lines with wired logic functions and one hardware trigger line; each hardware signal line adopts a design with pull-up resistors connected to the power supply voltage Vcc, so that when any board pulls it low, the entire signal line will present a low level.

[0013] Furthermore, the hardware signal lines include at least a first signal line S1, a second signal line S2, and a fourth signal line S4; wherein, the second signal line S2 is used to characterize the overall operating state of the digital vector, the first signal line S1 is used to characterize the board configuration ready state, and the fourth signal line S4 is used to characterize the analog operation execution state of the analog board.

[0014] Furthermore, the timing synchronization steps in the coordinated control phase include: After receiving the event processing message packet, the simulation board pulls the first signal line S1 and the fourth signal line S4 low to start the simulation operation configuration. After configuration, the analog board pulls up the first signal line S1; After the main control board detects that the first signal line S1 has become high, it sends a trigger pulse through the hardware trigger line to drive all associated analog boards to perform analog operations synchronously.

[0015] Furthermore, the timing synchronization steps also include: The digital board in standby mode is monitoring the fourth signal line S4 in real time. When the fourth signal line S4 is detected to be low, the trigger pulse on the hardware trigger line is not responded to. After the analog board finishes its analog operation and pulls the fourth signal line S4 high, the main control board sends a trigger pulse again through the hardware trigger line. The digital board responds to the trigger pulse, exits the waiting state, and continues to execute subsequent digital vectors.

[0016] Furthermore, the event microinstruction includes the event microinstruction identifier TRIG and the target event index ID; after the digital board recognizes the event microinstruction, it enters the waiting state by repeatedly running the current line of event microinstructions.

[0017] Furthermore, event operations include channel parameters, action types, and electrical parameters; a single event index can associate multiple event operations, and multiple event operations can be configured to be executed synchronously on different channels of the same analog board or on different analog boards.

[0018] Secondly, the present invention provides a multi-channel fast collaborative control system, including a main control board, a digital board and at least one analog board, wherein the boards are physically connected to each other through a hardware synchronization signal line array as described above. The digital board is used to report the event trigger index to the main control board and enter a waiting state when it recognizes the event micro-instruction in the digital vector; The main control board is used to send event processing message packets to the analog board according to the event trigger index, and to send hardware trigger signals by monitoring the level status of the hardware synchronization signal line array. The simulation board is used to call pre-stored event operations according to the event processing message packet, and perform logical operations on the pre-stored full-station channel enable information and the current multi-station enable information to determine the target physical channel, and execute the corresponding simulation operation according to the timing of the hardware trigger signal.

[0019] The main contributions and innovations of this invention are as follows: 1. Significantly improves the execution efficiency of multi-channel digital-analog collaborative testing: When the digital vector triggers the simulation function, this invention relies entirely on the underlying event trigger message packet and the hardware synchronization signal line array for interaction, eliminating the time overhead of the host computer system, reducing the collaborative control delay from the millisecond level to the nanosecond level, and enhancing the real-time response capability of the test system.

[0020] 2. A strict timing closed-loop control of digital vectors and analog events is achieved: A rigorous handshake mechanism is constructed by the level state transition of different hardware synchronization signal lines (such as S1, S2, S4, Trigger), which replaces the unreliable delay waiting method in the traditional solution, effectively avoiding timing disorder caused by software delay error and improving the running stability of chip test program.

[0021] 3. Significantly optimizes test scheduling efficiency in multi-station change scenarios: This invention uses event processing message packets to send multi-station channel enable information. The pre-stored full-station channel information and real-time station information are logically ANDed on the local simulation board to directly obtain the target physical channel, eliminating the cumbersome operation of the host computer frequently issuing channel switching commands when multi-station enable or shielding changes.

[0022] 4. Expanded complex collaborative application scenarios across functions and boards: Based on the programmable event micro-instruction system, users only need to insert a single event trigger index into the digital vector to drive multiple heterogeneous analog boards to independently and in parallel execute custom analog measurement or output actions under the same synchronous trigger pulse, improving the flexibility of test program development.

[0023] Details of one or more embodiments of the present invention are set forth in the following drawings and description, so that other features, objects and advantages of the invention will be more readily understood. Attached Figure Description

[0024] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is an event definition and download flowchart of a multi-channel fast collaborative control method based on a programmable event triggering mechanism according to an embodiment of the present invention; Figure 2 This is a schematic diagram of digital vector event microinstructions according to an embodiment of the present invention; Figure 3 This is a flowchart of digital-analog collaborative control according to an embodiment of the present invention; Figure 4 This is a timing diagram for digital-analog cooperative control according to an embodiment of the present invention. Detailed Implementation

[0025] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with one or more embodiments of this specification. Rather, they are merely examples of apparatuses and methods consistent with some aspects of one or more embodiments of this specification as detailed in the appended claims.

[0026] It should be noted that the steps of the corresponding methods are not necessarily performed in the order shown and described in this specification in other embodiments. In some other embodiments, the methods may include more or fewer steps than described in this specification. Furthermore, a single step described in this specification may be broken down into multiple steps in other embodiments; and multiple steps described in this specification may be combined into a single step in other embodiments.

[0027] Example 1 This embodiment provides a multi-channel fast collaborative control method based on a programmable event triggering mechanism. This method can be applied to an automated test system comprising a digital board, a main control board, and at least one analog board. In a typical test system, the digital and analog boards are both mounted on the same backplane bus and physically connected to the main control board via a hardware synchronization signal line array independent of the data bus. This hardware synchronization signal line array includes multiple hardware signal lines with wired-AND logic functions and an independent hardware trigger line. Each hardware signal line is connected to the power supply voltage Vcc via pull-up resistors, so that when any board pulls it low, the entire signal line presents a low level, thus forming a wired-AND logic circuit. See also Figure 4 In this embodiment, the hardware signal lines include at least a first signal line S1, a second signal line S2, and a fourth signal line S4. S2 represents the overall operating state of the digital vector, S1 represents the configuration-ready state of each board, and S4 represents the execution state of the simulation operation of the simulation board.

[0028] The specific workflow of the method in this embodiment will be described in detail in stages below.

[0029] I. Event Configuration Phase like Figure 1 As shown, in the initial stage, users first customize the events that need to be registered through the application programming interface (API) or a graphical configuration interface. See also Figure 2 Each event has a unique event name and a corresponding event index, and an event index can be associated with one or more event operations. Each event operation specifically includes channel parameters, action type, and electrical parameters. For example, a user can define an event containing two synchronously executed event operations: the first event operation controls channels 0 to 15 of analog board A to output a specified DC voltage signal, and the second event operation controls channels 16 to 31 of mixed-signal board B to output a sine wave signal with a defined frequency and amplitude. In this way, the user abstracts the specific analog functions to be executed into event indexes, decoupling the event definition from the subsequent digital vector triggering instructions, and significantly improving the system's programmability and flexibility.

[0030] After the user completes the event definition, the host computer begins the event download process. First, the host computer notifies all associated target simulation boards to switch to event download mode. See also... Figure 4 Regarding the description of the S2 signal, the analog board immediately pulls the S2 signal line low to indicate to the main control board that it has entered the download state. After the main control board detects that S2 has been pulled low, it can confirm that all relevant analog boards are ready.

[0031] Before officially issuing event data, the host computer performs a crucial step: broadcasting a command to enable all valid workstations to all simulation boards within the system. Upon receiving this broadcast command, the simulation boards calculate and cache the full-workstation channel enablement information that should be effective when all workstations are enabled, based on the pre-defined multi-workstation and multi-channel mapping table for the current project. For example, assuming a simulation board has 8 physical channels and the test system has 16 workstations, the board has an internally stored 8×16 multi-workstation channel mapping table. When the host computer broadcasts the enable of all 16 workstations, the simulation boards traverse this mapping table to calculate which of the 8 channels are enabled by at least one workstation; this result is the full-workstation channel enablement information. This information represents all physical channels that should function under ideal conditions without workstation shielding.

[0032] Subsequently, the host computer downloads the user-defined event information, including the event name, event index, and one or more event operations, to the corresponding target simulation board via a high-speed communication bus. This high-speed communication bus is independent of the aforementioned hardware synchronization signal line array and is implemented using the Aurora bus protocol in this embodiment. The simulation board caches the received event operation configuration and its associated full-station channel enable information in a large-capacity onboard cache (e.g., Double Data Rate Synchronous Dynamic Random Access Memory DDR).

[0033] After the event information is downloaded, the host computer issues another command to restore the current test station configuration. This "enable all stations - download - restore station" process aims to enable the simulation board to acquire and store the channel correspondence of the event operation in the most complete station state during the download phase, laying the data foundation for subsequent execution phases to achieve fast channel shielding without relying on the host computer.

[0034] Finally, the host computer notifies the simulation board to exit event download mode. The simulation board then pulls the S2 signal line high. Because the S2 signal line has wired-AND logic characteristics, the overall level of S2 will only be pulled high after all simulation boards have completed downloading and released S2. After the main control board detects that S2 has become high, it can report to the host computer that the event download process has been completed.

[0035] II. Event Triggering Phase After event configuration is complete, the test system enters the actual test execution phase. Users insert event micro-instructions into their digital vector programs at key locations where simulated functional coordination needs to be triggered. For example... Figure 2 As shown, the format of this event microinstruction is extremely concise, containing only the event microinstruction identifier TRIG and the target event index ID to be triggered. Users do not need to worry about loop waits, delay waits, or complex channel parameters; they only need to specify the predefined event to be triggered.

[0036] The host computer notifies the digital board to begin running a digital vector containing the microinstructions for the aforementioned events. See also... Figure 4 At time T1, before the digital board starts operating, it first pulls the S1 and S2 signal lines low to indicate to the main control board that the system is initializing. Once the digital vectors are configured internally on the digital board, the digital board pulls the S1 signal line high, as shown below. Figure 4 As shown at time T2, the main control board continuously monitors the S1 signal line. When it detects that S1 has gone high, it confirms that all boards are configured and ready, and then sends a trigger pulse through the hardware trigger line Trigger. This pulse triggers the digital boards to synchronously execute the digital vector starting from the initial position.

[0037] The digital board executes the digital vector line by line. When it first reaches a vector line containing the event microinstruction TRIG and the target event index ID, it recognizes the instruction and triggers two parallel actions: First, the digital board sends an event trigger message packet to the main control board via an independent high-speed communication bus. The payload of this message packet includes at least the message type, message length, and the index ID of the target event. After receiving the message packet, the main control board determines which predefined event needs to be triggered.

[0038] Second, the digital board then enters a waiting state. In this embodiment, the specific method for entering the waiting state is that the digital board hardware automatically repeats the current line of event microinstructions, forming a hardware loop wait. During the waiting period, the digital board continuously monitors the level state of the fourth signal line S4 to determine whether the coordinated analog operation has been completed.

[0039] III. Collaborative Control Phase like Figure 4 As shown at time T3, upon receiving the event trigger message packet, the main control board immediately generates and sends an event processing message packet to all simulation boards in the system. This message packet, also transmitted via the aforementioned high-speed communication bus, includes at least the message type, message length, the target event index ID parsed from the event trigger message packet, and the current multi-station channel enabling information. The current multi-station channel enabling information reflects the actual enabled stations in the system at this point in the test. This information is updated in real-time by the host computer to each simulation board via broadcast messages when a station changes.

[0040] See Figure 4At time T4, after receiving the event processing message packet, each analog board begins the collaborative control process. First, the analog board pulls down the S1 and S4 signal lines to indicate to the main control board that it has received the instruction and entered the configuration state. Simultaneously, the low level of S4 also serves as a marker indicating that the analog operation is in progress or awaiting execution. Next, based on the target event index ID in the message packet, the analog board retrieves all event operations corresponding to that event index and their associated full-station channel enable information from its onboard buffer.

[0041] To adapt to the dynamic shielding requirements of channels in multi-station changing scenarios, the simulation board performs the following key calculations: It performs a bitwise hardware logical AND operation between the retrieved full-station channel enabling information and the current multi-station enabling information carried in the event processing message packet. The logical relationship satisfies:

[0042] in, This represents the target physical channel that will ultimately take effect. This represents pre-stored enable information for all workstation channels. This represents the current actual multi-station enable information.

[0043] For example, an event operation might have pre-stored full-station channel enable information as {Channel 1, Channel 3, Channel 5, Channel 7}, indicating that if all four stations are enabled, these four channels should participate in the operation. However, the current actual multi-station enable information is {Channel 1, Channel 2, Channel 3, Channel 4}, so the result of the logical AND operation is {Channel 1, Channel 3}. These two channels are the target physical channels that ultimately take effect in the current station state. The entire process is completed by the hardware logic of the simulation board within nanoseconds, without the need for intervention from a host computer, thus solving the response delay problem in existing technologies where station changes require repeated channel configuration by the computer system.

[0044] After identifying the target physical channel, the analog board configures the hardware parameters of the target physical channel according to the configuration requirements defined in the event operation (e.g., setting the output voltage value of the digital-to-analog converter, configuring the range, setting the sampling rate, etc.). After configuration, the analog board pulls the S1 signal line high, such as... Figure 4 The actions prior to time T5. S1 being pulled high indicates that this simulation board is ready and awaiting the final synchronization execution signal.

[0045] The main control board continuously monitors the S1 signal line status of all analog boards. Because S1 has wired-AND logic, the S1 signal line will only go high after all associated analog boards have completed configuration and released S1. Once the main control board detects a high level on S1, it confirms that all analog boards are ready. At this time, the main control board sends a second trigger pulse via the hardware trigger line, such as... Figure 4 As shown at time T5.

[0046] This second trigger pulse is broadcast to all digital and analog boards. For analog boards, this pulse serves as the start signal for synchronous execution of the event operation; all analog boards receiving this pulse begin executing the preset analog operation (e.g., synchronous voltage output or initiation of measurement) at the same nanosecond interval. For digital boards in a loop-waiting state, they detect that the S4 signal line is low in real time. Therefore, according to preset logic, they actively mask or ignore the second trigger pulse of this trigger, ensuring that the digital vector does not erroneously continue execution while the analog operation is in progress.

[0047] Once the analog board completes its respective analog operations (such as stabilizing the voltage output and completing the measurement data acquisition), it pulls the S4 signal line high, such as... Figure 4 The actions prior to time T6. Similarly, due to the wired-AND logic, the overall level of S4 only goes high after all analog boards have finished executing and released S4. The main control board detects that S4 has gone high, confirming that all analog operations have been completed. At this time, the main control board sends a third trigger pulse through the hardware trigger line, such as... Figure 4 As shown at time T6.

[0048] For a digital board that is in a waiting state and continuously monitoring S4, it detects that S4 has gone high, and therefore, it can respond to this third trigger pulse. This pulse acts as a synchronization exit signal, triggering the digital board to exit the loop waiting state of repeatedly running the current event microinstruction and immediately continue executing the next line of instructions in the digital vector.

[0049] Finally, after all the digital vectors in the digital board have been executed, the digital board pulls up the S2 signal line, as shown. Figure 4 As shown at time T7, the main control board detects that S2 has gone high, confirming the completion of the entire digital vector operation, and then notifies the host computer that the test execution has ended.

[0050] Through the complete configuration, triggering, and collaborative control process described above, the method in this embodiment achieves precise timing synchronization at the nanosecond level between digital boards and multiple analog boards, eliminating the dependence on real-time control of the computer system, and efficiently realizing local real-time computation and shielding of channels in a multi-station dynamic environment.

[0051] Example 2 This embodiment, based on Embodiment 1, further illustrates the cross-board synchronous execution function of event operations and the specific format of event micro-instructions.

[0052] In the test system of this embodiment, two different types of analog boards are configured: a first analog board and a second analog board (e.g., a mixed-signal board). During the event configuration phase, the user defines a unified event with a unique event index "0x10". This event index is associated with two event operations. The first event operation is downloaded to the first analog board, defining its channels 0 to 15 as performing voltage measurement functions. The second event operation is downloaded to the second analog board, defining its channels 16 to 31 as performing sine wave output functions. During the download phase, both analog boards cache their respective operation configurations and full-station channel enable information according to the steps in Embodiment 1.

[0053] During actual testing, the digital board runs to a line of digital vectors containing the event microinstruction "TRIG, 0x10". This instruction is extremely concise; "TRIG" is the hardware-recognizable event microinstruction identifier, and "0x10" is the target event index. After recognizing this instruction, the digital board, following the process described in Example 1, sends an event trigger message packet carrying the index "0x10" to the main control board and enters a waiting state. The main control board then broadcasts the index "0x10" and the current multi-station enable information to all boards, including the first and second analog boards, via an event processing message packet. Upon receiving the message packet, the first and second analog boards retrieve their respective pre-stored event operations based on the index "0x10" and independently complete channel calculations and hardware configurations. When the main control board sends a synchronous execution pulse via the Trigger line, the voltage measurement of the first analog board and the sine wave output of the second analog board start synchronously at the same time, achieving a synergistic effect of single event triggering and synchronous execution of heterogeneous functions across multiple boards.

[0054] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementations, and will not be repeated here.

[0055] Generally, various embodiments can be implemented in hardware or dedicated circuitry, software, logic, or any combination thereof. Some aspects of the invention can be implemented in hardware, while others can be implemented by firmware or software executed by a controller, microprocessor, or other computing device, but the invention is not limited thereto. Although various aspects of the invention may be shown and described as block diagrams, flowcharts, or using some other graphical representation, it should be understood that, by way of non-limiting example, these blocks, apparatuses, systems, techniques, or methods described herein can be implemented in hardware, software, firmware, dedicated circuitry or logic, general-purpose hardware or controllers or other computing devices, or some combination thereof.

[0056] Embodiments of the present invention can be implemented by computer software, which may be executable by a data processor of a mobile device, such as a processor entity, or by hardware, or by a combination of software and hardware. Computer software or programs (also referred to as program products) including software routines, applets, and / or macros can be stored in any device-readable data storage medium, and they include program instructions for performing specific tasks. The computer program product may include one or more computer-executable components configured to perform the embodiments when the program is run. The one or more computer-executable components may be at least one piece of software code or a portion thereof. Additionally, it should be noted in this respect that, as Figure 1 Any box in the logical flow can represent a program step, or interconnected logic circuits, boxes and functions, or a combination of program steps and logic circuits, boxes and functions. Software can be stored on physical media such as memory chips or blocks of storage implemented within a processor, magnetic media such as hard disks or floppy disks, and optical media such as DVDs and their data variants, CDs, etc. The physical medium is a non-transient medium.

[0057] Those skilled in the art should understand that the technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments have been described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0058] The above embodiments are merely illustrative of several implementations of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of the present invention should be determined by the appended claims.

Claims

1. A multi-channel fast collaborative control method based on a programmable event triggering mechanism, applied to a test system comprising a digital board, a main control board, and at least one analog board, characterized in that, include: Event configuration phase: Obtain user-defined event information and pre-store it to the target simulation board; The event information includes the event index and the corresponding event operation, and during the configuration process, the simulation board acquires and stores the channel enable information corresponding to the event operation in the full-station state; Event triggering phase: The digital board operates a digital vector. When it recognizes an event micro-instruction containing the target event index, it sends an event trigger message packet carrying the target event index to the main control board and enters a waiting state. Collaborative control phase: In response to the event trigger message packet, the main control board sends an event processing message packet to the simulation board; The simulation board calls the pre-stored event operation according to the received event processing message packet, and determines the final target physical channel to perform the simulation operation based on the channel enable information corresponding to the full workstation state and the current actual multi-workstation enable information. During the coordinated control phase, the main control board monitors the status of the hardware synchronization signal line array and coordinates the timing between the waiting state of the digital board and the analog operation execution of the analog board to achieve synchronization alignment.

2. The multi-channel fast collaborative control method according to claim 1, characterized in that, The simulation board determines the final effective target physical channel based on the channel enable information corresponding to the full-station state and the current actual multi-station enable information, specifically: The simulation board performs a logical AND operation between the pre-stored channel enable information corresponding to the full workstation state and the current multi-workstation enable information carried in the event processing message packet, which reflects the current test workstation switch state, to obtain the final effective target physical channel.

3. The multi-channel fast collaborative control method according to claim 1, characterized in that, The event configuration phase further includes: The host computer notifies the simulation board to enter event download mode; Before the host computer sends the event information, it broadcasts an instruction to enable all valid workstations to the simulation board, so that the simulation board can calculate and cache the channel enable information corresponding to the event operation in the full workstation state; After the download is complete, the host computer is restored to the current test station configuration.

4. The multi-channel fast collaborative control method according to claim 1, characterized in that, The hardware synchronization signal line array includes multiple hardware signal lines with wired-AND logic functions and one hardware trigger line; wherein, each of the hardware signal lines adopts a design of pull-up resistors connected to the power supply voltage Vcc, so that when any board pulls it low, the entire signal line presents a low level.

5. The multi-channel fast collaborative control method according to claim 4, characterized in that, The hardware signal lines include at least a first signal line S1, a second signal line S2, and a fourth signal line S4; wherein, the second signal line S2 is used to characterize the overall operating state of the digital vector, the first signal line S1 is used to characterize the board configuration ready state, and the fourth signal line S4 is used to characterize the analog operation execution state of the analog board.

6. The multi-channel fast collaborative control method according to claim 5, characterized in that, The timing synchronization steps in the collaborative control phase include: After receiving the event processing message packet, the simulation board pulls the first signal line S1 and the fourth signal line S4 low to start the simulation operation configuration. After configuration, the analog board pulls up the first signal line S1; After the main control board detects that the first signal line S1 has become high, it sends a trigger pulse through the hardware trigger line to drive all associated analog boards to synchronously execute the analog operation.

7. The multi-channel fast collaborative control method according to claim 6, characterized in that, The timing synchronization step further includes: The digital board in the waiting state detects the fourth signal line S4 in real time; When the fourth signal line S4 is detected to be low, the trigger pulse on the hardware trigger line is not responded to. After the analog board completes the analog operation and pulls the fourth signal line S4 high, the main control board sends a trigger pulse again through the hardware trigger line. The digital board responds to the trigger pulse, exits the waiting state, and continues to execute subsequent digital vectors.

8. The multi-channel fast collaborative control method according to claim 1, characterized in that, The event microinstruction includes an event microinstruction identifier and the target event index; after the digital board recognizes the event microinstruction, it enters the waiting state by repeatedly running the current line of the event microinstruction.

9. The multi-channel fast collaborative control method according to claim 1, characterized in that, The event operation includes channel parameters, action type, and electrical parameters; a single event index can be associated with multiple event operations, and the multiple event operations are configured to be executed synchronously on different channels of the same analog board or on different analog boards.

10. A multi-channel fast collaborative control system, characterized in that, It includes a main control board, a digital board, and at least one analog board, with each board physically connected to the other via a hardware synchronization signal line array as described in claim 4 or 5. The digital board is used to report the event trigger index to the main control board and enter a waiting state when it recognizes the event micro-instruction in the digital vector; The main control board is used to send event processing message packets to the simulation board according to the event trigger index, and to send hardware trigger signals by monitoring the level status of the hardware synchronization signal line array. The simulation board is used to call the pre-stored event operation according to the event processing message package, and perform logical operations on the pre-stored full-station channel enable information and the current multi-station enable information to determine the target physical channel, and execute the corresponding simulation operation according to the timing of the hardware trigger signal.