A compiler sequence selection method and system based on large model natural language reasoning

Abstract

A compiler sequence selection method and system based on large-scale natural language inference, the system including a processor, the processor being configured to perform the following operations: obtaining the static structural feature vector of the target program; converting the static structural feature vector into a fixed-precision feature string, and converting at least two candidate compiler optimization combinations from a preset candidate sequence pool into sequence identifier strings; embedding the fixed-precision feature string and the sequence identifier string into a role prompt template to construct the input text of the large language model; inputting the input text into the large language model, and having the large language model output a binary classification judgment result representing the performance difference between the candidate compiler optimization combinations; and determining the target compiler optimization sequence for the target program based on the binary classification judgment result.

Description

Technical Field

[0001] This invention relates to the fields of compiler optimization and artificial intelligence model training technology, and in particular to a compiler sequence selection method and system based on large-scale natural language inference models. Background Technology

[0002] Compiler optimization is a crucial method for improving program performance and reducing code size, and the choice of optimization pass sequence has a critical impact on the results. An optimization pass sequence refers to a combination of optimization passes executed sequentially by the compiler during the compilation optimization process. Each optimization pass represents a deterministic program analysis or transformation operation on the intermediate representation (IR), used to change the structure or properties of the intermediate representation. Due to the dependencies and order sensitivity between different optimization passes, the order in which the passes are arranged will have different effects on the form of the intermediate representation, the number of instructions, and the performance of the final generated code.

[0003] Taking LLVM as an example, it integrates over a hundred optimized passes that perform analysis or transformation operations on the intermediate representation of a program. If multiple optimized passes are combined in a predetermined order to form a sequence of optimized passes of approximately 40 to 50 characters, the number of possible combinations increases exponentially with the sequence length. Traditional compilers typically use fixed optimization level configurations (e.g., -O1, -O2, -O3, -Os, and -Oz). While this approach offers some stability, it often fails to achieve optimal performance because it cannot adaptively adjust to the differences in structural characteristics and optimization requirements of different programs.

[0004] The core problem faced by existing compiler optimization methods in optimizing the selection of pass sequences is the need for numerous iterations to gradually obtain a better decision. Since the optimization pass sequence consists of multiple passes sequentially, its overall effect can only be accurately evaluated after the complete sequence is applied to the program and compilation is complete; individual decision steps cannot directly provide clear performance feedback. Therefore, whether it's a sequence decision method based on reinforcement learning or a method based on search or heuristic rules, it typically requires repeatedly trying different combinations of optimization passes and relying on multiple rounds of iteration to gradually approach a better solution. Within the reinforcement learning framework, the model needs to continuously interact with the compiler in a real compilation environment, accumulating experience through multiple trials to learn a relatively stable policy. This process itself requires executing a large number of complete optimization pass sequences, resulting in hundreds or thousands of iterations during the training phase.

[0005] Secondly, optimizing the Pass sequence decision-making process itself involves high dimensionality and a vast decision space. Optimizing a Pass sequence is not a simple, unordered combination, but rather an ordered decision-making process highly sensitive to order. Different Passes may have dependencies, mutually reinforcing, or mutually canceling effects, meaning that a decision at any position in the sequence will influence the action space of subsequent Passes. When the number of selectable optimization Passes in the compiler reaches hundreds and the sequence length reaches tens, the decision space expands exponentially, forming a high-dimensional, discrete, and nonlinear search space. In this case, the model not only needs to decide "which Passes to choose" but also "in what order to execute these Passes," leading to highly coupled decision-making processes and significantly increased complexity. Furthermore, due to significant differences in control flow structure, instruction distribution, and data access patterns among different programs, optimization strategies learned for a specific program are often difficult to directly transfer to other programs, further weakening the generalization ability of existing methods in cross-program scenarios.

[0006] Finally, the aforementioned iterative processes and high-dimensional decision-making directly lead to significant time and resource overhead. The root cause is that most existing methods rely on actual compilation and execution results to judge the merits of the optimization pass sequence. Each sequence evaluation typically requires the program to undergo a complete compilation process, execute the selected optimization pass sequence, and further obtain feedback by running the program or collecting performance metrics. This process involves multiple time-consuming steps, including compilation, linking, and program execution. As the code size and structural complexity increase, the cost of a single compilation and execution further increases. When the number of iterations reaches hundreds or thousands, the overall optimization process's time cost and computational resource consumption will show a significant upward trend, making it difficult to directly apply these methods to large-scale engineering scenarios or practical systems with high requirements for compilation efficiency and resource utilization.

[0007] The aforementioned problems become even more pronounced in deep learning model compilation and optimization scenarios. Deep learning models typically consist of large-scale computational graphs, containing numerous operator nodes, complex data dependencies, and multi-layered nested computational structures. Their compilation and optimization process involves not only general program optimization but also comprehensive optimization of operator fusion, memory access, parallel scheduling, and hardware characteristics. As the model size and structural complexity continue to increase, the impact of optimizing the pass sequence on the intermediate representation structure and final execution performance becomes more sensitive. Different pass combinations and execution orders can lead to significantly different performance results. In this context, traditional optimization methods that rely on feedback from multiple real compilations and runs will further amplify iteration costs and resource consumption. At the same time, optimization decisions learned based on static features or fixed policies are more difficult to effectively generalize across different model structures.

[0008] In general, existing technologies face three common problems in Pass sequence optimization: (1) The Pass sequence space is huge, and existing methods that rely on traversal or reinforcement learning search require multiple iterations; (2) Optimizing Pass sequence decisions are high-dimensional, discrete and order-sensitive, making decision-making difficult and difficult to generalize; (3) Existing methods often require multiple real compilations to determine the quality of the sequence, which is difficult to meet the needs of large-scale engineering deployment.

[0009] For example, the paper "Meta Large Language Model Compiler: Foundation Models of Compiler Optimization" (authors: Chris Cummins, Volker Seeker et al.; 2024) discloses a compiler optimization method based on a large language model. This method includes: using a large code model as the base model, pre-training the model with a corpus containing massive compiler intermediate representations and assembly code to build the model's deep understanding of compiler semantics and code; in the data construction stage, using an automated tuning pipeline, searching through a large number of real compilation attempts to extract the optimal pass sequence that minimizes code size as fine-tuning labels; in the fine-tuning and inference stage, providing the unoptimized complete source code directly as input prompts to the model, requiring the model to directly generate the globally optimal compilation optimization pass sequence in one step through an end-to-end approach, and predicting the absolute code size metrics before and after optimization, as well as generating the optimized code. The technical shortcomings of this solution are as follows: defining the optimization task as directly generating a complete list of Pass sequences and predicting the absolute code volume before and after optimization, and directly using the unoptimized complete LLVM intermediate representation (IR) code as model input; this approach results in excessively long input feature sequences, which are easily limited by the context window capacity of large language models; at the same time, requiring the model to directly generate long and complex absolute optimization sequences is not only difficult to predict, but also makes it difficult to guarantee the accuracy of the output; in addition, the model training of this solution relies heavily on automated tuning pipelines to conduct massive real compilation attempts to construct data labels, and the computational and time costs of data acquisition are extremely high.

[0010] For example, US20240118875A1 discloses a method, system, and apparatus for feedback-oriented optimization, including computer programs encoded on a computer storage medium. One method includes maintaining a data repository containing multiple optimization profiles, which compilers use to compile corresponding computer programs. These computer programs can be invoked by a set of executing workloads. Repeated operations include: for each optimization profile in at least a subset of optimization profiles, determining or predicting whether the optimization profile is valid for the current software version of the compiler; and in response to determining or predicting that the optimization profile is no longer valid for the current software version of the compiler, removing the optimization profile from the data repository. The technical drawback of this solution is that it primarily focuses on the verification and auditing of optimization profiles (such as FDO / PGO data) in a data center environment to determine whether existing configurations are valid under the current software version of the compiler; this evaluation process still inevitably relies on the actual execution feedback of the workloads in the physical environment. This solution cannot independently and statically predict the relative merits of specific optimization pass sequences detached from the actual compilation and execution pipeline, and fails to substantially reduce the computational overhead of the optimization process.

[0011] For example, CN112035116A discloses a surrogate modeling method for multi-objective compiler optimization sequence selection. First, the compiler optimization sequence is binary encoded. Fitness functions are designed for the code size and running speed of the two optimization objectives. After selection and crossover operations, the resulting subpopulations are merged with the parent population and a new population is generated using fast non-dominated sorting, ultimately obtaining the Pareto optimal solution set. During the search iteration process, surrogate models are constructed using the compiler optimization sequence and the corresponding fitness values ​​of the two objectives. Approximate fitness values ​​are calculated using the surrogate models for the subpopulations generated by the evolutionary operations, and the actual fitness values ​​are calculated for the best solutions, thereby improving evolutionary efficiency. This technical solution uses random forests or support vector machines as surrogate models to directly output continuous fitness values, which has the drawback of being unable to adapt to discrete natural language instructions.

[0012] For example, TWI755112B discloses a method for optimizing computer code, including the following steps: providing several optimizers. Each optimizer has several branch paths. A counter is set on each branch path. When the optimizers run through these branch paths, the values ​​of these counters set on these branch paths are incremented. The computer code is compiled through these optimizers. Several count values ​​of these counters are obtained. These count values ​​are combined to obtain a feature vector of the computer code. The feature vector is input into a machine learning model to obtain a set of optimizers suitable for the computer code. This technical solution has the limitation that it can only extract numerical feature vectors through execution branches.

[0013] In summary, existing compiler optimization evaluation schemes generally suffer from technical drawbacks such as the enormous size of the pass sequence space and reliance on costly real compilation and runtime environment feedback. Furthermore, when incorporating artificial intelligence models, limitations exist, including high-dimensional input features, complex generation task structures, and high training data acquisition costs. Therefore, how to transform the high-dimensional and complex optimization sequence search process into a lightweight task suitable for model processing without requiring real compilation evaluation of each candidate sequence during the online inference / deployment phase, thereby predicting and selecting superior compiler optimization sequences at low cost and high efficiency, while also possessing cross-program generalization capabilities, is a pressing technical problem to be solved in this field.

[0014] Furthermore, on the one hand, there are differences in understanding among those skilled in the art; on the other hand, the applicant studied a large number of documents and patents when making this invention, but due to space limitations, not all details and contents were listed in detail. However, this does not mean that the present invention does not possess the features of these prior art. On the contrary, the present invention already possesses all the features of the prior art, and the applicant reserves the right to add relevant prior art to the background art. Summary of the Invention

[0015] Existing compiler optimization sequence selection techniques suffer from several drawbacks: First, the candidate space for compiler optimization sequences (Pass sequences) grows exponentially, and the decision-making process is complex, characterized by high dimensionality, discreteness, and order sensitivity, making it difficult for learned strategies to effectively generalize across programs of different structures and scales. Second, traditional methods (such as heuristic search or reinforcement learning) heavily rely on feedback from real compilation and execution, requiring hundreds or thousands of iterations of trial and error, resulting in significant computational resource overhead and time costs, making it difficult to meet the needs of large-scale engineering deployment. Furthermore, existing solutions often employ complex graph structures and inefficient random data sampling in their data and model design, requiring the model to directly predict absolute performance values ​​or output the globally optimal sequence in one go. These settings not only fail to align with the text processing mechanisms of large language models but also easily lead to bottlenecks such as unstable model training, sparse supervision signals, and unreliable inference decisions.

[0016] To address the shortcomings of existing technologies, the technical problem this invention aims to solve is: how to predict the quality of compilation optimization sequences in a more general and lightweight way without having to perform real compilation evaluation on each candidate sequence during the online inference / deployment phase, thereby solving the problems of high computational evaluation costs and insufficient cross-program generalization ability caused by existing methods relying on repeated iterative trial and error.

[0017] This invention provides, from a first aspect, a compiler sequence selection system based on large-scale natural language inference, comprising a processor configured to perform the following operations: acquiring a static structural feature vector of a target program; converting the static structural feature vector into a fixed-precision feature string, and converting at least two candidate compiler optimization combinations from a preset candidate sequence pool into sequence identifier strings; embedding the fixed-precision feature string and the sequence identifier string into a role prompt template to construct input text for a large-scale language model; inputting the input text into the large-scale language model, and having the large-scale language model output a binary classification judgment result representing the performance difference between the candidate compiler optimization combinations; and determining a target compiler optimization sequence for the target program based on the binary classification judgment result.

[0018] According to a preferred embodiment, the processor is further configured to: perform front-end compilation on the target program to generate serialized intermediate instructions; perform static feature scanning on the serialized intermediate instructions and calculate the normalized count values ​​of each type of instruction to extract and generate a static structural feature vector.

[0019] According to a preferred embodiment, when the processor converts a static structural feature vector into a fixed-precision feature string and converts at least two candidate compilation optimization combinations into a sequence identifier string, it performs the following operations: performs fixed-point numerical serialization processing on the numerical features in the static structural feature vector to concatenate and generate a fixed-precision feature string that conforms to the input specifications of the large language model lexical unit; extracts the execution control flow inside the candidate compilation optimization combination, and performs ordered serialization encoding on multiple candidate optimization actions based on the execution control flow to concatenate and generate a sequence identifier string.

[0020] According to a preferred embodiment, the processor is further configured to: when the number of candidate compilation optimization combinations is greater than two, perform a multi-round elimination comparison inference operation; in each round of inference, extract a pair of candidate sequence identifier strings into the large language model, and based on the binary classification judgment result output by the large language model, retain the sequence identifier string indicated as the winner in the pair of candidate sequence identifier strings, and eliminate the other sequence identifier string in the pair of candidate sequence identifier strings.

[0021] According to a preferred embodiment, during the execution of the multi-round elimination comparison and inference operation, the processor performs the following operations: adding the directed edges generated by each comparison from the retained sequence identifier string to the eliminated sequence identifier string to the graph set, so as to construct a directed acyclic graph that reflects the win-loss relationship; and using the compilation optimization combination mapped by the sequence identifier strings finally retained after the multi-round elimination comparison and inference operation as the target compilation optimization sequence.

[0022] According to a preferred embodiment, when the processor embeds the fixed-precision feature string and the sequence identifier string into the role prompt template to construct the input text of the large language model, it performs the following concatenation operations: constructing a role structured context with multi-level isolation within the role prompt template; writing the text that sets the compilation optimization comparison task and natural language inference constraints into the system prompt words of the role prompt template; writing the fixed-precision feature string and at least two candidate sequence identifier strings into the user prompt words of the role prompt template; writing the indicator tag that limits the large language model to output only binary classification judgment results into the assistant response of the role prompt template, and concatenating the above-mentioned levels into the input text.

[0023] According to a preferred embodiment, the large language model is configured with a low-rank adaptive module. During the forward propagation process of inferring the binary classification result based on the input text, the following computational operations are performed: obtaining the hidden feature vector of the input text within the large language model; inputting the hidden feature vector into the pre-trained weight matrix in the parameter-frozen state within the large language model, and into the low-rank adaptive module connected in parallel with the pre-trained weight matrix; performing low-rank mapping processing on the hidden feature vector through the dimensionality reduction matrix and the dimensionality increase matrix within the low-rank adaptive module, and aggregating the output of the low-rank mapping processing with the output of the pre-trained weight matrix, and inferring the binary classification result based on the aggregated result.

[0024] According to a preferred embodiment, the processor includes a client processor and a server processor that establish a communication connection via a network: the client processor performs compilation processing on the target program locally to extract static structural feature vectors, and sends the static structural feature vectors to the server processor via a network interface; the server processor receives the static structural feature vectors, retrieves candidate compilation optimization combinations from the candidate sequence pool to construct the input text, and calls the server-side graphics processor to load and run the large language model.

[0025] The present invention provides, from a second aspect, a compiler sequence selection method based on large-scale natural language inference. The method includes: obtaining a static structural feature vector of a target program; converting the static structural feature vector into a fixed-precision feature string, and converting at least two candidate compiler optimization combinations from a preset candidate sequence pool into sequence identifier strings; embedding the fixed-precision feature string and the sequence identifier string into a role prompt template to construct input text for a large-scale language model; inputting the input text into the large-scale language model, and having the large-scale language model output a binary classification judgment result representing the performance differences between the candidate compiler optimization combinations; and determining the target compiler optimization sequence for the target program based on the binary classification judgment result.

[0026] According to a preferred embodiment, the step of determining the target compilation optimization sequence for the target program based on the binary classification judgment result includes: when the number of compilation optimization combinations in the candidate sequence pool is greater than two, performing a multi-round elimination comparison inference operation; in each round of inference, a pair of candidate sequence identifier strings are extracted from the candidate sequence pool and input into the large language model, and based on the binary classification judgment result output by the large language model, the sequence identifier string indicated as the winner in the pair of candidate sequence identifier strings is retained, and the other sequence identifier string in the pair of candidate sequence identifier strings is eliminated. Attached Figure Description

[0027] Figure 1 This is a flowchart illustrating the compiler optimization sequence selection method based on a large language model provided by the present invention. Figure 2 This is a schematic diagram of the process for constructing comparison sample pairs based on the core candidate set provided by the present invention; Figure 3 This is a schematic diagram of the structure of the fixed-precision feature string, sequence identifier string, and role prompt template provided by the present invention; Figure 4 This is a schematic diagram of the model fine-tuning mechanism based on a low-rank adaptive module provided by the present invention; Figure 5 This is a schematic diagram of the optimal sequence selection process based on multi-round comparison and directed acyclic graph construction provided by the present invention; Figure 6 This is a schematic diagram of the physical hardware architecture for collaboration between the running client and the large model server provided by this invention; Figure 7 This is a schematic diagram of the logic module of a compiler optimization sequence selection device based on a large language model provided by the present invention.

[0028] List of reference numerals 101: Static structural feature vector; 102: Fixed-precision feature string; 103: First compilation optimization combination; 104: Second compilation optimization combination; 105: Sequence identifier string; 106: Role prompt template; 107: System prompt word; 108: User prompt word; 109: Assistant reply; 201: Pre-trained weight matrix; 202: Low-rank adaptive module; 203: Dimensionality reduction matrix; 204: Dimensionality increase matrix; 301: Running client; 302: Client processor; 303: User interface module; 30 4: Client network interface module; 305: Large model server; 306: Server processor; 307: Server graphics processor; 308: Server network interface module; 401: Optimized sequence decision module; 402: Data construction module; 403: Text serialization module; 404: Prompt word construction module; 405: Model fine-tuning module; 406: Inference and prediction module; 407: Program compilation and optimization module; 408: Front-end compilation module; 409: Feature extraction module; 410: Compilation and execution module. Detailed Implementation

[0029] The following is a detailed explanation with reference to the accompanying drawings.

[0030] Compiler optimization combinatorials refer to a set of optimization schemes selected from a predefined candidate space and used as comparison targets. The specific physical form and execution logic of compiler optimization combinatorials vary depending on the compilation environment and optimization task, and at least include the following three manifestations: First, in scenarios involving fine-grained, multi-stage processing of the intermediate representation (IR) of a program, compiler optimization composition manifests as a sequence of compiler optimizations with a defined execution order. For example, in modular compiler infrastructures such as LLVM, this is represented as a sequence of Passes consisting of multiple optimization Passes with dependencies and order sensitivity arranged in a predetermined order.

[0031] Second, in traditional general compilation scenarios, compilation optimization combinations are specifically manifested as predefined fixed optimization level configurations. For example, the optimization levels such as -O1, -O2, -O3, -Os, and -Oz fixed in the compiler are essentially a set of predefined optimization pass sequences with a fixed execution order.

[0032] Third, in the context of deep learning model compilation optimization, compilation optimization combinations manifest as a comprehensive combination of optimization strategies for large-scale computational graphs. This includes not only general program optimization but also a set of multi-layered, nested joint optimization schemes targeting operator fusion, memory access, parallel scheduling, and specific hardware characteristics.

[0033] Compiler optimization sequence: refers to a compiler optimization process chain with a defined execution order.

[0034] Intermediate serialization instructions: These refer to the intermediate representation files (such as LLVM IR) generated after performing front-end compilation processing on the original source program.

[0035] Static structural feature vector: A set of numerical program feature vectors with fixed dimensions (such as Autophase features) extracted by static feature analysis of serialized intermediate instructions. This static structural feature vector is used to accurately characterize the internal structure, instruction distribution, and logical characteristics of the current program without running the program.

[0036] Fixed-point numerical serialization: refers to the formatted preprocessing operation of concatenating numerical formats such as floating-point numbers or scientific notation by constraining them with fixed precision (such as fixed decimal places or significant digits) when converting continuous numerical features into discrete word sequences natively supported by large language models.

[0037] Execution control flow: refers to the execution order dependencies and timing physical links between multiple compilation optimization actions when the compiler performs code analysis or transformation operations on the target program.

[0038] Ordered serialization encoding refers to the encoding process of extracting the execution control flow of compilation optimization actions in the compiler and converting its physical temporal structure into an equivalent linear or hierarchical string of text symbols with a clear sequential order.

[0039] Fixed-precision feature string: Since the large language model takes text tokens as input, this invention truncates and transforms the above-mentioned numerical static structural feature vectors to generate floating-point strings that are concatenated with specific delimiters (such as commas) and use a uniform fixed decimal precision (such as eight decimal places).

[0040] Core candidate set: A high-quality subset of candidates generated by range shrinking before sample construction, given the extremely large and exponentially expanding original optimization pass sequence space in the compiler.

[0041] Comparison sample pairs: Data pairs generated based on candidate sequences during the training data construction phase. Each sample pair contains two compiled optimized combinations to be compared and labels indicating their relative performance, transforming the optimization problem into a binary classification comparison task.

[0042] Role-based structured context: In the prompt word engineering of large language models, specific data structures (such as special delimiters, native hierarchical labels or key-value pairs) are used to divide mutually isolated context blocks to carry different role semantics such as system constraints, user input and model responses, thereby preventing instruction confusion in large models.

[0043] Role-based prompt template: A structured conversational text format template (such as ChatML format), which typically contains system prompt words 107, user prompt words 108, and assistant replies 109, etc., used to uniformly load and map cleaned program feature data, sequence data, and tags to generate structured input that can be read by a large language model.

[0044] Sequence identifier string: A textual representation (e.g., a list of integers separated by spaces or commas) that transforms a candidate combination of multiple compiler optimizers into its predetermined execution order. The sequence identifier string is embedded in the role cue template, clearly representing the specific optimization execution path to the larger model.

[0045] Low-rank adaptive module: A lightweight fine-tuning architecture introduced for pre-trained large language models during model training. Specifically, while freezing the original weight parameters of the model, modules containing dimensionality reduction and dimensionality increase matrices are inserted into the attention layer and the linear mapping layer in the feedforward network. This enables specialized fine-tuning and adaptation of large models for compiler-optimized sequence selection tasks with lower computational and memory costs.

[0046] Example 1 The present invention discloses a compiler sequence selection system based on large-model natural language inference, comprising a processor. This processor executes the compiler sequence selection method based on large-model natural language inference of the present invention. Its core approach transforms the performance evaluation task, which originally relied on feedback from the real compilation environment, into a binary classification comparison task that can be handled by a large language model. To this end, the present invention constructs a complete process covering feature extraction, text serialization, role prompt template construction, and parameter updating, enabling the large language model to directly output a judgment result representing the performance difference between the input static structural feature vector 101 and the compilation optimization combination. Since the inference process does not require actual compilation execution, its evaluation efficiency is superior to traditional reinforcement learning, evolutionary algorithms, or exhaustive evaluation methods.

[0047] In this invention, the processor first obtains the static structural feature vector 101 of the target program through front-end compilation and static feature analysis, which is used to find the target compilation optimization sequence from the candidate sequence pool. When the number of candidate compilation optimization combinations is greater than two, the processor constructs a directed acyclic graph reflecting the win-loss relationship through multiple rounds of elimination comparison and inference operations, thereby locking the optimal path. In addition, by updating parameters by connecting a low-rank adaptive module 202 in parallel in the pre-trained large language model, this technical solution can complete training under limited computing resources, achieve high-performance prediction, and has good engineering usability and cross-program generalization ability.

[0048] Preferably, the processor of the present invention (e.g., client processor 302 or server processor 306) represents a series of electronic processing circuits capable of executing machine-readable instructions via electronic signals. These processing circuits may be physically implemented as a single integrated circuit (IC), multiple interactive integrated circuits, or one or more distributed processing nodes. By way of example, and not limitation, the physical hardware entity of the processor may include one or more combinations of the following architectures.

[0049] Preferably, the processor may be composed of a general-purpose processing unit (CPU). Typical examples of such hardware entities include, but are not limited to, multi-core processors based on the x86 architecture, processing cores based on the ARM® architecture, or processing chips based on the RISC-V architecture. In terms of physical function allocation, the client processor 302 is specifically configured to execute the logical analysis tasks of the program, including performing front-end compilation on the target program to generate serialized intermediate instructions, and calculating normalized count values ​​to extract static structural feature vectors 101. In addition, this general-purpose processing architecture is also responsible for executing non-parallel text conversion logic, such as converting numerical features into fixed-precision feature strings 102.

[0050] To address the high-intensity matrix operation requirements of large language models, the processor can further include or be operationally coupled to a dedicated hardware accelerator, such as a server graphics processor 307. This hardware entity physically consists of thousands of parallel computing units (ALUs) and dedicated tensor kernels. Such a dedicated hardware accelerator is configured to load a pre-trained weight matrix 201 and run a parallel low-rank adaptive module 202. Specifically, the server graphics processor 307 implements low-rank mapping processing of the hidden layer feature vectors on the physical circuitry through multiplication operations of a dimension-reduced matrix 203 and an increased-dimensional matrix 204, thereby inferring a binary classification result that represents the difference in compilation optimization performance.

[0051] Furthermore, the hardware implementation of this invention can also encompass customized or programmable logic devices, such as field-programmable gate arrays (FPGAs) or application-specific integrated circuits (ASICs). In such embodiments, the decision logic for the target compilation optimization sequence (such as constructing a directed acyclic graph and multi-round elimination screening) can be implemented in the circuit using hard-core logic or firmware instructions to achieve lower task scheduling latency and higher throughput performance.

[0052] It should be understood that the physical hardware of the processor in this invention is not limited to a single computing device. In distributed or cloud computing embodiments, the processor can be embodied as a cluster of physical servers communicating via a high-speed interconnect bus and a server network interface module 308. Regardless of the specific physical form, these hardware entities are collectively configured to execute the complete technical logic from program feature characterization to the final determination of the target compilation optimization sequence.

[0053] Figure 6 The physical hardware architecture and closed-loop data flow of the client 301 and the large model server 305 working together in this invention are disclosed in detail. For example... Figure 6 As shown, the user interface module 303 receives the target program and inputs it into the client processor 302 running the client 301. The client processor 302 calls the corresponding compiler frontend to perform frontend compilation on the target program to generate serialization intermediate instructions, and the client processor 302 performs static feature scanning on the serialization intermediate instructions to extract and generate a static structural feature vector. Subsequently, the client network interface module 304 sends the static structural feature vector to the server network interface module 308 of the large model server 305.

[0054] On the server side, the server network interface module 308 transmits the received static structural feature vector to the server processor 306. The server processor 306 performs a candidate set construction operation, that is, the server processor 306 retrieves candidate compiled and optimized combinations from the candidate sequence pool to construct the input text. Further, the server processor 306 performs routing allocation according to the task type: in the model fine-tuning stage, the server processor 306 interacts with the server graphics processor 307 based on the training strategy and calls the server graphics processor 307 to load and run the large language model to perform fine-tuning operations; in the inference decision stage, the server processor 306 schedules the server graphics processor 307 to perform inference prediction operations based on the inference strategy, and the server graphics processor 307 outputs the binary classification judgment result.

[0055] Finally, the server network interface module 308 sends the target compilation and optimization sequence locked based on the inference prediction operation back to the client network interface module 304. After receiving the target compilation and optimization sequence, the client processor 302 executes the backend compilation and final program execution operations locally. Through the above operations, the system completes the physical collaborative closed loop from feature extraction to the distribution and execution of the optimization sequence without having to perform real compilation evaluation on each candidate sequence during the online inference / deployment phase.

[0056] Preferably, the processor is configured to perform the following operations S100~S500, such as... Figure 1 As shown.

[0057] S100: The processor obtains the static structural feature vector 101 of the target program.

[0058] Preferably, the processor performs front-end compilation on the target program to generate serialization intermediate instructions.

[0059] The user first inputs the target program, i.e., the source code, to be optimized through the user interface module 303 of the client 301. After receiving the target program, the client processor 302 calls the corresponding compiler frontend in the local computing environment to perform frontend compilation processing.

[0060] In practice, the front-end compilation process includes: the client processor 302 sequentially performs lexical analysis, syntax analysis, and semantic analysis on the source code, eliminating high-level language syntactic differences while converting it into hardware architecture-independent serialized intermediate instructions. For example, this conversion process can specifically manifest as generating a corresponding LLVM intermediate representation (IR) file. Depending on the specific compilation configuration, the generated LLVM IR file can be in text or binary format, corresponding to intermediate files with the ".ll" or ".bc" suffixes, respectively, and is persistently or cached in the local storage of the running client 301.

[0061] The client processor 302 performs static feature scanning on the serialized intermediate instructions and calculates the normalized count values ​​of each type of instruction to extract and generate a static structural feature vector 101.

[0062] Preferably, the serialization intermediate instructions can be in text format or binary format, respectively generating files with the suffix ".ll" or ".bc", and are persisted or cached in the client memory of the running client 301.

[0063] Subsequently, the client processor 302 retrieves the serialized intermediate instruction file (.ll or .bc) from memory and performs static feature scanning, such as Autophase feature extraction. During the scanning process, the processor comprehensively analyzes the distribution of various types of instructions in the serialized intermediate instructions, such as memory access instructions, arithmetic operation instructions, and branch jump instructions, and calculates the normalized count value of each type of instruction in the entire program, thereby extracting and generating a set of static structural feature vectors 101 with fixed dimensions.

[0064] Through the above examples of transformation operations from high-level source code to multi-format LLVM IR files, and then to fixed-dimensional Autophase features, the system not only fully preserves the control flow and data flow logic of the target program, but also accurately maps it to a standardized numerical base that is easy for large language models to process, providing data support for subsequent text serialization and model inference.

[0065] In one specific implementation, the physical execution logic and data flow process of the feature extraction mechanism of the target program are described in detail below.

[0066] Preferably, the static structural feature vector 101 contains feature values ​​of approximately 50 to 70 dimensions, each dimension corresponding to a specific static statistic, such as the number of basic blocks, the number of functions, the proportion of arithmetic instructions, the number of memory access instructions, the number of branch instructions, and the distribution ratio of different types of operation instructions. Preferably, all of the above features are obtained by the client processor 302 through static scanning of serialized intermediate instructions. This process essentially falls under the category of static code analysis, does not depend on the final execution result of the program, and does not necessarily involve dynamic instrumentation or the actual execution process, thus ensuring lightweight feature extraction.

[0067] During feature extraction, the client processor 302 compiles the target program code into serialized intermediate instructions via front-end compilation. Then, the client processor 302 performs feature scanning, counting and merging, and feature vector generation operations on these serialized intermediate instructions. Specifically, the program to be analyzed is divided into several basic blocks. The client processor 302 follows a predefined set of fixed instruction categories. The instructions are then categorized. This set of instruction categories contains... Abstract instruction types, each class This represents an abstract instruction type, such as arithmetic operation instructions, memory access instructions, control flow instructions, or function call instructions. Preferably, The preferred value is 56.

[0068] In the scanning and statistics phase, for each basic block The client processor 302 counts the number of times it contains internal data. The base number of class instructions, denoted as In specific implementation scenarios, such as when combined with compiler instrumentation or runtime feature evaluation, the client processor 302 can synchronously acquire or estimate the number of times the basic block will be executed during program execution, denoted as... .

[0069] Based on the above statistical information, the client processor 302 calculates the program in the [number]th [year]. The weighted count for a class of instructions is the product of the base number of instructions and the number of times they have been executed. The formula for calculating the weighted count is: .

[0070] Furthermore, the client processor 302 summarizes the total number of instructions in the program. The formula for calculating the total number of instructions is: .

[0071] To reduce the interference of different program code sizes on feature representation, the client processor 302 performs normalization processing on the count values ​​of various types of instructions, that is, divides the count value of a single type of instruction by the total number of instructions, thereby obtaining the first... The normalized eigenvalues ​​of the dimensional feature are: .

[0072] The feature values ​​of each dimension calculated by the client processor 302 are arranged and combined sequentially to form the complete static structure feature vector 101. The static structure feature vector 101 is represented as: .

[0073] Preferably or alternatively, assuming the instruction category set contains only three types: arithmetic instructions, memory access instructions, and branch instructions, the values ​​in the static structural feature vector 101 generated by the above process represent the distribution proportion of these three types of instructions during program execution. Through this normalization mechanism, the client processor 302 can accurately characterize the overall behavioral features of the program in a fixed-dimensional manner, independent of the absolute number of lines of code. This static structural feature vector 101 is then converted by the client processor 302 into a fixed-precision feature string 102, which serves as a stable input for subsequent natural language inference in the large language model.

[0074] Through the above implementation methods, the present invention can efficiently obtain the structured feature representation of the target program on the running client 301 side. Compared with the feature extraction methods based on program dependency graph (PDG) or heterogeneous graph modeling in the prior art, the static structural feature extraction process of the present invention does not require the construction of a complex program graph structure in the memory of the running client 301, nor does it require the processor to perform high-overhead tensor computation operations such as graph convolutional networks (GCN), thereby significantly reducing the computational cost and engineering implementation complexity in the feature construction process. Regardless of the size and code complexity of the target program, the client processor 302 can obtain a fixed-dimensional program structure representation through the above unified process, providing highly consistent data support for the subsequent inference and determination of the target compilation optimization sequence by the server graphics processor 307 of the large model server.

[0075] S200: The processor converts the static structural feature vector 101 into a fixed-precision feature string 102, and converts the compilation-optimized combination of at least two candidates in the preset candidate sequence pool into a sequence identifier string 105.

[0076] Preferably, the processor truncates each floating-point feature value in the static structural feature vector 101 according to a preset decimal precision and inserts specific characters to concatenate and generate a fixed-precision feature string 102. The processor linearly arranges the candidate optimization actions in the candidate compilation optimization combination according to the execution order and inserts delimiter characters to concatenate and generate a sequence identifier string 105.

[0077] Specifically, regarding the text serialization mechanism for input data of large language models, the server processor 306 is configured to perform cross-data type format conversion operations in physical memory. Since large language models mainly rely on discrete text word streams as input carriers, this invention transforms continuous numerical features and discrete temporal optimization actions into standardized machine-readable text through specific serialization logic.

[0078] Specifically, to achieve the optimal balance between feature representation accuracy and the total lexical consumption during model inference, the server processor 306 first retrieves the static structural feature vector 101 generated by the previous extraction and performs fixed-point numerical serialization processing on the numerical features in the static structural feature vector 101. Preferably or alternatively, the fixed-point numerical serialization processing can be manifested as floating-point number truncation and delimitation serialization (e.g., uniformly retaining eight decimal places and inserting delimiters for concatenation), or scientific notation normalization serialization (e.g., uniformly converting the feature values ​​into scientific notation strings with fixed significant digits and concatenating them), thereby generating a fixed-precision feature string 102.

[0079] For example, the server processor 306 truncates each floating-point feature value in the static structural feature vector 101 according to a preset decimal precision, preferably retaining eight decimal places. Subsequently, the server processor 306 reads the truncated floating-point values ​​sequentially in the memory buffer area and inserts specific characters, such as using a comma "," as a delimiter for linear concatenation, thereby generating a fixed-precision feature string 102 used to characterize the target program.

[0080] Simultaneously, for the temporal representation of the compilation optimization strategy, the server processor 306 extracts candidate compilation optimization combinations as comparison objects from a preset candidate sequence pool. In order to preserve the temporal impact of optimization actions on the intermediate representation of the program, the server processor 306 extracts the execution control flow within the candidate compilation optimization combinations. Based on the execution control flow, the server processor 306 performs ordered serialization encoding of multiple candidate optimization actions.

[0081] Preferably or alternatively, the server processor 306 parses the candidate compilation optimization combinations and arranges the multiple candidate optimization actions contained therein in a linear order of execution.

[0082] Preferably, each candidate optimization action is pre-mapped to a corresponding integer code, that is, represented as a list of integers in their order. The server processor 306 extracts the above integer codes sequentially in the execution order, and inserts separator characters such as single-byte spaces or commas between adjacent integer codes for serialization concatenation, thereby generating a sequence identifier string 105 that can reflect the timing logic of the compilation actions.

[0083] Through the text mapping logic executed by the server processor 306, this invention unifies the floating-point program space features and the optimized action sequence of integer list type into a text identifier string that can be natively parsed by a large language model. This alleviates the interference of data format heterogeneity on natural language reasoning tasks and provides reliable data support for the subsequent construction of structured prompt words.

[0084] By combining graph theory construction with large language model reasoning, the present invention achieves a logical extension from local binary classification to global sequence sorting without increasing the structural complexity and parameter scale of the large language model. This enables the system to stably process candidate sequence pools of arbitrary size and significantly reduces the computational and time overhead required by traditional real compilation or search methods.

[0085] S300: The processor embeds the fixed-precision feature string 102 and the sequence identifier string 105 into the role prompt template 106 to construct the input text of the large language model.

[0086] Preferably, the server processor 306 writes the text setting the compilation optimization comparison task and natural language inference constraints into the system prompt word 107 of the role prompt template 106. The server processor 306 writes the fixed-precision feature string 102 and at least two candidate sequence identifier strings 105 into the user prompt word 108 of the role prompt template 106. The server processor 306 writes the indication tag limiting the large language model to output only binary classification judgment results into the assistant reply 109 of the role prompt template 106, and concatenates the above-mentioned hierarchical combination into the input text.

[0087] Preferably, for the structured encapsulation of large language model input data, the server processor 306 is configured to construct a multi-level isolated role-based structured context within the role prompt template 106. Preferably, the role prompt template 106 adopts a ChatML or equivalent conversational text format, dividing the context into isolated blocks to respectively carry different role semantics such as system constraints, user input, and model responses. This ensures that the arrangement of various elements such as features, sequences, and labels in the model input remains consistent, preventing instruction confusion in the model.

[0088] Specifically, when performing the data flow operation of concatenating and generating input text, the server processor 306 first writes the text that sets the compilation optimization comparison task and natural language inference constraints into the system prompt words 107 belonging to the system role in the role prompt template 106. Through this operation, the server processor 306 sets the model identity and task objectives, providing a basic benchmark and boundary constraints for subsequent inference evaluation.

[0089] Subsequently, the server processor 306 retrieves the fixed-precision feature string 102 and at least two candidate sequence identifier strings 105 generated in the preceding operation, and writes the above data together into the user prompt word 108 belonging to the user role in the role prompt template 106. Preferably, the user prompt word 108 not only contains the serialized feature text and the two candidate sequence identifier strings 105, but the server processor 306 also proposes a task comparison request to judge the merits of the two sequences in natural language at this level.

[0090] Furthermore, the server processor 306 writes an indicator tag that restricts the large language model to output only binary classification results into the assistant response 109 belonging to the assistant role in the role prompt template 106. Preferably, the indicator tag corresponds to the target sequence of the real performance label, for example, restricting the output format to Sequence 0 or Sequence 1 in binary classification form. Finally, the server processor 306 combines and concatenates the above-filled system prompt word 107, user prompt word 108, and assistant response 109 according to a predetermined dialogue structure to generate input text that is natively readable by the large language model.

[0091] Through the standardized prompt word construction process executed by the server processor 306, this embodiment transforms unstructured program features and sequences into standardized model inputs, which can effectively improve the consistency and stability of the model during the training and inference stages, thereby reducing the fluctuation of prediction performance caused by random perturbations in natural language expression.

[0092] like Figure 3 As shown, this invention provides a data flow and construction structure for a fixed-precision feature string 102, a sequence identifier string 105, and a role prompt template 106. First, the client processor 302 performs front-end compilation processing and static feature scanning on the target program, thereby extracting and generating a static structural feature vector 101 with fixed dimensions. Subsequently, the server processor 306 truncates the floating-point feature values ​​in the static structural feature vector 101 under a preset decimal precision constraint and inserts specific characters for concatenation, thereby generating the fixed-precision feature string 102. For example... Figure 3 As shown, an example of text content carried by the fixed-precision feature string 102 includes "0.18324591, 0.00481233, 0.09744128, 0.25183942". Simultaneously, the server processor 306 extracts the first compilation optimization combination 103 and the second compilation optimization combination 104 as comparison objects. Candidate optimization actions in the first compilation optimization combination 103 and the second compilation optimization combination 104 are linearly arranged in execution order and concatenated by inserting delimiters, thereby generating two sequence identifier strings 105. For example... Figure 3As shown, the examples of text content carried by the sequence identifier string 105 are [12, 7, 3, 18, 5, 21, 9, 4, 16, 2] corresponding to the first compilation optimization combination 103 and [6, 14, 2, 9, 17, 1, 11, 5, 20, 8] corresponding to the second compilation optimization combination 104, so as to achieve discrete text alignment of feature dimensions.

[0093] After completing the text serialization mapping, the server processor 306 embeds the fixed-precision feature string 102 and the sequence identifier string 105 into the role prompt template 106 to construct the input text for the large language model. Specifically, the structured concatenation operation is as follows: the role prompt template 106 includes a system prompt word 107, a user prompt word 108, and an assistant response 109. The text setting the compilation optimization comparison task and natural language inference constraints is written into the system prompt word 107; the fixed-precision feature string 102 and at least two candidate sequence identifier strings 105 are jointly written into the user prompt word 108; and an indicator that limits the large language model to only output relative superiority / inferiority judgment results is written into the assistant response 109. This hierarchical combination is then concatenated into the input text to integrate the heterogeneous program structure and sequence action features into a natural language inference benchmark natively supported by the large language model.

[0094] Preferably, before the processor performs inference operations, a step is included to fine-tune the large language model to adapt it to the compilation optimization task, as detailed below.

[0095] To address the construction mechanism of training data during the fine-tuning phase of the large language model, the server processor 306 is configured to perform data cleaning and splicing operations based on a double sampling strategy to generate contrast sample pairs for the large language model to learn.

[0096] The data construction process is jointly run by the client processor 301 and the large model server 305. The client processor 302 acquires the target program to be processed, calls the compiler frontend to perform frontend compilation processing on the target program, and generates corresponding serialized intermediate instructions. Subsequently, the client processor 302 performs static feature scanning on the serialized intermediate instructions, extracting static structural feature vectors 101 that characterize program attributes. Simultaneously, the client processor 302 locally generates candidate compilation optimization combinations corresponding to the target program, and calls the compiler to perform compilation and runtime tests to obtain the performance index, preferably the total number of instructions in the optimized serialized intermediate instructions. The client processor 302 sends the target program identifier, static structural feature vector 101, candidate compilation optimization combinations, and their performance indexes to the large model server 305 via the network, where the server processor 306 manages them in local memory. For example, the server processor 306 divides a set containing 14 program categories into 10 subsets for constructing a training set and the remaining 4 subsets for constructing a validation set to evaluate the generalization performance of the large language model on unseen target programs.

[0097] like Figure 2 As shown, in the specific computational process of constructing the comparison sample pairs, the server processor 306 adopts a double sampling strategy based on the core candidate set. First, for a given target program... The server processor 306 initializes a candidate sequence set in memory, consisting of the core candidate set, denoted as... The server processor 306 extracts the performance metrics of each sequence in the core candidate set, that is, extracts the target program. In the candidate sequence set Each candidate sequence The performance index under the action is denoted as Examples include the number of intermediate serialization instructions, execution time, or combinations thereof. The server processor 306 selects a dual-sampling strategy.

[0098] When the dual sampling strategy is selected as the optimal pair of random sampling, the server processor traverses the candidate sequence set in 306 steps. Perform numerical comparisons to extract the candidate sequence that minimizes the performance metric, denoted as the anchor sequence. The objective function for filtering the anchor sequence in server processor 306 is expressed as: .

[0099] When performing the first type of data construction operation, namely the optimal pair random sampling strategy, the server processor 306 uses the calculated anchor sequence Using this as a baseline, random number generation logic is invoked to generate candidate sequences from the remaining candidate sequence set after removing the anchor sequence. Randomly select a candidate sequence Subsequently, server processor 306 will set the anchor sequence. With randomly selected candidate sequences Data alignment and stitching are performed to construct a first-class contrast sample pair within the buffer area. Due to the anchor sequence To determine the optimal performance solution within this set, the server processor 306 sets the supervision label of the first type of comparison sample pair as... This indicates that the anchor sequence outperforms the randomly selected sequence, thus providing classification labels for large language models.

[0100] Preferably or alternatively, when performing the second type of data construction operation, i.e., the tournament sampling strategy, the server processor 306 selects from the candidate sequence set Two candidate sequences are randomly selected from the middle. and And compare the actual performance indicators of the two. and The size relationship.

[0101] When server processor 306 determines that the following conditions are met: At that time, server processor 306 constructs a second type of comparison sample pair. and set the supervision label to to indicate the sequence Superior to sequence Conversely, if the above conditions are not met, the comparison sample pairs are constructed by reversing the order. and set the supervision label to Through this mechanism, the system can effectively construct data pairs that reflect the relative advantages and disadvantages of different compilation optimization combinations.

[0102] After performing the above sampling operations, the server processor 306 merges the two types of comparison sample pairs. To filter out samples with no discriminative power, the server processor 306 sets a difference threshold filtering mechanism in memory to remove comparison sample pairs with performance differences less than a preset threshold and to remove duplicates. Specifically, when two candidate sequences target the same program... The performance differences satisfy the absolute value inequality: .

[0103] In the above formula, This is a preset performance difference threshold. For example, when the difference in the total number of corresponding optimized serialized intermediate instructions is less than 1, the server processor 306 determines that the comparison sample pair lacks discriminative power and removes it from the data queue. Furthermore, for the generated comparison sample pairs, the server processor 306 uses an unordered set representation, for example... This serves as a globally unique identifier for the sample, enabling deduplication operations to be performed to avoid duplicate data interfering with subsequent gradient updates.

[0104] After completing the above sampling, filtering and deduplication process, the server processor 306 outputs the final set of comparison sample pairs and transmits them to the storage space of the server graphics processor 307 via the internal data channel to drive subsequent fine-tuning operations for the large language model.

[0105] Preferably, to achieve efficient training and task adaptation of a large language model with a preset parameter scale, such as 7B, under limited video memory conditions, the fine-tuning process of the large language model is configured to be executed on the server graphics processor 307 of the large model server 305. During the hardware-coordinated execution process, the server processor 306 is responsible for training task scheduling, data preparation, and parameter configuration management.

[0106] Specifically, the server processor 306 transmits the pre-constructed training samples and model configuration data to the storage space of the server graphics processor 307 via the device's internal high-speed interconnect channel. Subsequently, the server graphics processor 307 invokes its internal computing unit to sequentially execute and complete the forward propagation calculation of the large language model, the backpropagation of the error gradient, and the update operations of specific network parameters based on the received training samples and model configuration data.

[0107] To achieve efficient adaptation of the large language model to compilation optimization tasks under limited computing power, the large language model is configured with at least one low-rank adaptive module 202 (i.e., LoRA module). The low-rank adaptive module 202 is preferably placed in the attention layer and the linear mapping layer within the feedforward network of the large language model to fully capture the deep features required for compilation optimization tasks. During fine-tuning and inference of the large language model, the original pre-trained weight matrix 201 remains in a parameter-frozen state, i.e., it does not participate in gradient calculation and parameter updates during backpropagation, thereby maintaining the basic language representation capabilities of the large model.

[0108] During the forward propagation process of inferring the binary classification result based on the input text, the low-rank adaptive module 202 obtains the hidden feature vectors of the input text within the large language model. The low-rank adaptive module 202 inputs the hidden feature vectors into the pre-trained weight matrix 201 (which is in a parameter-frozen state) within the large language model, and into the low-rank adaptive module 202 connected in parallel with the pre-trained weight matrix 201. Low-rank mapping is performed on the hidden feature vectors using the dimension reduction matrix 203 and the dimension increase matrix 204 within the low-rank adaptive module 202. The output of the low-rank mapping is then aggregated with the output of the pre-trained weight matrix 201, and the binary classification result is inferred based on the aggregated result.

[0109] During the forward propagation operation where the server graphics processor 307 runs the large language model and infers the binary classification result based on the input text, the server graphics processor 307 acquires in real time the hidden layer feature vector generated by the corresponding network layer within the large language model from the input text, denoted as the input vector. Subsequently, the server graphics processor 307 will input the vector. Along parallel computational branches, the inputs are respectively fed into the pre-trained weight matrix 201 connected in parallel, denoted as the original parameter matrix. And in the low-rank adaptive module 202. and These represent the dimensional spaces of the input and output features, respectively.

[0110] Furthermore, the low-rank adaptive module 202 internally contains two concatenated trainable low-rank matrices, namely the dimension-reduced matrix 203 denoted as low-rank matrix A and the dimension-increasing matrix 204 denoted as low-rank matrix B. The original feature input and output dimensions of this network layer are set as follows: and ,in , And the rank constraint satisfies The server graphics processor 307 will input vectors Matrix multiplication is performed sequentially with the reduced-dimensional matrix 203 and the increased-dimensional matrix 204 to achieve low-rank mapping. The equivalent aggregated weight matrix of this network layer is expressed by the following mathematical formula: .

[0111] In the above formula, It is the equivalent aggregate weight matrix of this linear transformation layer. It is the rank of the low-rank decomposition. It is a scaling factor used to adjust the influence of the low-rank update term, which is the product of low-rank matrices A and B, on the original weights.

[0112] Preferably, the server processor 306 sets and fixes the rank parameter to [value]. Set the scaling factor to .

[0113] Preferably, the server processor 306 inserts the low-rank adaptive module 202 into the linear layers in the large language model that are highly relevant to sequence modeling capabilities. Specifically, this includes: query projection layer, key projection layer, value projection layer, and output projection layer in the attention mechanism, as well as linear transformation layers such as gated projection layer, up projection layer, and down projection layer in the feedforward network. For each target linear layer in the aforementioned large language model, the server processor 306 employs the following... Figure 4 The method shown injects the corresponding LoRA parameters in parallel.

[0114] like Figure 4 As shown, it fully records the data processing flow of a single-layer network in the forward propagation. In this linear layer, the input hidden layer feature vector is used as the input vector and is processed and passed in two paths. The input vector is directly input to the pre-trained weight matrix 201, which is in a frozen state; at the same time, the input vector is input to the parallel low-rank adaptive module 202, and is successively processed by the dimension reduction matrix 203 and the dimension increase matrix 204. Subsequently, the output of the dimension increase matrix 204, after being adjusted by the scaling factor α, is combined with the output of the pre-trained weight matrix 201 to perform aggregation processing, and finally outputs the aggregated result to participate in subsequent inference decisions.

[0115] Preferably, when performing forward and backward propagation, the server graphics processor 307 freezes the original weight matrix. No gradients are calculated, and no weights are updated. Furthermore, to avoid contextual rephrasing irrelevant to the model learning, the server graphics processor 307 introduces a loss ignoring mechanism in error calculation: the system sets the states of all input tokens contained in the system prompt word 107 and user prompt word 108 in the role prompt template 106 to be ignored, and only calculates the cross-entropy loss for the target tokens corresponding to the real labels in the assistant's reply 109. Finally, the server graphics processor 307 calculates the gradients and updates the parameters of the trainable low-rank adaptive module 202 (i.e., low-rank matrix A and low-rank matrix B) based solely on the calculated cross-entropy loss. This ensures that the large language model training process focuses only on the generation logic of sequence quality judgment results, avoiding contextual rephrasing irrelevant to the large language model, thereby improving training efficiency and task focus.

[0116] Preferably, to further improve computational efficiency and system training stability during model fine-tuning, the large model server 305 is configured on the server graphics processor 307 to execute a distributed data parallel training strategy.

[0117] Server processor 306 runs the main process, responsible for format preprocessing and cache management of training data. Simultaneously, other fine-tuning training processes participating in the computation directly load the training data through a memory mapping mechanism. Through this inter-process memory access configuration, the large model server 305 can effectively reduce resource conflicts caused by disk I / O contention.

[0118] Furthermore, during the forward and backward propagation computations of the large language model, the server graphics processor 307 employs BF16 (Brain Floating Point 16) numerical precision for data computation and parameter storage, and incorporates gradient accumulation and gradient clipping mechanisms during the computation. Through the aforementioned numerical precision configuration and gradient constraint operations, the server graphics processor 307 can stably complete the fine-tuning training of a 7B-level large language model under limited hardware memory conditions, thereby ensuring numerical stability during gradient updates and the reliability of model convergence.

[0119] S400: The processor inputs the input text into the large language model, and the large language model outputs a binary classification result representing the performance difference between candidate compilation optimization combinations.

[0120] Specifically, during the inference phase, the server processor 306 inputs the constructed role prompt template 106 into the fine-tuned large language model. Without needing to call a compiler to perform real code compilation and evaluation on each candidate sequence, the large language model analyzes the deep correlation features between the program structure and candidate sequences in the input text using only a single forward propagation computation. Subsequently, based on the constraints of the system prompt word 107, the large language model directly generates specific discriminant units (e.g., Sequence 0 or Sequence 1) at the output, thereby outputting a binary classification judgment result representing the relative performance of the two candidate sequences with low computational latency, completing the natural language inference operation with zero runtime.

[0121] S500: Based on the binary classification result, the processor determines the target compilation optimization sequence for the target program, and then outputs the target compilation optimization sequence mapped by the final retained sequence identifier string.

[0122] Preferably, when the number of candidate compilation optimization combinations is greater than two, a multi-round elimination comparison inference operation is performed. In each round of inference, a pair of candidate sequence identifier strings 105 are extracted and input into the large language model. Based on the binary classification judgment result output by the large language model, the sequence identifier string 105 indicated as the winner in the pair of candidate sequence identifier strings 105 is retained, and the other sequence identifier string 105 in the pair of candidate sequence identifier strings 105 is eliminated.

[0123] Preferably, during the multi-round elimination comparison and inference operation, the processor adds the directed edges generated by each comparison from the retained sequence identifier string 105 to the eliminated sequence identifier string 105 to the graph set to construct a directed acyclic graph that reflects the win-loss relationship; and the compilation optimization combination of the final retained sequence identifier string 105 output after the multi-round elimination comparison and inference operation is used as the target compilation optimization sequence.

[0124] Preferably or alternatively, the server processor 306 first initializes a dynamic candidate set in memory. Assume that, in the initial state, the candidate set consisting of the sequence identifier string 105 corresponding to all candidate compilation optimization combinations after text conversion is: In each round of inference, server processor 306 selects from the current candidate set. Extract a pair of candidate sequence identifier strings from the given data, for example, denoted as 105. The server graphics processor 307 is then scheduled to run the fine-tuned large language model to perform a binary classification judgment process. Based on the binary classification judgment results output by the large language model, the server processor 306 determines whether to perform a multi-round elimination comparison inference operation: if yes (see...) Figure 1 That is, the large language model determines the first sequence identifier string. Better than the second sequence identifier string Then in the candidate set The sequence identifier string 105, which is indicated as the winning sequence identifier string, is retained in the middle. And another sequence identifier string 105, i.e., the second sequence identifier string From the candidate set Remove from the middle; if not (see Figure 1 That is, after multiple rounds of elimination, the second sequence identifier string is retained. And remove the first sequence identifier string. That is, the final retained sequence identifier string 105 is mapped to the compilation optimization combination as the target compilation optimization sequence.

[0125] Server processor 306 repeats the pairwise comparison and elimination process described above until a candidate set is reached. Only one sequence identifier string, 105, remains in the final set. Under the elimination comparison strategy, each comparison removes one from the candidate set. By removing one sequence from the pool, the system only needs to perform n-1 comparison and inference operations to lock in the globally optimal result for an initial candidate set containing n sequences.

[0126] During the execution of the above-mentioned multi-round elimination comparison and inference operations, the server processor 306 synchronously constructs an elimination relationship graph between sequences in memory. The server processor 306 adds the directed edge generated from each comparison—from the retained sequence identifier string 105 (the winner) to the eliminated sequence identifier string 105 (the loser)—to the edge set of the graph. In the elimination comparison, any sequence that becomes a loser is removed from the candidate set. The eliminated player is removed from subsequent comparisons, so directed edges are generated only in the direction of "current round winner → eliminated loser". This logical mechanism ensures that the graph does not form directed cycles during evolution, thus forming a directed acyclic graph (DAG).

[0127] Ultimately, the server processor 306 determines the optimal compilation optimization sequence by mapping the last remaining sequence identifier string 105 after multiple rounds of elimination comparison and inference operations. This optimized sequence is then executed by the compiler. The constructed directed acyclic graph not only records the comparison process but also supports backtracking interpretation of the final selection result.

[0128] like Figure 7 As shown, this invention provides a compiler optimization sequence selection device based on a large language model. The compiler optimization sequence selection device is logically divided into an optimization sequence decision module 401 and a program compilation optimization module 407.

[0129] The program compilation optimization module 407 is deployed in the running client 301. The program compilation optimization module 407 includes a front-end compilation module 408, a feature extraction module 409, and a compilation execution module 410. The front-end compilation module 408 and the feature extraction module 409 are executed by the client processor 302, used to perform front-end compilation to generate serialized intermediate instructions for the target program, and extract and generate a static structural feature vector 101. The compilation execution module 410 is executed by the client processor 302, used to receive the target compilation optimization sequence, and perform back-end compilation and program execution operations. Specifically, as shown... Figure 7 As shown, the target program is input to the front-end compilation module 408 for front-end compilation processing, generating serialization intermediate instructions. The feature extraction module 409 performs static feature scanning on the serialization intermediate instructions, extracts and generates a static structural feature vector 101 by calculating the normalized count value of each type of instruction, and transmits the static structural feature vector 101 to the optimized sequence decision module 401.

[0130] The optimized sequence decision module 401 is deployed in the large model server 305. The optimized sequence decision module 401 includes a data construction module 402, a text serialization module 403, a prompt word construction module 404, a model fine-tuning module 405, and an inference prediction module 406. The data construction module 402, text serialization module 403, and prompt word construction module 404 are executed by the server processor 306, used to construct comparison sample pairs, convert the static structural feature vector 101 into a fixed-precision feature string 102, and construct the input text for the large language model. The model fine-tuning module 405 and the inference prediction module 406 are loaded and executed by the server graphics processor 307 using the large language model, used to update the parameters of the parallel low-rank adaptive module 202 within the large language model, and to infer the binary classification result.

[0131] Specifically, in the data format alignment stage, the text serialization module 403 truncates the numerical features according to a preset decimal precision and inserts delimiters; in the prompt word assembly stage, the prompt word construction module 404 performs structured division of the context text through a role isolation mechanism; in the inference evaluation stage, the model fine-tuning module 405 and the inference prediction module 406 collaboratively call the large language model to perform a single forward propagation operation. By optimizing the multi-module collaborative architecture of the sequence decision module 401, the fixed-precision feature string 102 and the sequence identifier string 105 are respectively embedded in the specified levels of the role prompt template 106, so that the feature data is aligned with the attention mechanism of the large language model, effectively solving the technical problems that high-dimensional numerical features are difficult to be directly processed by the large language model, and the unreliable output results when the large language model directly generates a complete optimized sequence.

[0132] To ensure the consistency of offline training data and accelerate the convergence of the loss function in the model fine-tuning module 405, the server processor 306 inside the large model server 305 executes a closed-loop construction process for the training data. When executing the optimal pair random sampling strategy, the server processor 306 extracts the candidate sequence with the best performance index as the anchor point, and combines the first compilation optimization combination 103 corresponding to the anchor point sequence with the randomly selected second compilation optimization combination 104; when executing the tournament sampling strategy, the server processor 306 combines the sequence with better performance with the sequence with poorer performance. For the generated comparison sample pairs, the data construction module 402 uniformly assigns a positive supervision label (e.g., y=1) to indicate that the execution efficiency of the first sequence is better than that of the second sequence, thereby eliminating logical conflicts in the fine-tuning data caused by different sampling strategies. The static structural feature vector 101 output by the feature extraction module 409 is processed by the data construction module 402 and synchronously transmitted to the text serialization module 403 for numerical conversion with the labeled comparison sample pair. It is then input to the prompt word construction module 404, thereby establishing a training data link that directly reaches the model fine-tuning module 405.

[0133] Regarding the specific method by which the prompt word construction module 404 assembles the input text, the role prompt template 106 is divided into isolated text regions such as system prompt words 107, user prompt words 108, and assistant replies 109. Fixed-precision feature strings 102 containing the static structural features of the target program, along with at least two sequence identifier strings 105 corresponding to the first compilation optimization combination 103 and the second compilation optimization combination 104, are written side-by-side into the text region containing the user prompt word 108. The text region containing the assistant reply 109 is initially empty and is dedicated to receiving the binary classification result indication markers output by the large language model during the inference and prediction phase. This multi-level isolated role structured context avoids instruction confusion when the large language model processes comparison tasks by isolating data content and expected output formats within designated regions.

[0134] In the optimization process for the candidate sequence pool, the inference and prediction module 406 performs sequence retention and elimination operations based on the binary classification results output by the large language model, and simultaneously constructs a directed acyclic graph (DAG) reflecting the elimination comparison process in memory. When the number of remaining valid sequences in the candidate sequence pool is greater than two, the inference and prediction module 406 schedules the large language model to perform pairwise cyclic comparison inferences. After each round of comparisons, the inference and prediction module 406 adds directed edges from the retained sequences to the eliminated sequences in the DAG. The above retention and elimination logic is triggered based on the binary classification results output by the large language model, and continuously updates the candidate sequence pool by cyclically executing the operations of retaining the winning sequence and eliminating the failed sequence. When only one valid sequence remains in the candidate sequence pool, the loop is interrupted, and the inference and prediction module 406 outputs the sequence identifier string 105 that is finally retained after multiple rounds of elimination comparison inference operations as the target compiled and optimized sequence. The directed acyclic graph, as a data structure for recording multi-round elimination relationships, is stored in the large model server 305 for subsequent decision backtracking analysis, thereby avoiding redundant traversal calculations of the huge sequence space by the compiler during the optimization phase.

[0135] like Figure 7 As shown, the text serialization module 403 receives the static structure feature vector 101 from the feature extraction module 409, truncates the static structure feature vector 101 into a fixed-precision feature string 102, and simultaneously converts the candidate compilation optimization combination into a sequence identifier string 105 according to the execution order. The prompt word construction module 404 embeds the fixed-precision feature string 102 and the sequence identifier string 105 into the system prompt word 107, user prompt word 108, and assistant reply 109 of the role prompt template 106 to construct the input text. In the model fine-tuning stage, the data construction module 402 obtains the performance indicators fed back by the compilation execution module 410 and constructs comparison sample pairs. After being serialized by the text serialization module 403 and formatted and assembled by the prompt word construction module 404, the comparison sample pairs are input to the model fine-tuning module 405 to drive the model fine-tuning module 405 to update the parameters of the parallel low-rank adaptive module 202 within the large language model. During the reasoning and decision-making phase, the reasoning and prediction module 406 inputs the input text into the large language model and outputs the relative superiority and inferiority judgment results representing the performance differences of the candidate sequences. When faced with multiple candidate sequences, the reasoning and prediction module 406 performs elimination comparison inference to construct an elimination relationship graph, determines the target compilation optimization sequence, and sends the target compilation optimization sequence to the compilation execution module 410 to perform code optimization operations.

[0136] like Figure 5As shown, this illustrates the specific logical flow of sequence filtering performed by the inference prediction module 406. First, the inference prediction module 406 extracts a pair of candidate sequence identifier strings 105 from the candidate sequence pool and receives them as input as the first and second sequence identifier strings, respectively. Then, the inference prediction module 406 performs an elimination comparison inference operation and outputs a binary classification result. Based on this binary classification result, the inference prediction module 406 executes a multi-round elimination mechanism: on the one hand, it retains the winning sequence identifier string 105 and eliminates the other sequence identifier string 105; on the other hand, it constructs a directed acyclic graph reflecting the win-loss relationship to record the elimination process. After comparison and filtering, the inference prediction module 406 extracts the final retained sequence identifier string 105 from the directed acyclic graph and outputs the target compiled optimized sequence.

[0137] Example 2 This embodiment provides the physical hardware implementation of the system; repeated content will not be described again.

[0138] Preferably, the client 301 is a local computer. The client processor 302 includes a CPU, application-specific integrated circuit (ASIC), system-on-a-chip (SoC), field-programmable gate array (FPGA), dedicated hardware accelerator, etc., in the local computer. The user interface module 303 is a physical peripheral component on the local computer, such as a keyboard, mouse, or universal serial bus (USB) interface, used to receive external input. The client network interface module 304 is the first network card in the local computer.

[0139] Preferably, the large-scale server 305 is a cloud server. The server processor 306 includes a cloud CPU, application-specific integrated circuit (ASIC), system-on-a-chip (SoC), field-programmable gate array (FPGA), and dedicated hardware accelerator, etc., in the cloud server. The server graphics processor 307 is a GPU in the cloud server. The server network interface module 308 is a second network interface card in the cloud server.

[0140] Physical peripheral components such as keyboards, mice, or Universal Serial Bus (USB) interfaces establish physical electrical connections with local application-specific integrated circuits (ASICs) via input / output (I / O) buses (such as the USB bus) and the southbridge / PCH chipset on the local computer motherboard. This allows externally input peripheral physical signals to be converted into electrical signals and transmitted to the local ASIC for processing.

[0141] The local application-specific integrated circuit (ASIC) is physically connected to the first network card through the internal high-speed data bus (e.g., PCIe bus) on the local computer motherboard, so that the local application-specific integrated circuit (ASIC) can send the extracted feature data to the first network card in the form of electrical signals.

[0142] The local computer's first network card and the cloud server's second network card establish a remote physical and logical connection through external communication infrastructure (such as Ethernet cables, optical fibers, and communication links such as physical routers / switches along the way) to achieve the transmission of cross-network data such as static structural feature vectors.

[0143] The second network card is physically connected to the application-specific integrated circuit (ASIC) in the cloud via an internal high-speed data bus (such as a PCIe bus) on the cloud server's motherboard. The characteristic vector electrical signals received from the network are transmitted via the internal high-speed data bus to the physical memory or registers where the ASIC resides in the cloud.

[0144] Application-specific integrated circuits (ASICs) in the cloud transmit data to the storage space of the GPU in the cloud via high-speed interconnect channels within the device. The physical connection between the ASICs and the GPUs in the cloud is typically established through a high-bandwidth PCIe bus.

[0145] After receiving external input, the physical peripheral component (such as a keyboard, mouse, or USB interface) sends the target program to the local application-specific integrated circuit (ASIC). Upon receiving the target program from the physical peripheral component, the local ASIC performs compilation processing on the target program locally to extract the static structural feature vector 101. Specifically, the local ASIC performs front-end compilation on the target program to generate serialized intermediate instructions; it then performs static feature scanning on the serialized intermediate instructions and calculates the normalized count values ​​of each type of instruction to extract and generate the static structural feature vector 101. After extraction, the local ASIC sends the static structural feature vector 101 to the first network interface card (NIC).

[0146] After receiving the static structural feature vector 101 from the local application-specific integrated circuit (ASIC), the first network interface card (NIC) sends the static structural feature vector 101 to the ASIC in the cloud via the network interface. During this cross-network transmission, the first NIC sends the static structural feature vector 101 to the second NIC, which receives the static structural feature vector 101 from the first NIC and then sends it to the ASIC in the cloud.

[0147] The cloud-based Application-Specific Integrated Circuit (ASIC) receives a static structural feature vector 101 from the second network interface card (NIC) and retrieves candidate compilation optimization combinations from the candidate sequence pool to construct the input text. Specifically, the cloud-based ASIC converts the static structural feature vector 101 into a fixed-precision feature string 102 and converts at least two candidate compilation optimization combinations from the preset candidate sequence pool into a sequence identifier string 105. During the conversion operation, the cloud-based ASIC performs fixed-point numerical serialization processing on the numerical features in the static structural feature vector 101 to generate a fixed-precision feature string 102 that conforms to the input specifications of the large language model's lexical units. The cloud-based ASIC extracts the execution control flow within the candidate compilation optimization combinations and, based on the execution control flow, performs ordered serialization encoding of multiple candidate optimization actions to generate the sequence identifier string 105.

[0148] Next, the cloud-based application-specific integrated circuit (ASIC) embeds the fixed-precision feature string 102 and the sequence identifier string 105 into the role prompt template 106 to construct the input text for the large language model. Specifically, the cloud-based ASIC constructs a multi-level isolated role structured context within the role prompt template 106; and writes the text setting the compilation optimization comparison task and natural language inference constraints into the system prompt words 107 of the role prompt template 106. The cloud-based ASIC writes the fixed-precision feature string 102 and at least two candidate sequence identifier strings 105 into the user prompt words 108 of the role prompt template 106; and writes the indication tag limiting the large language model to output only binary classification judgment results into the assistant response 109 of the role prompt template 106, and concatenates the above-mentioned hierarchical combination into the input text.

[0149] When the number of candidate compilation optimization combinations is greater than two, the cloud-based application-specific integrated circuit (ASIC) performs multiple rounds of elimination comparison inference operations. In each round of inference, a pair of candidate sequence identifier strings 105 are extracted to construct the input text. The cloud-based ASIC then sends the input text to the cloud-based GPU and calls the cloud-based GPU to load and run the large language model.

[0150] The GPU in the cloud receives input text from the cloud's application-specific integrated circuit (ASIC) and inputs the input text into the large language model. The pre-trained weight matrix 201, which is in a parameter-frozen state within the large language model, is stored as an electrical signal in the first storage area of ​​the high-bandwidth video memory inside the cloud GPU. The large language model is configured with a low-rank adaptive circuit, which serves as a low-rank adaptive module 202 within the cloud GPU. The data input and output terminals of this low-rank adaptive circuit are both connected to the on-chip bus of the cloud GPU, establishing a shared collaborative connection with the parallel tensor computation logic array (i.e., the model fine-tuning circuit and the inference prediction circuit) based on the on-chip bus and high-bandwidth video memory. The low-rank adaptive circuit and the parallel tensor computation logic array processing the pre-trained weight matrix 201 are connected in parallel along the data computation path. During the forward propagation process of inferring the binary classification result based on the input text, the computational operations performed by the inference prediction circuit in the cloud GPU are as follows: The hidden feature vectors of the input text within the large language model are obtained; these hidden feature vectors are input via the on-chip bus into the computational logic of the pre-trained weight matrix 201 (which is in a parameter-frozen state) in the large language model, and into the low-rank adaptive circuit connected in parallel with the pre-trained weight matrix 201 in the computational path; low-rank mapping processing is performed on the hidden feature vectors using the dimension reduction matrix 203 and the dimension increase matrix 204 within the low-rank adaptive circuit; the output of the low-rank mapping processing is aggregated with the output of the pre-trained weight matrix 201; and based on the aggregated result, a binary classification result representing the performance difference between candidate compiled optimized combinations is inferred and output. After inference, the cloud GPU sends the binary classification result to the cloud-based application-specific integrated circuit (ASIC).

[0151] The application-specific integrated circuit (ASIC) in the cloud receives the binary classification results from the GPU in the cloud. Based on the binary classification results, it retains the winning sequence identifier string from a pair of candidate sequence identifier strings 105 and eliminates the other sequence identifier string from the pair of candidate sequence identifier strings 105. During the multi-round elimination comparison and inference operation, the ASIC in the cloud performs the following operations: adding the directed edges generated by each comparison from the retained sequence identifier string to the eliminated sequence identifier string to the graph set to construct a directed acyclic graph reflecting the win-loss relationship; and using the compilation optimization combination mapped by the final retained sequence identifier string 105 after the multi-round elimination comparison and inference operation as the target compilation optimization sequence.

[0152] After determining the target compilation optimization sequence for the target program, the cloud-based Application-Specific Integrated Circuit (ASIC) sends the target compilation optimization sequence to the second network interface card (NIC). The second NIC receives the target compilation optimization sequence from the cloud-based ASIC and then sends it to the first NIC. The first NIC then receives the target compilation optimization sequence from the second NIC and sends it to the local ASIC. Finally, the local ASIC receives the target compilation optimization sequence from the first NIC.

[0153] Preferably, the local application-specific integrated circuit (ASIC) integrates not only the program compilation optimization circuit as the program compilation optimization module 407, but also peripheral control and communication logic circuits for ensuring the operation of the chip system and data interaction. The program compilation optimization circuit includes a front-end compilation circuit as the front-end compilation module 408, a feature extraction circuit as the feature extraction module 409, and a compilation execution circuit as the compilation execution module 410.

[0154] Preferably, the application-specific integrated circuit (ASIC) in the cloud integrates an optimization sequence decision-making circuit as the optimization sequence decision-making module 401, as well as peripheral control and communication logic circuits. This optimization sequence decision-making circuit comprises two parts: one part consists of a data construction circuit as the data construction module 402, a text serialization circuit as the text serialization module 403, and a prompt word construction circuit as the prompt word construction module 404; the other part consists of a model fine-tuning circuit as the model fine-tuning module 405 and an inference prediction circuit as the inference prediction module 406, formed based on the underlying computing power hardware configuration within the cloud GPU. Inside the cloud GPU, the model fine-tuning circuit and the inference prediction circuit physically share the same set of parallel tensor computation logic arrays (such as Tensor Cores) and high-bandwidth memory.

[0155] The local feature extraction circuit establishes a physical connection with the cloud-based text serialization circuit through an end-to-cloud network communication link constructed by the internal high-speed data bus, the first network interface card (NIC), and the second NIC. This connection is used to transmit the extracted static structural feature vectors to the text serialization circuit. The local compilation and execution circuit establishes a feedback connection with the cloud-based data construction circuit through the end-to-cloud network communication link. This connection is used to transmit the performance metrics from the execution feedback to the data construction circuit to construct comparison sample pairs.

[0156] Inside the application-specific integrated circuit (ASIC) in the cloud, the output of the data construction circuit is electrically connected to the text serialization circuit via an on-chip bus. This connection transmits the constructed comparison sample pairs to the text serialization circuit for serialization. The text serialization circuit is also electrically connected to the prompt word construction circuit via the on-chip bus, transmitting the truncated and converted fixed-precision feature string and sequence identifier string to the prompt word construction circuit. The prompt word construction circuit establishes a physical electrical connection only with the model fine-tuning circuit located within the cloud GPU via a PCIe bus (or high-speed expansion slot bus). This model fine-tuning circuit establishes an internal physical and data connection with the inference prediction circuit, also located within the cloud GPU.

[0157] During the model fine-tuning stage, the prompt word construction circuit transmits the formatted and assembled comparison sample pairs to the high-bandwidth video memory of the cloud GPU via the PCIe bus, driving the parallel tensor computation logic array inside the cloud GPU to be configured as a model fine-tuning circuit. This model fine-tuning circuit reads the sample pair data from the video memory, performs parameter update calculations on the low-rank adaptive module 202 connected in parallel within the large language model, and overwrites the updated parameters into a specific physical address in the video memory.

[0158] During the inference and decision-making phase, the prompt word construction circuit transmits the constructed input text to the high-bandwidth video memory of the cloud GPU via the PCIe bus. This input text is first fed into a model fine-tuning circuit configured with a parallel tensor computation logic array for preprocessing or routing. Subsequently, based on the data sharing connections within the video memory, the parallel tensor computation logic array switches its configuration to an inference and prediction circuit. The inference and prediction circuit synchronously reads the input text and the fine-tuned large language model parameters from the video memory and performs forward inference calculations.

[0159] After the inference prediction circuit completes its calculations, the output binary classification result is transmitted back to the application-specific integrated circuit (ASIC) in the cloud via a high-speed bus. Finally, the ASIC in the cloud establishes a physical connection with the local compiler execution circuit via the end-to-cloud network communication link between the second and first network cards, and sends the determined target compilation optimization sequence to the local compiler execution circuit to perform code optimization operations.

[0160] It should be noted that the specific embodiments described above are exemplary. Those skilled in the art can devise various solutions inspired by the disclosure of this invention, and these solutions all fall within the scope of this invention and its protection. Those skilled in the art should understand that this specification and its accompanying drawings are illustrative and not intended to limit the scope of the claims. The scope of protection of this invention is defined by the claims and their equivalents. This specification contains multiple inventive concepts; terms such as "preferredly," "according to a preferred embodiment," or "optionally" indicate that the corresponding paragraph discloses an independent concept. The applicant reserves the right to file divisional applications based on each inventive concept.

Claims

1. A compiler sequence selection system based on large model natural language reasoning, characterized in that, Includes a processor, which is configured to perform the following operations: Obtain the static structural feature vector (101) of the target program. The static structural feature vector (101) is converted into a fixed-precision feature string (102), and the compilation optimization combination of at least two candidates in the preset candidate sequence pool is converted into a sequence identifier string (105). The fixed-precision feature string (102) and the sequence identifier string (105) are embedded into the role prompt template (106) to construct the input text of the large language model; The input text is fed into a large language model, which outputs a binary classification result representing the performance difference between the candidate compilation optimization combinations. Based on the binary classification results, the target compilation optimization sequence for the target program is determined.

2. The system of claim 1, wherein, The processor is also configured to: The target program is compiled from the front end to generate serialization intermediate instructions; Static feature scanning is performed on the serialized intermediate instructions, and the normalized count value of each type of instruction is calculated to extract and generate the static structural feature vector (101).

3. The system of claim 1 or 2, wherein, When the processor converts the static structural feature vector (101) into a fixed-precision feature string (102) and converts at least two candidate compilation optimization combinations into sequence identifier strings (105), it performs the following operations: Fixed-point numerical serialization is performed on the numerical features in the static structural feature vector (101) to concatenate and generate the fixed-precision feature string (102) that conforms to the input specifications of the large language model word. Extract the execution control flow within the candidate compilation optimization combination, and encode multiple candidate optimization actions in an ordered serialization based on the execution control flow to concatenate and generate the sequence identifier string (105).

4. The system of any one of claims 1 to 3, wherein, The processor is also configured to: When the number of candidate compilation optimization combinations is greater than two, perform multiple rounds of elimination comparison and inference operations; In each round of inference, a pair of candidate sequence identifier strings (105) are extracted and input into the large language model. Based on the binary classification judgment result output by the large language model, the sequence identifier string indicated as the winner in the pair of candidate sequence identifier strings (105) is retained, and the other sequence identifier string in the pair of candidate sequence identifier strings (105) is removed.

5. The system according to any one of claims 1 to 4, characterized in that During the execution of multiple rounds of elimination comparison and inference operations, the processor performs the following operations: The directed edges generated from each comparison, pointing from the retained sequence identifier string to the removed sequence identifier string, are added to the graph set to construct a directed acyclic graph that reflects the win-loss relationship. The compilation optimization combination mapped by the sequence identifier string (105) that is finally retained after the multi-round elimination comparison and inference operation is used as the target compilation optimization sequence.

6. The system of any one of claims 1-5, wherein, When the processor embeds the fixed-precision feature string (102) and the sequence identifier string (105) into the role prompt template (106) to construct the input text of the large language model, it performs the following concatenation operation: A character structured context with multi-level isolation is constructed within the character prompt template (106); The text setting the compilation optimization comparison task and natural language reasoning constraints is written into the system prompt word (107) of the role prompt template (106); Write the fixed-precision feature string (102) and the at least two candidate sequence identifier strings (105) into the user prompt words (108) of the role prompt template (106); The indicator mark limiting the large language model to output only the binary classification judgment result is written into the assistant reply (109) of the role prompt template (106), and the above-mentioned hierarchical combination is concatenated into the input text.

7. The system of any one of claims 1-6, wherein, The large language model is configured with a low-rank adaptive module (202), which performs the following computational operations during the forward propagation process of inferring the binary classification result based on the input text: Obtain the hidden feature vector of the input text within the large language model; The hidden layer feature vectors are respectively input into the pre-trained weight matrix (201) in the parameter frozen state in the large language model, and into the low-rank adaptive module (202) connected in parallel with the pre-trained weight matrix (201); The hidden layer feature vector is subjected to low-rank mapping processing by the dimension reduction matrix (203) and dimension increase matrix (204) in the low-rank adaptive module (202), and the output of the low-rank mapping processing is aggregated with the output of the pre-trained weight matrix (201), and the binary classification judgment result is inferred based on the aggregated result.

8. The system according to any one of claims 1 to 7, characterized in that, The processor includes a client processor and a server processor that establish communication connections via a network: The client processor performs compilation processing on the target program locally to extract the static structure feature vector (101), and sends the static structure feature vector (101) to the server processor through the network interface; The server processor receives the static structural feature vector (101), retrieves the candidate compilation optimization combination from the candidate sequence pool to construct the input text, and calls the server graphics processor (307) to load and run the large language model.

9. A compiler sequence selection method based on large-scale natural language inference, characterized in that, The method includes: Obtain the static structural feature vector (101) of the target program. The static structural feature vector (101) is converted into a fixed-precision feature string (102), and the compilation optimization combination of at least two candidates in the preset candidate sequence pool is converted into a sequence identifier string (105). The fixed-precision feature string (102) and the sequence identifier string (105) are embedded into the role prompt template (106) to construct the input text of the large language model; The input text is fed into a large language model, which outputs a binary classification result representing the performance difference between the candidate compilation optimization combinations. Based on the binary classification results, the target compilation optimization sequence for the target program is determined.

10. The method according to claim 9, characterized in that, The step of determining the target compilation optimization sequence for the target program based on the binary classification result includes: When the number of compilation-optimized combinations in the candidate sequence pool is greater than two, a multi-round elimination comparison and inference operation is performed. In each round of inference, a pair of candidate sequence identifier strings (105) are extracted from the candidate sequence pool and input into the large language model. Based on the binary classification judgment result output by the large language model, the sequence identifier string indicated as the winner in the pair of candidate sequence identifier strings (105) is retained, and the other sequence identifier string in the pair of candidate sequence identifier strings (105) is removed.

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