A high-integration LED display driving device of a multi-layer composite circuit and a control method thereof

Abstract

The application relates to the technical field of intelligent integrated circuits, in particular to a high-integration LED display driving device of a multilayer composite circuit and a control method.The device comprises a channel mapping module, an impedance classification module, a brightness compensation module, a current correction module and a driving output module.In the application, the number of interlayer vias and the conductive cross section are jointly modeled to form a reflow characteristic sequence, and the accurate matching of the electrical path and the signal channel is realized by combining the driving channel index, so that the reflow distribution is consistent with the driving path;the impedance state is divided based on the voltage offset characteristic, and a hierarchical compensation mechanism is introduced, so that the brightness reference is adaptively adjusted according to the interlayer difference;abnormal slopes are extracted from the transient current sequence and are superposed with ripple errors to form a reverse adjustment amount, so that the dynamic current fluctuation is inhibited;and the fine correction of the register result is realized by cooperating with the steady-state voltage secondary correction, so that the driving consistency is improved, the display error accumulation is reduced, and the output reliability is improved.

Description

Technical Field

[0001] This invention relates to the field of intelligent integrated circuit technology, and in particular to a highly integrated LED display driver and control method with multilayer composite circuitry. Background Technology

[0002] The field of intelligent integrated circuit technology encompasses integrated circuit design and manufacturing, the development of intelligent systems and chips, and the integration of various intelligent functions. Its core technologies include semiconductor-based integrated circuit design, chip structure and functional integration, and the hardware implementation of intelligent control and computing. Intelligent integrated circuits are widely used in communications, consumer electronics, automotive electronics, the Internet of Things, and artificial intelligence, serving as a fundamental support for modern information technology. This field covers various types of circuit design and integration technologies, including digital circuits, analog circuits, and radio frequency circuits, and involves multiple aspects such as chip packaging, system integration, and functional optimization.

[0003] Among them, the high-integration LED display driver device and control method based on traditional multi-layer composite circuits refers to the technology of realizing LED display driving functions through multi-layer circuits and high integration design. Addressing the technical problems of existing LED display driver devices in terms of structural integration and circuit layout, a high-integration design scheme based on multi-layer composite circuits is proposed. This design adopts a multi-layer circuit board structure, integrating the LED display driver circuit into a compact layout, and improving the integration and stability of the driver device by optimizing the circuit wiring and signal transmission methods. Traditional LED display driver devices typically employ relatively simple circuit designs, which may suffer from problems such as large circuit board space occupation, complex wiring, and unstable signal transmission. Through multi-layer composite circuit design, a driver device with higher integration is achieved, and the system performance and reliability are improved by optimizing the circuit structure and control methods.

[0004] Existing technologies in multi-layer composite circuit structures focus on compact wiring and integrated layout. However, they lack detailed quantitative analysis of return paths and inter-layer conduction states. The current return distribution exhibits uneven characteristics, which can easily lead to local impedance fluctuations and signal coupling deviations. The driving channel is not well matched with the actual electrical characteristics, resulting in the accumulation of deviations between voltage offset and brightness output. It is difficult to maintain display consistency. At the same time, transient current changes in dynamic working conditions lack effective constraints, and waveform distortion and ripple interference are superimposed, further amplifying driving errors and affecting overall stability and reliability. Summary of the Invention

[0005] To address the technical problems existing in the prior art, the present invention provides a highly integrated LED display driver device and control method with multi-layer composite circuitry.

[0006] On the one hand, a highly integrated LED display driver device with multi-layer composite circuitry is provided, comprising: The channel mapping module is used to collect the number of interlayer vias and the cross-sectional area of ​​conductive copper foil in multilayer composite circuits to calculate the return current characteristic sequence, extract the driving channel index for matching, construct the channel mapping table and pass it to the impedance classification module; The impedance classification module is used to inject pulse current to collect the voltage at the sampling point and analyze the voltage offset set. It combines the channel mapping table to calculate the impedance state category and classify the level, generate an impedance level set and pass it to the brightness compensation module. The brightness compensation module is used to acquire the grayscale data of the light-emitting diode and extract the luminance reference, extract the interlayer compensation coefficient from the impedance level set and multiply it with the luminance reference to generate the initial registration result and transmit it to the current correction module. The current correction module is used to collect the transient current sequence of the light-emitting diode and calculate the ripple error by combining the initial register result. It converts the transient current slope out-of-bounds term into a current term and superimposes it with the ripple error to generate a reverse compensation current and transmit it to the drive output module. The drive output module is used to inject the reverse compensation current into the multilayer composite line, collect the steady-state voltage, calculate the secondary voltage offset, adjust the initial register result in combination with the voltage offset set, and generate the display drive result.

[0007] As a further embodiment of the present invention, the channel mapping table includes interlayer via distribution, conductive path identification, and driving channel index; the impedance level set includes impedance category identification, impedance level division, and channel association identification; the initial register result includes brightness reference, interlayer compensation coefficient, and driving register data; the reverse compensation current includes ripple error component, slope correction amount, and transient adjustment component; and the display driving result includes driving voltage, brightness output level, and channel driving status.

[0008] As a further aspect of the present invention, the channel mapping module specifically includes: The via quantity analysis submodule is used to collect the number of vias between layers of multilayer composite circuits and the cross-sectional area of ​​conductive copper foil. Based on the via distribution coordinates, the number of vias in the multilayer circuits is accumulated point by point, and the sum is performed segment by segment according to the range of copper foil cross-sectional area values. The accumulated result and the segmented sum result are combined to generate a return current characteristic sequence. The channel extraction submodule is used to obtain the pin distribution coordinates of the LED driver circuit, sequentially encode the driver channel number according to the coordinate position, sort and calculate according to the channel spacing value, and perform number rearrangement calculation in combination with the channel connection relationship to generate the driver channel index. The mapping table construction submodule is used to perform position matching based on the pin distribution coordinates according to the backflow feature sequence and the drive channel index, pair the multiple backflow path intensity values ​​with the corresponding channel numbers item by item, and perform sequential calculation on the pairing results according to the coordinate sequence to establish a channel mapping table.

[0009] As a further aspect of the present invention, the impedance classification module specifically includes: The voltage calculation submodule is used to inject pulse current into the multi-layer composite line, collect voltage signal values ​​at multiple sampling points of the multi-layer composite line, subtract the voltage signal values ​​at multiple sampling points from the preset reference voltage, extract the corresponding differences at multiple sampling points and arrange them according to the sampling time points to generate a voltage offset set. The state classification submodule is used to call the channel mapping table and the voltage offset set to perform spatial mapping, substitute the spatial mapping data into the support vector machine to calculate the kernel function inner product, calculate the spatial distance of the spatial mapping data according to the classification hyperplane segmentation boundary and perform label conversion to obtain the impedance state category. The level classification submodule is used to extract the corresponding voltage amplitude data based on the impedance state category and compare it with the preset voltage boundary threshold. Based on the positive or negative attribute of the comparison difference, the impedance state category is divided into intervals. The labeled data in the same interval are aggregated to establish an impedance level set.

[0010] As a further aspect of the present invention, the voltage boundary threshold is obtained by acquiring the base voltage parameters of the multilayer composite circuit under standard operating conditions, collecting the impedance tolerance value of the LED driving channel, multiplying the impedance tolerance value by the reference current to convert it into a bias voltage, and then superimposing it with the base voltage parameters to extract the positive and negative deviation extreme boundary data under the corresponding conditions, and performing equidistant quantization segmentation on the deviation extreme boundary data.

[0011] As a further aspect of the present invention, the brightness compensation module specifically includes: The grayscale data submodule is used to read the grayscale data of multi-layer composite circuit light-emitting diodes, extract the grayscale value sequence of multi-layer channels and perform amplitude normalization, and perform weighted average calculation of the luminous intensity of multiple channels to obtain brightness characterization data and calculate the difference between channels to generate luminous brightness benchmark. The coefficient matching submodule is used to call the corresponding impedance interval data of multiple layers in the impedance level set based on the luminance reference, extract the compensation parameter sequence corresponding to the multiple impedance intervals, index and map the compensation parameter sequence to obtain the interlayer compensation sequence, and match it with the luminance reference value proportionally to generate the interlayer compensation coefficient. The register result submodule is used to construct corresponding channel data pairs based on the interlayer compensation coefficient and the luminance reference, perform channel-by-channel multiplication to form luminance correction data, rearrange the channel sequence of the luminance correction data, and generate the initial register result.

[0012] As a further aspect of the present invention, the current correction module specifically includes: The waveform acquisition submodule is used to acquire the transient waveform of the conductive plane within the refresh cycle of the LED array, divide the continuous sampling points according to the time sequence and record the voltage amplitude at the corresponding sampling time, perform current conversion on the voltage difference between adjacent sampling points and rearrange them in time order to obtain the transient current sequence. The current error submodule is used to calculate the current difference at multiple times based on the transient current sequence and the initial register result, and perform periodic segmented accumulation to obtain the ripple change curve. It is then compared with a preset difference change amplitude threshold and the position of the out-of-bounds term is marked to obtain the ripple error amount. The compensation current submodule is used to call the current at the corresponding moment in the transient current sequence according to the ripple error, perform differential slope calculation on the marked out-of-bounds terms and extract the slope change, multiply the slope change by the corresponding time step coefficient and then superimpose it with the ripple error and reverse the sign to generate a reverse compensation current.

[0013] As a further embodiment of the present invention, the threshold for the difference change amplitude is determined by obtaining the basic current fluctuation parameters under the standard operating state of the conductive plane, collecting the rated ripple tolerance value of the LED driving array, performing a weighted summation operation on the basic current fluctuation parameters and the rated ripple tolerance value, extracting the corresponding offset limit boundary data, and performing equidistant quantization segmentation on the offset limit boundary data.

[0014] As a further aspect of the present invention, the drive output module specifically includes: The current injection submodule is used to inject the reverse compensation current into the return conductor plane of the multi-layer composite line, monitor the current sampling points of the return conductor plane, collect the current sampling sequence and perform amplitude discretization, calculate the mean square value of current fluctuation and analyze the rate of change of current fluctuation in combination with the sampling time series to obtain the return current fluctuation rate. The voltage offset submodule is used to collect steady-state sampling point voltage and record steady-state voltage sampling sequence. After converting the return current fluctuation rate into voltage offset using a preset conversion coefficient, it performs difference calculation with the steady-state voltage sampling sequence and performs interval quantization. It then calculates the interval voltage mean sequence and generates secondary voltage offset. The register adjustment submodule is used to calculate the difference between the secondary voltage offset and the voltage offset set and form an offset difference sequence, calculate the displacement between the offset difference sequence and the initial register result, analyze the register displacement sequence and perform register displacement adjustment operation, and generate the display drive result.

[0015] On the other hand, a highly integrated LED display driving control method with multilayer composite circuitry includes the following steps: S1: Collect the number of interlayer vias and the cross-sectional area of ​​conductive copper foil in the multilayer composite circuit to calculate the return current characteristic sequence, extract the driving channel index for matching, and construct a channel mapping table; S2: Inject pulse current to collect sampling point voltage and analyze voltage offset set, combine with the channel mapping table to calculate impedance state category and classify level, and generate impedance level set; S3: Obtain the grayscale data of the light-emitting diode and extract the luminance reference. Extract the interlayer compensation coefficient from the impedance level set and multiply it with the luminance reference to generate the initial registration result. S4: Collect the transient current sequence of the light-emitting diode and calculate the ripple error by combining it with the initial register result. Convert the transient current slope out-of-bounds term into a current term and superimpose it with the ripple error to generate a reverse compensation current. S5: Inject the reverse compensation current into the multilayer composite line to collect the steady-state voltage and calculate the secondary voltage offset. Combine the voltage offset set to adjust the initial register result and generate the display drive result.

[0016] The beneficial effects of the technical solution provided by this invention include at least the following: By jointly modeling the number of interlayer vias and conductive cross-sections to form a return current characteristic sequence, and combining it with the drive channel index to achieve precise matching of electrical paths and signal channels, the return current distribution is kept consistent with the drive path. Furthermore, based on voltage offset characteristics, impedance states are divided and a graded compensation mechanism is introduced to enable the brightness reference to adaptively adjust with interlayer differences. At the same time, abnormal slopes are extracted by combining transient current sequences and superimposed with ripple errors to form a reverse adjustment amount, which suppresses dynamic current fluctuations. Combined with steady-state voltage secondary correction, fine correction of register results is achieved, thereby improving drive consistency and reducing display error accumulation, and improving system stability and output reliability. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a system schematic diagram of the present invention.

[0019] Figure 2 This is a schematic diagram of the system framework of the present invention.

[0020] Figure 3 This is a flowchart of the channel mapping module in this invention.

[0021] Figure 4 This is a flowchart of the impedance classification module in this invention.

[0022] Figure 5 This is a flowchart of the brightness compensation module in this invention.

[0023] Figure 6 This is a flowchart of the current correction module in this invention.

[0024] Figure 7 This is a flowchart of the drive output module in this invention.

[0025] Figure 8 This is a flowchart of the method of the present invention. Detailed Implementation

[0026] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0027] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0028] This invention provides a highly integrated LED display driver device with multilayer composite circuitry, such as... Figure 1 and Figure 2 The diagram shows a highly integrated LED display driver device with multilayer composite circuitry. The device includes: The channel mapping module is used to collect the number of interlayer vias and the cross-sectional area of ​​conductive copper foil in multilayer composite circuits to calculate the return current characteristic sequence, extract the driving channel index for matching, construct the channel mapping table and pass it to the impedance classification module; The impedance classification module is used to inject pulse current to collect the voltage at the sampling point and analyze the voltage offset set. It combines the channel mapping table to calculate the impedance state category and classify the level, generate the impedance level set and pass it to the brightness compensation module. The brightness compensation module is used to acquire the grayscale data of the light-emitting diode and extract the luminance reference, extract the interlayer compensation coefficient from the impedance level set and multiply it with the luminance reference to generate the initial registered result and pass it to the current correction module. The current correction module is used to collect the transient current sequence of the light-emitting diode and calculate the ripple error by combining the initial register result. It converts the transient current slope out-of-bounds term into a current term and superimposes it with the ripple error to generate a reverse compensation current and transmit it to the drive output module. The drive output module is used to inject reverse compensation current into the multilayer composite line, collect steady-state voltage, calculate secondary voltage offset, adjust the initial register result based on the voltage offset set, and generate the display drive result.

[0029] The channel mapping table includes interlayer via distribution, conductive path identification, and driving channel index; the impedance level set includes impedance category identification, impedance level classification, and channel association identification; the initial register results include brightness reference, interlayer compensation coefficient, and driving register data; the reverse compensation current includes ripple error component, slope correction amount, and transient adjustment component; and the display driving results include driving voltage, brightness output level, and channel driving status.

[0030] Specifically, such as Figure 2 , Figure 3 As shown, the channel mapping module specifically includes: The via quantity analysis submodule is used to collect the number of vias between layers of multilayer composite circuits and the cross-sectional area of ​​conductive copper foil. Based on the via distribution coordinates, the number of vias in the multilayer circuits is accumulated point by point, and the sum is performed segment by segment according to the range of copper foil cross-sectional area values. The accumulated result and the segmented sum result are combined to generate a return current characteristic sequence. The system reads the inspection dataset of multi-layer composite circuits from the data interface of the automated optical inspection instrument for printed circuit boards. It extracts the horizontal and vertical coordinates of each layer on a two-dimensional physical plane, the number of via distribution levels at a single point, and the physical quantities of the corresponding conductive copper foil cross-sectional area. The received data is in the format of a two-dimensional array matrix with coordinate indexes. Data cleaning iterates through the conductive copper foil cross-sectional area values ​​in the two-dimensional array matrix, comparing them with zero values ​​and directly discarding invalid coordinate entries with cross-sectional area values ​​equal to zero to ensure data validity. Coordinate matching retrieves the cleaned horizontal and vertical coordinates of the vias and compares them one by one with the coordinate records in each layer's data. When completely identical horizontal and vertical coordinate values ​​are found between different layers, the system performs a cumulative calculation, summing the number of via distribution levels from the first to the eighth layer at that same coordinate point to derive the total number of single-point via records at that coordinate position. Area threshold determination receives the lower and upper area baseline values ​​and performs numerical range classification processing on all conductive copper foil cross-sectional areas. The lower limit of the area is calculated by subtracting twice the standard deviation from the average cross-sectional value of historical circuit board heating critical test data, while the upper limit is calculated by adding twice the standard deviation to the average cross-sectional value of historical circuit board heating critical test data. For example, if the average historical cross-sectional value recorded in the database is 500 square micrometers and the extracted standard deviation is 50 square micrometers, substituting both into the above logic for calculation yields a lower limit of 400 square micrometers and an upper limit of 600 square micrometers. Thus, cross-sectional classification precisely divides the physical quantity of the conductive copper foil cross-sectional area into a low cross-sectional range (less than 400 square micrometers), a standard cross-sectional range (400 to 600 square micrometers), and a high cross-sectional range (greater than 600 square micrometers). Area aggregation identifies the physical quantity of the conductive copper foil cross-sectional area within the same cross-sectional range, performs an accumulation operation on the set of values ​​within the same range, and calculates the total cross-sectional area of ​​each range.

[0031] Table 1. Via Distribution Detection Table for Multilayer Composite Circuits:

[0032] As shown in Table 1, the detection data record at the position of x-axis 12 and y-axis 15 is extracted. The number of via layers is 4 and the cross-sectional area of ​​copper foil is 350 square micrometers. It is determined to be classified into the low cross-section interval. If the batch only contains the three sets of data entries listed in the table, the area aggregation calculation shows that the total cross-sectional area of ​​the low cross-section interval is 350 square micrometers, the total cross-sectional area of ​​the standard cross-section interval is 450 square micrometers, and the total cross-sectional area of ​​the high cross-section interval is 650 square micrometers. The sequence splicing combines the calculated single-point via total number sequence 4, 6, 3 with the total cross-sectional area of ​​the aforementioned three intervals to output a return characteristic sequence containing comprehensive conductivity characteristics.

[0033] The channel extraction submodule is used to obtain the pin distribution coordinates of the LED driver circuit, sequentially encode the driver channel number according to the coordinate position, sort and calculate according to the channel spacing value, and perform number rearrangement calculation in combination with the channel connection relationship to generate the driver channel index. The pin distribution coordinates of the LED driver circuits are extracted from the hardware wiring design file of the LED array. The received coordinate data is in millimeter absolute coordinate pairs. Encoding and allocation parse the pin distribution coordinate set sequentially, prioritizing left-to-right increasing horizontal coordinates and top-to-bottom increasing vertical coordinates. Each coordinate position is traversed sequentially, and a positive integer channel number identifier incremented by 1 is assigned to each coordinate point during the traversal. Distance calculation reads the horizontal and vertical coordinate values ​​corresponding to two adjacent channel numbers, extracts the difference between the two horizontal coordinates, and calculates the square of the difference. Simultaneously, the vertical coordinate difference is extracted, and its square is calculated. The two squared values ​​are then added together, and the square root is taken to obtain the channel spacing between the two physical pin locations. Sorting processing inputs all calculated channel spacing values ​​into a data sequence and performs an ascending comparison sort operation from smallest to largest. The connection relationship is reorganized by retrieving the LED pin network connection table and comparing the electrical connection records between each pin. When it is determined that the pins corresponding to two channel numbers have a direct connection attribute in the network connection table, and the channel spacing value calculated in the pre-calculated step is greater than the spacing compensation threshold, the channel number bound to the pin with the smaller spacing is physically similar and reorganized with the channel number bound to the far-end pin. The spacing compensation threshold parameter is calculated by multiplying the conventional LED wiring safety spacing parameter by the thermal expansion margin coefficient. The conventional safety spacing parameter is set to 1.8 mm, and the thermal expansion margin coefficient is set to 1.5. Multiplying the two together, the spacing compensation threshold is calculated to be 2.7 mm. Substituting the pin positions corresponding to horizontal coordinates 12 and 15 in the aforementioned Table 1 into the calculation, the vertical coordinate values ​​of the two pins are both 15. The horizontal coordinate difference is calculated to be 3, resulting in a square value of 9. The vertical coordinate difference is 0, resulting in a square value of 0. Adding the two together gives 9. Taking the square root of the two values ​​gives a channel spacing value of 3 mm. This channel spacing value of 3 mm is greater than the spacing compensation threshold of 2.7 mm, which meets the judgment condition. After performing position association and reorganization operations on the set of channel numbers that meet the aforementioned judgment conditions, the data output is summarized to generate a structured driving channel index file.

[0034] The mapping table construction submodule is used to perform position matching based on the pin distribution coordinates according to the return flow feature sequence and the drive channel index. It pairs the multiple return flow path intensity values ​​with the corresponding channel numbers item by item, and performs sequential calculations on the pairing results according to the coordinate sequence to establish a channel mapping table. The system receives the generated return flow feature sequence file and drive channel index file, and uses the pin distribution coordinate set stored at the underlying level as the reference anchor point for geographical location comparison. Location matching extracts environmental feature data attached to each coordinate anchor point from the return flow feature sequence, and performs a one-to-one binding matching operation based on coordinate overlap with the channel number in the drive channel index that is also bound to the same coordinate anchor point. Intensity conversion parses the total cross-sectional area of ​​the interval and the total number of vias at a single point from the return flow feature sequence. It performs a product operation with the via conductivity weight coefficient to obtain the equivalent conductivity value of the via. Then, it adds this equivalent conductivity value to the total cross-sectional area of ​​the current coordinate point's cross-sectional interval to derive the intensity value of the multiple return flow paths at each physical location. The via conductivity weight coefficient is calculated by dividing the average copper plating thickness inside the circuit board via by the standard thickness of the external copper foil. For example, the average copper plating thickness inside the via is 25 micrometers, as measured by an external detection device. Given that the standard thickness of the external copper foil is 10 micrometers, dividing these two values ​​yields a via conductivity weighting coefficient of 2.5. Introducing data points at coordinates 12 and 15 from the previous example, which belong to the low-section interval, the total number of vias at each point is 4, and the total cross-sectional area of ​​the low-section interval is 350 square micrometers. Multiplying 4 by 2.5 yields an equivalent via conductivity value of 10. Adding this value to the total cross-sectional area of ​​350 precisely calculates the multi-return path strength value at that coordinate anchor point as 360. Data pairing establishes a mapping relationship between the calculated multi-return path strength value and the channel number after position rearrangement at the current coordinate anchor point. Sequence arrangement follows the pin distribution coordinate system rules, with horizontal coordinate values ​​arranged from smallest to largest as the first priority and vertical coordinate values ​​arranged from smallest to largest as the second priority. The paired data sets are then subjected to overall sequential rearrangement. The mapping record enters the set of correspondences after the final draft is arranged in order into a structured spreadsheet.

[0035] Specifically, such as Figure 2 , 4 As shown, the impedance classification module specifically includes: The voltage calculation submodule is used to inject pulse current into the multi-layer composite line, collect voltage signal values ​​at multiple sampling points of the multi-layer composite line, subtract the voltage signal values ​​at multiple sampling points from the preset reference voltage, extract the corresponding differences at multiple sampling points and arrange them according to the sampling time points to generate a voltage offset set. A constant-period pulsed current is injected into the power supply pins of the multilayer composite circuit. The pulse current amplitude is set to 5 amps, the pulse width parameter to 10 microseconds, and the injection frequency to 1000 Hz. Voltage acquisition is achieved by analog-to-digital converters physically distributed at different nodes of the multilayer composite circuit, synchronously capturing voltage signal values ​​at multiple sampling points. For example, the voltage signal value captured at a certain sampling point is 3.5 volts. Reference reading retrieves a preset reference voltage from the circuit board's standard design parameter library. This preset reference voltage is determined by the median value of the theoretical operating voltage allowed by the power layer in the circuit board design specification, and its value is 3.3 volts. Difference calculation subtracts the preset reference voltage from the voltage signal values ​​acquired at each sampling point to derive the corresponding difference value for multiple sampling points. Subtracting the preset reference voltage of 3.3 volts from the captured 3.5 volt voltage signal value yields a corresponding difference value of 0.2 volts. Timestamp binding adds high-precision sampling time point information, such as 0.1 milliseconds or 0.2 milliseconds, to each calculated corresponding difference value. The sequence reconstruction performs a one-dimensional sequence permutation operation on the corresponding differences of all additional sampling time points in ascending order, generating a voltage offset set that monotonically increases over time. The advantage of this operation logic is that, through fixed-reference subtraction and timestamp sorting operations, it removes the static voltage component and directly presents the temporal characteristics of dynamic voltage fluctuations.

[0036] The state classification submodule is used to call the channel mapping table and voltage offset set to perform spatial mapping, substitute the spatial mapping data into the support vector machine to calculate the kernel function inner product, calculate the spatial distance of the spatial mapping data according to the classification hyperplane segmentation boundary and perform label conversion to obtain the impedance state category. The system retrieves 3D spatial coordinate information from the channel mapping table and time-series corresponding difference data from the pre-generated voltage offset set. It then performs multi-dimensional vector concatenation operations on the spatial coordinates and voltage offset features under the same physical node to generate spatial mapping data. The model computation calls the built-in Support Vector Machine (SVM). The SVM's input layer receives the multi-dimensional spatial mapping data vector and directly transforms the low-dimensional spatial mapping data to a high-dimensional feature space using the radial basis function (RBF) kernel. The kernel function calculation performs the squared Euclidean distance operation between the multi-dimensional spatial mapping data vector and each support vector pre-stored in the SVM. The calculated squared distance value is multiplied by the Gaussian kernel width parameter coefficient with a negative sign, and the product is then subjected to natural exponentiation to obtain the kernel inner product value. The Gaussian kernel width parameter coefficient is established within the range of 0.01 to 1.0 through 5-fold cross-validation and a grid search mechanism on historical sample datasets; it is actually set to 0.1. For example, the squared Euclidean distance between a spatially mapped data vector and a specific support vector is calculated to be 4. Multiplying this by -0.1 yields -0.4, and taking the natural exponent gives a kernel inner product value of 0.67. The hyperplane calculation multiplies each kernel inner product value with its corresponding preset weight coefficient, sums all the product results, and adds the bias term parameter value to obtain the spatial distance from the spatially mapped data to the classification hyperplane. Setting the bias term parameter to 0.5, the sum of all inner products and weights is 1.2, resulting in a spatial distance of 1.7. Labeling is determined based on the sign of the spatial distance value. When the spatial distance 1.7 is greater than 0, it is converted to positive impedance state category 1; otherwise, it is converted to negative impedance state category 0. The advantage of this operational logic is that it effectively maps, converts, and calculates nonlinear voltage fluctuation characteristics to establish label attributes.

[0037] The level classification submodule is used to extract the corresponding voltage amplitude data based on the impedance state category and compare it with the preset voltage boundary threshold. Based on the positive or negative attribute of the comparison difference, the impedance state category is divided into intervals. The labeled data in the same interval are aggregated to establish an impedance level set. The system analyzes the output impedance state category. For positive impedance state categories with a value of 1, it extracts the voltage amplitude data corresponding to the time of generation of that label. A threshold comparison is performed to obtain a preset voltage threshold, which is calculated by adding the maximum allowable voltage ripple amplitude to the standard operating voltage. According to the hardware specifications, the standard operating voltage is set to 3.3 volts, and the maximum allowable voltage ripple amplitude is determined by the peak-to-peak value of 0.3 volts obtained from 500 historical full-load test waveforms. Adding these two values ​​together yields a preset voltage threshold of 3.6 volts. The difference attribute is determined by subtracting the preset voltage threshold from the extracted voltage amplitude data to calculate the comparison difference. For example, if the extracted voltage amplitude data is 3.8 volts, subtracting the preset voltage threshold of 3.6 volts yields a comparison difference of 0.2 volts. This 0.2 volt is determined to be greater than 0, indicating that the comparison difference has a positive attribute. Interval classification uses the positive or negative attribute of the comparison difference to physically divide impedance status categories. When the comparison difference is positive, the corresponding impedance status category is classified into the severe impedance exceedance interval; when the comparison difference is negative, it is classified into the slight impedance fluctuation interval. Aggregation processing extracts all impedance status categories and their corresponding spatial coordinate information within the same interval. Data in the severe impedance exceedance interval is aggregated into a high-risk impedance cluster, and data in the slight impedance fluctuation interval is aggregated into a warning impedance cluster. Finally, all cluster data is structured and encapsulated to establish an impedance level set.

[0038] Specifically, such as Figure 2 , 5 As shown, the brightness compensation module specifically includes: The grayscale data submodule is used to read the grayscale data of multi-layer composite circuit light-emitting diodes, extract the grayscale value sequence of multi-layer channels and perform amplitude normalization, and perform weighted average calculation of the luminous intensity of multiple channels to obtain brightness characterization data and calculate the difference between channels to generate luminous brightness benchmark. The initial level signal of the multi-layer composite LED is read, and the discrete grayscale pulse values ​​of each light-emitting channel are extracted. These discrete grayscale pulse values ​​are then arranged in ascending order according to the channel's physical number, forming a multi-layer channel grayscale value sequence. The normalization unit reads the discrete grayscale pulse values ​​of each channel from the multi-layer channel grayscale value sequence and performs a division operation with a pre-set hardware-defined limit grayscale peak value to calculate and derive the amplitude normalization data for each channel. Specific data are shown in Table 2.

[0039] Table 2. Grayscale extraction table for light emission channels:

[0040] As shown in Table 2, the discrete grayscale pulse value of the first channel with physical number 1 is extracted as 150, and its corresponding hardware limit grayscale peak value is 255. Dividing these values ​​yields a normalized amplitude value of 0.588 for the first channel. The intensity weighting unit obtains the luminous intensity weighting factor determined by multiple calibration tests of the photoelectric integrating sphere. The normalized amplitude value of each channel is multiplied by the corresponding luminous intensity weighting factor, and then the product results of all channels are summed to calculate the brightness characterization data. The intensity weighting factor of 0.4 for the first channel and 0.6 for the second channel are extracted from Table 2. Multiplying 0.588 by 0.4 yields 0.235. Dividing the discrete grayscale value of 200 for the second channel by 255 yields a normalized value of 0.784. Multiplying 0.784 by 0.6 yields 0.470. The sum of 0.235 and 0.470 yields a brightness characterization data of 0.705. The difference calculation unit extracts the amplitude normalized data of adjacent channels within the multi-channel grayscale value sequence, and performs a mathematical operation of subtracting and taking the absolute value of the difference between the two to obtain the inter-channel difference. The difference between the second channel's 0.784 and the first channel's 0.588 is calculated to yield an inter-channel difference of 0.196. The reference generation unit records the brightness characterization data 0.705 and the inter-channel difference 0.196 into a reserved memory address segment, combining them to generate a luminance reference. The advantage of this calculation logic is that it quantifies the global display reference parameters of the screen through normalized division conversion of grayscale values ​​and multi-dimensional intensity weight correlation accumulation.

[0041] The coefficient matching submodule is used to call the impedance range data of multiple layers in the impedance level set based on the luminance reference, extract the compensation parameter sequence corresponding to the multiple impedance ranges, index and map the compensation parameter sequence to obtain the interlayer compensation sequence, and match it with the luminance reference value proportionally to generate the interlayer compensation coefficient. Based on the luminance reference, the register is accessed for address lookup. Combined with a preset impedance level set, the physical circuit coordinates of the current LED are retrieved, and the corresponding impedance interval data for each multi-layer impedance interval bound to these coordinates is obtained. The parameter extraction unit parses the compensation mapping index within the multi-layer impedance interval data, extracts the pre-calibrated compensation values ​​corresponding to each multi-layer impedance interval from the underlying driver repository, and arranges these compensation values ​​in order of layer depth to form a compensation parameter sequence. The mapping processing unit performs address offset matching search in the compensation parameter sequence according to the physical connection layer number of the current luminous channel, extracting specific inter-layer compensation sequence values ​​adapted to the current luminous channel. The proportional calculation unit obtains the luminance characterization data from the luminance reference input from the previous stage, multiplies the extracted inter-layer compensation sequence values ​​with the luminance characterization data, and performs a second multiplication operation with the ambient light adaptive attenuation factor to calculate the inter-layer compensation coefficient. The ambient light adaptive attenuation factor is obtained by dividing the real-time ambient illuminance value collected by the external photosensitive resistor by the indoor standard reference illuminance value. The real-time ambient illuminance value measured by the external environment sensor is 300 lux, while the indoor standard reference illuminance value is set to 500 lux according to industry display specifications. Dividing the two values ​​yields an ambient light adaptive attenuation factor of 0.6. Substituting the previously generated brightness characterization data of 0.705, the value corresponding to the current layer in the interlayer compensation sequence is extracted as 1.2. Multiplying 0.705 by 1.2 yields 0.846. Then, 0.846 is multiplied by the ambient light adaptive attenuation factor of 0.6 to accurately calculate the interlayer compensation coefficient of 0.5076. This generated interlayer compensation coefficient of 0.507 falls within the hardware-allowed effective compensation threshold range of 0.1 to 0.9, and is therefore determined to be within a safe range and output. The advantage of this calculation logic is that by combining the characteristics of the underlying impedance range with the real-time luminous reference to perform multi-parameter multiplication constraints, a numerical quantitative correlation is established between electrical loss data and optical compensation data.

[0042] The register result submodule is used to construct corresponding channel data pairs based on the interlayer compensation coefficient and the luminance reference, perform channel-by-channel multiplication to form luminance correction data, rearrange the channel sequence of the luminance correction data, and generate the initial register result. The system reads the luminance representation data from the generated luminance reference and performs memory address alignment with the interlayer compensation coefficient output from the preprocessor. It then concatenates the luminance representation data and interlayer compensation coefficients belonging to the same hardware pin to construct corresponding channel data pairs. The multiplication unit retrieves the luminance representation data and interlayer compensation coefficients contained in each corresponding channel data pair, performs a floating-point multiplication operation on them, and multiplies the product with the display hardware restoration ratio to calculate the luminance correction data. The display hardware restoration ratio is determined based on the extreme grayscale peak value used in the previous normalization process, i.e., a fixed value of 255. Substituting the luminance representation data of 0.705 obtained from the previous operation and the interlayer compensation coefficient of 0.507 obtained from the previous operation, the system multiplies 0.705 and 0.507 to obtain 0.357. Finally, the system multiplies 0.357 with the display hardware restoration ratio of 255 to calculate the current channel luminance correction data as 91.035. The rounding unit performs rounding operations on the acquired brightness correction data, discarding decimal places, converting 91.035 to the integer 91. The sequence reassembly unit reads all the brightness correction data after rounding, extracts the physical coordinate numbers of each bound channel, and sorts them according to the horizontal coordinate numbers, increasing from left to right as the primary sorting criterion and from top to bottom as the secondary sorting criterion. It then performs a spatial sequence interchange and rearrangement operation on all the brightness correction data. The storage and delivery unit continuously packages all the brightness correction data streams after the spatial sequence rearrangement operation, adds a fixed starting communication identifier value of 170 to the beginning of the data stream, and adds a checksum value obtained by summing all the brightness correction data and taking the lower 8 bits to the end. This combination encapsulates and generates an initial register result conforming to the communication timing protocol of the underlying driver chip and pushes it into the transmission buffer. The advantage of this operation logic is that it uses point-to-point floating-point multiplication calculation and a strict coordinate-dimensional-based sequence reassembly mechanism, eliminating the risk of spatial out-of-order distribution of high-density display data in the delivery link.

[0043] Specifically, such as Figure 2 , Figure 6 As shown, the current correction module specifically includes: The waveform acquisition submodule is used to acquire the transient waveform of the conductive plane within the refresh cycle of the LED array, divide the continuous sampling points according to the time sequence and record the voltage amplitude at the corresponding sampling time, perform current conversion on the voltage difference between adjacent sampling points and rearrange them in time order to obtain the transient current sequence. A high-frequency sampling probe is directly connected to the underlying power supply network of the LED array, extracting transient analog voltage waveform data of the conductive plane continuously fluctuating within the screen refresh cycle at a detection frequency of 50 MHz. The analog-to-digital conversion unit, relying on an internal preset clock interrupt source, divides the transient analog voltage waveform data into multiple discrete segments according to time interval boundaries, and reads the voltage amplitude value corresponding to each time segment node, writing it along with a timestamp tag into a temporary queue. The impedance parameter reading unit retrieves the equivalent on-resistance parameter of the conductive plane, which is determined by actual testing with a constant current source injected by a micro-ohmmeter and recorded in memory. The differential conversion unit extracts the voltage amplitude values ​​of adjacent time nodes from the temporary queue, subtracts the current voltage amplitude value from the voltage amplitude values ​​of adjacent historical time nodes to obtain the transient voltage fluctuation difference, and divides this difference by the equivalent on-resistance parameter to obtain the corresponding transient current value. For example, if the current voltage amplitude is read as 3.5 volts, and the adjacent historical voltage amplitude is 3.2 volts, with the equivalent on-resistance parameter set to 0.1 ohms, subtracting 3.5 from 3.2 yields a transient voltage fluctuation difference of 0.3 volts. Dividing 0.3 from 0.1 yields a transient current value of 3 amperes. The sequence rearrangement unit arranges all the derived transient current values ​​monotonically in ascending order based on the timestamp label, integrating and encapsulating them to generate a transient current sequence. The advantage of this operational logic is that it isolates common-mode interference components through voltage difference conversion within a small time window.

[0044] The current error submodule is used to calculate the current difference at multiple times based on the transient current sequence and the initial register result, and to perform periodic segmented accumulation to obtain the ripple change curve. It is then compared with a preset difference change amplitude threshold and the position of out-of-bounds terms is marked to obtain the ripple error amount. The actual transient current value recorded in the generated transient current sequence is extracted, and the theoretical expected current value corresponding to the initial register result pre-stored in the basic drive is extracted simultaneously. The deviation calculation unit subtracts the actual transient current value from the theoretical expected current value to obtain the current difference at any given time. The accumulation processing unit sets a fixed ripple scanning time window, continuously adds the current differences at all times within the ripple scanning time window to obtain the cumulative value of the segmented ripple amplitude, and splices the cumulative values ​​of the segmented ripple amplitude corresponding to all time windows in time sequence to generate the ripple change curve. The time window contains three consecutive current differences of 0.5 amps, 0.4 amps, and 0.6 amps, respectively, and the summation operation yields a cumulative value of 1.5 amps for the segmented ripple amplitude. The threshold comparison unit obtains a preset difference change amplitude threshold, which is calculated from the maximum permissible parasitic power consumption in the hardware specifications and set to 1.2 amps. The state determination unit compares the cumulative value of the segmented ripple amplitude with the preset difference change amplitude threshold. The cumulative segmented ripple amplitude value of 1.5 amps is compared with the threshold of 1.2 amps. If 1.5 amps is greater than 1.2 amps, the corresponding hardware pin number is extracted and recorded in the monitoring register as an out-of-bounds location identifier. The quantization evaluation unit subtracts the cumulative segmented ripple amplitude value that triggered the out-of-bounds event from the threshold to generate the ripple error. Subtracting 1.5 from 1.2 yields a ripple error of 0.3 amps.

[0045] The compensation current submodule is used to call the current at the corresponding moment in the transient current sequence according to the ripple error, perform differential slope calculation on the marked out-of-bounds terms and extract the slope change, multiply the slope change by the corresponding time step coefficient and then superimpose it with the ripple error and reverse the sign to generate the reverse compensation current. The system retrieves the ripple error value with an out-of-bounds location marker from the output. Using this marker, it searches the buffer for the transient current sequence, extracting the abnormal current value at the time of the anomaly and the baseline reference current value from adjacent historical moments. The slope calculation unit subtracts the abnormal current value from the baseline reference current value to obtain the discrete current increment value. This value is then divided by a preset data acquisition interval parameter to generate the transient differential slope. For example, if the current abnormal current value is 3.2 amps, the baseline reference current value is 3 amps, and the data acquisition interval parameter is set to 0.1 microseconds by the analog-to-digital converter sampling frequency, subtracting 3.2 from 3 yields a discrete current increment value of 0.2 amps. Dividing 0.2 by 0.1 yields a transient differential slope of 2. The fluctuation analysis unit subtracts the current transient differential slope from historical slope data to obtain the slope change value. Setting the historical slope data to 1.5, subtracting 2 from 1.5 yields a slope change value of 0.5. The data overlay unit substitutes the ripple error of 0.3 amps obtained from the previous calculation, and adds the slope change value of 0.5 to the ripple error of 0.3 amps to obtain the combined drift characteristic value of 0.8. The polarity reversal unit sets the anti-phase multiplier to a fixed negative 1, multiplies the combined drift characteristic value of 0.8 with the anti-phase multiplier of negative 1 to complete the sign conversion, calculates and derives the reverse compensation current value of -0.8 amps, and injects it into the power supply network. This reverse compensation current is limited to the safe adjustment range allowed by the hardware and is directly used for the underlying drive correction. The advantage of this calculation logic is that it integrates static error and dynamic trend characteristics to obtain the final compensation parameter, effectively suppressing the compensation overshoot phenomenon.

[0046] Specifically, such as Figure 2 , Figure 7 As shown, the drive output module specifically includes: The current injection submodule is used to inject reverse compensation current into the return conductor plane of the multi-layer composite line, monitor the current sampling points of the return conductor plane, collect the current sampling sequence and perform amplitude discretization, calculate the mean square value of current fluctuation and analyze the rate of change of current fluctuation in combination with the sampling time series to obtain the return current fluctuation rate. The generated reverse compensation current value is extracted, substituted into the aforementioned -0.8 amps, and injected into the return conductor plane of the multilayer composite circuit through the bottom-level driver pin. A Hall sensor assembly is attached to the current sampling points on the return conductor plane, continuously capturing the current signal flowing through the plane at 1-microsecond sampling intervals. The discretization processing unit performs an analog-to-digital discrete conversion operation on the captured current signal, extracting the absolute current values ​​at multiple consecutive moments, integrating and sorting them to generate a current sampling sequence. For example, the discrete current values ​​extracted from three consecutive sampling points are -0.8 amps, -0.7 amps, and -0.9 amps. The mean square calculation component calls each discrete current value in the current sampling sequence, performs a square operation on each discrete current value multiplied by itself, then performs an accumulation operation on all the squared results, and divides the sum by the total number of sampling points to calculate the mean square value of the current fluctuation. Squared values ​​of -0.8, -0.7, and -0.9 yield 0.64, 0.49, and 0.81 respectively. Summing these three values ​​gives 1.94 amperes squared. Dividing 1.94 by the total value of 3 yields a mean square current fluctuation of 0.646 amperes squared. The rate of change calculation unit obtains the total duration of the sampled time series, for example, 3 microseconds. Dividing the aforementioned mean square current fluctuation value of 0.646 by the total duration of 3 microseconds, the calculated return current fluctuation rate is 0.215 amperes squared per microsecond. The data comparator compares 0.215 amperes squared per microsecond with the hardware-specified safety threshold of 0.5 amperes squared per microsecond, determining that the result is within a safe range. The advantage of this calculation logic is that it quantifies the degree of dynamic electromagnetic interference by dividing the mean square value by the time span.

[0047] The voltage offset submodule is used to collect steady-state sampling point voltage and record steady-state voltage sampling sequence. After converting the return current fluctuation rate into voltage offset using a preset conversion coefficient, it performs difference calculation with the steady-state voltage sampling sequence and performs interval quantization. It then calculates the interval voltage mean sequence and generates secondary voltage offset. The voltage probe assembly directly contacts the steady-state sampling point of the LED base, continuously acquiring steady-state operating voltage data during the display of a static image on the screen, and recording multiple sets of voltage data into the memory to generate a steady-state voltage sampling sequence. For example, two sets of steady-state voltage values ​​are acquired, namely 3.2 volts and 3.1 volts. The factor conversion unit reads the previously generated return current fluctuation rate, substitutes it into the aforementioned 0.215 amperes squared per microsecond, and multiplies it with the hardware-defined impedance conversion coefficient to calculate the equivalent voltage bias. The hardware-defined impedance conversion coefficient is set to 10 ohms per microsecond based on the copper foil thickness and trace length of the circuit board. Multiplying 0.215 by 10 yields an equivalent voltage bias of 2.15 volts. The difference comparison assembly reads each steady-state voltage value in the steady-state voltage sampling sequence, subtracts each steady-state voltage value from the equivalent voltage bias, and obtains the voltage change sequence. The specific calculations are shown in Table 3.

[0048] Table 3. Quantitative Table of Voltage Changes:

[0049] As shown in Table 3, subtracting 2.15 from 3.2 yields 1.05 volts, and subtracting 2.15 from 3.1 yields 0.95 volts, forming a voltage change sequence. The interval normalization unit extracts the values ​​from the voltage change sequence, with a preset normalization interval of 0.2 volts. The mean calculation component accumulates all voltage change values ​​falling within the same quantization interval and divides the accumulated result by the number of data points to generate an interval voltage mean sequence as the secondary voltage offset. Adding 1.05 and 0.95 yields 2.0 volts, and dividing 2.0 by the number of data points (2) yields the average value of 1.0 volts. This 1.0 volt is defined as the secondary voltage offset and pushed into the register. The comparator detects that this secondary voltage offset of 1.0 volts is lower than the maximum allowable deviation of 2.0 volts, confirming its validity. The advantage of this operation logic is that it uses a multiplicative conversion of current fluctuations to equivalent voltage and interval mean normalization to eliminate calculation jitter caused by small voltage jumps.

[0050] The register adjustment submodule is used to calculate the difference between the secondary voltage offset and the voltage offset set and form an offset difference sequence, calculate the displacement between the offset difference sequence and the initial register result, analyze the register displacement sequence and perform register displacement adjustment operation, and generate the display drive result. The generated voltage offset set is extracted. This set is calculated based on the historical fluctuation characteristics of the LEDs and contains multiple standard voltage deviation limits, such as 1.5 volts and 0.8 volts. The difference calculation component calls the previously generated secondary voltage offset, substitutes the aforementioned 1.0 volt, and subtracts each standard voltage deviation limit in the voltage offset set one by one. The combined results generate an offset difference sequence. Subtracting 1.0 from 1.5 yields -0.5 volts, and subtracting 1.0 from 0.8 yields 0.2 volts. The displacement conversion unit obtains the displacement mapping coefficient determined by the hardware bandwidth, which is fixed at 4. It multiplies each value in the offset difference sequence with the displacement mapping coefficient to generate a registered displacement sequence. Multiplying -0.5 by 4 yields -2 bits, and multiplying 0.2 by 4 yields 0.8 bits, discarding the decimal and keeping 0 bits. The negative 2 bits with the largest absolute value are selected as the registered displacement adjustment parameter. The logic shift component reads the initial register result of the system, substitutes it with the set value 91, and performs a register shift adjustment operation on this initial register result to generate the display drive result. Shifting to the left represents magnification, shifting to the right represents magnification, and -2 bits means shifting the binary format of decimal 91 to the right by 2 data bits. Decimal 91 is converted to binary 01011011, shifted to the right by 2 bits to obtain binary 00010110, and converted back to decimal to obtain the display drive result 22. The out-of-bounds detection component determines that the value 22 is within the safe display threshold range of 0 to 255, indicating that the drive current adjustment meets the hardware limit, and the instruction is allowed to be issued. The advantage of this operation logic is that it directly maps the voltage difference to a binary shift operation, reducing the hardware consumption cycle of floating-point operations.

[0051] Please see Figure 8 A highly integrated LED display driving control method with multi-layer composite circuitry, based on the aforementioned highly integrated LED display driving device with multi-layer composite circuitry, includes the following steps: S1: Collect the number of interlayer vias and the cross-sectional area of ​​conductive copper foil in the multilayer composite circuit to calculate the return current characteristic sequence, extract the driving channel index for matching, and construct a channel mapping table; S2: Inject pulse current to collect sampling point voltage and analyze voltage offset set, combine with channel mapping table to calculate impedance state category and classify level, generate impedance level set; S3: Obtain the grayscale data of the light-emitting diode and extract the luminance reference. Extract the interlayer compensation coefficient from the impedance level set and multiply it with the luminance reference to generate the initial registration result. S4: Collect the transient current sequence of the light-emitting diode and calculate the ripple error by combining the initial register results. Convert the transient current slope out-of-bounds term into a current term and superimpose it with the ripple error to generate a reverse compensation current. S5: Inject reverse compensation current into the multilayer composite line to collect steady-state voltage and calculate the secondary voltage offset. Combine the voltage offset set to adjust the initial register result and generate the display drive result.

[0052] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A highly integrated LED display driver with multi-layer composite circuitry, characterized in that, include: The channel mapping module is used to collect the number of interlayer vias and the cross-sectional area of ​​conductive copper foil in multilayer composite circuits to calculate the return current characteristic sequence, extract the driving channel index for matching, construct the channel mapping table and pass it to the impedance classification module; The impedance classification module is used to inject pulse current to collect the voltage at the sampling point and analyze the voltage offset set. It combines the channel mapping table to calculate the impedance state category and classify the level, generate an impedance level set and pass it to the brightness compensation module. The brightness compensation module is used to acquire the grayscale data of the light-emitting diode and extract the luminance reference, extract the interlayer compensation coefficient from the impedance level set and multiply it with the luminance reference to generate the initial registration result and transmit it to the current correction module. The current correction module is used to collect the transient current sequence of the light-emitting diode and calculate the ripple error by combining the initial register result. It converts the transient current slope out-of-bounds term into a current term and superimposes it with the ripple error to generate a reverse compensation current and transmit it to the drive output module. The drive output module is used to inject the reverse compensation current into the multilayer composite line, collect the steady-state voltage, calculate the secondary voltage offset, adjust the initial register result in combination with the voltage offset set, and generate the display drive result. The channel mapping module specifically includes: The via quantity analysis submodule is used to collect the number of vias between layers of multilayer composite circuits and the cross-sectional area of ​​conductive copper foil. Based on the via distribution coordinates, the number of vias in the multilayer circuits is accumulated point by point, and the sum is performed segment by segment according to the range of copper foil cross-sectional area values. The accumulated result and the segmented sum result are combined to generate a return current characteristic sequence. The channel extraction submodule is used to obtain the pin distribution coordinates of the LED driver circuit, sequentially encode the driver channel number according to the coordinate position, sort and calculate according to the channel spacing value, and perform number rearrangement calculation in combination with the channel connection relationship to generate the driver channel index. The mapping table construction submodule is used to perform position matching based on the pin distribution coordinates according to the backflow feature sequence and the drive channel index, pair the multiple backflow path intensity values ​​with the corresponding channel numbers item by item, and perform sequential calculation on the pairing results according to the coordinate sequence to establish a channel mapping table.

2. The high-integration LED display driver device with multi-layer composite circuitry according to claim 1, characterized in that, The channel mapping table includes interlayer via distribution, conductive path identification, and driving channel index; the impedance level set includes impedance category identification, impedance level division, and channel association identification; the initial register result includes brightness reference, interlayer compensation coefficient, and driving register data; the reverse compensation current includes ripple error component, slope correction amount, and transient adjustment component; and the display driving result includes driving voltage, brightness output level, and channel driving status.

3. The high-integration LED display driver device with multi-layer composite circuitry according to claim 1, characterized in that, The impedance classification module specifically includes: The voltage calculation submodule is used to inject pulse current into the multi-layer composite line, collect voltage signal values ​​at multiple sampling points of the multi-layer composite line, subtract the voltage signal values ​​at multiple sampling points from the preset reference voltage, extract the corresponding differences at multiple sampling points and arrange them according to the sampling time points to generate a voltage offset set. The state classification submodule is used to call the channel mapping table and the voltage offset set to perform spatial mapping, substitute the spatial mapping data into the support vector machine to calculate the kernel function inner product, calculate the spatial distance of the spatial mapping data according to the classification hyperplane segmentation boundary and perform label conversion to obtain the impedance state category. The level classification submodule is used to extract the corresponding voltage amplitude data based on the impedance state category and compare it with the preset voltage boundary threshold. Based on the positive or negative attribute of the comparison difference, the impedance state category is divided into intervals. The labeled data in the same interval are aggregated to establish an impedance level set.

4. The high-integration LED display driver device with multi-layer composite circuitry according to claim 3, characterized in that, The voltage threshold is determined by acquiring the base voltage parameters of the multilayer composite circuit under standard operating conditions, collecting the impedance tolerance value of the LED driving channel, multiplying the impedance tolerance value by the reference current to convert it into a bias voltage, and then superimposing it with the base voltage parameters to extract the positive and negative deviation extreme boundary data under the corresponding conditions, and then performing equidistant quantization segmentation on the deviation extreme boundary data.

5. The high-integration LED display driver device with multi-layer composite circuitry according to claim 1, characterized in that, The brightness compensation module specifically includes: The grayscale data submodule is used to read the grayscale data of multi-layer composite circuit light-emitting diodes, extract the grayscale value sequence of multi-layer channels and perform amplitude normalization, and perform weighted average calculation of the luminous intensity of multiple channels to obtain brightness characterization data and calculate the difference between channels to generate luminous brightness benchmark. The coefficient matching submodule is used to call the corresponding impedance interval data of multiple layers in the impedance level set based on the luminance reference, extract the compensation parameter sequence corresponding to the multiple impedance intervals, index and map the compensation parameter sequence to obtain the interlayer compensation sequence, and match it with the luminance reference value proportionally to generate the interlayer compensation coefficient. The register result submodule is used to construct corresponding channel data pairs based on the interlayer compensation coefficient and the luminance reference, perform channel-by-channel multiplication to form luminance correction data, rearrange the channel sequence of the luminance correction data, and generate the initial register result.

6. The high-integration LED display driver device with multi-layer composite circuitry according to claim 1, characterized in that, The current correction module specifically includes: The waveform acquisition submodule is used to acquire the transient waveform of the conductive plane within the refresh cycle of the LED array, divide the continuous sampling points according to the time sequence and record the voltage amplitude at the corresponding sampling time, perform current conversion on the voltage difference between adjacent sampling points and rearrange them in time order to obtain the transient current sequence. The current error submodule is used to calculate the current difference at multiple times based on the transient current sequence and the initial register result, and perform periodic segmented accumulation to obtain the ripple change curve. It is then compared with a preset difference change amplitude threshold and the position of the out-of-bounds term is marked to obtain the ripple error amount. The compensation current submodule is used to call the current at the corresponding moment in the transient current sequence according to the ripple error, perform differential slope calculation on the marked out-of-bounds terms and extract the slope change, multiply the slope change by the corresponding time step coefficient and then superimpose it with the ripple error and reverse the sign to generate a reverse compensation current.

7. A high-integration LED display driver device with multi-layer composite circuitry according to claim 6, characterized in that, The threshold for the difference change amplitude is determined by acquiring the basic current fluctuation parameters under the standard operating conditions of the conductive plane, collecting the rated ripple tolerance value of the LED drive array, performing a weighted summation operation on the basic current fluctuation parameters and the rated ripple tolerance value, extracting the corresponding offset limit boundary data, and performing equidistant quantization segmentation on the offset limit boundary data.

8. The high-integration LED display driver device with multi-layer composite circuitry according to claim 1, characterized in that, The drive output module specifically includes: The current injection submodule is used to inject the reverse compensation current into the return conductor plane of the multi-layer composite line, monitor the current sampling points of the return conductor plane, collect the current sampling sequence and perform amplitude discretization, calculate the mean square value of current fluctuation and analyze the rate of change of current fluctuation in combination with the sampling time series to obtain the return current fluctuation rate. The voltage offset submodule is used to collect steady-state sampling point voltage and record steady-state voltage sampling sequence. After converting the return current fluctuation rate into voltage offset using a preset conversion coefficient, it performs difference calculation with the steady-state voltage sampling sequence and performs interval quantization. It then calculates the interval voltage mean sequence and generates secondary voltage offset. The register adjustment submodule is used to calculate the difference between the secondary voltage offset and the voltage offset set and form an offset difference sequence, calculate the displacement between the offset difference sequence and the initial register result, analyze the register displacement sequence and perform register displacement adjustment operation, and generate the display drive result.

9. A highly integrated LED display driving control method with multilayer composite circuitry, characterized in that, A high-integration LED display driver device with multilayer composite circuitry as described in any one of claims 1-8 includes the following steps: S1: Collect the number of interlayer vias and the cross-sectional area of ​​conductive copper foil in the multilayer composite circuit to calculate the return current characteristic sequence, extract the driving channel index for matching, and construct a channel mapping table; S2: Inject pulse current to collect sampling point voltage and analyze voltage offset set, combine with the channel mapping table to calculate impedance state category and classify level, and generate impedance level set; S3: Obtain the grayscale data of the light-emitting diode and extract the luminance reference. Extract the interlayer compensation coefficient from the impedance level set and multiply it with the luminance reference to generate the initial registration result. S4: Collect the transient current sequence of the light-emitting diode and calculate the ripple error by combining it with the initial register result. Convert the transient current slope out-of-bounds term into a current term and superimpose it with the ripple error to generate a reverse compensation current. S5: Inject the reverse compensation current into the multilayer composite line to collect the steady-state voltage and calculate the secondary voltage offset. Combine the voltage offset set to adjust the initial register result and generate the display drive result.

Images