Printed circuit boards and their manufacturing methods

Abstract

This application relates to the field of printed circuit board (PCB) manufacturing technology, and discloses a PCB and its manufacturing method. The PCB manufacturing method includes: stacking a circuit board substrate and a first interconnect layer, wherein the circuit board substrate includes a first circuit layer and the first interconnect layer is provided with interconnect holes; providing conductive parts in the interconnect holes; providing a ceramic substrate on the side of the first interconnect layer opposite to the circuit board substrate, the ceramic substrate including a ceramic component and a sub-board, the surface of the ceramic component being covered with a first conductive layer; and laminating the circuit board substrate, the first interconnect layer, and the ceramic substrate. The PCB and its manufacturing method provided by this application solve the problem that in existing PCBs with embedded ceramic components, achieving conductivity in the embedded ceramic area requires pre-drilling holes in the ceramic component, then laminating the ceramic component into the substrate, and subsequently drilling holes in the pre-drilled area, resulting in high requirements for drilling alignment and the alignment between the ceramic component and the substrate.

Description

Technical Field

[0001] This application relates to the field of printed circuit board manufacturing technology, and in particular to a printed circuit board and its manufacturing method. Background Technology

[0002] In the current field of high-density, high-reliability electronic packaging, especially for advanced packaging platforms such as CoWop (Chip-on-Wafer-on-Package), one of the core challenges lies in addressing the thermomechanical stress caused by the mismatch of the coefficient of thermal expansion (CTE) between different materials. This stress can lead to package structure warping, microbumps, or interconnect fatigue failure, severely impacting the long-term reliability of high-performance chips. Against this backdrop, the core value of printed circuit boards with embedded ceramic regions becomes apparent. Their ceramic materials possess low CTE, similar to that of silicon chips. By embedding these regions as functional blocks or local reinforcements within organic substrates or redistribution layers, the overall CTE of the package can be effectively adjusted and reduced.

[0003] Currently, in printed circuit boards with embedded ceramic components, to achieve conductivity in the embedded ceramic area, the only method is to pre-drill holes in the ceramic component, then press the ceramic component into the substrate, and subsequently drill holes in the pre-drilled area. This method has high requirements for the alignment of the drill holes and the alignment between the ceramic component and the substrate. Summary of the Invention

[0004] This application provides a printed circuit board and its manufacturing method to solve the problem that in existing printed circuit boards with embedded ceramic components, to achieve conductivity in the embedded ceramic area, it is only possible to pre-drill holes in the ceramic component, then press the ceramic component into the substrate, and then drill holes in the pre-drilled area, which results in high requirements for drilling alignment and the alignment between the ceramic component and the substrate.

[0005] In a first aspect, embodiments of this application provide a method for manufacturing a printed circuit board, comprising: A circuit board and a first connection layer are stacked together. The circuit board includes a first circuit layer. The first connection layer is provided with a connection hole, and the connection hole exposes a portion of the first circuit layer. A conductive part is provided inside the connection hole; A ceramic substrate is disposed on the side of the first connection layer away from the circuit board. The ceramic substrate includes a ceramic component and a sub-board. The surface of the ceramic component is covered with a first conductive layer, which covers the conductive portion. The sub-board is provided with an embedding groove, and the ceramic component is disposed in the embedding groove. The circuit board, the first connecting layer, and the ceramic substrate are pressed together, so that the first connecting layer melts and solidifies, and part of the first connecting layer fills the gap between the inner wall of the embedded groove and the ceramic component. The first conductive layer and the first circuit layer are both in contact with the conductive part and are electrically conductive.

[0006] In some embodiments, the provision of a conductive portion within the connection hole includes: providing a conductive paste within the connection hole; and the conductive paste being solidified during the pressing of the circuit board, the first connecting layer, and the ceramic substrate.

[0007] In some embodiments, the circuit board is provided with a first positioning hole, the first connecting layer is provided with a second positioning hole, and the ceramic component is provided with a third positioning hole; before stacking the circuit board and the first connecting layer, a positioning member is inserted into the first positioning hole, the positioning member protruding from the first circuit layer; when stacking the circuit board and the first connecting layer, the positioning member is passed through the second positioning hole, the positioning member protruding from the surface of the first connecting layer away from the circuit board; when the ceramic substrate is disposed on the side of the first connecting layer away from the circuit board, the positioning member is passed through the third positioning hole.

[0008] In some embodiments, two of each of the first connecting layer, the ceramic substrate, and the first circuit layer are provided, and the circuit substrate is located between the two first connecting layers. One of the first connecting layers is located between the circuit substrate and one of the ceramic substrates, and the other first connecting layer is located between the circuit substrate and the other ceramic substrate. The circuit substrate has a first side and a second side facing away from each other. The first side and the second side are respectively connected to the two first connecting layers. The first side and the second side are each provided with a first positioning hole, and the first positioning hole on the first side and the first positioning hole on the second side are staggered.

[0009] Secondly, embodiments of this application provide a printed circuit board, manufactured by the printed circuit board manufacturing method described in the first aspect. The printed circuit board includes a circuit substrate, a first connection layer, and a ceramic substrate stacked together. The first connection layer is located between the circuit substrate and the ceramic substrate, and the first connection layer is provided with a connection hole. A conductive portion is provided inside the connection hole. The circuit substrate includes a first circuit layer, and the ceramic substrate includes a ceramic component and a sub-board. The surface of the ceramic component is covered with a first conductive layer. Both the first conductive layer and the first circuit layer are in contact with the conductive portion and are electrically conductive. The sub-board is provided with an embedded groove, and the ceramic component is disposed in the embedded groove. A portion of the first connection layer fills the gap between the inner wall of the embedded groove and the ceramic component.

[0010] In some embodiments, the circuit board is provided with a first dielectric layer and a second circuit layer, the circuit board is provided with a first filling hole, the first filling hole penetrates the first dielectric layer, a first copper hole is provided inside the first filling hole, the first circuit layer and the second circuit layer are both connected to the first copper hole and are electrically conductive, the first filling hole is filled with a first insulating material, at least a portion of the first circuit layer covers the first insulating material, and the conductive part is disposed opposite to the first insulating material; And / or, the surface of the ceramic part is further covered with a second conductive layer, the second conductive layer being disposed opposite to the first conductive layer, the ceramic part being provided with a second filling hole, the interior of the second filling hole being provided with a second copper hole, the second conductive layer and the first conductive layer being connected to and electrically conductive with the second copper hole, the interior of the second filling hole being filled with a second insulating material, at least a portion of the first conductive layer covering the second insulating material, and the conductive part being disposed opposite to the second insulating material.

[0011] In some embodiments, the conductive portion is formed by solidifying a conductive slurry.

[0012] In some embodiments, the circuit board is provided with a first positioning hole, the first connecting layer is provided with a second positioning hole, the ceramic component is provided with a third positioning hole, and the printed circuit board further includes a positioning member, which passes through the first positioning hole, the second positioning hole and the third positioning hole.

[0013] In some embodiments, two of the first connection layer, the ceramic substrate, and the first circuit layer are provided, and the circuit substrate is located between the two first connection layers, one of the first connection layers is located between the circuit substrate and one of the ceramic substrates, and the other first connection layer is located between the circuit substrate and the other ceramic substrate.

[0014] In some embodiments, the printed circuit board further includes a second interconnect layer and an augmentation layer, the second interconnect layer being located between the augmentation layer and the ceramic substrate, the augmentation layer including a third circuit layer.

[0015] The printed circuit board manufacturing method provided in this application has the following advantages: First, a circuit board substrate and a first connection layer are stacked. The circuit board substrate includes a first circuit layer, and the first connection layer is provided with connection holes that expose part of the first circuit layer. Then, a conductive part is provided in the connection holes. Next, a ceramic substrate is provided on the side of the first connection layer away from the circuit board substrate. The ceramic substrate includes a ceramic part and a sub-board. The surface of the ceramic part is covered with a first conductive layer that covers the conductive part. The sub-board is provided with an embedding groove, and the ceramic part is placed in the embedding groove. Then, the circuit board substrate, the first connection layer, and the ceramic substrate are pressed together, so that the first connection layer melts and solidifies. Part of the first connection layer fills the gap between the inner wall of the embedding groove and the ceramic part. The first conductive layer and the first circuit layer are both in contact with the conductive part and are electrically conductive. Therefore, the first conductive layer and the first circuit layer can be conductive through the conductive part. It is not necessary to pre-drill holes in the ceramic part and drill holes in the pre-drilled area. Therefore, it is not necessary to consider the drilling alignment and the alignment of the ceramic substrate and the circuit board substrate.

[0016] The advantages of the printed circuit board provided in this application compared to the prior art can be seen in the description of the advantages of the manufacturing method of the printed circuit board provided in this application compared to the prior art, which will not be repeated here. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart of a method for manufacturing a printed circuit board in one embodiment of this application; Figure 2 This is a cross-sectional view of the circuit board in one embodiment of this application; Figure 3 yes Figure 2 The diagram shows a cross-sectional view of the circuit board, the first interconnect layer, the ceramic substrate, and the positioning element. Figure 4 yes Figure 3 The top view of the circuit board shown; Figure 5 yes Figure 4 A partial structural schematic diagram of the circuit board shown; Figure 6yes Figure 4 A partial structural schematic diagram of the sub-plate of the ceramic substrate shown; Figure 7 This is a schematic diagram of the positioning element, the second positioning hole, and the third positioning hole in one embodiment of the application; Figure 8 This is a cross-sectional view of the circuit board, the first interconnect layer, the ceramic substrate, the positioning element, the second interconnect layer, and the add-on layer in one embodiment of this application; Figure 9 Yes Figure 8 The diagram shown illustrates the circuit fabrication process for adding layers.

[0019] The markings in the diagram mean: 10. Circuit board; 1001, First positioning hole; 1002, Unit board; 1003, Alignment target; 101, First side; 102, Second side; 103, First hole; 104, Second hole; 11, First circuit layer; 12, Second circuit layer; 13, First dielectric layer; 14, First hole copper; 15, First insulating material; 20. First Connecting Layer; 21. Conductive part; 30. Ceramic substrate; 301. Third positioning hole; 31. Ceramic component; 32. First conductive layer; 33. Second conductive layer; 34. Second hole copper; 35. Second insulating material; 36. Sub-board; 361. Embedded groove; 40. Positioning components; 50. Second connecting layer; 60. Adding a layer. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0021] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0022] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0023] In this specification, references to "one embodiment," "some embodiments," or simply "embodiment" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. Furthermore, in one or more embodiments, specific features, structures, or characteristics may be combined in any suitable manner.

[0024] In the current field of high-density, high-reliability electronic packaging, especially for advanced packaging platforms such as CoWop (Chip-on-Wafer-on-Package), one of the core challenges lies in addressing the thermomechanical stress caused by the mismatch of the coefficient of thermal expansion (CTE) between different materials. This stress can lead to package structure warping, microbumps, or interconnect fatigue failure, severely impacting the long-term reliability of high-performance chips. Against this backdrop, the core value of printed circuit boards with embedded ceramic regions becomes apparent. Their ceramic materials possess low CTE, similar to that of silicon chips. By embedding these regions as functional blocks or local reinforcements within organic substrates or redistribution layers, the overall CTE of the package can be effectively adjusted and reduced.

[0025] Currently, in printed circuit boards with embedded ceramic components, achieving conductivity in the embedded ceramic area requires pre-drilling holes in the ceramic component, then pressing the ceramic component into the substrate, and subsequently drilling holes in the pre-drilled area. This method demands high precision in drilling alignment and the alignment between the ceramic component and the substrate. Misalignment can lead to drill bit breakage during mechanical drilling. Furthermore, to ensure proper alignment, the dimensions of the groove for embedding the ceramic component must be carefully controlled. During the pressing process, significant differences in the CTE (Chip Equivalent Tolerance) between the ceramic component and the substrate, as well as between the prepreg and the substrate, can cause warping, leading to difficulties in subsequent processing.

[0026] In view of this, this application provides a printed circuit board and a method for manufacturing the same, which solves the problem that in existing printed circuit boards with embedded ceramic components, to achieve conductivity in the embedded ceramic area, it is only possible to pre-drill holes in the ceramic component, then press the ceramic component into the substrate, and then drill holes in the pre-drilled area, which results in high requirements for drilling alignment and the alignment between the ceramic component and the substrate.

[0027] To illustrate the technical solution of this application, the following description is provided in conjunction with specific accompanying drawings and embodiments.

[0028] Please refer to Figures 1 to 4 This application provides a printed circuit board, including a circuit board 10, a first connection layer 20 and a ceramic substrate 30 stacked together. The first connection layer 20 is located between the circuit board 10 and the ceramic substrate 30. The first connection layer 20 is provided with a connection hole, and a conductive part 21 is provided inside the connection hole. The circuit board 10 includes a first circuit layer 11. The ceramic substrate 30 includes a ceramic part 31 and a sub-board 36. The surface of the ceramic part 31 is covered with a first conductive layer 32. The first conductive layer 32 and the first circuit layer 11 are both in contact with the conductive part 21 and are electrically conductive. The sub-board 36 is provided with an embedded groove 361, and the ceramic part 31 is disposed in the embedded groove 361.

[0029] The method for manufacturing a printed circuit board provided in this application includes: S100: The circuit board 10 and the first connection layer 20 are stacked. The circuit board 10 includes a first circuit layer 11. The first connection layer 20 is provided with a connection hole, and the connection hole exposes part of the first circuit layer 11.

[0030] The circuit board 10 can be a double-sided or multilayer substrate formed by at least one lamination. The material of the first circuit layer 11 can be copper, silver, or aluminum, etc. The material of the first interconnect layer 20 can include resin and glass fiber, for example, the first interconnect layer 20 is a prepreg.

[0031] S200: A conductive part 21 is provided inside the connection hole.

[0032] The conductive part 21 can be made of copper, silver, or aluminum. For example, the conductive part 21 can be a copper block, silver block, or aluminum block. Alternatively, the conductive part 21 can be formed by solidifying a conductive paste, which can be copper paste, silver paste, or aluminum paste. For example, the conductive part 21 can be manufactured using a transient liquid phase sintering (TLPS) process to achieve low-temperature sintering.

[0033] S300: A ceramic substrate 30 is disposed on the side of the first connection layer 20 away from the circuit board 10. The ceramic substrate 30 includes a ceramic component 31 and a sub-board 36. The surface of the ceramic component 31 is covered with a first conductive layer 32, which covers the conductive part 21. The sub-board 36 is provided with an embedded groove 361, and the ceramic component 31 is disposed in the embedded groove 361.

[0034] The first conductive layer 32 can be made of copper, silver, or aluminum, etc. The ceramic component 31 can be encased within the sub-plate 36, thereby protecting the ceramic component 31.

[0035] S400: The circuit board 10, the first connecting layer 20 and the ceramic substrate 30 are pressed together, so that the first connecting layer 20 melts and solidifies, and part of the first connecting layer 20 fills the gap between the inner wall of the embedded groove 361 and the ceramic part 31. The first conductive layer 32 and the first circuit layer 11 are in contact with the conductive part 21 and are electrically conductive.

[0036] The circuit board 10, the first connecting layer 20 and the ceramic substrate 30 can be pressed together by a press. After the first connecting layer 20 melts and solidifies, it connects the circuit board 10 and the ceramic substrate 30 together. The first conductive layer 32 and the first circuit layer 11 are connected through the conductive part 21, eliminating the need for drilling or other operations.

[0037] As can be seen from the above, the printed circuit board and its manufacturing method provided in this application embodiment firstly stack the circuit substrate 10 and the first connection layer 20. The circuit substrate 10 includes a first circuit layer 11, and the first connection layer 20 is provided with connection holes that expose a portion of the first circuit layer 11. Next, a conductive portion 21 is provided within the connection holes. Then, a ceramic substrate 30 is provided on the side of the first connection layer 20 away from the circuit substrate 10. The ceramic substrate 30 includes a ceramic component 31 and a sub-board 36. The surface of the ceramic component 31 is covered with a first conductive layer 32, which covers the conductive portion 21. The sub-board 36 is provided with an embedded groove 361. The ceramic component 31 is disposed in the embedded groove 361. Then, the circuit board 10, the first connecting layer 20 and the ceramic substrate 30 are pressed together, so that the first connecting layer 20 melts and solidifies. Part of the first connecting layer 20 fills the gap between the inner wall of the embedded groove 361 and the ceramic component 31. The first conductive layer 32 and the first circuit layer 11 are in contact with the conductive part 21 and are electrically connected. Therefore, the first conductive layer 32 and the first circuit layer 11 can be connected through the conductive part 21. There is no need to pre-drill holes in the ceramic component 31 and drill holes in the pre-drilled area. Therefore, there is no need to consider the drilling alignment and the alignment of the ceramic substrate 30 and the circuit board 10.

[0038] As an implementable method, the circuit board 10 is provided with a first dielectric layer 13 and a second circuit layer 12. The circuit board 10 is provided with a first filling hole that penetrates the first dielectric layer 13. A first copper hole 14 is provided inside the first filling hole. The first circuit layer 11 and the second circuit layer 12 are both connected to the first copper hole 14 and are electrically conductive. The first filling hole is filled with a first insulating material 15. At least a portion of the first circuit layer 11 covers the first insulating material 15. The conductive part 21 is disposed opposite to the first insulating material 15.

[0039] By adopting the above scheme, the first circuit layer 11 and the second circuit layer 12 can be connected through the first copper hole 14, thereby making the second circuit layer 12 electrically connected to the conductive part 21. The first insulating material 15 fills the internal space of the first copper hole 14, which helps to expel air when the circuit substrate 10, the first connecting layer 20 and the ceramic substrate 30 are pressed together, realizes the rapid decrease of vacuum, avoids surface depression or delamination caused by insufficient adhesive flow in the first connecting layer 20 during lamination, ensures tight bonding of the multilayer structure, and prevents the first copper hole 14 from collapsing under pressure. At the same time, the first insulating material 15 can make the surface of the first filling hole flat, which makes it easier to set the first circuit layer 11 on the surface of the first insulating material 15 and improves the wiring density.

[0040] It should be noted that multiple first dielectric layers 13 and second circuit layers 12 can be provided. The material of the second circuit layer 12 can be copper, silver, or aluminum, etc. The material of the first dielectric layer 13 can include resin and glass fiber, etc. The first insulating material 15 can be resin, etc., and the first insulating material 15 is located inside the first copper hole 14.

[0041] As an implementable method, the surface of the ceramic part 31 is also covered with a second conductive layer 33, which is disposed opposite to the first conductive layer 32. The ceramic part 31 is provided with a second filling hole, and a second copper hole 34 is disposed inside the second filling hole. The second conductive layer 33 and the first conductive layer 32 are both connected to the second copper hole 34 and are electrically conductive. The interior of the second filling hole is filled with a second insulating material 35, and at least part of the first conductive layer 32 covers the second insulating material 35. The conductive part 21 is disposed opposite to the second insulating material 35.

[0042] By adopting the above solution, the second conductive layer 33 and the first conductive layer 32 can be connected through the second copper hole 34, thereby making the second conductive layer 33 electrically connected to the conductive part 21. The second insulating material 35 fills the internal space of the second copper hole 34, which helps to expel air when the circuit board 10, the first connecting layer 20 and the ceramic substrate 30 are pressed together, realizes the rapid vacuum drop, avoids surface depression or delamination caused by insufficient adhesive flow in the first connecting layer 20 during lamination, ensures tight bonding of the multilayer structure, and prevents the second copper hole 34 from collapsing under pressure. At the same time, the second insulating material 35 can make the surface of the second filling hole flat, which makes it easier to set the first conductive layer 32 on the surface of the second insulating material 35 and improves the wiring density.

[0043] It should be noted that the material of the second conductive layer 33 can be copper, silver, or aluminum, etc. The second insulating material 35 can be resin, etc. The second insulating material 35 is located inside the second copper hole 34. The second filling hole and the second copper hole 34 form a metallized through hole. The two ends of the metallized through hole are respectively provided with a first conductive layer 32 and a second conductive layer 33 covering the resin surface.

[0044] Please refer to Figures 1 to 4 In some embodiments, the conductive part 21 is formed by solidifying a conductive paste.

[0045] The provision of a conductive part 21 within the connection hole includes: providing a conductive slurry within the connection hole.

[0046] For example, conductive paste can be applied to the connection hole by printing.

[0047] When the circuit board 10, the first connecting layer 20 and the ceramic substrate 30 are pressed together, the conductive paste is solidified.

[0048] By adopting the above solution, the first conductive layer 32 and the first circuit layer 11 can be tightly connected to the conductive part 21 with low resistance at the connection point, resulting in better conductivity and saving process steps.

[0049] It should be noted that the conductive paste can be copper paste, silver paste, or aluminum paste, etc. When the circuit board 10, the first connecting layer 20, and the ceramic substrate 30 are pressed together, the conductive paste can be sintered and cured simultaneously. The conductive part 21 formed by the cured conductive paste enables the connection between the first circuit layer 11 of the circuit board 10 and the first conductive layer 32 of the ceramic substrate 30. During the sintering and curing process of the conductive paste, an IMC (Intermetallic Compound) layer is formed on both the surface of the first circuit layer 11 (such as the copper / gold surface) and the surface of the first conductive layer 32 (such as the copper / gold surface), achieving stable electrical conduction.

[0050] It is understandable that the first conductive layer 32, the first circuit layer 11, and the conductive part 21 can be made of the same material so that the three are tightly connected and the resistance at the connection point is small.

[0051] Optionally, the circuit board 10 is provided with a first positioning hole 1001, the first connecting layer 20 is provided with a second positioning hole, the ceramic component 31 is provided with a third positioning hole 301, and the printed circuit board also includes a positioning component 40, which passes through the first positioning hole 1001, the second positioning hole and the third positioning hole 301.

[0052] It should be noted that when the circuit board 10 includes multiple unit boards 1002, each unit board 1002 has its own corresponding alignment target 1003. When processing the first positioning hole 1001 corresponding to each unit board 1002, the corresponding alignment target 1003 is used to reduce the impact of expansion and contraction of the circuit board 10.

[0053] Before stacking the circuit board 10 and the first connection layer 20, a positioning member 40 is inserted into the first positioning hole 1001, and the positioning member 40 protrudes from the first circuit layer 11; when stacking the circuit board 10 and the first connection layer 20, the positioning member 40 is inserted through the second positioning hole, and the positioning member 40 protrudes from the surface of the first connection layer 20 away from the circuit board 10; when a ceramic substrate 30 is disposed on the side of the first connection layer 20 away from the circuit board 10, the positioning member 40 is inserted through the third positioning hole 301.

[0054] By adopting the above solution, the positioning component 40 can limit the position between the circuit board 10, the first connection layer 20 and the ceramic component 31, ensuring the alignment and pressing accuracy of the three components.

[0055] It should be noted that multiple positioning holes 1001, 2, 301, and 40 can be provided, and each hole can be configured in a one-to-one correspondence. The positioning hole 40 can be a copper nail or a plastic nail, etc.

[0056] It should also be noted that the sub-plate 36 may also be provided with a third positioning hole 301, which can be processed by mechanical milling or laser ablation.

[0057] Optionally, two first connection layers 20, two ceramic substrates 30, and two first circuit layers 11 are provided, and the circuit substrate 10 is located between the two first connection layers 20. One first connection layer 20 is located between the circuit substrate 10 and one of the ceramic substrates 30, and the other first connection layer 20 is located between the circuit substrate 10 and the other ceramic substrate 30.

[0058] This configuration allows for the creation of a multilayer printed circuit board with ceramic components 31.

[0059] It is understandable that the ceramic substrates 30 and the first circuit layer 11 on both sides of the circuit board 10 can be pressed together synchronously or pressed separately one after the other.

[0060] It should be noted that the printed circuit board manufacturing method provided in this application adopts the embedded ceramic component 31 plus transient liquid phase sintering process. Through the process of combining precise positioning and low temperature sintering, the ceramic component 31 can be embedded in the multilayer printed circuit board with high precision and high reliability. At the same time, the process and design are optimized to improve the warpage problem.

[0061] The circuit board 10 has a first side 101 and a second side 102 facing away from each other. The first side 101 and the second side 102 are respectively connected to two first connection layers 20. The first side 101 and the second side 102 are both provided with a first positioning hole 1001, and the first positioning hole 1001 located on the first side 101 and the first positioning hole 1001 located on the second side 102 are arranged alternately.

[0062] This configuration avoids interference between the positioning member 40 inserted into the first positioning hole 1001 on the first side 101 and the positioning member 40 inserted into the first positioning hole 1001 on the second side 102.

[0063] For example, please refer to the specific details. Figure 5 The first positioning hole 1001 located on the first side 101 is the first hole 103, and the first positioning hole 1001 located on the second side 102 is the second hole 104. The first hole 103 and the second hole 104 are arranged alternately.

[0064] Please refer to this as well. Figure 8 and Figure 9 Optionally, the printed circuit board further includes a second interconnect layer 50 and an enhancement layer 60, the second interconnect layer 50 being located between the enhancement layer 60 and the ceramic substrate 30, and the enhancement layer 60 including a third circuit layer.

[0065] This configuration allows for the creation of a multilayer printed circuit board with ceramic components 31.

[0066] It should be noted that the material of the third circuit layer can be copper, silver, or aluminum, etc. The material of the second connecting layer 50 can include resin and glass fiber, for example, the second connecting layer 50 is formed by melting and solidifying a prepreg. The second connecting layer 50 and the addendum layer 60 can be laminated together with the circuit substrate 10, the first connecting layer 20, and the ceramic substrate 30. After lamination, laser drilling, via filling, and circuit fabrication are carried out normally. The third circuit layer that needs to be conductive is connected from top to bottom through the conductive material located in the blind hole of the second connecting layer 50, the second conductive layer 33, the second hole copper 34, the first conductive layer 32, the conductive part 21, the first circuit layer 11, the first hole copper 14, and the second circuit layer 12.

[0067] The length of the positioning member 40 is the sum of 1 / 2 to 2 / 3 (or 2 / 3) of the thickness of the circuit board 10, the thickness of the first connecting layer 20, the thickness of the ceramic part 31, and 1 / 2 of the thickness of the second connecting layer 50. Controlling the length of the positioning member 40 ensures that after insertion, the first positioning hole 1001 can fix the positioning member 40, and that a portion of the positioning member 40 is exposed to ensure it can fit over the ceramic part 31. Simultaneously, the length of the positioning member 40 cannot exceed the pre-stacked second connecting layer 50 and the reinforcing layer 60. Exceeding this length will cause the second connecting layer 50 and the reinforcing layer 60 to be subjected to force and then tilt during pressing, resulting in board misalignment. It also cannot be lower than the ceramic part 31. If it is lower than the ceramic part 31, the ceramic part 31 cannot be fitted into the positioning member 40, resulting in the ceramic part 31 and the sub-board 36 being unable to be positioned.

[0068] For example, the circuit board 10 can be manufactured through processes such as pre-processing, mechanical drilling, resin plugging, POFV (Plating OverFilled Via, resin plugging electroplating filling), image film exposure, controlled depth drilling, and browning.

[0069] The preceding processes include material feeding, image film application and exposure, image etching, AOI (Automatic Optical Inspection) & VRS (Visual Review Station), browning, lamination, and target drilling.

[0070] Mechanical drilling: The first filling hole corresponding to the data is drilled by a mechanical drilling machine. After drilling, the hole is inspected and deburred in sequence.

[0071] Electroplating: A layer of copper is deposited in the first filling hole using chemical solutions, and then electroplated to the target copper thickness to obtain copper 14 in the first hole.

[0072] Resin plugging: Using a vacuum resin plugging machine, aluminum sheets are used as stops to open windows. Resin plugging is performed in the area where the first copper 14 hole is located. In other positions, aluminum sheets are used as stops and no resin plugging is performed.

[0073] Resin-filled baking plate: After resin filling, insert the rack and bake the plate in a vertical oven at 150℃*2H to ensure that the resin filling ink is cured and obtain the first insulating material 15.

[0074] Resin grinding: The ink protruding above the board surface is ground using a resin grinding device with the ceramic grinding section closed.

[0075] POFV: After resin grinding, the board undergoes a single copper plating process, depositing a thin layer of copper on the resin surface and thickening it to the target copper thickness, so that a layer of copper is also coated on the resin, thus obtaining the first circuit layer 11, which serves as the base layer PAD (pad) for the subsequent sintering of the conductive paste for the conductive part 21.

[0076] Image film exposure: Using an LDI (Laser Direct Imaging) exposure machine, the required lines and target positions are exposed onto the board surface.

[0077] Image etching: Using an etching solution, the copper conductors without dry film protection are etched away, while the copper conductors with dry film protection are left behind.

[0078] AOI: Perform optical inspection on the finished circuit board 10 to confirm its quality.

[0079] Controlled depth drilling: The first positioning hole 1001 is drilled with controlled depth. The thickness of the circuit board 10 is 0.9mm, so the controlled depth is 0.6mm (2 / 3 of the board thickness). Assuming the thickness of the ceramic component 31 is 0.3mm, the thickness of the first connecting layer 20 is 0.1mm, and the thickness of the second connecting layer 50 is 0.1mm, the required length of the positioning component 40 is 0.6+0.1+0.3+0.05=1.05mm. In order to ensure that the positioning component 40 protrudes beyond the ceramic thickness and is recessed into the second connecting layer 50, the tolerance of the positioning component 40 needs to be controlled within 1.05±0.025mm.

[0080] Browning: A chemical reaction is used to generate a uniform, organometallic complex film with a specific roughness on a clean copper surface.

[0081] The ceramic part 31 can be manufactured through processes such as copper sputtering, resin hole plugging, resin hole plugging baking plate, resin grinding, POFV, image film exposure, image etching, titanium removal, AOI & VRS, browning.

[0082] Sputtered copper: A layer of titanium is first deposited inside the second filling hole of the ceramic part 31 by vacuum sputtering, and then thickened to the target copper thickness to obtain the second hole copper 34.

[0083] Resin plugging: Using a vacuum resin plugging machine, aluminum sheets are used as stops to open windows. Resin plugging is performed in the area where the second copper 34 hole is located. In other positions, aluminum sheets are used as stops and no resin plugging is performed.

[0084] Resin-filled baking plate: After resin filling, insert the rack and bake the plate in a vertical oven at 150℃*2H to ensure that the resin filling ink is cured and obtain the second insulating material 35.

[0085] Resin grinding: The ink protruding above the board surface is ground using a resin grinding device with the ceramic grinding section closed.

[0086] POFV: After resin grinding, the board undergoes a single copper plating process to deposit a thin layer of copper on the resin surface. This is then thickened to the target copper thickness, so that a layer of copper is also coated on the resin, resulting in a first conductive layer 32 and a second conductive layer 33. The first conductive layer 32 serves as the base layer PAD (pad) for the subsequent sintering of the conductive paste for the conductive part 21.

[0087] Image film exposure: Using an LDI exposure machine, the required lines and target positions are exposed onto the surface of the daughterboard 36.

[0088] Image etching: Using an etching solution, the copper conductors without dry film protection are etched away, while the copper conductors with dry film protection are left behind.

[0089] AOI: To perform optical inspection on the completed circuit to confirm its quality.

[0090] Titanium removal: The titanium layer in the etched circuit gaps is removed using a special solution (usually sodium hydroxide) to prevent short circuits.

[0091] Browning: A chemical reaction is used to generate a uniform, organometallic complex film with a specific roughness on a clean copper surface.

[0092] Sub-board 36 can be manufactured through processes such as material cutting, image film exposure, image etching, AOI, drilling tool holes, milling grooves, and browning.

[0093] Image film exposure: Using an LDI exposure machine, the required lines and target positions are exposed onto the board surface.

[0094] Image etching: Using an etching solution, the copper conductors without dry film protection are etched away, while the copper conductors with dry film protection are left behind.

[0095] AOI: To perform optical inspection on the completed circuit to confirm its quality.

[0096] Drill tool holes: Drill a second positioning hole that matches the positioning part 40. To avoid misalignment, the third positioning hole 301 is 0.1mm larger on one side than the positioning part 40. The second positioning hole can also be 0.1mm larger on one side than the positioning part 40.

[0097] Routing groove: A recessed groove 361 is routed out to accommodate the ceramic component 31. In order to improve the large difference between the CTE of the ceramic component 31 and the CTE of the circuit board 10 and the CTE of the first connection layer 20, which may cause the ceramic component 31 to be squeezed, resulting in board surface distortion and warping, the size of the recessed groove 361 is 0.025mm larger on one side than the size of the ceramic component 31.

[0098] Browning: A chemical reaction is used to generate a uniform, organometallic complex film with a specific roughness on a clean copper surface.

[0099] The conductive part 21 can be manufactured through the following process.

[0100] Vacuum fast pressing: The first connecting layer 20 and the PET (Polyethylene Terephthalate) film are sequentially fixed on the circuit board 10 by a vacuum fast pressing machine and pre-pressed together with the circuit board 10.

[0101] Laser drilling: Laser drilling is performed on the first connecting layer 20 and the PET film corresponding to the area where the connecting hole is located to obtain the connecting hole.

[0102] Copper paste printing: Copper paste is printed inside the connecting hole. After printing, a pre-baking process is performed, and the PET film is removed after pre-baking.

[0103] Positioning component 40: Plastic nails are inserted into the first positioning hole 1001 and the second positioning hole as positioning components 40, and different plastic nails are fitted into the third positioning hole 301 of the ceramic component 31 and the third positioning hole 301 of the sub-plate 36.

[0104] Pre-stack: The sub-plate 36, ceramic part 31, second connecting layer 50 and additional layer 60 are stacked together.

[0105] Pressing: Copper paste sintering is carried out simultaneously during pressing.

[0106] Controlled drilling: The sum of the thicknesses of the circuit board 10 and the first connecting layer 20, ceramic substrate 30, second connecting layer 50 and add-on layer 60 on one side of the circuit board 10 is 1.5mm, so the controlled drilling depth is 1.0mm (2 / 3 of the board thickness). Assuming the thickness of the ceramic component 31 is 0.3mm, the thickness of the first connecting layer 20 on the other side of the circuit board 10 is 0.1mm, and the thickness of the second connecting layer 50 on the other side of the circuit board 10 is 0.1mm, then the length of the positioning component 40 required on the other side of the circuit board 10 is 1.0+0.1+0.3+0.05mm=1.55mm. In order to ensure that the positioning component 40 on the other side of the circuit board 10 protrudes beyond the ceramic thickness and is recessed into the second connecting layer 50, the tolerance of the positioning component 40 needs to be controlled within 1.55±0.025mm.

[0107] Next, the first connecting layer 20, ceramic substrate 30, second connecting layer 50 and addition layer 60 on the other side of the circuit board 10 can be laminated. The overall process is the same as the above process and will not be described again.

[0108] After completing the following processes in sequence, such as lamination, target drilling, laser drilling, blind hole filling, image film exposure, image etching, AOI, solder mask, OSP (Organic Solderability Preservative), router, electrical testing, FQC (Final Quality Control), FQA (Final Quality Assurance), and packaging, etc.

[0109] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for manufacturing a printed circuit board, characterized in that, include: A circuit board and a first connection layer are stacked together. The circuit board includes a first circuit layer. The first connection layer is provided with a connection hole, and the connection hole exposes a portion of the first circuit layer. A conductive part is provided inside the connection hole; A ceramic substrate is disposed on the side of the first connection layer away from the circuit board. The ceramic substrate includes a ceramic component and a sub-board. The surface of the ceramic component is covered with a first conductive layer, which covers the conductive portion. The sub-board is provided with an embedding groove, and the ceramic component is disposed in the embedding groove. The circuit board, the first connecting layer, and the ceramic substrate are pressed together, so that the first connecting layer melts and solidifies, and part of the first connecting layer fills the gap between the inner wall of the embedded groove and the ceramic component. The first conductive layer and the first circuit layer are both in contact with the conductive part and are electrically conductive.

2. The method for manufacturing a printed circuit board according to claim 1, characterized in that, The provision of a conductive portion within the connection hole includes: providing a conductive paste within the connection hole; and during the pressing of the circuit board, the first connecting layer, and the ceramic substrate, the conductive paste is solidified.

3. The method for manufacturing a printed circuit board according to claim 1, characterized in that, The circuit board is provided with a first positioning hole, the first connecting layer is provided with a second positioning hole, and the ceramic component is provided with a third positioning hole. Before stacking the circuit board and the first connecting layer, a positioning component is inserted into the first positioning hole, and the positioning component protrudes from the first circuit layer. When stacking the circuit board and the first connecting layer, the positioning component is passed through the second positioning hole, and the positioning component protrudes from the surface of the first connecting layer away from the circuit board. When the ceramic component is disposed on the side of the first connecting layer away from the circuit board, the positioning component is passed through the third positioning hole.

4. The method for manufacturing a printed circuit board according to claim 3, characterized in that, Two of each of the first connecting layer, the ceramic substrate, and the first circuit layer are provided, and the circuit substrate is located between the two first connecting layers. One of the first connecting layers is located between the circuit substrate and one of the ceramic substrates, and the other first connecting layer is located between the circuit substrate and the other ceramic substrate. The circuit substrate has a first side and a second side facing away from each other. The first side and the second side are respectively connected to the two first connecting layers. The first side and the second side are each provided with a first positioning hole, and the first positioning hole on the first side and the first positioning hole on the second side are staggered.

5. A printed circuit board, characterized in that, The printed circuit board is manufactured by the method of any one of claims 1 to 4. The printed circuit board includes a circuit substrate, a first connection layer and a ceramic substrate stacked together. The first connection layer is located between the circuit substrate and the ceramic substrate. The first connection layer is provided with a connection hole and a conductive part is provided inside the connection hole. The circuit substrate includes a first circuit layer. The ceramic substrate includes a ceramic part and a sub-board. The surface of the ceramic part is covered with a first conductive layer. The first conductive layer and the first circuit layer are both in contact with the conductive part and are electrically conductive. The sub-board is provided with an embedded groove. The ceramic part is disposed in the embedded groove. Part of the first connection layer fills the gap between the inner wall of the embedded groove and the ceramic part.

6. The printed circuit board according to claim 5, characterized in that, The circuit board is provided with a first dielectric layer and a second circuit layer. The circuit board is provided with a first filling hole that penetrates the first dielectric layer. A first copper hole is provided inside the first filling hole. The first circuit layer and the second circuit layer are both connected to the first copper hole and are electrically conductive. The first filling hole is filled with a first insulating material. At least a portion of the first circuit layer covers the first insulating material. The conductive part is disposed opposite to the first insulating material. And / or, the surface of the ceramic part is further covered with a second conductive layer, the second conductive layer being disposed opposite to the first conductive layer, the ceramic part being provided with a second filling hole, the interior of the second filling hole being provided with a second copper hole, the second conductive layer and the first conductive layer being connected to and electrically conductive with the second copper hole, the interior of the second filling hole being filled with a second insulating material, at least a portion of the first conductive layer covering the second insulating material, and the conductive part being disposed opposite to the second insulating material.

7. The printed circuit board according to claim 5, characterized in that, The conductive part is formed by solidifying a conductive slurry.

8. The printed circuit board according to claim 5, characterized in that, The circuit board is provided with a first positioning hole, the first connecting layer is provided with a second positioning hole, the ceramic component is provided with a third positioning hole, and the printed circuit board also includes a positioning component, which passes through the first positioning hole, the second positioning hole and the third positioning hole.

9. The printed circuit board according to any one of claims 5 to 8, characterized in that, Two of each of the first connection layer, the ceramic substrate, and the first circuit layer are provided, and the circuit substrate is located between the two first connection layers. One of the first connection layers is located between the circuit substrate and one of the ceramic substrates, and the other first connection layer is located between the circuit substrate and the other ceramic substrate.

10. The printed circuit board according to any one of claims 5 to 8, characterized in that, The printed circuit board further includes a second interconnect layer and an augmentation layer, wherein the second interconnect layer is located between the augmentation layer and the ceramic substrate, and the augmentation layer includes a third circuit layer.

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