A method for measuring minimum operating voltage of SRAM

Abstract

The application discloses a kind of SRAM minimum operating voltage measurement methods, comprising the following steps: by Hspice simulation to obtain the simulation value Vsim of SRAM minimum operating voltage, at the simulation value Vsim and standard voltage respectively to obtain corresponding fbc value;According to the fbc value of simulation value Vsim and standard voltage, the direction or range of actual value of SRAM minimum operating voltage is determined, and the corresponding interval is set, the interval is gradually reduced by dichotomy and the midpoint voltage in interval is selected to test, until the measurement accuracy meets the requirement, the actual measurement value of SRAM minimum operating voltage is obtained.The application reduces the test range by introducing two preset voltage values, then compares the standard deviation of calculated test voltage point with test step, so as to improve the measurement accuracy, save test time, and improve the test result accuracy.

Description

Technical Field

[0001] This invention relates to semiconductor device testing technology, and more specifically to a method for measuring the minimum operating voltage of SRAM. Background Technology

[0002] Static Random Access Memory (SRAM) is an important component in Virtual Large Scale Integration (VLSI) due to its excellent stability and compatibility; the minimum operating voltage (Vmin) of SRAM is one of the important parameters for device stability. However, size reduction and process variations in manufacturing can lead to an increase in the minimum operating voltage (Vmin) of SRAM. To improve device stability, methods for detecting the minimum operating voltage of SRAM become crucial.

[0003] Currently, the testing method for the minimum operating voltage Vmin of SRAM is mainly integrated into the CP (wafer testing) test program. This involves setting the starting voltage VDD and the test step size in the test program, scanning different voltage points, and then obtaining the distribution of fail bin counts (FBCs) at different voltages to infer Vmin. This traditional scanning test method has the following problems: (1) Large amount of data: It is necessary to scan a large number of voltage points, and each voltage point needs to undergo a complete test process; (2) Long testing time: The scanning range is wide and the testing steps are complicated, resulting in a long overall testing time; (3) High memory usage: A large amount of test data needs to be stored and processed, which consumes a lot of system resources; (4) Cumbersome data processing: It requires analysis and processing of a large amount of test data, which is not conducive to testing Vmin under different temperature and auxiliary circuit conditions.

[0004] Therefore, there is an urgent need for a method that can quickly and accurately measure the minimum operating voltage of SRAM in order to shorten the test time and improve the test accuracy. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a method for measuring the minimum operating voltage of SRAM, which addresses the above-mentioned problems in the prior art. By introducing a preset voltage value to narrow the test range, the method uses a bisection method to successively reduce the interval, and judges the measurement accuracy by comparing the standard deviation of the test voltage point with the test step size. This method saves test time and improves the accuracy of test results.

[0006] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: A method for measuring the minimum operating voltage of SRAM includes the following steps: S101) The simulated value Vsim of the minimum operating voltage of SRAM is obtained by Hspice simulation, and the corresponding fbc value is obtained by testing the simulated value Vsim and the standard voltage respectively. S102) Determine the direction or range of the actual value of the minimum operating voltage of the SRAM based on the simulation value Vsim and the fbc value of the standard voltage, and set the corresponding interval; S103) The interval is successively reduced by the bisection method and the voltage at the midpoint of the interval is selected for testing until the measurement accuracy meets the requirements, so as to obtain the actual measured value of the minimum working voltage of SRAM.

[0007] Furthermore, when determining the direction or range of the actual value of the SRAM minimum operating voltage based on the simulated value Vsim and the fbc value of the standard voltage, the following steps are included: If the fbc value corresponding to the maximum value of the simulated value Vsim and the standard voltage is 0 and the fbc value corresponding to the minimum value is not 0, then the actual value of the minimum operating voltage of the SRAM is within the range of the simulated value Vsim and the standard voltage. If both the simulated value Vsim and the fbc value corresponding to the standard voltage are 0, then the actual value of the minimum operating voltage of the SRAM is outside the lower limit of the range between the simulated value Vsim and the standard voltage. If neither the simulated value Vsim nor the fbc value corresponding to the standard voltage is 0, then the actual value of the minimum operating voltage of the SRAM is outside the upper limit of the range between the simulated value Vsim and the standard voltage.

[0008] Furthermore, when setting the corresponding interval, it includes: If the actual value of the minimum operating voltage of the SRAM is within the range between the simulated value Vsim and the standard voltage, the simulated value Vsim and the standard voltage are respectively taken as the upper limit and lower limit of the range; If the actual value of the minimum operating voltage of the SRAM is outside the lower limit of the range between the simulated value Vsim and the standard voltage, select the minimum value between the simulated value Vsim and the standard voltage, reduce the voltage of the minimum value by a specified step size and test until the corresponding fbc value is not 0, and take the voltage corresponding to the non-zero fbc value and the voltage of the previous step size as the upper limit and lower limit of the range, respectively. If the actual value of the minimum operating voltage of the SRAM is outside the upper limit of the interval between the simulated value Vsim and the standard voltage, select the maximum value between the simulated value Vsim and the standard voltage, increase the voltage of the maximum value by a specified step size and test until the corresponding fbc value is 0. The voltage corresponding to the fbc value of 0 and the voltage of the previous step size are respectively used as the upper limit and lower limit of the interval.

[0009] Furthermore, the testing process includes: SRAM write operations are performed under test voltage, and SRAM read operations are performed under normal voltage. The number of FBCs is recorded and used as the corresponding FBC value when the test voltage write fails. Alternatively, SRAM write and read operations can be performed under normal voltage to record the first number of fbcs, while SRAM read operations can be performed under test voltage to record the second number of fbcs. The difference between the second number of fbcs and the first number of fbcs can be calculated as the fbc value corresponding to the test voltage read failure.

[0010] Furthermore, when using the bisection method to successively reduce the interval and select the midpoint voltage of the interval for testing, the following steps are included: S201) Calculate the average of the upper and lower limits of the current interval to obtain the midpoint voltage value, and use the midpoint voltage value as the test voltage to obtain the corresponding fbc value. S202) If the value of fbc is 0, the midpoint voltage value is used as the upper limit of the new interval, and the lower limit of the current interval is used as the lower limit of the new interval. If the fbc value is not 0, the midpoint voltage value is used as the lower limit of the new interval, and the upper limit of the current interval is used as the upper limit of the new interval; (S203) Jump to step S201 until the measurement accuracy meets the requirements.

[0011] Furthermore, step S203 also includes a step of determining whether the measurement accuracy meets the requirements, including: Calculate the standard deviation of a first specified number of consecutive test voltages up to the current round, and calculate the absolute value of the difference between a second specified number of consecutive test voltages up to the current round; If the standard deviation is greater than the absolute value, then the measurement accuracy meets the requirements.

[0012] Furthermore, when obtaining the actual measured value of the minimum operating voltage of the SRAM, the following is included: If the measurement accuracy meets the requirements and the fbc value corresponding to the test voltage of the current round is 0, then the actual measured value of the minimum operating voltage of the SRAM is the value of the current test voltage. If the measurement accuracy meets the requirements and the fbc value corresponding to the test voltage of the current round is not 0, then the actual measured value of the minimum operating voltage of the SRAM is the value of the previous test voltage.

[0013] Furthermore, when obtaining the simulated value Vsim of the minimum operating voltage of SRAM through Hspice simulation, the Butterfly method is used to calculate the static noise margin of SRAM to obtain the minimum operating voltage for reading static noise margin. At the same time, the BL method is used to calculate the static noise margin of SRAM to obtain the minimum operating voltage for writing static noise margin. Finally, the larger value between the minimum operating voltage for reading and the minimum operating voltage for writing is taken as the simulated value Vsim of the minimum operating voltage of SRAM.

[0014] Furthermore, the standard voltage is 0.8 times the normal operating voltage of the SRAM.

[0015] Furthermore, the method also includes: repeatedly executing steps S101 to S103 under different temperature environments to obtain actual measured values ​​of the minimum operating voltage of the SRAM under different temperature conditions.

[0016] Compared with the prior art, the advantages of the present invention are as follows: (1) By introducing the preset voltage value Vsim obtained from Hspice simulation and the industry standard voltage 0.8Vdd, the preliminary range of the minimum operating voltage of SRAM can be quickly determined, effectively narrowing the test range; (2) The test is carried out by successively reducing the interval using the bisection method, which significantly reduces the number of test voltage points compared with the traditional scanning method and significantly shortens the test time; (3) The measurement accuracy is judged by comparing the standard deviation of the test voltage point with the test step size, which provides a clear standard for the final Vmin value and improves the accuracy of the test results; (4) This method can be conveniently applied to Vmin testing under different temperature environments, providing an effective testing means for the stability evaluation of SRAM devices under different operating conditions. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the overall process of the SRAM minimum operating voltage measurement method in an embodiment of the present invention.

[0018] Figure 2 This is a schematic diagram of the process of obtaining Vsim from Hspice simulation in an embodiment of the present invention.

[0019] Figure 3 This is a schematic diagram of the process for obtaining the fbc value during testing in an embodiment of the present invention.

[0020] Figure 4 This is a schematic diagram illustrating the preliminary determination of the Vmin range when the simulated value Vsim is less than the standard voltage in an embodiment of the present invention.

[0021] Figure 5The following is a detailed schematic diagram of three Vmin range cases when the simulated value Vsim is less than the standard voltage in the embodiments of the present invention, wherein: (a) indicates that Vmin is outside the lower limit of the interval between the simulated value Vsim and the standard voltage, (b) indicates that Vmin is in the interval between the simulated value Vsim and the standard voltage, and (c) indicates that Vmin is outside the upper limit of the interval between the simulated value Vsim and the standard voltage.

[0022] Figure 6 This is a schematic diagram of the test procedure for Vmin when the simulated value Vsim is less than the standard voltage in an embodiment of the present invention.

[0023] Figure 7 This is a detailed schematic diagram of the bisection test process in an embodiment of the present invention.

[0024] Figure 8 This is a schematic diagram illustrating the effect of the Vmin measurement method in an embodiment of the present invention. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings and specific preferred embodiments, but this does not limit the scope of protection of the present invention.

[0026] Example 1 This embodiment proposes a method for measuring the minimum operating voltage of SRAM. By introducing two preset voltage points and testing the Δfbc (Fail Bit Count) at these two voltage points, the initial range of Vmin can be quickly determined. Then, by uniformly spaced sampling with a binary search method or by directly using the binary search method, combined with the Δfbc magnitude and error judgment, the accurate Vmin value can be obtained.

[0027] like Figure 1 As shown, the method includes the following steps: S101: The simulated minimum operating voltage Vsim of the SRAM is obtained through Hspice simulation. The corresponding fbc values ​​are obtained by testing the simulated value Vsim and the standard voltage. In this embodiment, according to industry standards for SRAM devices, the SRAM normal operating voltage Vdd is selected as 0.8 times the standard voltage, i.e., 0.8Vdd. This standard voltage is a generally accepted SRAM stable operating voltage threshold in the industry. S102: Determine the direction or range of the actual value of the minimum operating voltage of the SRAM based on the simulation value Vsim and the fbc value of the standard voltage, and set the corresponding interval; S103: The interval is successively reduced by using the bisection method and the voltage at the midpoint of the interval is selected for testing until the measurement accuracy meets the requirements, so as to obtain the actual measured value of the minimum operating voltage of the SRAM.

[0028] The following provides a detailed explanation of each step.

[0029] In step S101 of this embodiment, the simulated value Vsim of the minimum operating voltage of the SRAM is first obtained through Hspice simulation. For example... Figure 2 As shown, the Hspice simulation process includes: A device model is established based on the characteristics of single-transistor transistors (PD pull-down transistor, PG transmission gate transistor, PU pull-up transistor); Schematic diagram of a 6-transistor (6T) SRAM cell circuit composed of transistors; Simultaneously, the Butterfly method and the Bit Line (BL) method are used to calculate the Static Noise Margin (SNM) of SRAM through Hspice simulation.

[0030] The larger of the minimum operating voltage for reading and the minimum operating voltage for writing is taken as the simulation value Vsim of the minimum operating voltage of SRAM.

[0031] Specifically, the Butterfly method plots the voltage transfer characteristic curves of the two cross-coupled inverters in an SRAM cell, forming a "butterfly" shape. The SNM value is determined from the side length of the smallest inscribed square in the butterfly diagram, and the minimum operating voltage Read Vmin corresponding to the Read Static Noise Margin RSNM is calculated. The BL method, on the other hand, evaluates the read / write stability of the SRAM by analyzing bit line voltage variations, and calculates the minimum operating voltage Write Vmin corresponding to the Write Static Noise Margin WSNM. The minimum operating voltage of an SRAM cell is determined by both read and write operations; therefore, the larger of the minimum operating voltage Read_Vmin and the minimum operating voltage Write_Vmin is taken as the simulation value Vsim, i.e.: Vsim = Max(Read_Vmin, Write_Vmin) After obtaining the simulation value Vsim and the standard voltage 0.8Vdd, tests were performed at these two voltage points to obtain the corresponding FBC (Fail Bit Count) difference. For example... Figure 3 As shown, the testing method includes two modes: The first mode is the write failure test: A write operation is performed on the SRAM at a test voltage, followed by a read operation at a normal voltage (e.g., Vdd). The number of error bits (fbc0) encountered during the read operation is recorded as the fbc value Δfbc, which is used to measure the minimum operating voltage for the write operation. If the write operation completes successfully at the test voltage, no errors should occur during the read operation at the normal voltage, and the fbc value Δfbc will be 0. Conversely, if the write operation fails, error bits will appear, and the fbc value Δfbc will not be 0.

[0032] The second mode is the read failure test: First, SRAM write and read operations are performed under normal voltage, and the first number of read bits (fbc1) is recorded as a baseline value. Then, SRAM read operations are performed under the test voltage, and the second number of read bits (fbc2) is recorded. The difference between the second and first number of read bits is calculated as the read bit value Δfbc corresponding to the read failure at the test voltage, which is used to measure the minimum operating voltage for read operations. If the read operation works normally under the test voltage, the number of read bits should be the same in both reads, with a difference of 0; otherwise, if the read operation fails, additional error bits will appear, and the read bit value will not be 0.

[0033] In step S102 of this embodiment, based on the fbc values ​​corresponding to the two voltage points Vsim and 0.8Vdd obtained in step S101, the positional relationship of the actual value of the SRAM minimum operating voltage Vmin relative to these two preset voltages can be determined. When determining the direction or range of the actual value of the SRAM minimum operating voltage based on the simulated value Vsim and the fbc value of the standard voltage, such as... Figure 4 As shown, there are three possible scenarios: The first scenario: If the fbc value corresponding to the maximum value of the simulation value Vsim and the standard voltage is 0 and the fbc value corresponding to the minimum value is not 0, then the actual value of the minimum operating voltage of the SRAM is within the range of the simulation value Vsim and the standard voltage.

[0034] The second scenario: If both the simulated value Vsim and the fbc value corresponding to the standard voltage are 0, then the actual value of the minimum operating voltage of the SRAM is outside the lower limit of the range between the simulated value Vsim and the standard voltage.

[0035] The third scenario: If neither the simulated value Vsim nor the fbc value corresponding to the standard voltage is 0, then the actual value of the minimum operating voltage of the SRAM is outside the upper limit of the range between the simulated value Vsim and the standard voltage.

[0036] like Figure 5 As shown, taking Vsim < 0.8Vdd as an example: The first case is as follows: Figure 5 As shown in (a), the fbc value is not 0 at the Vsim voltage (write or read failure), and the fbc value is 0 at the 0.8Vdd voltage (write or read success), indicating that Vmin is between Vsim and 0.8Vdd, i.e., Vsim <Vmin<0.8Vdd; The second scenario is as follows: Figure 5 As shown in (b), the fbc value is 0 at both the Vsim and 0.8Vdd voltage points, indicating that Vmin is smaller than Vsim, i.e., Vmin <Vsim<0.8Vdd; The third scenario is as follows: Figure 5 As shown in (c), the value of fbc is not 0 at both the Vsim and 0.8Vdd voltage points, indicating that Vmin is larger than 0.8Vdd, i.e., Vsim < 0.8Vdd. <Vmin。

[0037] After determining the direction or range of Vmin, set the corresponding test interval: If the actual value of the minimum operating voltage of the SRAM is within the range between the simulated value Vsim and the standard voltage, the simulated value Vsim and the standard voltage are respectively taken as the upper limit and lower limit of the range; If the actual value of the minimum operating voltage of the SRAM is outside the lower limit of the range between the simulated value Vsim and the standard voltage, select the minimum value between the simulated value Vsim and the standard voltage, reduce the voltage of the minimum value by a specified step size and test until the corresponding fbc value is not 0, and take the voltage corresponding to the non-zero fbc value and the voltage of the previous step size as the upper limit and lower limit of the range, respectively. If the actual value of the minimum operating voltage of the SRAM is outside the upper limit of the interval between the simulated value Vsim and the standard voltage, select the maximum value between the simulated value Vsim and the standard voltage, increase the voltage of the maximum value by a specified step size and test until the corresponding fbc value is 0. The voltage corresponding to the fbc value of 0 and the voltage of the previous step size are respectively used as the upper limit and lower limit of the interval.

[0038] In this embodiment, the step size is 0.05 times the normal operating voltage Vdd. Taking Vsim < 0.8Vdd as an example, ... Figure 6 As shown: For the first case (Vmin is between Vsim and 0.8Vdd), the simulated value Vsim and the standard voltage 0.8Vdd are directly used as the lower limit and upper limit of the interval, respectively, i.e. [Vsim, 0.8Vdd].

[0039] For the second case (Vmin is below Vsim), Vsim is selected as the starting point. The voltage of Vsim is successively reduced in a specified step size (e.g., 0.05Vdd) and tested until the corresponding fbc value is not 0. Assuming that the fbc value is not 0 after the nth voltage reduction, the nth test voltage Vtestn = Vsim - n × 0.05Vdd is taken as the lower limit of the interval, and the (n-1)th test voltage Vtest(n-1) = Vsim - (n-1) × 0.05Vdd is taken as the upper limit of the interval.

[0040] For the third case (Vmin is above 0.8Vdd), 0.8Vdd is selected as the starting point. The voltage is increased successively in increments of 0.05Vdd until the corresponding fbc value is 0. Assuming that the fbc value is 0 after the nth voltage increase, the nth test voltage Vtestn = 0.8Vdd + n × 0.05Vdd is taken as the upper limit of the interval, and the (n-1)th test voltage Vtest(n-1) = 0.8Vdd + (n-1) × 0.05Vdd is taken as the lower limit of the interval.

[0041] In step S103 of this embodiment, a bisection method is used to perform precise measurements within the interval determined in step S102. For example... Figure 7 As shown, when using the bisection method to successively reduce the interval and select the voltage at the midpoint of the interval for testing, the process includes: S201: Calculate the average of the upper and lower limits of the current interval to obtain the midpoint voltage value. Let the upper limit of the current interval be Vhigh and the lower limit be Vlow, then the midpoint voltage value Vmid = (Vhigh + Vlow) / 2. Use the midpoint voltage value Vmid as the test voltage and test according to the test method in step S101 to obtain the corresponding fbc value; S202: Update the range based on the FBC value obtained from the test: If the fbc value is 0, it indicates that the SRAM can function normally at the midpoint voltage, and Vmin should be less than or equal to the midpoint voltage. Therefore, the midpoint voltage value is used as the upper limit of the new interval (Vhigh=Vmid), and the lower limit of the current interval remains unchanged (Vlow=Vlow). The new interval is [Vlow, Vmid]. If the fbc value is not 0, it indicates that the SRAM cannot function properly under the midpoint voltage, and Vmin should be greater than the midpoint voltage. Therefore, the midpoint voltage value is used as the lower limit of the new interval (Vlow=Vmid), and the upper limit of the current interval remains unchanged (Vhigh=Vhigh). The new interval is [Vmid, Vhigh]. S203: Repeat steps S201 and S202 to gradually reduce the interval range until the measurement accuracy meets the requirements.

[0042] In step S203 of this embodiment, the method for determining whether the measurement accuracy meets the requirements includes: Calculate the standard deviation std of the first specified number (e.g., 3) of test voltages up to the current round, i.e.: std=stdev(Vtestn, Vtest(n-1), Vtest(n-2)); Simultaneously calculate the absolute value of the difference between the second consecutive specified number (e.g., 2) of test voltages up to the current round, i.e.: |Vtestn-Vtest(n-1)|; If the standard deviation std is greater than the absolute value, that is: std>|Vtestn-Vtest(n-1)|, If the measurement accuracy is considered sufficient, the bisection iteration can be terminated. Here, Vtestn represents the test voltage of the current round, Vtest(n-1) represents the test voltage of the previous round, Vtest(n-2) represents the test voltage of the round before that, and n is the number of rounds.

[0043] In step S103, after ensuring the measurement accuracy meets the requirements, the actual measured value of the minimum operating voltage of the SRAM is determined: If the measurement accuracy meets the requirements and the fbc value corresponding to the test voltage of the current round is 0, it means that the SRAM can work normally under the current test voltage. Then the actual measured value of the minimum operating voltage of the SRAM is the value of the current test voltage Vtestn, that is, Vmin=Vtestn.

[0044] If the measurement accuracy meets the requirements and the fbc value corresponding to the test voltage of the current round is not 0, it means that the SRAM cannot work normally under the current test voltage. Then the actual measured value of the minimum working voltage of the SRAM is the value of the previous test voltage Vtest(n-1), that is, Vmin=Vtest(n-1).

[0045] Example 2 The operational stability of SRAM devices is closely related to temperature; the minimum operating voltage Vmin of SRAM will vary under different temperature conditions. Therefore, this embodiment provides a method for measuring the minimum operating voltage of SRAM, specifically measuring the minimum operating voltage of SRAM under different temperature environments, including the following steps: First, under a first temperature condition (e.g., high temperature HT condition, 125°C), steps S101 to S103 are performed according to the method of Example 1 to obtain the actual measured value Vmin_HT of the minimum operating voltage of the SRAM under this temperature condition.

[0046] Then, under a second temperature condition (such as room temperature NT condition, 25°C), steps S101 to S103 are performed according to the method of Example 1 to obtain the actual measured value Vmin_NT of the minimum operating voltage of the SRAM under this temperature condition.

[0047] Finally, under a third temperature condition (such as a low temperature LT condition, -40°C), steps S101 to S103 are performed according to the method of Example 1 to obtain the actual measured value Vmin_LT of the minimum operating voltage of the SRAM under this temperature condition.

[0048] like Figure 8 As shown, the statistical distribution of the minimum operating voltage (Write Vmin) and minimum operating voltage (Read Vmin) for SRAM under different temperature conditions can be obtained using the above method. The horizontal axis represents the Vmin voltage value, and the vertical axis represents probability. Different colored curves represent the Vmin distribution under high temperature (HT), low temperature (LT), and normal temperature (NT) conditions, respectively. As can be seen from the figure, the curves rise steeply in a stepped manner, and the HT / LT / NT lines are clearly separated. The Vmin distribution of SRAM under different temperature conditions shows significant differences, with a wider distribution range under high temperature conditions. The measurement method of this invention can quickly and accurately obtain these distribution data, providing important reference for the design optimization and process improvement of SRAM devices.

[0049] In summary, this invention proposes an improved method for measuring the minimum operating voltage Vmin of SRAM. By introducing two preset voltage points, Vsim and 0.8Vdd, and testing the Δfbc (Fail Bit Count) at these two voltage points, the initial range of Vmin can be quickly determined. Then, by uniformly spaced sampling with a binary search method or by directly using the binary search method, combined with the Δfbc magnitude and error judgment, the accurate Vmin value can be obtained.

[0050] This method shortens the testing range, saves testing time, and provides a clear criterion for determining the final Vmin. Compared to traditional scanning testing methods, this invention reduces the number of test voltage points, thereby shortening the testing time, while improving measurement accuracy through standard deviation. Furthermore, this solution can be easily applied to Vmin testing under different temperature environments, providing an effective testing method for evaluating the stability of SRAM devices under various operating conditions.

[0051] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-readable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0052] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.

Claims

1. A method for measuring the minimum operating voltage of SRAM, characterized in that, Includes the following steps: S101) The simulated value Vsim of the minimum operating voltage of SRAM is obtained by Hspice simulation, and the corresponding fbc value is obtained by testing the simulated value Vsim and the standard voltage respectively. S102) Determine the direction or range of the actual value of the minimum operating voltage of the SRAM based on the simulation value Vsim and the fbc value of the standard voltage, and set the corresponding interval; When determining the direction or range of the actual value of the minimum operating voltage of SRAM based on the simulation value Vsim and the standard voltage fbc value, the following are included: If the fbc value corresponding to the maximum value of the simulated value Vsim and the standard voltage is 0 and the fbc value corresponding to the minimum value is not 0, then the actual value of the minimum operating voltage of the SRAM is within the range of the simulated value Vsim and the standard voltage. If both the simulated value Vsim and the fbc value corresponding to the standard voltage are 0, then the actual value of the minimum operating voltage of the SRAM is outside the lower limit of the range between the simulated value Vsim and the standard voltage. If neither the simulated value Vsim nor the fbc value corresponding to the standard voltage is 0, then the actual value of the minimum operating voltage of the SRAM is outside the upper limit of the range between the simulated value Vsim and the standard voltage. When setting the corresponding interval, the following are included: If the actual value of the minimum operating voltage of the SRAM is within the range between the simulated value Vsim and the standard voltage, the simulated value Vsim and the standard voltage are respectively taken as the upper limit and lower limit of the range; If the actual value of the minimum operating voltage of the SRAM is outside the lower limit of the range between the simulated value Vsim and the standard voltage, select the minimum value between the simulated value Vsim and the standard voltage, reduce the voltage of the minimum value by a specified step size and test until the corresponding fbc value is not 0, and take the voltage corresponding to the non-zero fbc value and the voltage of the previous step size as the upper limit and lower limit of the range, respectively. If the actual value of the minimum operating voltage of the SRAM is outside the upper limit of the interval between the simulated value Vsim and the standard voltage, select the maximum value between the simulated value Vsim and the standard voltage, increase the voltage of the maximum value by a specified step size and test until the corresponding fbc value is 0, and take the voltage corresponding to the fbc value of 0 and the voltage of the previous step size as the upper limit and lower limit of the interval, respectively. S103) The interval is successively reduced by the bisection method and the voltage at the midpoint of the interval is selected for testing until the measurement accuracy meets the requirements, so as to obtain the actual measured value of the minimum working voltage of SRAM.

2. The method for measuring the minimum operating voltage of SRAM according to claim 1, characterized in that, When conducting tests, the following are included: SRAM write operations are performed under test voltage, and SRAM read operations are performed under normal voltage. The number of FBCs is recorded and used as the corresponding FBC value when the test voltage write fails. Alternatively, SRAM write and read operations can be performed under normal voltage to record the first number of fbcs, while SRAM read operations can be performed under test voltage to record the second number of fbcs. The difference between the second number of fbcs and the first number of fbcs can be calculated as the fbc value corresponding to the test voltage read failure.

3. The method for measuring the minimum operating voltage of SRAM according to claim 1, characterized in that, When using the bisection method to successively reduce the interval and select the voltage at the midpoint of the interval for testing, the following steps are included: S201) Calculate the average of the upper and lower limits of the current interval to obtain the midpoint voltage value, and use the midpoint voltage value as the test voltage to obtain the corresponding fbc value. S202) If the value of fbc is 0, the midpoint voltage value is used as the upper limit of the new interval, and the lower limit of the current interval is used as the lower limit of the new interval. If the fbc value is not 0, the midpoint voltage value is used as the lower limit of the new interval, and the upper limit of the current interval is used as the upper limit of the new interval; (S203) Jump to step S201 until the measurement accuracy meets the requirements.

4. The method for measuring the minimum operating voltage of SRAM according to claim 3, characterized in that, Step S203 also includes a step of determining whether the measurement accuracy meets the requirements, including: Calculate the standard deviation of a first specified number of consecutive test voltages up to the current round, and calculate the absolute value of the difference between a second specified number of consecutive test voltages up to the current round, where the second specified number is 2; If the standard deviation is greater than the absolute value, then the measurement accuracy meets the requirements.

5. The method for measuring the minimum operating voltage of SRAM according to claim 4, characterized in that, When obtaining the actual measured value of the minimum operating voltage of the SRAM, the following should be included: If the measurement accuracy meets the requirements and the fbc value corresponding to the test voltage of the current round is 0, then the actual measured value of the minimum operating voltage of the SRAM is the value of the current test voltage. If the measurement accuracy meets the requirements and the fbc value corresponding to the test voltage in the current round is not 0, then the actual measured value of the minimum operating voltage of the SRAM is the value of the previous test voltage.

6. The method for measuring the minimum operating voltage of SRAM according to claim 1, characterized in that, When obtaining the simulated value Vsim of the minimum operating voltage of SRAM through Hspice simulation, the Butterfly method is used to calculate the static noise margin of SRAM to obtain the minimum operating voltage for reading static noise margin. At the same time, the BL method is used to calculate the static noise margin of SRAM to obtain the minimum operating voltage for writing static noise margin. Finally, the larger value between the minimum operating voltage for reading and the minimum operating voltage for writing is taken as the simulated value Vsim of the minimum operating voltage of SRAM.

7. The method for measuring the minimum operating voltage of SRAM according to claim 1, characterized in that, The standard voltage is 0.8 times the normal operating voltage of the SRAM.

8. The method for measuring the minimum operating voltage of SRAM according to claim 1, characterized in that, The method further includes: repeatedly executing steps S101 to S103 under different temperature environments to obtain actual measured values ​​of the minimum operating voltage of the SRAM under different temperature conditions.

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