A frame dropping processing method, system and electronic equipment of video data

Abstract

The application provides a frame loss processing method and system of video data and an electronic device; and is applied to the technical field of computers, and the method comprises the following steps: in response to obtaining a frame loss trigger signal of a video function unit of a BMC in processing a video data frame, determining a frame loss level and a relocation address; based on the frame loss level and a data amount parameter of the video data frame, determining the number of storage instructions to be deleted corresponding to the video data frame; the storage instruction is a storage instruction of a CPU of the BMC for writing the video data frame into a memory; based on the number of storage instructions to be deleted, deleting the storage instructions in the address range of the memory corresponding to the video data frame and inserting a null instruction at the deletion position; and relocating the first storage instruction corresponding to the subsequent video data frame written into the memory to the relocation address, so as to write the subsequent video data frame into the memory based on the relocation address. In this way, the resource utilization rate of the BMC can be improved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method, system, and electronic device for processing dropped frames in video data. Background Technology

[0002] Video data is typically written to memory via store instructions, then read back from memory by the video function unit for compression, and finally written back to memory and transmitted over the network. However, when frame drops occur due to the video function unit competing with other sub-function units for memory bus control, the store instruction cycles executed at the CPU level and the memory read and compression processes executed at the video function unit level are completely wasted for frames already determined to be discarded. Current BMC video function frame drop control consumes significant hardware resources, including instruction execution cycles, memory bus bandwidth, and video compression processes. Therefore, the current video data frame drop handling methods result in low resource utilization for the BMC. Summary of the Invention

[0003] This application provides a method, system, and electronic device for handling dropped frames in video data.

[0004] This application provides a method for handling dropped video data. The method includes: in response to receiving a dropped frame trigger signal from the video function unit of a BMC board management controller during the processing of video data frames, determining a dropped frame level and a relocation address; the relocation address is determined based on the storage state of video data frames that have been written to memory but not yet read by the video function unit; determining the number of storage instructions to be deleted corresponding to the video data frame based on the dropped frame level and the data volume parameter of the video data frame; the storage instructions are storage instructions from the BMC's CPU to write video data frames to memory; in the CPU's instruction cache, based on the number of storage instructions to be deleted, deleting storage instructions within the memory address range corresponding to the video data frame and inserting a null instruction at the deletion position; relocating the first storage instruction corresponding to the subsequent video data frame to memory to the relocation address, so as to write the subsequent video data frame to memory based on the relocation address.

[0005] According to one embodiment of this application, the step of determining the frame loss level and relocation address in response to obtaining a frame loss trigger signal from the BMC's video function unit during video data frame processing includes: obtaining a frame loss status signal triggered by the video function unit during the writing of compressed video data frames into memory; determining a first frequency that triggers the frame loss status signal and a second frequency at which the video function unit occupies memory bus control when reading video data frames; generating a frame loss trigger signal in response to the first frequency being greater than a first threshold and the second frequency being greater than a second threshold, or in response to the second frequency being less than a third threshold; the second threshold being greater than the third threshold; and determining the frame loss level and the relocation address based on the storage state of video data frames written to memory but not yet read by the video function unit in response to obtaining the generated frame loss trigger signal.

[0006] According to one embodiment of this application, determining the frame loss level includes: when the number of complete data frames written to memory but not yet read by the video function unit is less than 1, determining the frame loss level as a first level; when the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1, determining the frame loss level as a second level; the second level is higher than the first level.

[0007] According to one embodiment of this application, determining the relocation address includes: in response to the frame loss level being a first level and the amount of data written to the current video data frame being less than a set data amount threshold, determining the memory address of the first data of the current video data frame as the relocation address; in response to the frame loss level being a first level and the amount of data written to the current video data frame being greater than or equal to the set data amount threshold, waiting for the current video data frame to be completely written to memory, and then determining the memory address of the first data of the next video data frame as the relocation address; in response to the frame loss level being a second level, the first frequency being greater than a first threshold and the second frequency being less than a third threshold, determining the memory address of the first data in memory as the relocation address; in response to the frame loss level being a second level, the first frequency decreasing and the second frequency increasing within a preset time window, determining an intermediate data frame in memory based on the number of complete data frames, and determining the memory address of the intermediate data frame as the relocation address.

[0008] According to one embodiment of this application, determining the number of storage instructions to be deleted corresponding to a video data frame based on the frame loss level and the data volume parameter of the video data frame includes: determining the number of frames to be deleted according to the frame loss level, wherein the number of frames to be deleted corresponding to the first level is greater than the number of frames to be deleted corresponding to the second level; determining the difference between the total data volume of the current video data frame and the amount of data already written to the current video data frame; multiplying the number of frames to be deleted by the total data volume of the current video data frame to obtain a first calculation result; dividing the first calculation result by the data volume corresponding to a single storage instruction to obtain a second calculation result; and adding the difference to the second calculation result to obtain the number of storage instructions to be deleted.

[0009] According to one embodiment of this application, the step of relocating the first storage instruction corresponding to the subsequently written video data frame to the relocation address includes: modifying the address information of the first storage instruction based on the relocation address; and determining the memory address of the next storage instruction based on the relocation address and the amount of data corresponding to a single storage instruction.

[0010] According to one embodiment of this application, the method further includes: monitoring the reading status of video data frames in memory by the video function unit; in response to the reading status indicating that the video data frames stored in memory have been completely read and the frame loss trigger signal is in the triggered state, sending the starting address of the last video data frame read in memory to the video function unit to control the video function unit to reread the video data frame based on the starting address; and adjusting the number of frames to be deleted, the first threshold, and the third threshold corresponding to the frame loss level based on the set parameter adjustment rules.

[0011] This application also provides a video data frame loss processing system, the system comprising: a frame loss processing module, configured to, in response to receiving a frame loss trigger signal from the BMC's video function unit during video data frame processing, determine a frame loss level and a relocation address; the relocation address is determined based on the storage state of video data frames written to memory but not yet read by the video function unit; and an instruction processing module, configured to, based on the frame loss level and the data volume parameter of the video data frame, determine the number of storage instructions to be deleted corresponding to the video data frame; the storage instructions are storage instructions from the BMC's CPU to write video data frames to memory; in the CPU's instruction cache, based on the number of storage instructions to be deleted, delete storage instructions within the memory address range corresponding to the video data frame and insert null instructions at the deletion positions; relocate the first storage instruction corresponding to the subsequent video data frame written to memory to the relocation address, so as to write subsequent video data frames to memory based on the relocation address.

[0012] According to one embodiment of this application, the frame dropping processing module is configured to: obtain a frame dropping status signal triggered by the video function unit during the writing of compressed video data frames into memory; determine a first frequency that triggers the frame dropping status signal and a second frequency at which the video function unit occupies memory bus control when reading video data frames; generate a frame dropping trigger signal in response to the first frequency being greater than a first threshold and the second frequency being greater than a second threshold, or in response to the second frequency being less than a third threshold; wherein the second threshold is greater than the third threshold; and, in response to obtaining the generated frame dropping trigger signal, determine the frame dropping level and the relocation address based on the storage state of video data frames written into memory but not yet read by the video function unit.

[0013] According to one embodiment of this application, the frame loss processing module is configured to: determine the frame loss level as a first level when the number of complete data frames written to memory but not yet read by the video function unit is less than 1; determine the frame loss level as a second level when the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1; the second level is higher than the first level.

[0014] According to one embodiment of this application, the frame loss processing module is configured to: in response to the frame loss level being a first level and the amount of data written to the current video data frame being less than a set data amount threshold, determine the memory address of the first data of the current video data frame as the relocation address; in response to the frame loss level being a first level and the amount of data written to the current video data frame being greater than or equal to the set data amount threshold, wait for the current video data frame to be completely written to memory, and then determine the memory address of the first data of the next video data frame as the relocation address; in response to the frame loss level being a second level, the first frequency being greater than a first threshold and the second frequency being less than a third threshold, determine the memory address of the first data in memory as the relocation address; in response to the frame loss level being a second level, the first frequency decreasing and the second frequency increasing within a preset time window, determine the intermediate data frame in memory based on the number of complete data frames, and determine the memory address of the intermediate data frame as the relocation address.

[0015] According to one embodiment of this application, the instruction processing module is configured to: determine the number of frames to be deleted based on the frame loss level, wherein the number of frames to be deleted corresponding to the first level is greater than the number of frames to be deleted corresponding to the second level; determine the difference between the total data volume of the current video data frame and the amount of data already written to the current video data frame; multiply the number of frames to be deleted by the total data volume of the current video data frame to obtain a first calculation result; divide the first calculation result by the data volume corresponding to a single storage instruction to obtain a second calculation result; and add the difference to the second calculation result to obtain the number of storage instructions to be deleted.

[0016] According to one embodiment of this application, the instruction processing module is configured to: modify the address information of the first stored instruction based on the relocation address; and determine the memory address of the next stored instruction based on the relocation address and the amount of data corresponding to a single stored instruction.

[0017] According to one embodiment of this application, the system further includes an exception handling module, which is configured to: monitor the reading status of the video function unit on video data frames in memory; in response to the reading status indicating that the video data frames stored in memory have been completely read and the frame loss trigger signal is in the triggered state, send the starting address of the last video data frame read in memory to the video function unit to control the video function unit to reread the video data frame based on the starting address; and adjust the number of frames to be deleted, the first threshold, and the third threshold corresponding to the frame loss level based on the set parameter adjustment rules.

[0018] This application also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the method of the above-described embodiments.

[0019] The method of this application embodiment, in response to obtaining a frame loss trigger signal from the video function unit of the BMC baseboard management controller during the processing of video data frames, determines the frame loss level and relocation address; the relocation address is determined based on the storage state of video data frames that have been written to memory but not yet read by the video function unit; based on the frame loss level and the data volume parameter of the video data frame, the number of storage instructions to be deleted corresponding to the video data frame is determined; the storage instruction is a storage instruction of the BMC's CPU central processing unit to write the video data frame to memory; in the CPU's instruction cache, based on the number of storage instructions to be deleted, the storage instructions within the memory address range corresponding to the video data frame are deleted and a null instruction is inserted at the deletion position; the first storage instruction corresponding to the subsequent video data frame written to memory is relocated to the relocation address, so as to write the subsequent video data frame to memory based on the relocation address, thereby improving the resource utilization of the BMC.

[0020] It should be understood that the teachings of this application are not required to achieve all the beneficial effects described above, but rather that a specific technical solution can achieve a specific technical effect, and other embodiments of this application can also achieve beneficial effects not mentioned above. Attached Figure Description

[0021] The above and other objects, features, and advantages of exemplary embodiments of this application will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings. Several embodiments of this application are illustrated in the drawings by way of example and not limitation, in which: In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0022] Figure 1 A schematic diagram of the processing flow of the video data frame loss processing method provided in the embodiments of this application is shown; Figure 2 This application illustrates a scenario where the video data frame loss processing method provided in this embodiment is used. Figure 1 ; Figure 3 This application illustrates a scenario where the video data frame loss processing method provided in this embodiment is used. Figure 2 ; Figure 4 This illustration shows an optional schematic diagram of a video data frame loss processing system provided in an embodiment of this application; Figure 5 An optional schematic diagram of an electronic device provided in an embodiment of this application is shown. Detailed Implementation

[0023] To make the objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0025] In the following description, the terms "first" and "second" are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first" and "second" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0027] The processing flow of the video data frame loss processing method provided in the embodiments of this application is described below. See also Figure 1 , Figure 1 This is a schematic diagram of the processing flow of the video data frame loss processing method provided in the embodiments of this application, which will be combined with... Figure 1 Steps S101-S104 are explained below.

[0028] Step S101: In response to obtaining the frame loss trigger signal of the video function unit of the BMC board management controller during the processing of video data frames, determine the frame loss level and relocation address; the relocation address is determined based on the storage state of video data frames that have been written to memory but have not yet been read by the video function unit.

[0029] In some embodiments, the BMC (Baseboard Management Controller) may include: an independent service processor based on the Intelligent Platform Management Interface (IPMI) specification on the server motherboard. The BMC chip monitors hardware status data such as server power supply, CPU, memory, hard disk, and environmental parameters in real time through a built-in sensor network, and supports out-of-band communication with the motherboard via the baseband management interface. Functionally, it features remote power-on / off control, firmware updates, event logging, and fault diagnosis capabilities, and is widely used in scenarios such as data center server cluster monitoring and remote maintenance of distributed devices. The video function unit can be used to: read, compress, and write video data frames to memory. A video data frame may include: a single image data frame constituting a video stream. The video data frame is the basic data unit processed by the video function unit. The frame loss trigger signal may include: a frame loss trigger signal generated based on the frame loss status signal generated by the video function unit during compression and writing. The frame loss level can be used to: distinguish different frame loss scenarios and determine the corresponding number of frames to be deleted. The relocation address can be used as a new starting address for subsequent video data frames written to memory. The memory may include: DDR memory. The memory can store video data frames that have been written but not yet read by the video function unit.

[0030] Step S102: Based on the frame loss level and the data volume parameter of the video data frame, determine the number of storage instructions to be deleted corresponding to the video data frame; the storage instruction is the storage instruction of the BMC's CPU central processing unit to write the video data frame to memory.

[0031] In some embodiments, the data volume parameter may include: the total data volume of the current video data frame, the amount of data already written to the current video data frame, the number of frames to be deleted, and the data volume corresponding to a single storage instruction. Specifically, the storage instruction may be a Store instruction from the CPU that writes video data frames to DDR memory.

[0032] Step S103: In the CPU instruction cache, based on the number of storage instructions to be deleted, delete the storage instructions corresponding to the video data frame within the memory address range and insert a null instruction at the deletion position.

[0033] In some embodiments, the instruction cache may include: a buffer memory within the CPU for temporarily storing stored instructions to be executed. The write memory address range may include: a pre-configured memory address range for writing video data frames. The null instruction may include: a NOP instruction. After reading a null instruction, the CPU's instruction fetch module will continue to read the next instruction.

[0034] As an example, when deleting a stored instruction from the CPU's instruction cache, the instruction processing module first searches the CPU's instruction cache based on the calculated number of stored instructions to be deleted. It then identifies stored instructions that meet two conditions: the instruction type is a stored instruction, and the address information of the stored instruction belongs to a preset range of video data write-to-memory addresses. Based on the number of stored instructions to be deleted, the deletion operation is performed at the corresponding instruction position in the instruction cache; simultaneously, a null instruction is inserted at the deletion position.

[0035] Step S104: The first storage instruction corresponding to the subsequent video data frame written to memory is relocated to the relocation address, so as to write the subsequent video data frame to memory based on the relocation address.

[0036] In some embodiments, the first storage instruction may include the first storage instruction corresponding to a subsequent video data frame to be written to memory. Relocating to a relocation address involves reassigning the Store address of the video data frame to be written to memory. This saves memory space and prevents invalid frame data from occupying memory. Specifically, the relocation address may be Store_recul_addr, which is the address information in the Store instruction corresponding to the video data frame to be written to memory again after the instruction processing module deletes the corresponding frame from the instruction cache.

[0037] As an example, during the compression of video data frames by the BMC's video function unit, the passive frame loss processing module first monitors the frame loss status signal sent by the compressed video write control module in real time. At the same time, it actively analyzes the first frequency at which the frame loss submodule detects the frame loss status signal and the second frequency at which the original video acquisition submodule of the video function unit occupies the memory bus control. When it is determined that the first frequency is greater than the first threshold and the second frequency is greater than the second threshold, or the second frequency is less than the third threshold, a frame loss trigger signal is generated. Subsequently, in response to the frame loss trigger signal, the instruction processing module determines the frame loss level and relocation address based on the storage status of video data frames written to memory but not yet read by the video function unit. Specifically, when the number of complete data frames is less than 1 and the amount of data written to the current video data frame is less than a set threshold, the first level is determined and the corresponding relocation address is determined; when the number of complete data frames is greater than or equal to 1, the second level is determined and the corresponding relocation address is determined. Based on the determined frame loss level and the data volume parameters of the video data frame, namely the complete data volume of the current video data frame, the amount of data written to the current video data frame, the number of frames to be deleted, and the data volume corresponding to a single storage instruction, the instruction processing module calculates the number of storage instructions to be deleted. In the instruction cache of the CPU, it searches for storage instructions that belong to the preset video data write memory address range, deletes the corresponding storage instructions according to the calculated number, and inserts a null instruction at the deletion position.

[0038] Finally, the first storage instruction corresponding to the subsequent video data frame written to memory is relocated to the aforementioned relocation address, and the address of subsequent storage instructions is incremented based on the relocation address according to the data volume of a single storage instruction, thereby realizing the writing of subsequent video data frames to memory based on the relocation address.

[0039] The method described in this application embodiment can achieve the following technical effects: By adjusting the instruction processing module within the CPU of the BMC chip, and simultaneously adding a frame loss processing module and an exception handling module to the BMC chip, and optimizing the original video acquisition submodule function in the video function unit, this application achieves targeted deletion of the Store instruction corresponding to the predicted frame loss from the instruction cache under the dual guarantee mechanism of "active detection + passive reception". It also modifies the frame data-related control logic already written into memory and sets up a guarantee mechanism for scenarios where prediction errors occur. This cleverly achieves zero instruction usage, zero memory bandwidth usage, and zero usage of video compression control logic and resources for predicted frame loss data. Without requiring any software modifications, the hardware dynamically and adaptively avoids invalid execution of Store instructions, invalid memory reads, and invalid compression processing flows in the video function unit. Furthermore, it performs dynamic instruction-level processing at different depths according to different frame loss scenarios, improving the actual efficiency of instruction execution in the BMC chip, enhancing the actual utilization of BMC chip hardware resources, and improving the performance of the BMC chip.

[0040] In some embodiments, step S101 may include: obtaining a frame loss status signal triggered by the video function unit during the writing of compressed video data frames into memory; determining a first frequency that triggers the frame loss status signal and a second frequency at which the video function unit occupies control of the memory bus when reading video data frames; generating a frame loss trigger signal in response to the first frequency being greater than a first threshold and the second frequency being greater than a second threshold, or in response to the second frequency being less than a third threshold; the second threshold being greater than the third threshold; and determining the frame loss level and relocation address based on the storage state of video data frames that have been written into memory but not yet read by the video function unit in response to obtaining the generated frame loss trigger signal.

[0041] In this embodiment, the frame drop status signal may include: a status indicator signal issued by the compressed video write control submodule of the video function unit when it cannot obtain memory bus write control. Specifically, the status indicator signal may be `drop_frame_passive`. This signal goes high when the compressed video write control submodule drops frames and goes low when frame dropping stops. A high signal indicates a valid state, and a low signal indicates an invalid state. The frame drop status signal can characterize whether the video function unit is currently in a frame drop state. The first frequency may include: the number of times the frame drop status signal is in a valid state per unit time. The second frequency may include: the number of times the original video acquisition submodule of the video function unit successfully obtains memory bus read control per unit time. Memory bus control may include: read and write permissions to the memory address bus and data bus. Memory bus control is used to control the timing of memory access between the video function unit and the central processing unit. The first threshold, second threshold, and third threshold may be software-configured thresholds, with the second threshold being greater than the third threshold.

[0042] As an example, during the operation of BMC, when the video function unit compresses video data frames, the passive frame loss processing module continuously monitors the frame loss status signal sent by the compressed video write control module of the video function unit. The active frame loss processing module counts the number of valid frame loss status signals within a fixed time window to determine the first frequency, and at the same time counts the number of times the original video acquisition module of the video function unit successfully occupies the memory bus control to determine the second frequency.

[0043] When the active frame dropping submodule determines that the first frequency is greater than the first threshold and the second frequency is greater than the second threshold, a frame dropping trigger signal is generated. At this time, the video function unit can obtain read control of the memory bus, but it is more difficult to obtain write control of the memory bus. Alternatively, when the active analysis of the frame dropping submodule determines that the second frequency is less than the third threshold, a frame dropping trigger signal is generated. At this time, it is difficult for the video function unit to obtain read control of the memory bus.

[0044] Subsequently, in response to the frame loss trigger signal, the corresponding frame loss level is determined based on the storage status of video data frames that have been written to memory but have not yet been read by the video function unit, and the corresponding relocation address is determined based on the frame loss level.

[0045] In some embodiments, determining the frame loss level includes: when the number of complete data frames written to memory but not yet read by the video function unit is less than 1, determining the frame loss level as a first level; when the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1, determining the frame loss level as a second level.

[0046] In this embodiment, the second level is higher than the first level. A complete data frame may include a single video data frame that has been fully written into memory and whose data volume reaches the complete data volume of each frame. In response to a frame loss trigger signal, the frame loss level is determined by first detecting the storage status of video data frames written to memory but not yet read by the video function unit, and determining the number of complete data frames in memory. When the number of complete data frames is less than 1, meaning there is less than one frame of original video data in memory, the frame loss level is determined to be the first level, corresponding to a shallower instruction deletion depth. When the number of complete data frames is greater than or equal to 1, meaning there is at least one frame of original video data in memory, the frame loss level is determined to be the second level, corresponding to a deeper instruction deletion depth. Based on different frame loss levels, different depths of instruction-level dynamic processing are implemented.

[0047] In some embodiments, determining the relocation address includes: in response to a frame loss level of a first level and the amount of data written to the current video data frame being less than a set data amount threshold, determining the memory address of the first data of the current video data frame as the relocation address; in response to a frame loss level of a first level and the amount of data written to the current video data frame being greater than or equal to the set data amount threshold, waiting for the current video data frame to be completely written to memory, and then determining the memory address of the first data of the next video data frame as the relocation address; in response to a frame loss level of a second level, a first frequency being greater than a first threshold and a second frequency being less than a third threshold, determining the memory address of the first data in memory as the relocation address; in response to a frame loss level of a second level, a first frequency decreasing and a second frequency increasing within a preset time window, determining an intermediate data frame in memory based on the number of complete data frames, and determining the memory address of the intermediate data frame as the relocation address.

[0048] In this embodiment, the data volume threshold can be half the total data volume of the current video data frame. The data volume threshold can also be other thresholds configured by the software, which are not limited in this embodiment. The memory address can include an address in DDR memory used to identify the storage location of the video data frame. The time window can be used to determine the changing trends of the first frequency and the second frequency. The number of complete data frames can include the total number of video data frames that have been fully written to memory but have not yet been read by the video function unit. Intermediate data frames can include video data frames located in the middle position, determined according to a preset rule based on the number of complete data frames.

[0049] As an example, when the number of complete data frames written to memory but not yet read by the video function unit is less than one, it is determined whether the amount of data written to the current video data frame is less than a set data amount threshold. If so, the instruction processing module function is immediately triggered, and the memory address of the first data of the current video data frame is used as the relocation address. If it is determined that the amount of data written to the current video data frame is greater than or equal to the data amount threshold, it waits until the current video data frame is completely written to memory before using the memory address of the first data of the next video data frame as the relocation address.

[0050] When the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1, it is determined whether the first frequency is greater than the first threshold and the second frequency is less than the third threshold. If so, it is determined that the video function unit has difficulty obtaining read control and write control of the memory bus, and the instruction processing module function is immediately triggered. At the same time, the starting address of the first video data frame in memory is used as the relocation address. If the above frequency conditions are not met, the changing trends of the first and second frequencies continue to be monitored within a preset time window. When the first frequency is detected to decrease and the second frequency to increase, half of the complete frame data is retained. Based on the number of complete data frames, the intermediate data frame in memory is determined, and the memory address of the intermediate data frame is used as the relocation address. For example, if the number of complete data frames is 6 and the current video data frame is the 7th frame, then the 4th frame is determined as the intermediate data frame, and the memory address of the intermediate data frame is used as the relocation address.

[0051] In some embodiments, determining the number of storage instructions to be deleted corresponding to a video data frame based on the frame loss level and the data volume parameter of the video data frame includes: determining the number of frames to be deleted according to the frame loss level; determining the difference between the total data volume of the current video data frame and the data volume already written to the current video data frame; multiplying the number of frames to be deleted by the total data volume of the current video data frame to obtain a first calculation result; dividing the first calculation result by the data volume corresponding to a single storage instruction to obtain a second calculation result; and adding the difference to the second calculation result to obtain the number of storage instructions to be deleted.

[0052] In this embodiment, the number of frames to be deleted corresponding to the first level is greater than the number of frames to be deleted corresponding to the second level. The data volume parameter may include: the complete data volume of the current video data frame (frame_sizes), the amount of data already written (wred_sizes), the number of frames to be deleted (delete_frame_cnt), and the data volume corresponding to a single storage instruction (sizes_per_instruction), typically 8, 4, or 2 bytes. The storage instruction to be deleted may include: a storage instruction used to write video data to memory that needs to be deleted from the CPU instruction cache. The number of frames to be deleted may include: the number of video data frames to be discarded, determined according to the frame loss level.

[0053] As an example, the number of storage instructions to be deleted (delete_instruction_num) corresponding to a video data frame can be expressed by the following formula: delete_instruction_num=(frame_sizes-wred_sizes)+(delete_frame_cnt×frame_sizes) / sizes_per_instruction Where (delete_frame_cnt×frame_sizes) represents the first calculation result, and (delete_frame_cnt×frame_sizes) / sizes_per_instruction represents the second calculation result.

[0054] In some embodiments, step S104, relocating the first storage instruction corresponding to the subsequently written video data frame to a relocation address, includes: modifying the address information of the first storage instruction based on the relocation address; and determining the memory address of the next storage instruction based on the relocation address and the amount of data corresponding to a single storage instruction. The amount of data corresponding to a single storage instruction can be the number of bytes of data written in one operation of a single storage instruction.

[0055] As an example, the Store instruction address modification submodule of the instruction processing module obtains the determined relocation address, modifies the original address information in the first storage instruction based on the relocation address, assigns the relocation address to the first storage instruction as the new memory write start address, and accumulates the relocation address with the data volume corresponding to a single storage instruction to obtain the memory address of the next storage instruction. This process is repeated, incrementing the relocation address to determine the addresses of subsequent storage instructions. Specifically, the redirection address is Store_recul_addr = 0x0001_0000, while the address first_addr corresponding to the first Store instruction to be written to memory is 0x0001_1000, and the address second_addr corresponding to the second Store instruction is 0x0001_1008. The data volume corresponding to a single storage instruction is 8. During modification, first_addr is set to Store_recul_addr, and second_addr is set to Store_recul_addr + 8.

[0056] In some embodiments, the method further includes: monitoring the reading status of video data frames in memory by the video function unit; in response to the reading status indicating that the video data frames stored in memory have been completely read and the frame loss trigger signal is in the triggered state, sending the starting address of the last video data frame read in memory to the video function unit to control the video function unit to reread the video data frame based on the starting address; and adjusting the number of frames to be deleted, the first threshold, and the third threshold corresponding to the frame loss level based on the set parameter adjustment rules.

[0057] In this embodiment, the read state can be used to monitor whether all video data frames stored in memory have been completely read. The trigger state can include: a frame drop trigger signal being active, indicating that the system is still processing frame drops. The last video data frame read can include: the last video data frame read by the video function unit when all video data frames stored in memory have been completely read. The starting address can be the address of the first data item of the last read video data frame stored in memory. The parameter adjustment rule can be an adjustment algorithm used to modify the frame drop control parameters when a prediction anomaly occurs.

[0058] As an example, when it is detected that the video data frames stored in memory have been completely read while the frame dropping trigger signal is still in the triggered state, it indicates that the prediction mechanism of the previous frame dropping processing module has malfunctioned. That is, the prediction result is frame dropping, but the actual video data has been read out. The starting address of the last video data frame read from memory is sent to the video function unit, which then rereads the video data frame based on the starting address to fill in the missing video data. At the same time, based on the set parameter adjustment rules, the frame dropping level is adjusted from the first level to the second level, and the number of frames to be deleted is reduced. Simultaneously, the first threshold is increased and the third threshold is decreased to reduce the probability of triggering the instruction-level active frame dropping mechanism in the future.

[0059] Figure 2 The diagram illustrates an application scenario of the video data frame loss processing method provided in this embodiment.

[0060] like Figure 2 The diagram shows a hardware system for handling dropped video data. The BMC chip includes a CPU, a dropped frame processing module, an exception handling module, a video function unit, a network module, and multiple sub-functional units; the CPU includes an instruction processing module, a core (processor core), and a cache. The video function unit includes a raw video acquisition submodule, a video compression submodule, and a compressed video writing control submodule. The host computer, DDR, and BMC chip together constitute the complete hardware system.

[0061] Figure 3 This application illustrates a scenario where the video data frame loss processing method provided in this embodiment is used. Figure 2 .

[0062] like Figure 3 As shown, the process of handling lost video data in the system module can include: remotely monitoring the host's operating status through the server's BMC chip; continuously writing video images from the host operating system into memory via storage instructions by the driver program running on the BMC's internal CPU; the original video acquisition submodule of the video function unit reading the original video frames from memory and compressing them through the video compression submodule; and then attempting to write the compressed frames back into memory by the compressed video writing control submodule.

[0063] When the server operates under high load, causing other sub-functional units within the BMC chip to frequently preempt the memory bus, and the compressed video write control submodule continuously generates dropped frames due to its inability to obtain write control for an extended period, the passive frame drop submodule in the frame drop processing module receives the frame drop status signal from the compressed video write control submodule in real time. Simultaneously, it actively analyzes the effective frequency of the frame drop status signal detected by the frame drop submodule and the frequency of the original video acquisition submodule preempting memory bus control. When it is determined that the frame drop frequency exceeds the first threshold and the read preemption frequency exceeds the second threshold, or the read preemption frequency is lower than the third threshold, the instruction-level active frame drop mechanism is triggered. The written data control submodule determines the frame drop level based on the number of complete video data frames written in memory but not yet read by the original video acquisition submodule and the proportion of data written in the current video data frame, and sends the corresponding relocation address to the instruction processing module.

[0064] The frame loss information receiving submodule in the instruction processing module receives the frame loss level and relocation address from the frame loss processing module. The Store quantity calculation submodule in the instruction processing module calculates the number of instructions to be deleted based on the complete data volume of the current video data frame, the amount of data already written, the number of frames to be deleted corresponding to the frame loss level, and the data volume of a single storage instruction. The Store instruction lookup and deletion submodule searches for storage instructions belonging to the video data write address range in the instruction cache of the central processing unit core and deletes them. At the same time, a null instruction is inserted at the deletion position to maintain the continuity of instruction fetching in the central processing unit. Then, the Store instruction address modification submodule assigns the relocation address to the first storage instruction of the subsequent video data to be written and increments the subsequent addresses according to the instruction data volume.

[0065] If the exception handling module detects that the original video acquisition submodule has completely emptied the video frames in memory while the frame dropping mechanism is still triggered, it sends the starting address of the last read frame to the original video acquisition submodule through the read control modification submodule to control it to reread the frame. It also raises the first threshold and lowers the third threshold through the threshold modification control submodule to reduce the probability of triggering active frame dropping.

[0066] Understandable. Figure 2 and Figure 3 The application scenarios of the video data frame loss processing method in this application are only some exemplary implementations in the embodiments of this application. The application scenarios of the video data frame loss processing method in the embodiments of this application include, but are not limited to, those of... Figure 2 and Figure 3 The application scenarios of the video data frame loss processing method shown are illustrated.

[0067] The following continues to describe the exemplary structure of the software modules included in the video data frame loss processing system 90 provided in the embodiments of this application. In some embodiments, such as... Figure 4 As shown, the video data frame loss processing system 90 may include: The frame loss processing module 901 is used to determine the frame loss level and relocation address in response to the frame loss trigger signal obtained by the BMC's video function unit during the processing of video data frames; the relocation address is determined based on the storage state of video data frames that have been written to memory but have not yet been read by the video function unit. The instruction processing module 902 is used to determine the number of storage instructions to be deleted corresponding to a video data frame based on the frame loss level and the data volume parameters of the video data frame. The storage instruction is the storage instruction of the BMC's CPU to write the video data frame to memory. In the CPU's instruction cache, based on the number of storage instructions to be deleted, the storage instructions corresponding to the video data frame to be written to the memory address range are deleted and a null instruction is inserted at the deletion position. The first storage instruction corresponding to the subsequent video data frame to be written to memory is relocated to the relocation address so that the subsequent video data frame can be written to memory based on the relocation address.

[0068] In some embodiments, the frame dropping processing module 901 is configured to: obtain a frame dropping status signal triggered by the video function unit during the writing of compressed video data frames into memory; determine a first frequency that triggers the frame dropping status signal and a second frequency at which the video function unit occupies control of the memory bus when reading video data frames; generate a frame dropping trigger signal in response to the first frequency being greater than a first threshold and the second frequency being greater than a second threshold, or in response to the second frequency being less than a third threshold; the second threshold being greater than the third threshold; and, in response to obtaining the generated frame dropping trigger signal, determine the frame dropping level and relocation address based on the storage state of video data frames that have been written into memory but not yet read by the video function unit.

[0069] In some embodiments, the frame loss processing module 901 is configured to: determine the frame loss level as a first level when the number of complete data frames written to memory but not yet read by the video function unit is less than 1; determine the frame loss level as a second level when the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1; the second level is higher than the first level.

[0070] In some embodiments, the frame loss processing module 901 is configured to: determine the memory address of the first data of the current video data frame as the relocation address in response to a frame loss level of the first level and the amount of data written to the current video data frame being less than a set data amount threshold; determine the memory address of the first data of the next video data frame as the relocation address in response to a frame loss level of the first level and the amount of data written to the current video data frame being greater than or equal to a set data amount threshold, and after waiting for the current video data frame to be completely written to memory; determine the memory address of the first data in memory as the relocation address in response to a frame loss level of the second level, a first frequency being greater than a first threshold and a second frequency being less than a third threshold; and determine the memory address of the intermediate data frame in memory based on the number of complete data frames in response to a frame loss level of the second level, a first frequency decreasing and a second frequency increasing within a preset time window, and determine the memory address of the intermediate data frame as the relocation address.

[0071] In some embodiments, the instruction processing module 902 is configured to: determine the number of frames to be deleted based on the frame loss level; determine the difference between the total data volume of the current video data frame and the amount of data already written to the current video data frame; multiply the number of frames to be deleted by the total data volume of the current video data frame to obtain a first calculation result; divide the first calculation result by the data volume corresponding to a single storage instruction to obtain a second calculation result; and add the difference to the second calculation result to obtain the number of storage instructions to be deleted.

[0072] In some embodiments, the instruction processing module 902 is configured to: modify the address information of the first storage instruction based on the relocation address; and determine the memory address of the next storage instruction based on the relocation address and the amount of data corresponding to a single storage instruction.

[0073] In some embodiments, the video data frame loss processing system 90 further includes an anomaly processing module 903, which is configured to: monitor the reading status of video data frames in memory by the video function unit; in response to the reading status indicating that the video data frames stored in memory have been completely read and the frame loss trigger signal is in the triggered state, send the starting address of the last video data frame read in memory to the video function unit to control the video function unit to reread the video data frame based on the starting address; and adjust the number of frames to be deleted, the first threshold, and the third threshold corresponding to the frame loss level based on the set parameter adjustment rules.

[0074] It should be noted that the description of the system in this application embodiment is similar to the description of the method embodiment above, and has similar beneficial effects as the method embodiment, therefore it will not be repeated. For technical details not covered in the video data frame loss processing system provided in this application embodiment, please refer to... Figures 1 to 3 The meaning is understood in accordance with the description of any of the accompanying drawings.

[0075] According to embodiments of this application, this application also provides an electronic device and a non-transitory computer-readable storage medium.

[0076] Figure 5 A schematic block diagram of an example electronic device 800 that can be used to implement embodiments of this application is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the application described and / or claimed herein.

[0077] like Figure 5 As shown, the electronic device 800 includes a computing unit 801, which can perform various appropriate actions and processes according to a computer program stored in ROM 802 or a computer program loaded into RAM 803 from storage unit 808. RAM 803 can also store various programs and data required for the operation of the electronic device 800. The computing unit 801, ROM 802, and RAM 803 are interconnected via bus 804. I / O interface 805 is also connected to bus 804.

[0078] Multiple components in electronic device 800 are connected to I / O interface 805, including: input unit 806, such as keyboard, mouse, etc.; output unit 807, such as various types of displays, speakers, etc.; storage unit 808, such as hard disk, optical disk, etc.; and communication unit 809, such as network card, modem, wireless transceiver, etc. Communication unit 809 allows electronic device 800 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0079] The computing unit 801 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 801 performs the various methods and processes described above, such as the video data frame dropping processing method. For example, in some embodiments, the video data frame dropping processing method can be implemented as a computer software program tangibly contained in a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 800 via ROM 802 and / or communication unit 809. When the computer program is loaded into RAM 803 and executed by the computing unit 801, one or more steps of the video data frame dropping processing method described above can be performed. Alternatively, in other embodiments, the computing unit 801 can be configured to perform the video data frame dropping processing method by any other suitable means (e.g., by means of firmware).

[0080] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0081] The program code used to implement the methods of this application may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0082] In the context of this application, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0083] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0084] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0085] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0086] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this application can be achieved, and this is not limited herein.

[0087] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0088] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for handling frame loss in video data, characterized in that, The method includes: In response to a frame loss trigger signal received by the video function unit of the BMC board management controller during the processing of video data frames, the frame loss level and relocation address are determined; the relocation address is determined based on the storage state of video data frames that have been written to memory but have not yet been read by the video function unit. The process of determining the frame loss level includes: when the number of complete data frames written to memory but not yet read by the video function unit is less than 1, the frame loss level is determined to be a first level; when the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1, the frame loss level is determined to be a second level; the second level is higher than the first level. The determination of the relocation address includes: in response to the frame loss level being the first level and the amount of data written to the current video data frame being less than a set data amount threshold, determining the memory address of the first data of the current video data frame as the relocation address; in response to the frame loss level being the first level and the amount of data written to the current video data frame being greater than or equal to the set data amount threshold, waiting for the current video data frame to be completely written to memory, and then determining the memory address of the first data of the next video data frame as the relocation address. Based on the frame loss level and the data volume parameter of the video data frame, the number of storage instructions to be deleted corresponding to the video data frame is determined; the storage instruction is the storage instruction of the BMC's CPU central processing unit to write the video data frame into memory. The step of determining the number of storage instructions to be deleted corresponding to a video data frame based on the frame loss level and the data volume parameter of the video data frame includes: determining the number of frames to be deleted according to the frame loss level, wherein the number of frames to be deleted corresponding to the first level is greater than the number of frames to be deleted corresponding to the second level; determining the difference between the total data volume of the current video data frame and the amount of data already written to the current video data frame; multiplying the number of frames to be deleted by the total data volume of the current video data frame to obtain a first calculation result; dividing the first calculation result by the data volume corresponding to a single storage instruction to obtain a second calculation result; and adding the difference and the second calculation result to obtain the number of storage instructions to be deleted. In the CPU's instruction cache, based on the number of storage instructions to be deleted, the storage instructions corresponding to the video data frame within the write memory address range are deleted, and a null instruction is inserted at the deletion position. The first storage instruction corresponding to the subsequent video data frame written to memory is relocated to the relocation address, so as to write the subsequent video data frame to memory based on the relocation address.

2. The method according to claim 1, characterized in that, The step of responding to a frame loss trigger signal received by the BMC's video function unit during video data frame processing, and determining the frame loss level and relocation address, includes: Obtain the frame loss status signal triggered by the video function unit during the process of writing compressed video data frames into memory; Determine the first frequency at which the frame loss status signal is triggered and the second frequency at which the video function unit occupies memory bus control when reading video data frames; A frame dropping trigger signal is generated in response to the first frequency being greater than a first threshold and the second frequency being greater than a second threshold, or in response to the second frequency being less than a third threshold; wherein the second threshold is greater than the third threshold. In response to receiving the generated frame loss trigger signal, the frame loss level and the relocation address are determined based on the storage status of video data frames that have been written to memory but not yet read by the video function unit.

3. The method according to claim 2, characterized in that, Determining the relocation address includes: In response to the frame loss level being the second level, the first frequency being greater than the first threshold and the second frequency being less than the third threshold, the memory address of the first data in memory is determined as the relocation address; In response to the frame loss level being the second level, the first frequency decreasing and the second frequency increasing within a preset time window, an intermediate data frame in memory is determined based on the number of complete data frames, and the memory address of the intermediate data frame is determined as the relocation address.

4. The method according to claim 1, characterized in that, The step of relocating the first storage instruction corresponding to the subsequently written video data frame to the relocation address includes: Based on the relocation address, modify the address information of the first stored instruction; Based on the relocation address and the amount of data corresponding to a single storage instruction, the memory address of the next storage instruction is determined.

5. The method according to claim 1, characterized in that, The method further includes: Monitor the reading status of video data frames in memory by the video function unit; In response to the read state indicating that the video data frames stored in the memory have been completely read and the frame loss trigger signal is in the triggered state, the starting address of the last video data frame read in the memory is sent to the video function unit to control the video function unit to reread the video data frame based on the starting address. Based on the set parameter adjustment rules, the number of frames to be deleted, the first threshold, and the third threshold corresponding to the frame loss level are adjusted.

6. A video data frame loss processing system, characterized in that, The system includes: The frame loss processing module is used to determine the frame loss level and relocation address in response to the frame loss trigger signal obtained by the BMC's video function unit during the processing of video data frames; the relocation address is determined based on the storage state of video data frames that have been written to memory but have not yet been read by the video function unit. The process of determining the frame loss level includes: when the number of complete data frames written to memory but not yet read by the video function unit is less than 1, the frame loss level is determined to be a first level; when the number of complete data frames written to memory but not yet read by the video function unit is greater than or equal to 1, the frame loss level is determined to be a second level; the second level is higher than the first level. The determination of the relocation address includes: in response to the frame loss level being the first level and the amount of data written to the current video data frame being less than a set data amount threshold, determining the memory address of the first data of the current video data frame as the relocation address; in response to the frame loss level being the first level and the amount of data written to the current video data frame being greater than or equal to the set data amount threshold, waiting for the current video data frame to be completely written to memory, and then determining the memory address of the first data of the next video data frame as the relocation address. The instruction processing module is used to determine the number of storage instructions to be deleted corresponding to a video data frame based on the frame loss level and the data volume parameter of the video data frame; the storage instruction is the storage instruction of the BMC's CPU to write the video data frame to memory; the step of determining the number of storage instructions to be deleted corresponding to a video data frame based on the frame loss level and the data volume parameter of the video data frame includes: determining the number of frames to be deleted according to the frame loss level, wherein the number of frames to be deleted corresponding to the first level is greater than the number of frames to be deleted corresponding to the second level; determining the difference between the complete data volume of the current video data frame and the data volume of the current video data frame already written; and processing the... The number of frames to be deleted is multiplied by the total data size of the current video data frame to obtain a first calculation result; the first calculation result is divided by the data size corresponding to a single storage instruction to obtain a second calculation result; the difference is added to the second calculation result to obtain the number of storage instructions to be deleted; in the CPU's instruction cache, based on the number of storage instructions to be deleted, the storage instructions corresponding to the video data frame within the memory address range are deleted and a null instruction is inserted at the deletion position; the first storage instruction corresponding to the subsequent video data frame written to memory is relocated to the relocation address, so that the subsequent video data frame is written to memory based on the relocation address.

7. The system according to claim 6, characterized in that, The frame loss processing module is used for: Obtain the frame loss status signal triggered by the video function unit during the process of writing compressed video data frames into memory; Determine the first frequency at which the frame loss status signal is triggered and the second frequency at which the video function unit occupies memory bus control when reading video data frames; A frame dropping trigger signal is generated in response to the first frequency being greater than a first threshold and the second frequency being greater than a second threshold, or in response to the second frequency being less than a third threshold. The second threshold is greater than the third threshold; In response to receiving the generated frame loss trigger signal, the frame loss level and the relocation address are determined based on the storage status of video data frames that have been written to memory but not yet read by the video function unit.

8. The system according to claim 7, characterized in that, The frame loss processing module is used for: In response to the frame loss level being the second level, the first frequency being greater than the first threshold and the second frequency being less than the third threshold, the memory address of the first data in memory is determined as the relocation address; In response to the frame loss level being the second level, the first frequency decreasing and the second frequency increasing within a preset time window, an intermediate data frame in memory is determined based on the number of complete data frames, and the memory address of the intermediate data frame is determined as the relocation address.

9. The system according to claim 6, characterized in that, The instruction processing module is used for: Based on the relocation address, modify the address information of the first stored instruction; Based on the relocation address and the amount of data corresponding to a single storage instruction, the memory address of the next storage instruction is determined.

10. The system according to claim 6, characterized in that, The system further includes an exception handling module, which is used for: Monitor the reading status of video data frames in memory by the video function unit; In response to the read state indicating that the video data frames stored in the memory have been completely read and the frame loss trigger signal is in the triggered state, the starting address of the last video data frame read in the memory is sent to the video function unit to control the video function unit to reread the video data frame based on the starting address. Based on the set parameter adjustment rules, the number of frames to be deleted, the first threshold, and the third threshold corresponding to the frame loss level are adjusted.

11. An electronic device, characterized in that, include: At least one processor; And a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-5.

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