A power down circuit and bleed system for an active phased array antenna

Abstract

This application discloses a power-down circuit and discharge system for an active phased array antenna. The power-down circuit includes: an RF amplifier, a first capacitor, a second capacitor, a transmitting power supply, a first switching circuit, a second switching circuit, a receiving power supply, a third switching circuit, a fourth switching circuit, and a control circuit. When the control circuit controls the first switching circuit to open and the second switching circuit to close, the first capacitor discharges through the second switching circuit to power down the transmitting power supply. When the control circuit controls the third switching circuit to open and the fourth switching circuit to close, the second capacitor discharges through the fourth switching circuit to power down the receiving power supply. This method constructs a low-impedance discharge loop directly to ground, rapidly discharging the charge on the power supply path, thereby significantly shortening the turn-off time of the transmitting or receiving power supply, improving the switching speed between the transmitting and receiving states of the active phased array antenna, and enhancing the performance of the active phased array antenna.

Description

Technical Field

[0001] This application relates to the field of active phased array antenna technology, and in particular to a power-down circuit and discharge system for an active phased array antenna. Background Technology

[0002] An active phased array antenna consists of hundreds or thousands of transceiver components, with the most crucial part of each component being the radio frequency (RF) amplifier. A common-aperture active phased array antennas share a single antenna element for both transmission and reception, offering the advantage of high integration. Their RF amplifiers include power amplifiers and low-noise amplifiers. The power amplifiers operate when the active phased array antenna is in transmission mode, while the low-noise amplifiers operate when the active phased array antenna is in reception mode. A common-aperture active phased array antenna with time-division multiplexing separates transmission and reception in time, meaning that transmission and reception do not occur simultaneously.

[0003] When a common-aperture active phased array antenna operates in a time-division multiplexing manner, it must wait for the power supply of the previous state (transmit power supply or receive power supply) to be completely powered down before switching. Because there are a large number of capacitors (including energy storage filter capacitors and parasitic capacitances) in the transmit and receive power supply path of the RF amplifier, and the traditional discharge circuit has a large impedance, the power supply is powered down slowly, which reduces the transmit and receive switching speed and affects the performance of the antenna. Summary of the Invention

[0004] This application mainly provides a power-down circuit and discharge system for an active phased array antenna, which solves the problem that the traditional discharge circuit has a large impedance, resulting in slow power-down and thus reducing the transmit / receive switching speed and affecting the antenna performance.

[0005] This application provides a power-down circuit for an active phased array antenna, including: The radio frequency amplifier includes a first capacitor and a second capacitor, with the radio frequency amplifier grounded through the first capacitor and the second capacitor, respectively. The system includes a transmitting power supply, a first switching circuit, and a second switching circuit. The transmitting power supply is connected between the first capacitor and the radio frequency amplifier through the first switching circuit. One end of the second switching circuit is connected between the first capacitor and the radio frequency amplifier, and the other end of the second switching circuit is grounded. The system includes a receiving power supply, a third switching circuit, and a fourth switching circuit. The receiving power supply is connected between the second capacitor and the RF amplifier through the third switching circuit. One end of the fourth switching circuit is connected between the second capacitor and the RF amplifier, and the other end of the fourth switching circuit is grounded. A control circuit, which is connected to the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit respectively; When the control circuit controls the first switch circuit to open and the second switch circuit to close, the first capacitor discharges through the second switch circuit to power off the transmitting power supply; when the control circuit controls the third switch circuit to open and the fourth switch circuit to close, the second capacitor discharges through the fourth switch circuit to power off the receiving power supply.

[0006] In some embodiments, when the control circuit controls the first switching circuit to be turned on and the second switching circuit to be turned off, the transmitting power supply powers the radio frequency amplifier through the first switching circuit, and the active phased array antenna is in the transmitting state; When the control circuit controls the third switch circuit to be turned on and the fourth switch circuit to be turned off, the receiving power supply powers the radio frequency amplifier through the third switch circuit, and the active phased array antenna is in receiving mode.

[0007] In some embodiments, the control circuit includes a main control circuit, a first drive circuit, and a second drive circuit. The first drive circuit is connected to the main control circuit, the first switch circuit, and the second switch circuit, respectively. The second drive circuit is connected to the main control circuit, the third switch circuit, and the fourth switch circuit, respectively.

[0008] In some embodiments, the main control circuit outputs a first control signal and a second control signal to the first drive circuit. The first drive circuit converts the first control signal into a first drive signal and the second control signal into a second drive signal. The first switching circuit is turned on or off based on the first drive signal, and the second switching circuit is turned on or off based on the second drive signal. The main control circuit outputs a third control signal and a fourth control signal to the second drive circuit. The second drive circuit converts the third control signal into a third drive signal and the fourth control signal into a fourth drive signal. The third switch circuit is turned on or off based on the third drive signal, and the fourth switch circuit is turned on or off based on the fourth drive signal.

[0009] In some embodiments, when the main control circuit controls the first drive signal to rise from a low level to a high level through the first drive circuit, the first switch circuit is turned on, the first capacitor is charged, and the active phased array antenna is in the transmitting state; when the main control circuit controls the first drive signal to fall from a high level to a low level and controls the second drive signal to rise from a low level to a high level through the first drive circuit, the first switch circuit is turned off, the second switch circuit is turned on, the first capacitor is discharged through the second switch circuit, and the active phased array antenna is turned off from the transmitting state. When the main control circuit controls the third driving signal to rise from a low level to a high level through the second driving circuit, the third switching circuit is turned on, the second capacitor is charged, and the active phased array antenna is in the receiving state; when the main control circuit controls the third driving signal to fall from a high level to a low level through the second driving circuit, and controls the fourth driving signal to rise from a low level to a high level, the third switching circuit is turned off, the fourth switching circuit is turned on, the second capacitor is discharged through the fourth switching circuit, and the active phased array antenna is turned off in the receiving state.

[0010] In some embodiments, the main control circuit controls the first drive signal to drop from a high level to a low level through the first drive circuit, and after a preset time, controls the second drive signal to rise from a low level to a high level. The main control circuit controls the third driving signal to drop from a high level to a low level through the second driving circuit, and after the preset time, controls the fourth driving signal to rise from a low level to a high level.

[0011] In some embodiments, the first switching circuit includes a first switching transistor, the second switching circuit includes a second switching transistor, a first terminal of the first switching transistor is connected to the positive terminal of the transmitting power supply, the negative terminal of the transmitting power supply is grounded, a second terminal of the first switching transistor is connected between the first capacitor and the radio frequency amplifier, a third terminal of the first switching transistor is connected to the first driving circuit, a first terminal of the second switching transistor is connected between the first capacitor and the radio frequency amplifier, a second terminal of the second switching transistor is grounded, and a third terminal of the second switching transistor is connected to the first driving circuit.

[0012] In some embodiments, the third switching circuit includes a third switching transistor, the fourth switching circuit includes a fourth switching transistor, the first terminal of the third switching transistor is connected to the positive terminal of the receiving power supply, the negative terminal of the receiving power supply is grounded, the second terminal of the third switching transistor is connected between the second capacitor and the RF amplifier, the third terminal of the third switching transistor is connected to the second driving circuit, the first terminal of the fourth switching transistor is connected between the second capacitor and the RF amplifier, the second terminal of the fourth switching transistor is grounded, and the third terminal of the fourth switching transistor is connected to the second driving circuit.

[0013] In some embodiments, the radio frequency amplifier is connected to the main control circuit, and the radio frequency amplifier interacts with the main control circuit.

[0014] This application also provides a discharge system, including the power-down circuit of the above embodiments.

[0015] The beneficial effects of this application are as follows: When the transmitting power supply is powered off, the control circuit controls the first switching circuit to open and the second switching circuit to close, so that the first capacitor discharges through the second switching circuit; when the receiving power supply is powered off, the control circuit controls the third switching circuit to open and the fourth switching circuit to close, so that the second capacitor discharges through the fourth switching circuit; by opening the first or third switching circuit originally connected to the transmitting or receiving power supply and simultaneously closing the grounded second or fourth switching circuit, a low-impedance discharge loop directly to ground is constructed for the first or second capacitor, which quickly discharges the charge on the power supply path, thereby greatly shortening the turn-off time of the transmitting or receiving power supply, improving the switching speed between the transmitting and receiving states of the active phased array antenna, and improving the performance of the active phased array antenna. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein: Figure 1 This is a circuit diagram of another embodiment of the power-down circuit provided in this application; Figure 2 This is a schematic diagram of the conversion between control signals and drive signals provided in this application; Figure 3 This is a schematic diagram of power-down when there is no discharge path provided in this application; Figure 4 This is a schematic diagram of the power-down waveform of the transmitting power supply provided in this application; Figure 5 This is a timing diagram of the control signals provided in this application. Detailed Implementation

[0017] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0019] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0020] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly indicating the number, specific order, or primary and secondary relationship of the indicated technical features.

[0021] In an active phased array antenna, the signal switches for the transmitting and receiving channels are modulated by the receiving and transmitting power supplies, respectively. When switching states in a time-division multiplexing (TDM) active phased array antenna, the power supply of the previous state must be completely de-energized. Each RF amplifier in an active phased array antenna has numerous energy storage and filtering capacitors in its transmitting and receiving power paths. Additionally, the traces and vias on the printed circuit board, as well as the parasitic capacitances of the RF amplifier pins, further increase the capacitance values ​​in these paths. When the transmitting and receiving power supplies are de-energized, these capacitors discharge charge. However, traditional discharge circuits have high impedance, preventing rapid charge discharge and resulting in a slow power-down speed for both the transmitting and receiving power supplies. This prolonged power-down time reduces the transmitting-receiving switching speed of the time-division multiplexing active phased array antenna, thus affecting its performance.

[0022] To address the aforementioned problems, this application provides a power-down circuit for an active phased array antenna. The active phased array antenna includes, but is not limited to, a common-aperture active phased array antenna. See [link to application]. Figure 1 As shown, the power-down circuit 10 in this embodiment includes an RF amplifier 11, a first capacitor C1, a second capacitor C2, a transmitting power supply 12, a first switching circuit 13, a second switching circuit 14, a receiving power supply 15, a third switching circuit 16, a fourth switching circuit 17, and a control circuit 18.

[0023] The radio frequency amplifier 11 is grounded through the first capacitor C1 and the second capacitor C2 respectively; the transmitting power supply 12 is connected between the first capacitor C1 and the radio frequency amplifier 11 through the first switching circuit 13, one end of the second switching circuit 14 is connected between the first capacitor C1 and the radio frequency amplifier 11, and the other end of the second switching circuit 14 is grounded; the receiving power supply 15 is connected between the second capacitor C2 and the radio frequency amplifier 11 through the third switching circuit 16, one end of the fourth switching circuit 17 is connected between the second capacitor C2 and the radio frequency amplifier 11, and the other end of the fourth switching circuit 17 is grounded; the control circuit 18 is connected to the first switching circuit 13, the second switching circuit 14, the third switching circuit 16, and the fourth switching circuit 17 respectively.

[0024] In some embodiments, the RF amplifier 11 has a transmit power pin (not shown) and a receive power pin (not shown). One end of the first capacitor C1 is connected to the transmit power pin of the RF amplifier 11, and the other end of the first capacitor C1 is grounded. One end of the second capacitor C2 is connected to the receive power pin of the RF amplifier 11, and the other end of the second capacitor C2 is grounded.

[0025] The first capacitor C1 includes the energy storage and filtering capacitor of the transmitting power supply pin of the RF amplifier 11, the parasitic capacitance of the transmitting power supply pin of the RF amplifier 11, and the parasitic capacitance of the copper paths and vias of the transmitting power supply 12 on the printed circuit board. The second capacitor C2 includes the energy storage and filtering capacitor of the receiving power supply pin of the RF amplifier 11, the parasitic capacitance of the receiving power supply pin of the RF amplifier 11, and the parasitic capacitance of the copper paths and vias of the receiving power supply 15 on the printed circuit board.

[0026] Transmit power supply 12 supplies power to the transmit power supply pin of RF amplifier 11 when the active phased array antenna transmits signals. Receive power supply 15 supplies power to the receive power supply pin of RF amplifier 11 when the active phased array antenna receives signals. RF amplifier 11 is used for power amplification when the active phased array antenna transmits signals and for low-noise amplification when the active phased array antenna receives signals.

[0027] When the control circuit 18 controls the first switch circuit 13 to be disconnected and the second switch circuit 14 to be turned on, the first capacitor C1 discharges through the second switch circuit 14 to power off the transmitting power supply 12; when the control circuit 18 controls the third switch circuit 16 to be disconnected and the fourth switch circuit 17 to be turned on, the second capacitor C2 discharges through the fourth switch circuit 17 to power off the receiving power supply 15.

[0028] In some embodiments, the control circuit 18 controls the first switching circuit 13 to disconnect, the transmitting power supply 12 disconnects from the power supply to the RF amplifier 11, the control circuit 18 controls the second switching circuit 14 to turn on, and the first capacitor C1 discharges rapidly through the second switching circuit 14 so that the transmitting power supply 12 is powered off.

[0029] In some embodiments, the control circuit 18 controls the third switch circuit 16 to disconnect, the receiving power supply 15 disconnects from the power supply to the RF amplifier 11, the control circuit 18 controls the fourth switch circuit 17 to turn on, and the second capacitor C2 discharges rapidly through the fourth switch circuit 17 so that the receiving power supply 15 is powered off.

[0030] In this embodiment, when the transmitting power supply 12 is powered off, the control circuit 18 controls the first switching circuit 13 to disconnect and the second switching circuit 14 to turn on, so that the first capacitor C1 discharges through the second switching circuit 14. When the receiving power supply 15 is powered off, the control circuit 18 controls the third switching circuit 16 to disconnect and the fourth switching circuit 17 to turn on, so that the second capacitor C2 discharges through the fourth switching circuit 17. By disconnecting the first switching circuit 13 or the third switching circuit 16 originally connected to the transmitting power supply 12 or the receiving power supply 15, and simultaneously turning on the grounded second switching circuit 14 or the fourth switching circuit 17, a low-impedance discharge loop directly to ground is constructed for the first capacitor C1 or the second capacitor C2, which quickly discharges the charge on the power supply path, thereby greatly shortening the turn-off time of the transmitting power supply 12 or the receiving power supply 15, improving the switching speed between the transmitting and receiving states of the active phased array antenna, and improving the performance of the active phased array antenna.

[0031] According to some embodiments of this application, when the control circuit 18 controls the first switch circuit 13 to be turned on and the second switch circuit 14 to be turned off, the transmitting power supply 12 powers on the radio frequency amplifier 11 through the first switch circuit 13, and the active phased array antenna is in the transmitting state; when the control circuit 18 controls the third switch circuit 16 to be turned on and the fourth switch circuit 17 to be turned off, the receiving power supply 15 powers on the radio frequency amplifier 11 through the third switch circuit 16, and the active phased array antenna is in the receiving state.

[0032] In some embodiments, the control circuit 18 controls the first switching circuit 13 to be turned on and the second switching circuit 14 to be turned off. The transmitting power supply 12 powers the transmitting power supply pin of the RF amplifier 11 through the first switching circuit 13. At this time, the active phased array antenna is in the transmitting state. At the same time, the first capacitor C1 stores charge through the transmitting power supply 12, that is, the first capacitor C1 is charged. When the transmitting power supply 12 of the active phased array antenna is turned off, the control circuit 18 controls the first switching circuit 13 to be turned off and the second switching circuit 14 to be turned on. The first capacitor C1 discharges quickly through the second switching circuit 14, which facilitates the active phased array antenna to switch to the receiving state.

[0033] In some embodiments, the control circuit 18 controls the third switch circuit 16 to be turned on and the fourth switch circuit 17 to be turned off. The receiving power supply 15 powers on the receiving power supply pin of the RF amplifier 11 through the third switch circuit 16. At this time, the active phased array antenna is in the receiving state. At the same time, the second capacitor C2 stores charge through the receiving power supply 15, that is, the second capacitor C2 is charged. When the receiving power supply 15 of the active phased array antenna is turned off, the control circuit 18 controls the third switch circuit 16 to be turned off and the fourth switch circuit 17 to be turned on. The second capacitor C2 discharges quickly through the fourth switch circuit 17, which facilitates the active phased array antenna to switch to the transmitting state.

[0034] According to some embodiments of this application, the control circuit 18 includes a main control circuit 181, a first drive circuit 182, and a second drive circuit 183. The first drive circuit 182 is connected to the main control circuit 181, the first switch circuit 13, and the second switch circuit 14, respectively. The second drive circuit 183 is connected to the main control circuit 181, the third switch circuit 16, and the fourth switch circuit 17, respectively.

[0035] The main control circuit 181 includes, but is not limited to, a field programmable gate array (FPGA), a microcontroller, and a digital signal processor.

[0036] In some embodiments, the input terminal of the first driving circuit 182 is connected to the output terminal of the main control circuit 181, the first output terminal of the first driving circuit 182 is connected to the first switching circuit 13, and the second output terminal of the first driving circuit 182 is connected to the second switching circuit 14. The main control circuit 181 drives the first switching circuit 13 and the second switching circuit 14 to be turned on or off through the first driving circuit 182.

[0037] In some embodiments, the input terminal of the second driving circuit 183 is connected to the output terminal of the main control circuit 181, the first output terminal of the second driving circuit 183 is connected to the third switching circuit 16, and the second output terminal of the second driving circuit 183 is connected to the fourth switching circuit 17. The main control circuit 181 drives the third switching circuit 16 and the fourth switching circuit 17 to be turned on or off through the second driving circuit 183.

[0038] In this embodiment, the main control circuit 181 indirectly and in groups controls the switching circuits (first switching circuit 13, second switching circuit 14, third switching circuit 16, and fourth switching circuit 17) through the first driving circuit 182 and the second driving circuit 183. This eliminates the need for the main control circuit 181 to directly generate and manage multiple switching drive signals that may involve level conversion and have strict timing requirements. Instead, it only needs to output high-level status instructions, which simplifies the software logic design and hardware interface burden of the main control circuit 181, reduces the complexity of the main control program, and improves the operating efficiency and reliability of the entire control system.

[0039] According to some embodiments of this application, the main control circuit 181 of this embodiment outputs a first control signal and a second control signal to the first drive circuit 182. The first drive circuit 182 converts the first control signal into a first drive signal and the second control signal into a second drive signal. The first switch circuit 13 is turned on or off based on the first drive signal, and the second switch circuit 14 is turned on or off based on the second drive signal.

[0040] The main control circuit 181 outputs a third control signal and a fourth control signal to the second drive circuit 183. The second drive circuit 183 converts the third control signal into a third drive signal and the fourth control signal into a fourth drive signal. The third switch circuit 16 is turned on or off based on the third drive signal, and the fourth switch circuit 17 is turned on or off based on the fourth drive signal.

[0041] For example, such as Figure 2 As shown, Figure 2 The horizontal axis represents time, and the vertical axis represents voltage. The control signals (first control signal, second control signal, third control signal and fourth control signal) are at a logic level of 3.3V. After passing through the drive circuit (first drive circuit 182 and second drive circuit 183), they are converted into drive signals (first drive signal, second drive signal, third drive signal and fourth drive signal) at a standard level of 12V.

[0042] The rise time, fall time, and duty cycle of the drive signal and the control signal are the same. Due to the conversion delay of the drive circuit, the drive signal has a certain delay relative to the control signal. The delay time depends on the drive circuit and is usually in the nanosecond range.

[0043] The first driving circuit 182 and the second driving circuit 183 are used for level standard conversion and to enhance the current driving capability of the signal.

[0044] In this embodiment, the main control circuit 181 outputs a control signal, which is then converted into a drive signal by the drive circuit. Through the separation and conversion design of the control signal and the drive signal, the electrical and functional decoupling of the top-level control logic and the bottom-level power switch drive of the system is achieved.

[0045] Figure 3 This indicates the power-down state when there is no discharge path in the power-down circuit 10, i.e., there are no second switch circuit 14 and fourth switch circuit 17.

[0046] like Figure 3 As shown, taking the absence of the second switch circuit 14 as an example, Figure 3 The horizontal axis represents time, and the vertical axis represents voltage. The specific explanation is as follows: At time a, the main control circuit 181 controls the first drive signal to rise from a low level to a high level; at time b, the first drive signal reaches the conduction threshold voltage Vth of the first switch circuit 13, at which point the first switch circuit 13 begins to conduct, and the voltage at the transmit power supply pin of the RF amplifier 11 begins to rise; at time c, the main control circuit 181 controls the first drive signal to fall from a high level to a low level; at time d, the first drive signal falls to the conduction threshold voltage Vth of the first switch circuit 13, at which point the first switch circuit 13 begins to turn off, and the voltage at the transmit power supply pin of the RF amplifier 11 begins to fall; due to the lack of a low-impedance ground discharge path (the second switch circuit 14), the first capacitor C1 discharges charge slowly, resulting in a slower voltage drop at the transmit power supply pin of the RF amplifier 11, creating a trailing phenomenon; at time e, the transmit power supply 12 completes power-off, with the total power-off time typically reaching the millisecond level.

[0047] According to some embodiments of this application, when the main control circuit 181 controls the first driving signal to rise from a low level to a high level through the first driving circuit 182, the first switching circuit 13 is turned on, the first capacitor C1 is charged, and the active phased array antenna is in the transmitting state; when the main control circuit 181 controls the first driving signal to fall from a high level to a low level through the first driving circuit 182, and controls the second driving signal to rise from a low level to a high level, the first switching circuit 13 is turned off, the second switching circuit 14 is turned on, the first capacitor C1 is discharged through the second switching circuit 14, and the active phased array antenna is turned off from the transmitting state.

[0048] In some embodiments, the main control circuit 181 controls the first driving signal to rise from a low level to a high level. When the first driving signal reaches the conduction threshold voltage Vth of the first switching circuit 13, the first switching circuit 13 is turned on, the voltage of the transmit power supply pin of the RF amplifier 11 rises, and the active phased array antenna enters the transmit state. The main control circuit 181 controls the first driving signal to fall from a high level to a low level and controls the second driving signal to rise from a low level to a high level. When the first driving signal falls to the conduction threshold voltage Vth of the first switching circuit 13, the first switching circuit 13 is turned off. When the second driving signal reaches the conduction threshold voltage Vth of the second switching circuit 14, the second switching circuit 14 is turned on, the first capacitor C1 discharges through the second switching circuit 14, and the voltage of the transmit power supply pin of the RF amplifier 11 drops rapidly. When the main control circuit 181 controls the third driving signal to rise from a low level to a high level through the second driving circuit 183, the third switching circuit 16 is turned on, the second capacitor C2 is charged, and the active phased array antenna is in the receiving state; when the main control circuit 181 controls the third driving signal to fall from a high level to a low level through the second driving circuit 183, and controls the fourth driving signal to rise from a low level to a high level, the third switching circuit 16 is turned off, the fourth switching circuit 17 is turned on, the second capacitor C2 is discharged through the fourth switching circuit 17, and the active phased array antenna is turned off from the receiving state.

[0049] In some embodiments, the main control circuit 181 controls the third driving signal to rise from a low level to a high level. When the third driving signal reaches the conduction threshold voltage Vth of the third switching circuit 16, the third switching circuit 16 is turned on, the voltage of the receiving power supply pin of the RF amplifier 11 rises, and the active phased array antenna enters the receiving state. The main control circuit 181 controls the third driving signal to fall from a high level to a low level and controls the fourth driving signal to rise from a low level to a high level. When the third driving signal falls to the conduction threshold voltage Vth of the third switching circuit 16, the third switching circuit 16 is turned off. When the fourth driving signal reaches the conduction threshold voltage Vth of the fourth switching circuit 17, the fourth switching circuit 17 is turned on, the second capacitor C2 discharges through the fourth switching circuit 17, and the voltage of the receiving power supply pin of the RF amplifier 11 drops rapidly.

[0050] Among them, the first switch circuit 13, the second switch circuit 14, the third switch circuit 16 and the fourth switch circuit 17 all use a single turn-on threshold voltage Vth.

[0051] According to some embodiments of this application, the main control circuit 181 controls the first drive signal to drop from a high level to a low level through the first drive circuit 182, and after a preset time, controls the second drive signal to rise from a low level to a high level.

[0052] The main control circuit 181 controls the third drive signal to drop from high level to low level through the second drive circuit 183, and after a preset time, controls the fourth drive signal to rise from low level to high level.

[0053] For example, such as Figure 4 As shown, Figure 4The horizontal axis represents time, and the vertical axis represents voltage. Specifically: At time ta, the main control circuit 181 controls the first drive signal to rise from a low level to a high level; at time tb, the first drive signal reaches the conduction threshold voltage Vth of the first switching circuit 13 controlled by the transmitting power supply 12. At this time, the transmitting power supply 12 controls the first switching circuit 13 to start conducting, and the voltage at the transmitting power supply pin of the RF amplifier 11 begins to rise; at time tc, the main control circuit 181 controls the first drive signal to fall from a high level to a low level, and after a preset time, controls the second drive signal to rise from a low level to a high level; at time td, the first drive signal falls to the level controlled by the transmitting power supply 12... At time te, the first switching circuit 13 reaches its turn-on threshold voltage Vth. At this time, the transmitting power supply 12 controls the first switching circuit 13 to start turning off, and the voltage at the transmitting power supply pin of the RF amplifier 11 begins to slowly decrease. At time te, the second driving signal rises to the turn-on threshold voltage Vth of the second switching circuit 14. At this time, the second switching circuit 14 starts to conduct, forming an extremely low impedance path to ground. The charge of the first capacitor C1 is quickly discharged through this low impedance path to ground. At the same time, the voltage at the transmitting power supply pin of the RF amplifier 11 drops rapidly, completing the power-down in a very short time. At time tf, the second driving signal starts to drop from a high level to a low level, and the active phased array antenna completes this transmission.

[0054] The preset duration, also known as the short-circuit delay timer, is used to prevent the first switch circuit 13 and the second switch circuit 14 from being turned on simultaneously during the power-down process of the transmitting power supply 12, thereby avoiding a short circuit to ground of the transmitting power supply 12. During the power-down process of the receiving power supply 15, it is used to prevent the third switch circuit 16 and the fourth switch circuit 17 from being turned on simultaneously, thereby avoiding a short circuit to ground of the receiving power supply 15.

[0055] Compared to the no-discharge path, this embodiment not only achieves rapid power-down by grounding the second switch circuit 14 and the fourth switch circuit 17, but also forms a timing relationship between the driving signals by setting a preset duration, thereby forming a method of using timing control to precisely control the switching sequence of the switch circuits, which can quickly and safely achieve rapid power-down of the transmitting power supply 12 and receiving power supply 15 of the active phased array antenna that operates in time-division multiplexing.

[0056] Because the drive signals have timing relationships, the control signals also have timing relationships. For example... Figure 5 As shown, Figure 5The timing relationship of the first, second, third, and fourth control signals is shown below: At time t0, the main control circuit 181 pulls the first control signal high. After the signal goes high, the transmitting power supply 12 controls the first switching circuit 13 to turn on, and the transmitting power supply 12 supplies power to the transmitting power supply pin of the RF amplifier 11, and the active phased array antenna enters the transmitting state. After the active phased array antenna completes data transmission, at time t1, the main control circuit 181 pulls the first control signal low. After the signal goes low, the transmitting power supply 12 controls the first switching circuit 13 to turn off, and the voltage at the transmitting power supply pin of the RF amplifier 11 begins to slowly decrease. At the same time, the main control circuit 181 uses a timer to prevent... Short-circuit delay timing: After timing is completed at time t2, the main control circuit 181 pulls the second control signal high. At this time, the second switching circuit 14 is turned on, forming a low-impedance discharge path from the transmit power supply pin of the RF amplifier 11, the first capacitor C1 to the ground plane. The charge stored in the first capacitor C1 is quickly discharged from the low-impedance path, realizing a rapid drop in the voltage of the transmit power supply pin of the RF amplifier 11. Discharge begins at time t2 and is completed at time t3. The main control circuit 181 pulls the second control signal low. At time t3, the main control circuit 181 synchronously uses a timer to perform state switching delay timing. After timing is completed, it is determined that the active phased array antenna has completed this transmission and is ready to enter the receiving state.

[0057] At time t4, the main control circuit 181 pulls the third control signal high. After the signal goes high, the receiving power supply 15 controls the third switching circuit 16 to turn on, and the receiving power supply 15 supplies power to the receiving power supply pin of the RF amplifier 11, and the active phased array antenna enters the receiving state. After the active phased array antenna completes data reception, at time t5, the main control circuit 181 pulls the third control signal low. After the signal goes low, the receiving power supply 15 controls the third switching circuit 16 to turn off, and the voltage of the receiving power supply pin of the RF amplifier 11 begins to slowly decrease. At the same time, the main control circuit 181 uses a timer to perform short-circuit protection delay timing. After the timing is completed, at time t6, the main control circuit 181 pulls the fourth control signal high. At this time, the fourth switching circuit 17 turns on, forming a... A low-impedance discharge path is formed from the receiving power supply pin of the RF amplifier 11, the second capacitor C2, to the ground plane. The charge stored in the second capacitor C2 is rapidly discharged through the low-impedance path, achieving a rapid drop in the voltage of the receiving power supply pin of the RF amplifier 11. Discharge begins at time t6 and is completed at time t7. The main control circuit 181 pulls the fourth control signal low. At time t7, the main control circuit 181 uses a timer to perform state switching delay timing. After the timing is completed, it is determined that the active phased array antenna has completed this reception and is ready to re-enter the transmission state. At time t8, the main control circuit 181 pulls the first control signal high, and the active phased array antenna re-enters the transmission state. The transmission and reception process is repeated continuously thereafter.

[0058] According to some embodiments of this application, the first switching circuit 13 includes a first switching transistor Q1, and the second switching circuit 14 includes a second switching transistor Q2. The first terminal of the first switching transistor Q1 is connected to the positive terminal of the transmitting power supply 12, the negative terminal of the transmitting power supply 12 is grounded, the second terminal of the first switching transistor Q1 is connected between the first capacitor C1 and the radio frequency amplifier 11, the third terminal of the first switching transistor Q1 is connected to the first driving circuit 182, the first terminal of the second switching transistor Q2 is connected between the first capacitor C1 and the radio frequency amplifier 11, the second terminal of the second switching transistor Q2 is grounded, and the third terminal of the second switching transistor Q2 is connected to the first driving circuit 182.

[0059] According to some embodiments of this application, the third switching circuit 16 includes a third switching transistor Q3, and the fourth switching circuit 17 includes a fourth switching transistor Q4. The first terminal of the third switching transistor Q3 is connected to the positive terminal of the receiving power supply 15, the negative terminal of the receiving power supply 15 is grounded, the second terminal of the third switching transistor Q3 is connected between the second capacitor C2 and the RF amplifier 11, and the third terminal of the third switching transistor Q3 is connected to the second driving circuit 183. The first terminal of the fourth switching transistor Q4 is connected between the second capacitor C2 and the RF amplifier 11, the second terminal of the fourth switching transistor Q4 is grounded, and the third terminal of the fourth switching transistor Q4 is connected to the second driving circuit 183.

[0060] Optionally, the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 are all NMOS transistors. The first terminal of the first switch Q1, the first terminal of the second switch Q2, the first terminal of the third switch Q3, and the first terminal of the fourth switch Q4 are the drains. The second terminals of the first switch Q1, the second terminal of the second switch Q2, the second terminal of the third switch Q3, and the second terminal of the fourth switch Q4 are the sources. The third terminals of the first switch Q1, the third terminal of the second switch Q2, the third terminal of the third switch Q3, and the third terminal of the fourth switch Q4 are the gates.

[0061] In other embodiments, the first switch Q1, the second switch Q2, the third switch Q3, and the fourth switch Q4 are other types of switches, such as transistors.

[0062] In some embodiments, the preset duration is obtained through actual measurement. First, a longer delay time is set to ensure that the first switch Q1 and the second switch Q2 will not be turned on at the same time. Then, by observing the relative delay of the drive signals of the gates of the two switches on the oscilloscope, the duration of the preset duration is reduced while ensuring that the (first) drive signal of the gate of the first switch Q1 and the (second) drive signal of the gate of the second switch Q2 will not be higher than the turn-on threshold voltage Vth at the same time, thereby obtaining the fastest safe power-down delay duration of the preset duration.

[0063] In some embodiments, the preset duration is to use a high-speed analog-to-digital converter to collect the voltage value of the (first) drive signal of the gate of the first switch Q1 in real time. During the power-down process, when the voltage value of the (first) drive signal of the gate of the first switch Q1 is lower than the conduction threshold voltage Vth, the second switch Q2 is turned on.

[0064] According to some embodiments of this application, the radio frequency amplifier 11 is connected to the main control circuit 181, and the radio frequency amplifier 11 interacts with the main control circuit 181.

[0065] In some embodiments, the RF amplifier 11 also has a Serial Peripheral Interface (SPI). The SPI interface of the RF amplifier 11 is connected to the SPI bus of the main control circuit 181, and the RF amplifier 11 interacts with the main control circuit 181 through the SPI interface.

[0066] This application also provides a discharge system, including the power-down circuit 10 of the above embodiment. Optionally, the discharge system further includes a voltage detection circuit and a feedback circuit, etc.

[0067] The above description is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A power-down circuit for an active phased array antenna, characterized in that, include: The radio frequency amplifier includes a first capacitor and a second capacitor, with the radio frequency amplifier grounded through the first capacitor and the second capacitor, respectively. The system includes a transmitting power supply, a first switching circuit, and a second switching circuit. The transmitting power supply is connected between the first capacitor and the radio frequency amplifier through the first switching circuit. One end of the second switching circuit is connected between the first capacitor and the radio frequency amplifier, and the other end of the second switching circuit is grounded. The system includes a receiving power supply, a third switching circuit, and a fourth switching circuit. The receiving power supply is connected between the second capacitor and the RF amplifier through the third switching circuit. One end of the fourth switching circuit is connected between the second capacitor and the RF amplifier, and the other end of the fourth switching circuit is grounded. A control circuit, which is connected to the first switch circuit, the second switch circuit, the third switch circuit, and the fourth switch circuit respectively; When the control circuit controls the first switching circuit to be disconnected and the second switching circuit to be turned on, the first capacitor discharges through the second switching circuit to realize the power-off of the transmitting power supply; When the control circuit controls the third switch circuit to open and the fourth switch circuit to open, the second capacitor discharges through the fourth switch circuit to power off the receiving power supply.

2. The power-down circuit according to claim 1, characterized in that, When the control circuit controls the first switching circuit to be turned on and the second switching circuit to be turned off, the transmitting power supply powers the radio frequency amplifier through the first switching circuit, and the active phased array antenna is in the transmitting state; When the control circuit controls the third switch circuit to be turned on and the fourth switch circuit to be turned off, the receiving power supply powers the radio frequency amplifier through the third switch circuit, and the active phased array antenna is in receiving mode.

3. The power-down circuit according to claim 2, characterized in that, The control circuit includes a main control circuit, a first drive circuit, and a second drive circuit. The first drive circuit is connected to the main control circuit, the first switch circuit, and the second switch circuit, respectively. The second drive circuit is connected to the main control circuit, the third switch circuit, and the fourth switch circuit, respectively.

4. The power-down circuit according to claim 3, characterized in that, The main control circuit outputs a first control signal and a second control signal to the first drive circuit. The first drive circuit converts the first control signal into a first drive signal and the second control signal into a second drive signal. The first switching circuit is turned on or off based on the first drive signal, and the second switching circuit is turned on or off based on the second drive signal. The main control circuit outputs a third control signal and a fourth control signal to the second drive circuit. The second drive circuit converts the third control signal into a third drive signal and the fourth control signal into a fourth drive signal. The third switch circuit is turned on or off based on the third drive signal, and the fourth switch circuit is turned on or off based on the fourth drive signal.

5. The power-down circuit according to claim 4, characterized in that, When the main control circuit controls the first drive signal to rise from a low level to a high level through the first drive circuit, the first switch circuit is turned on, the first capacitor is charged, and the active phased array antenna is in the transmitting state. When the main control circuit controls the first driving signal to drop from high level to low level and controls the second driving signal to rise from low level to high level through the first driving circuit, the first switching circuit is disconnected, the second switching circuit is turned on, the first capacitor is discharged through the second switching circuit, and the active phased array antenna is turned off in the transmission state. When the main control circuit controls the third driving signal to rise from a low level to a high level through the second driving circuit, the third switching circuit is turned on, the second capacitor is charged, and the active phased array antenna is in the receiving state. When the main control circuit controls the third driving signal to drop from high level to low level and controls the fourth driving signal to rise from low level to high level through the second driving circuit, the third switching circuit is turned off and the fourth switching circuit is turned on. The second capacitor discharges through the fourth switching circuit, and the active phased array antenna turns off the receiving state.

6. The power-down circuit according to claim 5, characterized in that, The main control circuit controls the first driving signal to drop from a high level to a low level through the first driving circuit, and after a preset time, controls the second driving signal to rise from a low level to a high level. The main control circuit controls the third driving signal to drop from a high level to a low level through the second driving circuit, and after the preset time, controls the fourth driving signal to rise from a low level to a high level.

7. The power-down circuit according to claim 3, characterized in that, The first switching circuit includes a first switching transistor, and the second switching circuit includes a second switching transistor. The first terminal of the first switching transistor is connected to the positive terminal of the transmitting power supply, and the negative terminal of the transmitting power supply is grounded. The second terminal of the first switching transistor is connected between the first capacitor and the RF amplifier. The third terminal of the first switching transistor is connected to the first driving circuit. The first terminal of the second switching transistor is connected between the first capacitor and the RF amplifier. The second terminal of the second switching transistor is grounded. The third terminal of the second switching transistor is connected to the first driving circuit.

8. The power-down circuit according to claim 7, characterized in that, The third switching circuit includes a third switching transistor, and the fourth switching circuit includes a fourth switching transistor. The first terminal of the third switching transistor is connected to the positive terminal of the receiving power supply, and the negative terminal of the receiving power supply is grounded. The second terminal of the third switching transistor is connected between the second capacitor and the RF amplifier. The third terminal of the third switching transistor is connected to the second driving circuit. The first terminal of the fourth switching transistor is connected between the second capacitor and the RF amplifier. The second terminal of the fourth switching transistor is grounded. The third terminal of the fourth switching transistor is connected to the second driving circuit.

9. The power-down circuit according to claim 8, characterized in that, The radio frequency amplifier is connected to the main control circuit, and the radio frequency amplifier interacts with the main control circuit.

10. A discharge system, characterized in that, Includes the power-down circuit as described in any one of claims 1-9.

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