Solar cell and method for manufacturing the same, solar cell module

Abstract

The present disclosure provides a solar cell, a preparation method thereof and a solar cell module. The solar cell comprises a first cell structure and a second cell structure stacked along a first direction. The first cell structure comprises a perovskite light-absorbing layer, a first transport layer and a second transport layer. The first transport layer and the second transport layer are located between the perovskite light-absorbing layer and the second cell structure. The first transport layer and the second transport layer are arranged along a second direction. The second direction intersects the first direction. The second cell structure comprises a substrate and a first conductive connecting structure penetrating through the substrate along the first direction. The first conductive connecting structure is coupled with the first transport layer.

Description

Technical Field

[0001] This disclosure relates to the field of solar cell technology, and in particular to a solar cell and its preparation method, and a solar cell module. Background Technology

[0002] Photovoltaic power generation is widely distributed, has a huge total volume, and is environmentally friendly, holding an important strategic position in future energy development. Developing high-efficiency, low-cost solar cell modules is key to driving photovoltaic development. With the deepening research in the field of solar photovoltaics, the photoelectric conversion efficiency of crystalline silicon single-junction solar cells is constantly improving, approaching the Shockley-Queisser theoretical limit. By using tandem solar cells (referred to as "tandem cells") constructed from materials with different optical bandgap widths, the range of wavelengths from which the cell absorbs and utilizes the solar spectrum can be comprehensively broadened, thereby enabling the cell efficiency to break through the Shockley-Queisser theoretical limit. The theoretical limit for tandem cells under one sun can exceed 40%. Therefore, the industrialization of tandem cells and modules has attracted much attention and is the most promising industrial technology route for the future of solar cell modules.

[0003] Stacked solar cells are typically composed of two or more sub-cells connected in series. Based on the number of output terminals, they can be classified into two-terminal, three-terminal, and four-terminal types. Three-terminal and four-terminal cells allow the top and bottom cells to generate electricity separately, with lower requirements for matching absorption spectra and current, but this increases the difficulty and cost of packaging. Two-terminal cells are compatible with the packaging of traditional monocrystalline silicon cells without increasing costs.

[0004] Currently, most two-terminal tandem solar cells still have a double-sided structure. The large light-shielding area of ​​the grid-type metal electrodes on the front surface reduces the optical performance of the front side of the tandem solar cell, limits the improvement of photoelectric conversion efficiency, and fails to give full play to its structural advantage of high photoelectric conversion efficiency. Summary of the Invention

[0005] In view of this, the present disclosure provides a solar cell and a method for its fabrication, as well as a solar cell module.

[0006] To achieve the above objectives, the technical solution of this disclosure embodiment is implemented as follows:

[0007] In a first aspect, embodiments of this disclosure provide a solar cell, including a first cell structure and a second cell structure stacked along a first direction; wherein...

[0008] The first battery structure includes a perovskite light-absorbing layer, a first transport layer, and a second transport layer; the first transport layer and the second transport layer are located between the perovskite light-absorbing layer and the second battery structure; the first transport layer and the second transport layer are arranged along a second direction; the second direction intersects the first direction;

[0009] The second battery structure includes a substrate and a first conductive connection structure extending through the substrate along the first direction; the first conductive connection structure is coupled to the first transport layer.

[0010] In one optional embodiment, the second battery structure further includes:

[0011] A first isolation structure is located between the substrate and the first conductive connection structure.

[0012] In one alternative embodiment, the substrate includes a substrate, a first passivation layer, a second passivation layer, a first doped semiconductor layer, and a second doped semiconductor layer;

[0013] The substrate is located between the first passivation layer and the second passivation layer;

[0014] The first passivation layer is located between the substrate and the first battery structure;

[0015] The second passivation layer is located between the substrate and the second doped semiconductor layer;

[0016] The first doped semiconductor layer is located between the first passivation layer and the first battery structure.

[0017] In one optional implementation, the first isolation structure includes a first isolation layer, a second isolation layer, and a third isolation layer;

[0018] The first isolation layer is located between the substrate and the second isolation layer, and the first isolation layer is connected to both the first passivation layer and the second passivation layer;

[0019] The third isolation layer is located between the second isolation layer and the first conductive connection structure, and the third isolation layer is connected to the first doped semiconductor layer.

[0020] In one optional embodiment, the substrate further includes a first transparent conductive layer and a second transparent conductive layer; the first transparent conductive layer is located between the first doped semiconductor layer and the first battery structure; the second doped semiconductor layer is located between the second transparent conductive layer and the second passivation layer.

[0021] In one optional embodiment, the first battery structure further includes:

[0022] A third transparent conductive layer is located between the first transport layer and the substrate, and between the second transport layer and the substrate.

[0023] In one optional embodiment, the second battery structure further includes:

[0024] A second conductive connection structure is connected to the first conductive connection structure, and the second conductive connection structure is located between the substrate and the first transmission layer.

[0025] In one alternative embodiment, the solar cell further includes:

[0026] The second isolation structure is located between the first transport layer and the second transport layer, and extends through the first doped semiconductor layer along the first direction and is connected to the first passivation layer; the first conductive connection structure is located between the two second isolation structures in the second direction.

[0027] In one alternative embodiment, the solar cell further includes:

[0028] The third isolation structure is located between the second doped semiconductor layer and the first isolation structure, and is connected to the second passivation layer; the first conductive connection structure is located between the two third isolation structures in the second direction.

[0029] In one optional embodiment, the second battery structure further includes:

[0030] A first electrode and a second electrode, wherein the substrate is located between the first electrode and the first battery structure and between the second electrode and the first battery structure; the first electrode is coupled to the second doped semiconductor layer; and the second electrode is connected to the first conductive connection structure.

[0031] Secondly, embodiments of this disclosure provide a solar cell module, including a plurality of solar cells, wherein the plurality of solar cells are arranged in an array along a second direction and a third direction; the second direction intersects with the third direction;

[0032] The solar cell is any of the solar cells described in the above embodiments.

[0033] Thirdly, embodiments of this disclosure provide a method for preparing a solar cell, comprising:

[0034] A second battery structure is formed; the second battery structure includes a substrate and a first conductive connection structure penetrating the substrate along a first direction;

[0035] A first battery structure is formed on the second battery structure; the first battery structure includes a perovskite light-absorbing layer, a first transport layer, and a second transport layer; the first transport layer and the second transport layer are located between the perovskite light-absorbing layer and the second battery structure; the first transport layer and the second transport layer are arranged along a second direction; a first conductive connection structure is coupled to the first transport layer; the second direction intersects with the first direction.

[0036] In one alternative implementation, forming the second battery structure includes:

[0037] A substrate is provided, and a through-hole is formed through the substrate along a first direction;

[0038] A passivation layer and a mask layer are sequentially formed on the first side and the second side of the substrate and on the sidewall of the via; the passivation layer located on the first side of the substrate constitutes a first passivation layer, the passivation layer located on the second side of the substrate constitutes a second passivation layer, and the passivation layer covering the sidewall of the via constitutes a first isolation layer.

[0039] A portion of the mask layer is removed from the first side and the second side of the substrate, respectively, to expose the first passivation layer and the second passivation layer; the remaining mask layer constitutes a second isolation layer.

[0040] A semiconductor layer is formed covering the first passivation layer, the second passivation layer, and the second isolation layer, and a first doped semiconductor layer and a second doped semiconductor layer are formed in the semiconductor layer; the first doped semiconductor layer is located on the first side of the substrate, and the second doped semiconductor layer is located on the second side of the substrate;

[0041] A first transparent conductive layer covering the first doped semiconductor layer and a second transparent conductive layer covering the second doped semiconductor layer are formed;

[0042] A first conductive connection structure extending along the first direction is formed in the remaining space of the through hole, and a second conductive connection structure, a first electrode, and a second electrode are formed; the second conductive connection structure is connected to one end of the first conductive connection structure; the first electrode is coupled to the second doped semiconductor layer; the second electrode is connected to the other end of the first conductive connection structure; the second electrode and the first electrode are both located on the second side of the substrate.

[0043] In one optional embodiment, forming the first battery structure on the second battery structure includes:

[0044] A third transparent conductive layer is formed covering the second conductive connection structure and the first transparent conductive layer, and an initial transmission layer is formed covering the third transparent conductive layer;

[0045] A portion of the initial transport layer is removed to form a first trench exposing the third transparent conductive layer; the first conductive connection structure and the second conductive connection structure are located between opposite sidewalls of the first trench in the second direction, and the remaining initial transport layer constitutes the second transport layer;

[0046] A first transmission layer is formed in the first trench;

[0047] A perovskite light-absorbing layer covering the first transmission layer and the second transmission layer, and an anti-reflection layer covering the perovskite light-absorbing layer are formed.

[0048] In one optional embodiment, the method for fabricating the solar cell further includes:

[0049] Before forming the perovskite light-absorbing layer covering the first transport layer and the second transport layer and the anti-reflection layer covering the perovskite light-absorbing layer, a second trench is formed extending along the first direction and penetrating the second transport layer, the third transparent conductive layer, the first transparent conductive layer and the first doped semiconductor layer; the second trench exposes the sidewalls of the first passivation layer and the first transport layer.

[0050] A third trench is formed that extends along the first direction and penetrates the semiconductor layer; the third trench exposes the second isolation layer and the second passivation layer.

[0051] A second isolation structure is formed in the second trench, and a third isolation structure is formed in the third trench.

[0052] In the technical solution provided in this disclosure, the solar cell includes a first cell structure and a second cell structure stacked along a first direction. The first cell structure includes a perovskite light-absorbing layer, a first transport layer and a second transport layer. Both the first transport layer and the second transport layer are located between the perovskite light-absorbing layer and the second cell structure. The second cell structure includes a substrate and a first conductive connection structure penetrating the substrate along the first direction. The first conductive connection structure is coupled to the first transport layer, thereby enabling the back-side lead-out of the current transport path, avoiding the placement of electrodes on the light-receiving surface of the solar cell, reducing the sacrifice of the light-absorbing area, and improving the photoelectric conversion efficiency of the solar cell. Attached Figure Description

[0053] Figure 1 This is a schematic diagram of the structure of a solar cell provided in an embodiment of this disclosure;

[0054] Figure 2 A schematic flowchart illustrating the fabrication process of the solar cell provided in this disclosure embodiment. Figure 1 ;

[0055] Figure 3A schematic flowchart illustrating the fabrication process of the solar cell provided in this disclosure embodiment. Figure 2 ;

[0056] Figure 4 A schematic flowchart illustrating the fabrication process of the solar cell provided in this disclosure embodiment. Figure 3 ;

[0057] Figure 5 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 1 ;

[0058] Figure 6 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 2 ;

[0059] Figure 7 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 3 ;

[0060] Figure 8 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 4 ;

[0061] Figure 9 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 5 ;

[0062] Figure 10 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 6 ;

[0063] Figure 11 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 7 ;

[0064] Figure 12 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 8 ;

[0065] Figure 13 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 9 ;

[0066] Figure 14 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 10 one;

[0067] Figure 15 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 10 two;

[0068] Figure 16 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 10 three;

[0069] Figure 17 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 10 Four;

[0070] Figure 18 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 10 five;

[0071] Figure 19 A schematic diagram of the fabrication process of the solar cell provided in this disclosure embodiment. Figure 10 six. Detailed Implementation

[0072] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0073] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0074] In the accompanying drawings, the same reference numerals denote the same elements throughout.

[0075] It should be understood that spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0076] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0077] Photovoltaic power generation is widely distributed, has a huge total volume, and is environmentally friendly, holding an important strategic position in future energy development. Developing high-efficiency, low-cost solar cell modules is key to driving photovoltaic development. With the deepening research in the field of solar photovoltaics, the photoelectric conversion efficiency of crystalline silicon single-junction solar cells is constantly improving, approaching the Shockley-Queisser theoretical limit. By using tandem solar cells (referred to as "tandem cells") constructed from materials with different optical bandgap widths, the range of wavelengths from which the cell absorbs and utilizes the solar spectrum can be comprehensively broadened, thereby enabling the cell efficiency to break through the Shockley-Queisser theoretical limit. The theoretical limit for tandem cells under one sun can exceed 40%. Therefore, the industrialization of tandem cells and modules has attracted much attention and is the most promising industrial technology route for the future of solar cell modules.

[0078] Stacked solar cells are typically composed of two or more sub-cells connected in series. Based on the number of output terminals, they can be classified into two-terminal, three-terminal, and four-terminal types. Three-terminal and four-terminal cells allow the top and bottom cells to generate electricity separately, with lower requirements for matching absorption spectra and current, but this increases the difficulty and cost of packaging. Two-terminal cells are compatible with the packaging of traditional monocrystalline silicon cells without increasing costs.

[0079] Currently, most two-terminal tandem solar cells still have a double-sided structure. The large light-shielding area of ​​the grid-type metal electrodes on the front surface reduces the optical performance of the front side of the tandem solar cell, limits the improvement of photoelectric conversion efficiency, and fails to give full play to its structural advantage of high photoelectric conversion efficiency.

[0080] Therefore, improving the photoelectric conversion efficiency and power generation of tandem solar cells has become an urgent problem to be solved.

[0081] The present disclosure provides the following implementation methods.

[0082] This disclosure provides a solar cell, Figure 1 This is a schematic diagram of the structure of a solar cell provided in an embodiment of this disclosure, such as... Figure 1 As shown, the solar cell includes a first cell structure 100 and a second cell structure 200 stacked along a first direction. The first cell structure 100 includes a perovskite light-absorbing layer 101, a first transport layer 102, and a second transport layer 103. The first and second transport layers 102 and 103 are located between the perovskite light-absorbing layer 101 and the second cell structure 200. The first and second transport layers 102 and 103 are arranged along a second direction, which intersects the first direction. The second cell structure 200 includes a substrate 210 and a first conductive connection structure 201 penetrating the substrate 210 along the first direction. The first conductive connection structure 201 is coupled to the first transport layer 102. Here, the first direction is taken as the Z direction, and the second direction as the X direction.

[0083] In some specific examples, the perovskite light-absorbing layer 101 may include one or more organic-inorganic hybrid perovskite materials. The molecular formula of the organic-inorganic hybrid perovskite material may be ABX3, wherein A may be selected from at least one of methylamine, formamidinium, cesium (Cs), lithium (Li), sodium (Na), potassium (K) and rubidium (Rb), B may be selected from at least one of lead (Pb), tin (Sn), germanium (Ge), calcium (Ca), strontium (Sr), cobalt (Co), zinc (Zn), iron (Fe), magnesium (Mg), barium (Ba), cadmium (Cd), nickel (Ni), manganese (Mn), silicon (Si), titanium (Ti), bismuth (Bi) and indium (In), and X may be selected from at least one of fluorine (F), chlorine (Cl), bromine (Br) and iodine (I).

[0084] In one specific example, the perovskite light-absorbing layer 101 may include Cs x MA 1-x PbIBr2 has a band gap of 1.69 eV and a thickness ranging from 300 to 700 nanometers.

[0085] In some embodiments, one of the first transport layer 102 and the second transport layer 103 may be an electron transport layer and the other may be a hole transport layer.

[0086] In some specific examples, the electron transport layer may include tin oxide (SnO). x Titanium oxide (TiO) x The hole transport layer may include any one of the following: C60, fullerene derivatives, etc. The hole transport layer may include organic or inorganic materials. Organic materials may include any one of poly(3,4-ethylenedioxythiophene)polycarbazole, poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine], and 2,2',7,7'-tetratetra[N,N-di(4-methoxyphenyl)amino]-9,9'-spirodifluorene. Inorganic materials may include any one of copper-based materials, nickel-based materials, and two-dimensional layered materials. Copper-based materials include copper oxide (CuO). x ), copper cyanide (Cu(CN)) x Copper iodide (CuI) x At least one of the following, nickel-based materials include nickel oxide (NiO). x Two-dimensional layered materials include molybdenum sulfide (MoS₂). x ), Tungsten sulfide (WS) x At least one of the following.

[0087] In some specific examples, the first transport layer 102 comprises tin oxide (SnO). x The first electron transport layer has a thickness ranging from 10 to 50 nanometers; the second transport layer 103 comprises nickel oxide (NiO) x The hole transport layer has a thickness ranging from 20 to 50 nanometers and a sheet resistance ranging from 20 to 50 Ω / Sq.

[0088] In some specific examples, the first conductive connection structure 201 includes a conductive material, which may be one of silver (Ag), nickel (Ni), copper (Cu), aluminum (Al), tin (Sn), zinc (Zn), indium (In), titanium (Ti), gold (Au), and combinations thereof.

[0089] In this embodiment of the present disclosure, the solar cell includes a first cell structure 100 and a second cell structure 200 stacked along a first direction. The first cell structure includes a perovskite light-absorbing layer 101, a first transport layer 102 and a second transport layer 103, with the first transport layer 102 and the second transport layer 103 located between the perovskite light-absorbing layer 101 and the second cell structure 200. The second cell structure 200 includes a substrate 210 and a first conductive connection structure 201 penetrating the substrate 210 along the first direction. The first conductive connection structure 201 is coupled to the first transport layer 102, thereby enabling the back-side lead-out of the current transmission path, avoiding the placement of electrodes on the light-receiving surface of the solar cell, reducing the sacrifice of the light-absorbing area, and improving the photoelectric conversion efficiency of the solar cell.

[0090] In some embodiments, the second battery structure 200 further includes a first isolation structure (216) located between the substrate (210) and the first conductive connection structure (201).

[0091] In some embodiments, the substrate 210 includes a substrate 211, a first passivation layer 212, a second passivation layer 213, a first doped semiconductor layer 214, and a second doped semiconductor layer 215; the substrate 211 is located between the first passivation layer 212 and the second passivation layer 213; the first passivation layer 212 is located between the substrate 211 and the first battery structure 100; the second passivation layer 213 is located between the substrate 211 and the second doped semiconductor layer 215; and the first doped semiconductor layer 214 is located between the first passivation layer 212 and the first battery structure 100.

[0092] In some specific examples, the first passivation layer 212 and the second passivation layer 213 comprise intrinsic amorphous silicon, and the substrate 211 can be an N-type silicon substrate, an intrinsic silicon substrate, or a P-type silicon substrate.

[0093] In some specific examples, the thickness of the first passivation layer 212 ranges from 6 to 10 nanometers, and the thickness of the second passivation layer 213 ranges from 7 to 11 nanometers.

[0094] It should be noted that the embodiments disclosed herein use a second battery structure 200 including a heterojunction (HJT) battery as an example, but the disclosure is not limited thereto. In other embodiments, the second battery structure 200 may include a TOPCon battery, in which case the substrate includes a substrate and a tunneling layer stacked along a first direction, and the tunneling layer may be located between the second doped semiconductor layer and the substrate.

[0095] In some specific examples, the first doped semiconductor layer 214 includes an N-type doped semiconductor material, the second doped semiconductor layer 215 includes a P-type doped semiconductor material, the first transport layer 102 includes an electron transport layer, and the second transport layer 103 includes a hole transport layer.

[0096] In other specific examples, the first doped semiconductor layer 214 includes a P-type doped semiconductor material, the second doped semiconductor layer 215 includes an N-type doped semiconductor material, the first transport layer 102 includes a hole transport layer, and the second transport layer 103 includes an electron transport layer.

[0097] In one specific example, the first doped semiconductor layer 214 comprises N-type doped microcrystalline silicon oxide (SiO2). x The first doped semiconductor layer 215 comprises P-type doped microcrystalline silicon with a thickness ranging from 5 to 22 nanometers, and the second doped semiconductor layer 215 comprises P-type doped microcrystalline silicon with a thickness ranging from 25 to 35 nanometers. Here, N-type doped microcrystalline silicon oxide has high light transmittance, and its placement between the substrate 211 and the first cell structure 100 is beneficial to improving the photoelectric conversion efficiency of the solar cell.

[0098] In some embodiments, the first isolation structure 216 is a multilayer structure. Specifically, the first isolation structure 216 includes a first isolation layer 217, a second isolation layer 218, and a third isolation layer 219. The first isolation layer 217 is located between the substrate 211 and the second isolation layer 218, and is connected to both the first passivation layer 212 and the second passivation layer 213. The third isolation layer 219 is located between the second isolation layer 218 and the first conductive connection structure 201, and is connected to the first doped semiconductor layer 214. Here, the second isolation layer 218 may further include a first sub-isolation layer 2181 and a second sub-isolation layer 2182.

[0099] In some specific examples, the first isolation layer 217 may include the same material as the first passivation layer 212 and the second passivation layer 213; for example, the first isolation layer 217 may include intrinsic amorphous silicon; the first sub-isolation layer 2181 may include silicon nitride (SiN). x ), silicon oxynitride (SiO) x N y ), silicon dioxide (SiO) x ) and silicon carbide (SiC) x At least one of the following: the second sub-isolation layer 2182 may include intrinsic amorphous silicon; the third isolation layer 219 may include intrinsic microcrystalline silicon.

[0100] In some embodiments, the substrate 210 further includes: a first transparent conductive layer 220 and a second transparent conductive layer 221; the first transparent conductive layer 220 is located between the first doped semiconductor layer 214 and the first battery structure 100; and the second doped semiconductor layer 215 is located between the second transparent conductive layer 221 and the second passivation layer 213.

[0101] In some embodiments, the first transparent conductive layer 220 further includes a portion located between the first conductive connection structure 201 and the first isolation structure 216.

[0102] In some specific examples, the thickness of the first transparent conductive layer 220 and the second transparent conductive layer 221 ranges from 65 to 120 nanometers, and the sheet resistance ranges from 20 to 50 Ω / sq.

[0103] In some embodiments, the first battery structure 100 further includes: a third transparent conductive layer 104 located between the first transport layer 102 and the substrate 210 and between the second transport layer 103 and the substrate 210; the third transparent conductive layer 104 is connected to the first transparent conductive layer 220.

[0104] In some specific examples, the first transparent conductive layer 220, the second transparent conductive layer 221, and the third transparent conductive layer 104 may include a transparent conductive oxide (TCO) with high light transmittance, which can reduce sunlight loss while achieving efficient conduction of electrons or holes, thereby improving photoelectric conversion efficiency. Here, TCO includes, but is not limited to, indium tin oxide (ITO), fluorine-doped tin oxide (FTO), and aluminum-doped zinc oxide (AZO).

[0105] In some specific examples, the thickness of the third transparent conductive layer 104 ranges from 20 to 120 nanometers, and the sheet resistance ranges from 20 to 50 Ω / Sq. Here, the third transparent conductive layer 104 is used to connect the perovskite cell in the first cell structure 100 and the crystalline silicon cell in the second cell structure 200. Its thickness and sheet resistance are determined based on the optical matching and series resistance of the perovskite cell and the crystalline silicon cell, which can achieve high-efficiency matching between the perovskite cell and the crystalline silicon cell and improve the photoelectric conversion efficiency of the solar cell.

[0106] In some embodiments, the second battery structure 200 further includes a second conductive connection structure 202, which is connected to the first conductive connection structure 201 and is located between the substrate 210 and the first transport layer 102. Specifically, the second conductive connection structure 202 may be located between the first transparent conductive layer 220 and the third transparent conductive layer 104.

[0107] In some specific examples, the second conductive connection structure 202 can be circular in the XOY plane, with a radial dimension ranging from 0.4 to 0.6 mm. The second conductive connection structure 202 has a large contact area with the third transparent conductive layer 104, which facilitates the efficient collection of charge carriers by the second conductive connection structure 202 and their transfer to the first conductive connection structure 201.

[0108] In some specific examples, the second conductive connection structure 202 may include the same material as the first conductive connection structure 201.

[0109] In some embodiments, the solar cell further includes: a second isolation structure 301 located between the first transport layer 102 and the second transport layer 103, extending through the first doped semiconductor layer 214 in a first direction, and connected to the first passivation layer 212; and a first conductive connection structure 201 located between the two second isolation structures 301 in a second direction.

[0110] In some specific examples, the second isolation structure 301 extends through the first transparent conductive layer 220 and the third transparent conductive layer 104 along the first direction.

[0111] In some embodiments, the solar cell further includes: a third isolation structure 302 located between the second doped semiconductor layer 215 and the first isolation structure 216, and connected to the second passivation layer 213; and a first conductive connection structure 201 located between the two third isolation structures 302 in a second direction.

[0112] In some specific examples, the second isolation structure 301 and the third isolation structure 302 may include insulating adhesive.

[0113] In this embodiment of the present disclosure, the second isolation structure 301 and the third isolation structure 302 can isolate the electron transport path and the hole transport path in the solar cell. The first conductive connection structure 201 is located between the two second isolation structures 301 and between the two third isolation structures 302 in the second direction, so that one of the electrons and holes can be transported to the back side of the solar cell through the first conductive connection structure 201.

[0114] In some embodiments, the second battery structure 200 further includes: a first electrode 231 and a second electrode 232, with a substrate 210 located between the first electrode 231 and the first battery structure 100 and between the second electrode 232 and the first battery structure 100; the first electrode 231 is coupled to a second doped semiconductor layer 215; and the second electrode 232 is connected to a first conductive connection structure.

[0115] In some specific examples, the first electrode 231 and the second electrode 232 include a conductive material, which may be one of silver (Ag), nickel (Ni), copper (Cu), aluminum (Al), tin (Sn), zinc (Zn), indium (In), titanium (Ti), gold (Au), and combinations thereof.

[0116] In some specific examples, the second electrode 232 and the first conductive connection structure 201 comprise the same conductive material.

[0117] In some specific examples, the second electrode 232 may be circular in the XOY plane, with a radial dimension ranging from 0.4 to 0.6 mm; the minimum distance between the first electrode 231 and the first conductive connection structure 201 in the second direction is 0.5 mm; and the dimension of the first electrode 231 in the second direction ranges from 12 to 50 micrometers.

[0118] In this embodiment of the disclosure, the first battery structure 100 includes a perovskite battery, and the second battery structure 200 includes a crystalline silicon battery. The perovskite battery and the crystalline silicon battery are stacked and connected in series. The generated electrons can be collected from one of the first electrode 231 and the second electrode 232, and the generated holes can be collected from the other of the first electrode 231 and the second electrode 232.

[0119] In some embodiments, the first battery structure 100 further includes an antireflection layer 105 located on the perovskite light-absorbing layer 101. Here, the antireflection layer 105 may include silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiNO) x ) and magnesium fluoride (MgF) x One or more of the following, the antireflective layer 105 has high light transmittance, which can further increase the light absorption of the solar cell.

[0120] In some specific examples, the refractive index of the antireflective layer 105 ranges from 1.9 to 2.0, and the thickness ranges from 45 to 55 nanometers.

[0121] In this embodiment, both the first electrode 231 and the second electrode 232 are located on the back surface of the second cell structure 200. The second electrode 232 can be coupled to the first transport layer 102 through a conductive connection structure 201 penetrating the substrate 210. This avoids placing electrodes on the light-receiving surface of the solar cell, thereby reducing the sacrifice of light-absorbing area and improving the photoelectric conversion efficiency of the solar cell. Furthermore, by adjusting the thickness and sheet resistance of each layer in the solar cell, the current density of the solar cell and the crystalline silicon cell can be matched, thereby achieving a higher photoelectric conversion efficiency.

[0122] Based on a concept similar to the solar cells described above, this disclosure also provides a solar cell module, including multiple solar cells, wherein the multiple solar cells are arranged in an array along a second direction and a third direction; the second direction intersects with the third direction; the solar cells are the solar cells described in any of the above embodiments. Here, the second direction can be the X direction, and the third direction can be the Y direction.

[0123] Understandable Figure 1The solar cell shown can be the smallest repeating unit in a solar cell module. A solar cell module can include multiple solar cells with the same or similar structures, and multiple solar cells can be fabricated simultaneously.

[0124] Based on a concept similar to that of the aforementioned solar cells, this disclosure also provides a method for fabricating a solar cell. Figure 2 This is a schematic flowchart illustrating the fabrication process of the solar cell provided in the embodiments of this disclosure, as shown below. Figure 2 As shown, the method for fabricating a solar cell includes the following steps:

[0125] S10: Forming a second battery structure; the second battery structure includes a substrate and a first conductive connection structure penetrating the substrate along a first direction;

[0126] S20: A first battery structure is formed on the second battery structure; the first battery structure includes a perovskite light-absorbing layer, a first transmission layer, and a second transmission layer; the first transmission layer and the second transmission layer are located between the perovskite light-absorbing layer and the second battery structure; the first transmission layer and the second transmission layer are arranged along a second direction; the first conductive connection structure is coupled to the first transmission layer; the second direction intersects with the first direction.

[0127] In some embodiments, refer to Figure 3 The specific process of executing step S10 may include the following steps:

[0128] S101: Provide a substrate and form a through-hole through the substrate in a first direction;

[0129] S102: A passivation layer and a mask layer are sequentially formed on the first side and the second side of the substrate and on the sidewall of the via; the passivation layer located on the first side of the substrate constitutes a first passivation layer, the passivation layer located on the second side of the substrate constitutes a second passivation layer, and the passivation layer covering the sidewall of the via constitutes a first isolation layer.

[0130] S103: Remove portions of the mask layer from the first side and the second side of the substrate respectively to expose the first passivation layer and the second passivation layer; the remaining mask layer constitutes a second isolation layer;

[0131] S104: Form a semiconductor layer covering the first passivation layer, the second passivation layer, and the second isolation layer, and form a first doped semiconductor layer and a second doped semiconductor layer in the semiconductor layer; the first doped semiconductor layer is located on the first side of the substrate, and the second doped semiconductor layer is located on the second side of the substrate;

[0132] S105: Form a first transparent conductive layer covering the first doped semiconductor layer and a second transparent conductive layer covering the second doped semiconductor layer;

[0133] S106: A first conductive connection structure extending along the first direction is formed in the remaining space of the through hole, and a second conductive connection structure, a first electrode, and a second electrode are formed; the second conductive connection structure is connected to one end of the first conductive connection structure; the first electrode is coupled to the second doped semiconductor layer; the second electrode is connected to the other end of the first conductive connection structure; the second electrode and the first electrode are both located on the second side of the substrate.

[0134] In some embodiments, refer to Figure 4 The specific process of executing step S20 may include the following steps:

[0135] S201: Form a third transparent conductive layer covering the second conductive connection structure and the first transparent conductive layer, and an initial transmission layer covering the third transparent conductive layer;

[0136] S202: Remove a portion of the initial transmission layer to form a first trench exposing the third transparent conductive layer; the first conductive connection structure and the second conductive connection structure are located between opposite sidewalls of the first trench in the second direction, and the remaining initial transmission layer constitutes the second transmission layer;

[0137] S203: A first transmission layer is formed in the first trench;

[0138] S204: Form a perovskite light-absorbing layer covering the first transmission layer and the second transmission layer, and an anti-reflection layer covering the perovskite light-absorbing layer.

[0139] Figures 5 to 19 This is a schematic diagram of the formation process of a solar cell provided in an embodiment of this disclosure. The following will be combined with... Figures 3 to 19 The method for preparing a solar cell provided in the embodiments of this disclosure will be described in detail.

[0140] Combined with reference Figure 5 and Figure 6 Step S101: Provide a substrate 211 and form a through hole 401 through the substrate 211 along a first direction.

[0141] In some specific examples, the specific process of performing step S101 may include: forming vias 401 in the substrate 211 using a laser. When multiple vias 401 arranged in an array are formed simultaneously in the substrate, the density of vias formed can be 1 per square centimeter.

[0142] In some specific examples, the radial dimension of the through hole 401 ranges from 0.18 to 0.22 mm.

[0143] In some specific examples, after forming the via 401, a pyramid structure can be formed on the surface of the first side 211a of the substrate 211 by a texturing process. The size of the pyramid structure can range from 0.2 to 8 micrometers.

[0144] Combined with reference Figure 6 and Figure 7 Step S102 is executed: a passivation layer 420 and a mask layer 430 are sequentially formed on the first side 211a and the second side 211b of the substrate 211 and on the sidewall of the via 401; the passivation layer located on the first side 211a of the substrate 211 constitutes a first passivation layer 212, the passivation layer located on the second side 211b of the substrate 211 constitutes a second passivation layer 213, and the passivation layer covering the sidewall of the via 401 constitutes a first isolation layer 217. Here, the mask layer 430 may include a first mask layer 402 and a second mask layer 403.

[0145] Here, the first side 211a and the second side 211b of the substrate 211 are the upper and lower sides of the substrate 211 in the first direction, respectively. To avoid confusion, only... Figure 6 The first side 211a and the second side 211b are labeled in the text. It can be understood that the first side of the substrate in the following text refers to... Figure 6 The first side (211a) shown, and the second side of the substrate are both Figure 6 The second side (211b) is shown.

[0146] In some specific examples, the first passivation layer 212 and the second passivation layer 213 may include intrinsic amorphous silicon, and the first mask layer 402 may include silicon nitride (SiN). x The second mask layer 403 may include intrinsic amorphous silicon.

[0147] In some specific examples, the first passivation layer 212 and the second passivation layer 213 may have different thicknesses. Specifically, the thickness of the first passivation layer 212 ranges from 6 to 10 nanometers, and the thickness of the second passivation layer 213 ranges from 7 to 11 nanometers.

[0148] In some specific examples, the thickness of the first mask layer 402 ranges from 20 to 30 nanometers, and the thickness of the second mask layer 403 ranges from 5 to 15 nanometers.

[0149] Combined with reference Figure 7 and Figure 8Step S103 is executed: a portion of the mask layer 420 is removed from the first side and the second side of the substrate 211 to expose the first passivation layer 212 and the second passivation layer 213; the remaining mask layer constitutes the second isolation layer 218. Specifically, the remaining first mask layer constitutes the first sub-isolation layer 2181, and the remaining second mask layer constitutes the second sub-isolation layer 2182.

[0150] In some specific examples, the specific process of performing step S103 may include: using a laser to remove part of the second mask layer 403 to expose the first mask layer 402, and then removing the exposed first mask layer 402 by a wet etching process.

[0151] In some specific examples, refer to Figure 8 The remaining mask layer surrounds the via 401, and the dimension D1 of the remaining mask layer in the second direction ranges from 3 to 5 mm. In a specific example, the dimension D1 of the remaining mask layer in the second direction is 3.9 mm.

[0152] Combined with reference Figure 8 and Figure 9 Step S104 is executed: a semiconductor layer 440 is formed covering the first passivation layer 212, the second passivation layer 213, and the second isolation layer 218, and a first doped semiconductor layer 214 and a second doped semiconductor layer 215 are formed in the semiconductor layer 440; the first doped semiconductor layer 214 is located on the first side of the substrate 211, and the second doped semiconductor layer 215 is located on the second side of the substrate 211.

[0153] In some specific examples, the specific process of performing step S104 may include: forming a semiconductor layer covering a first passivation layer 212, a second passivation layer 213, and a second isolation layer 218 through a deposition process; and then forming a first doped semiconductor layer 214 and a second doped semiconductor layer 215 in the semiconductor layer through an ion implantation process, wherein one of the first doped semiconductor layer 214 and the second doped semiconductor layer 215 is N-type doped and the other is P-type doped. The portion of the semiconductor layer covering the second isolation layer 218 is undoped, forming a third isolation layer 219. The first isolation layer 217, the second isolation layer 218, and the third isolation layer 219 together constitute a first isolation structure 216. Here, the deposition process may be plasma-enhanced chemical vapor deposition (PECVD).

[0154] In some specific examples, the first doped semiconductor layer 214 is N-type doped and has a thickness ranging from 5 to 22 nanometers; the second doped semiconductor layer 215 is P-type doped and has a thickness ranging from 25 to 35 nanometers.

[0155] In some embodiments, in conjunction with reference Figure 9 and Figure 10 Step S105 is executed: a first transparent conductive layer 220 covering the first doped semiconductor layer 214 and a second transparent conductive layer 221 covering the second doped semiconductor layer 215 are formed.

[0156] In some specific examples, a transparent conductive layer covering a first doped semiconductor layer 214, a second doped semiconductor layer 215, and a third isolation layer 219 can be formed by a deposition process. The portion of the transparent conductive layer covering the first doped semiconductor layer 214 and the third isolation layer 219 can constitute a first transparent conductive layer 220, and the portion of the transparent conductive layer covering the second doped semiconductor layer 215 can constitute a second transparent conductive layer 221. Here, the deposition process can be reactive plasma deposition (RPD) or physical vapor deposition (PVD).

[0157] In some specific examples, the thickness of the first transparent conductive layer 220 and the second transparent conductive layer 221 ranges from 65 to 120 nanometers, and the sheet resistance ranges from 20 to 50 Ω / sq.

[0158] Combined with reference Figure 10 and Figure 11 Step S106 is executed: a first conductive connection structure 201 extending along a first direction is formed in the remaining space of the through hole 401, and a second conductive connection structure 202, a first electrode 231, and a second electrode 232 are formed; the second conductive connection structure 202 is connected to one end of the first conductive connection structure 201; the first electrode 231 is coupled to the second doped semiconductor layer 215; the second electrode 232 is connected to the other end of the first conductive connection structure 201; the second electrode 232 and the first electrode 231 are both located on the second side of the substrate 211.

[0159] In some specific examples, the specific process of performing step S106 may include: using a screen printing process to fill the through hole with conductive paste to form a first conductive connection structure 201, and to form a second conductive connection structure 202 and a second electrode 232; and then forming the first electrode 231 on the second transparent conductive layer 221 by a screen printing process.

[0160] In some specific examples, the screen printing process may include printing, drying, curing and light injection of conductive paste, wherein the drying temperature may be 150 to 200°C for 2 to 10 minutes, the curing temperature may be 170 to 220°C for 5 to 30 minutes, and the light injection temperature may be 190 to 220°C for 1 to 3 minutes with a light intensity of 50 to 80 solar masses.

[0161] In some specific examples, the second conductive connection structure 202 and the second electrode 232 can be circular in shape, with a radial dimension ranging from 0.4 to 0.6 mm; the minimum distance between the first electrode 231 and the first conductive connection structure 201 in the second direction is 0.5 mm; and the dimension of the first electrode 231 in the second direction ranges from 12 to 50 micrometers.

[0162] Combined with reference Figure 11 and Figure 12 Step S201 is executed: a third transparent conductive layer 104 covering the second conductive connection structure 202 and the first transparent conductive layer 220 and an initial transmission layer 404 covering the third transparent conductive layer 104 are formed.

[0163] In some specific examples, the thickness of the third transparent conductive layer 104 ranges from 20 to 120 nanometers, and the sheet resistance ranges from 20 to 50 Ω / Sq.

[0164] In some specific examples, the initial transport layer 404 can be formed by spin coating, coating process, blade coating process, inkjet process or vapor deposition process.

[0165] In a specific example, nickel oxide (NiO) can be formed via a vapor deposition process. x The initial transport layer 404 is processed at a temperature below 250°C, with a thickness ranging from 20 to 50 nanometers and a sheet resistance ranging from 20 to 50 Ω / Sq.

[0166] In some specific examples, the method for fabricating a solar cell further includes: after forming an initial transport layer 404, forming a patterned mask layer 405 on the initial transport layer, the patterned mask layer 405 including openings 406 that expose portions of the initial transport layer 404. The patterned mask layer 405 may include silicon nitride (SiN). x Its thickness ranges from 20 to 300 nanometers, and its refractive index ranges from 1.8 to 2.5.

[0167] In some specific examples, when a module comprising multiple solar cells is simultaneously formed using the above-described method for fabricating solar cells, the positional relationship between the opening 406 and the first conductive connection structure 201 can be as follows: Figure 13 or Figure 14 As shown. In a specific example, refer to Figure 13 An opening 406 can correspond to a first conductive connection structure 201. In another specific example, refer to... Figure 14An opening 406 may correspond to a plurality of first conductive connection structures 201 arranged along a third direction, and the size of the opening 406 in the second direction ranges from 0.4 to 0.6 mm, and the spacing between two adjacent openings 406 in the second direction ranges from 0.2 to 0.3 mm.

[0168] In some specific examples, the ratio of the area of ​​opening 406 to the area of ​​no opening ranges from 0.5 to 1.5.

[0169] Combined with reference Figure 12 and Figure 15 Step S202 is executed: a portion of the initial transmission layer 404 is removed to form a first trench 407 that exposes the third transparent conductive layer 104; the first conductive connection structure 201 and the second conductive connection structure 202 are located in the second direction between the opposite sidewalls of the first trench 407, and the remaining initial transmission layer constitutes the second transmission layer 103.

[0170] In some specific examples, the initial transport layer 404 exposed by the opening 406 can be removed by a wet etching process.

[0171] Combined with reference Figure 15 and Figure 16 Step S203: Form a first transmission layer 102 in the first trench 407.

[0172] In some specific examples, the first transport layer 102 can be formed by spin coating, coating, vapor deposition, or atomic layer deposition. In one specific example, tin oxide (SnO) can be formed by spatial atomic layer deposition (SALD). x The first transport layer 102 has a thickness ranging from 10 to 50 nanometers.

[0173] In some specific examples, after the first transport layer 102 is formed, the patterned mask layer 405 can be removed by laser or other processing methods.

[0174] In some embodiments, in conjunction with reference Figure 16 Figure 17 After performing step S203, the method for fabricating a solar cell further includes: forming a second trench 409 extending along a first direction and penetrating the second transport layer 103, the third transparent conductive layer 104, the first transparent conductive layer 220, and the first doped semiconductor layer 214; the second trench 409 exposing the sidewalls of the first passivation layer 212 and the first transport layer 102; forming a third trench 410 extending along the first direction and penetrating the semiconductor layer; the third trench 410 exposing the second isolation layer 218 and the second passivation layer 213.

[0175] In some specific examples, the second trench 409 has a size ranging from 0.1 to 0.2 mm in the second direction, the third trench 410 has a size ranging from 0.1 to 0.2 mm in the second direction, and the minimum distance between the third trench 410 and the first conductive connection structure 201 in the second direction is 0.5 mm.

[0176] In some embodiments, in conjunction with reference Figure 17 and Figure 18 The method for preparing a solar cell further includes forming a second isolation structure 301 in a second trench 409 and forming a third isolation structure 302 in a third trench 410.

[0177] In some specific examples, insulating adhesive can be filled in the second trench 409 using a screen printing process to form a second isolation structure 301, and insulating adhesive can be filled in the third trench 410 to form a third isolation structure 302. The second isolation structure 301 also includes a portion exposed above the first transmission layer 102 and the second transmission layer 103, the size of which ranges from 0.25 to 0.5 mm in the second direction. The third isolation structure 302 also includes a portion exposed above the transparent conductive layer, the size of which ranges from 0.25 to 0.5 mm in the second direction.

[0178] Combined with reference Figure 18 and Figure 19 Step S204 is executed: a perovskite light-absorbing layer 101 covering the first transmission layer 102 and the second transmission layer 103 and an anti-reflection layer 105 covering the perovskite light-absorbing layer 101 are formed.

[0179] In some specific examples, the perovskite light-absorbing layer 101 can be formed by spin coating, coating process or vapor deposition process.

[0180] In some specific examples, the perovskite light-absorbing layer 101 includes Cs x MA 1-x PbIBr2 has a band gap of 1.69 eV and a thickness ranging from 300 to 700 nanometers.

[0181] In some specific examples, silicon nitride (SiN) can be prepared at 90°C using plate plasma-enhanced chemical vapor deposition (PECVD). x A thin film is formed to form an antireflection layer 105 with a refractive index ranging from 1.9 to 2.0 and a thickness of 50 nanometers.

[0182] In this embodiment, the solar cell fabrication method provided in the above embodiments can be used to fabricate a solar cell in which both the first electrode 231 and the second electrode 232 are located on the back side. The second electrode 232 can be coupled to the first transport layer 102 via a first conductive connection structure 201 penetrating the substrate 210. This allows for back-side current transmission, avoiding the placement of electrodes on the light-receiving surface of the solar cell, thereby reducing the sacrifice of light-absorbing area and improving the photoelectric conversion efficiency of the solar cell. Furthermore, by adjusting the thickness and sheet resistance of each layer in the solar cell, the current density of the solar cell and the crystalline silicon cell can be matched, thereby achieving a higher photoelectric conversion efficiency.

[0183] The features disclosed in the several device embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new device embodiments.

[0184] The methods disclosed in the several method embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0185] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A solar cell, characterized in that, It includes a first battery structure (100) and a second battery structure (200) stacked along a first direction; The first battery structure (100) includes a perovskite light-absorbing layer (101), a first transport layer (102), and a second transport layer (103); the first transport layer (102) and the second transport layer (103) are located between the perovskite light-absorbing layer (101) and the second battery structure (200); the first transport layer (102) and the second transport layer (103) are arranged along a second direction; the second direction intersects with the first direction; The second battery structure (200) includes a substrate (210) and a first conductive connection structure (201) extending through the substrate (210) along the first direction; the first conductive connection structure (201) is coupled to the first transport layer (102).

2. The solar cell according to claim 1, characterized in that, The second battery structure (200) also includes: A first isolation structure (216) is located between the substrate (210) and the first conductive connection structure (201).

3. The solar cell according to claim 2, characterized in that, The substrate (210) includes a substrate (211), a first passivation layer (212), a second passivation layer (213), a first doped semiconductor layer (214), and a second doped semiconductor layer (215); The substrate (211) is located between the first passivation layer (212) and the second passivation layer (213); The first passivation layer (212) is located between the substrate (211) and the first battery structure (100); The second passivation layer (213) is located between the substrate (211) and the second doped semiconductor layer (215); The first doped semiconductor layer (214) is located between the first passivation layer (212) and the first battery structure (100).

4. The solar cell according to claim 3, characterized in that, The first isolation structure (216) includes a first isolation layer (217), a second isolation layer (218), and a third isolation layer (219); The first isolation layer (217) is located between the substrate (211) and the second isolation layer (218), and the first isolation layer (217) is connected to both the first passivation layer (212) and the second passivation layer (213); The third isolation layer (219) is located between the second isolation layer (218) and the first conductive connection structure (201), and the third isolation layer (219) is connected to the first doped semiconductor layer (214).

5. The solar cell according to claim 3 or 4, characterized in that, The substrate (210) further includes a first transparent conductive layer (220) and a second transparent conductive layer (221); the first transparent conductive layer (220) is located between the first doped semiconductor layer (214) and the first battery structure (100); the second doped semiconductor layer (215) is located between the second transparent conductive layer (221) and the second passivation layer (213).

6. The solar cell according to any one of claims 1 to 4, characterized in that, The first battery structure (100) further includes: A third transparent conductive layer (104) is located between the first transmission layer (102) and the substrate (210) and between the second transmission layer (103) and the substrate (210).

7. The solar cell according to any one of claims 1 to 4, characterized in that, The second battery structure (200) also includes: A second conductive connection structure (202) is connected to the first conductive connection structure (201), and the second conductive connection structure (202) is located between the substrate (210) and the first transmission layer (102).

8. The solar cell according to claim 3 or 4, characterized in that, The solar cell also includes: The second isolation structure (301) is located between the first transport layer (102) and the second transport layer (103), and extends through the first doped semiconductor layer (214) along the first direction and is connected to the first passivation layer (212); the first conductive connection structure (201) is located between the two second isolation structures (301) in the second direction.

9. The solar cell according to claim 3 or 4, characterized in that, The solar cell also includes: The third isolation structure (302) is located between the second doped semiconductor layer (215) and the first isolation structure (216), and is connected to the second passivation layer (213); the first conductive connection structure (201) is located between the two third isolation structures (302) in the second direction.

10. The solar cell according to claim 3 or 4, characterized in that, The second battery structure (200) also includes: A first electrode (231) and a second electrode (232) are provided, wherein the substrate (210) is located between the first electrode (231) and the first battery structure (100) and between the second electrode (232) and the first battery structure (100); the first electrode (231) is coupled to the second doped semiconductor layer (215); and the second electrode (232) is connected to the first conductive connection structure (201).

11. A solar cell module, characterized in that, It includes multiple solar cells, and the multiple solar cells are arranged in an array along a second direction and a third direction; the second direction intersects with the third direction; The solar cell is the solar cell according to any one of claims 1 to 10.

12. A method for preparing a solar cell, characterized in that, include: A second battery structure (200) is formed; the second battery structure (200) includes a substrate (210) and a first conductive connection structure (201) extending through the substrate (210) in a first direction; A first battery structure (100) is formed on the second battery structure (200); the first battery structure (100) includes a perovskite light-absorbing layer (101), a first transport layer (102) and a second transport layer (103); the first transport layer (102) and the second transport layer (103) are located between the perovskite light-absorbing layer (101) and the second battery structure (200); the first transport layer (102) and the second transport layer (103) are arranged along a second direction; the first conductive connection structure (201) is coupled to the first transport layer (102); the second direction intersects the first direction.

13. The method for preparing a solar cell according to claim 12, characterized in that, The formation of the second battery structure (200) includes: A substrate (211) is provided, and a through-hole (401) is formed through the substrate (211) along a first direction; A passivation layer (420) and a mask layer (430) are sequentially formed on the first side (211a) and the second side (211b) of the substrate (211) and on the sidewall of the via (401); the passivation layer located on the first side (211a) of the substrate (211) constitutes a first passivation layer (212), the passivation layer located on the second side (211b) of the substrate (211) constitutes a second passivation layer (213), and the passivation layer covering the sidewall of the via (401) constitutes a first isolation layer (217); A portion of the mask layer (430) is removed from the first side (211a) and the second side (211b) of the substrate (211) to expose the first passivation layer (212) and the second passivation layer (213); the remaining mask layer constitutes the second isolation layer (218); A semiconductor layer (440) is formed covering the first passivation layer (212), the second passivation layer (213), and the second isolation layer (218), and a first doped semiconductor layer (214) and a second doped semiconductor layer (215) are formed in the semiconductor layer (440); the first doped semiconductor layer (214) is located on the first side (211a) of the substrate (211), and the second doped semiconductor layer (215) is located on the second side (211b) of the substrate (211); A first transparent conductive layer (220) covering the first doped semiconductor layer (214) and a second transparent conductive layer (221) covering the second doped semiconductor layer (215) are formed; A first conductive connection structure (201) extending along the first direction is formed in the remaining space of the through hole (401), and a second conductive connection structure (202), a first electrode (231), and a second electrode (232) are formed; the second conductive connection structure (202) is connected to one end of the first conductive connection structure (201); the first electrode (231) is coupled to the second doped semiconductor layer (215); the second electrode (232) is connected to the other end of the first conductive connection structure (201); the second electrode (232) and the first electrode (231) are both located on the second side (211b) of the substrate (211).

14. The method for preparing a solar cell according to claim 13, characterized in that, The process of forming the first battery structure (100) on the second battery structure (200) includes: A third transparent conductive layer (104) covering the second conductive connection structure (202) and the first transparent conductive layer (220) and an initial transport layer (404) covering the third transparent conductive layer (104) are formed; A portion of the initial transport layer (404) is removed to form a first trench (407) exposing the third transparent conductive layer (104); the first conductive connection structure (201) and the second conductive connection structure (202) are located between opposite sidewalls of the first trench in the second direction, and the remaining initial transport layer constitutes the second transport layer (103). A first transmission layer (102) is formed in the first trench (407); A perovskite light-absorbing layer (101) covering the first transmission layer (102) and the second transmission layer (103) and an anti-reflection layer (105) covering the perovskite light-absorbing layer (101) are formed.

15. The method for preparing a solar cell according to claim 14, characterized in that, The method for preparing the solar cell further includes: Before forming the perovskite light-absorbing layer (101) covering the first transport layer (102) and the second transport layer (103) and the anti-reflection layer (105) covering the perovskite light-absorbing layer (101), a second trench (409) extending along the first direction and penetrating the second transport layer (103), the third transparent conductive layer (104), the first transparent conductive layer (220) and the first doped semiconductor layer (214) is formed; the second trench (409) exposes the sidewalls of the first passivation layer (212) and the first transport layer (102); A third trench (410) is formed extending along the first direction and penetrating the semiconductor layer (440); the third trench (410) exposes the second isolation layer (218) and the second passivation layer (213); A second isolation structure (301) is formed in the second trench (409), and a third isolation structure (302) is formed in the third trench (410).

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