A single microprocessor-based grid shading scheduling system

Abstract

The application relates to the technical field of chip design, in particular to a grid shading scheduling system based on a single microprocessor, which adopts a single microprocessor to realize full-process scheduling, effectively reduces the occupation of GPU hardware resources, avoids the synchronization overhead between multiple processors, thereby reducing the scheduling cost, uniformly manages the pointer states of two types of cache units through firmware, dynamically generates scheduling instructions in combination with a preset priority mechanism, ensures that the stages of graphic drawing, grid shading and task shading are sequentially transferred according to the priority, avoids data accumulation or pipeline interruption, reduces the redundant occupation of the cache, improves the resource utilization, improves the efficiency of grid shading scheduling, and further improves the efficiency of overall graphic drawing.

Description

Technical Field

[0001] This invention relates to the field of chip design technology, and in particular to a grid coloring scheduling system based on a single microprocessor. Background Technology

[0002] Currently, CPUs typically send data packets to GPUs to perform graphics rendering tasks, but the information required for image rendering tasks can only be obtained by the GPU processing the data packets sent by the CPU through its shaders.

[0003] The process from data packet to graphics rendering result typically involves three stages: the task coloring stage, which splits the task coloring data parsed from the data packet into multiple mesh coloring data; the mesh coloring stage, which splits the mesh coloring data into multiple graphics rendering data; and the graphics rendering stage, which performs graphics rendering based on the image rendering data to obtain the graphics rendering result.

[0004] In existing scheduling methods, the data flow of the three stages of task shading, mesh shading and graphics rendering lacks unified coordination, which can easily lead to pipeline blockage, resulting in wasted GPU computing resources or task backlog. Mesh shading scheduling efficiency is also poor.

[0005] Therefore, improving the scheduling efficiency of mesh coloring has become an urgent problem to be solved. Summary of the Invention

[0006] To address the aforementioned technical problems, the technical solution adopted by this invention is as follows: A single-microprocessor-based mesh shading scheduling system is provided. The system includes a GPU, which comprises firmware, a microprocessor, a mesh shading cache unit, a graphics rendering cache unit, a task shader, a mesh shader, and a graphics shader. The mesh shading cache unit has a first generate write pointer, a first dispatch write pointer, a first dispatch read pointer, and a first consume read pointer. The graphics rendering cache unit has a second generate write pointer, a second dispatch write pointer, a second dispatch read pointer, and a second consume read pointer.

[0007] The microprocessor is used to schedule target data, which includes target task coloring data, target mesh coloring data, and target graphics rendering data.

[0008] The firmware is used to generate scheduling instructions according to a preset priority based on various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit. The scheduling instructions are used to drive the microprocessor to schedule target data.

[0009] The firmware is also used to update various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit according to the scheduling and operation of the target data.

[0010] The task shader is used to perform calculations on the target task coloring data to obtain several mesh coloring data, and the target mesh coloring data is determined from each mesh coloring data.

[0011] The mesh coloring cache unit is used to temporarily store mesh coloring data.

[0012] The mesh shader is used to perform calculations on the target mesh coloring data to obtain several graphic drawing data, and the target graphic drawing data is determined from each of the graphic drawing data.

[0013] The graphics drawing cache unit is used to temporarily store graphics drawing data.

[0014] The graphics shader is used to perform calculations on the target graphics drawing data to obtain the graphics drawing result.

[0015] Compared with the prior art, the present invention has significant advantages. Through the above technical solution, the grid coloring scheduling system based on a single microprocessor provided by the present invention achieves considerable technological progress and practicality, and has broad industrial application value. It has at least the following advantages: By using a single microprocessor to achieve end-to-end scheduling, the GPU hardware resource consumption is effectively reduced, and the synchronization overhead between multiple processors is avoided, thereby reducing scheduling costs. The pointer states of the two types of cache units are uniformly managed by firmware, and scheduling instructions are dynamically generated in combination with a preset priority mechanism to ensure that the graphics drawing, mesh shading, and task shading stages flow in an orderly manner according to priority, avoiding data backlog or pipeline interruption, reducing redundant cache usage, improving resource utilization, improving the efficiency of mesh shading scheduling, and thus improving the overall efficiency of graphics drawing. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the first structure of a grid coloring scheduling system based on a single microprocessor according to Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of the second structure of a multi-microprocessor-based mesh coloring scheduling system provided in Embodiment 2 of the present invention; Figure 3 This is a flowchart illustrating the execution of a computer program by a microprocessor in a task coloring data splitting system according to Embodiment 3 of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] Example 1 This embodiment provides a grid coloring scheduling system based on a single microprocessor. See [link to previous document]. Figure 1 This is a first structural diagram of a mesh shading scheduling system based on a single microprocessor provided in Embodiment 1 of the present invention. The system includes a GPU, which includes firmware, a microprocessor, a mesh shading cache unit, a graphics rendering cache unit, a task shader, a mesh shader, and a graphics shader. The mesh shading cache unit has a first generation write pointer, a first dispatch write pointer, a first dispatch read pointer, and a first consumption read pointer. The graphics rendering cache unit has a second generation write pointer, a second dispatch write pointer, a second dispatch read pointer, and a second consumption read pointer. The microprocessor is used to schedule target data, which includes target task coloring data, target mesh coloring data, and target graphics rendering data. The firmware is used to generate scheduling instructions according to a preset priority based on various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit. The scheduling instructions are used to drive the microprocessor to schedule target data. The firmware is also used to update various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit according to the scheduling and operation of the target data; The task shader is used to perform calculations on the target task shader data to obtain several mesh shader data, and the target mesh shader data is determined from each mesh shader data; The mesh coloring cache unit is used to temporarily store mesh coloring data; The mesh shader is used to perform calculations on the target mesh coloring data to obtain several graphics drawing data, and the target graphics drawing data is determined from each of the graphics drawing data. The graphics drawing cache unit is used to temporarily store graphics drawing data; The graphics shader is used to perform calculations on the target graphics drawing data to obtain the graphics drawing result.

[0020] The firmware uses pointers to determine the data storage and processing progress of the corresponding cache unit, and then determines whether to trigger scheduling to ensure that data flows on demand and avoids cache overflow or idle operation.

[0021] The task shader is responsible for splitting the target task shader data at a high level. The first generate write pointer is used to mark the position of the latest split mesh shader data in the mesh shader cache unit. The first dispatch write pointer is used to mark the position of the last mesh shader data obtained from the currently split task shader data in the mesh shader cache unit. The first dispatch read pointer is used to mark the position of reading mesh shader data from the mesh shader cache unit, that is, the position of the target mesh shader data. The first consumer read pointer is used to mark the position of the latest mesh shader data that has been processed.

[0022] The second generation write pointer is used to mark the position of the latest split graphics drawing data in the graphics drawing cache unit. The second dispatch write pointer is used to mark the position of the last graphics drawing data obtained after the current split mesh coloring data is split in the graphics drawing cache unit. The second dispatch read pointer is used to mark the position of reading graphics drawing data from the graphics drawing cache unit, that is, the position of the target graphics drawing data. The second consumption read pointer is used to mark the position of the latest graphics drawing data that has been processed.

[0023] Both the mesh shading buffer unit and the graphics drawing buffer unit can be implemented using a circular buffer.

[0024] In one specific implementation, the scheduling instructions include task shading instructions, mesh shading instructions, and graphics drawing instructions; The step of generating scheduling instructions according to a preset priority based on various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit includes: When the difference between the first dispatch write pointer and the first consumer read pointer is less than the capacity of the grid coloring cache unit, a task coloring instruction is generated and sent to the microprocessor; When the first generate write pointer is greater than the first dispatch read pointer, and the difference between the second dispatch write pointer and the second consumer read pointer is less than the capacity of the graphics drawing cache unit, a mesh shading instruction is generated and sent to the microprocessor. When the second generate write pointer is greater than the second dispatch read pointer and the graphics shader is in an idle state, a graphics drawing instruction is generated and sent to the microprocessor.

[0025] The difference between the first dispatch write pointer and the first consumer read pointer can represent the number of mesh shading data that has been dispatched but not yet processed by the mesh shader. If this number is less than the capacity of the mesh shading cache unit, it means that there is remaining space in the mesh shading cache unit to receive new mesh shading data split by the task shader. Therefore, a task shading instruction is generated and sent to the microprocessor.

[0026] When the first generate write pointer is greater than the first dispatch read pointer, it indicates that there is undistributed mesh shading data in the mesh shading cache unit. The difference between the second dispatch write pointer and the second consumer read pointer can characterize the number of distributed but not yet processed graphics drawing data. If this number is less than the capacity of the graphics drawing cache unit, it means that there is remaining space in the graphics drawing cache unit to receive new graphics drawing data split by the mesh shader. When both conditions are met, and there is undistributed mesh shading data in the mesh shading cache unit and remaining space in the graphics drawing cache unit to receive new graphics drawing data split by the mesh shader, a mesh shading instruction is generated and sent to the microprocessor.

[0027] When the second generate write pointer is greater than the second dispatch read pointer, it indicates that there is undistributed graphics drawing data in the graphics drawing buffer unit. If the graphics shader is idle at this time, it generates graphics drawing instructions and sends them to the microprocessor.

[0028] This embodiment can effectively control the generation of data to avoid exceeding the capacity of the cache space. At the same time, through conditional judgment, it can make the shader output and the receiving capacity of the cache unit match to avoid blocking.

[0029] In one specific implementation, the generation priority of the graphics drawing instruction is greater than the generation priority of the mesh shading instruction, and the generation priority of the mesh shading instruction is greater than the generation priority of the task shading instruction.

[0030] In a scenario with a single microprocessor, the microprocessor can only execute a single instruction at a time. Since the amount of data required gradually decreases from the task shading stage to the mesh shading stage and then to the graphics rendering stage, this embodiment ensures that the downstream stages obtain resources first by generating priorities, thereby further avoiding blocking.

[0031] Specifically, the firmware sequentially determines whether graphics drawing instructions, mesh shading instructions, and task shading instructions can be generated through polling. If graphics drawing instructions can be generated, they are generated directly. If graphics drawing instructions cannot be generated but mesh shading instructions can be generated, mesh shading instructions are generated. If graphics drawing instructions and mesh shading instructions cannot be generated but task shading instructions can be generated, task shading instructions are generated. If graphics drawing instructions, mesh shading instructions, and task shading instructions cannot be generated, the firmware re-determines whether graphics drawing instructions, mesh shading instructions, and task shading instructions can be generated sequentially.

[0032] In one specific implementation, the system further includes a CPU; The microprocessor is also used to acquire data packets from the CPU, parse the data packets to obtain several task coloring data, and take the task coloring data that is first in the parsing order and has not been processed as the target task coloring data. The scheduling target data includes: When the task coloring instruction is received, the target task coloring data is sent to the task shader; When the mesh shading instruction is received, the target mesh shading data is determined from the mesh shading cache unit according to the first dispatch read pointer, the target mesh shading data is retrieved from the mesh shading cache unit and sent to the mesh shader, and the first dispatch read pointer is updated; When the graphics drawing instruction is received, the target graphics drawing data is determined from the graphics drawing cache unit according to the second dispatch read pointer, the target graphics drawing data is retrieved from the graphics drawing cache unit and sent to the graphics shader, and the second dispatch read pointer is updated.

[0033] In this process, the CPU, acting as the host, sends graphics rendering tasks to the GPU. The data required for these tasks can only be obtained by the GPU after processing the data packets sent by the CPU.

[0034] Specifically, when determining the target mesh coloring data from the mesh coloring cache unit according to the first dispatch read pointer, the capacity of the mesh coloring cache unit is used as the modulus. The capacity of the mesh coloring cache unit can be expressed as the number of cache lines contained in the mesh coloring cache unit. A modulo operation is performed on the first dispatch read pointer, and the mesh coloring data in the cache line corresponding to the result of the modulo operation is used as the target mesh coloring data.

[0035] The first read pointer is updated by incrementing the first read pointer by one.

[0036] When determining the target graphics drawing data from the graphics drawing cache unit according to the second distribution read pointer, the capacity of the graphics drawing cache unit is used as the modulus. The capacity of the graphics drawing cache unit can be expressed as the number of cache lines contained in the graphics drawing cache unit. A modulo operation is performed on the second distribution read pointer, and the graphics drawing data in the cache line corresponding to the result of the modulo operation is used as the target graphics drawing data.

[0037] The second-order read pointer is updated by incrementing the second-order read pointer by one.

[0038] By adding a modulo operation, the updates of the first and second dispatch read pointers do not need to consider loops, ensuring the accuracy of the firmware in generating scheduling instructions based on the various pointers corresponding to the mesh coloring cache unit and the various pointers corresponding to the graphics drawing cache unit.

[0039] In one specific implementation, updating the various pointers corresponding to the mesh shading cache unit and the various pointers corresponding to the graphics rendering cache unit based on the scheduling and computation of the target data includes: When any target task coloring data is sent to the task shader, the first dispatch write pointer is updated according to the number of splits corresponding to the target task coloring data; When any target mesh coloring data is sent to the mesh shader, the second dispatch write pointer is updated according to the number of splits corresponding to the target mesh coloring data.

[0040] The number of splits corresponding to the target task colored data can refer to the number of cache lines corresponding to the target task colored data. The update method of the first dispatch write pointer is to add the number of splits corresponding to the target task colored data to the first dispatch write pointer before the update to obtain the updated first dispatch write pointer.

[0041] The number of splits corresponding to the target mesh coloring data can refer to the number of cache lines corresponding to the target mesh coloring data. The update method of the second dispatch write pointer is to add the number of splits corresponding to the target mesh coloring data to the second dispatch write pointer before the update to obtain the updated second dispatch write pointer.

[0042] In one specific implementation, when the task shader performs calculations on the received target task coloring data, it sends each piece of mesh coloring data obtained from the calculation to the mesh coloring cache unit and updates the first generation write pointer. When the mesh shader finishes processing the received target mesh coloring data, it updates the first consumer read pointer.

[0043] Specifically, the first generated write pointer is updated by incrementing it by 1, and the first consumed read pointer is updated by incrementing it by 1.

[0044] In one specific implementation, when the mesh shader performs calculations on the received target mesh coloring data, it sends each piece of graphics drawing data obtained from the calculation to the graphics drawing cache unit and updates the second generation write pointer.

[0045] The second generated write pointer is updated by incrementing it by 1.

[0046] In one specific implementation, the graphics shader is used to perform calculations on the received target graphics drawing data, and after the target graphics drawing data has been calculated, the second consumer read pointer is updated.

[0047] The second consumer read pointer is updated by incrementing it by 1.

[0048] It should be noted that the pointer can be updated automatically by the shader based on the pointer address provided by the firmware, or the shader can generate a corresponding interrupt and send it to the firmware for updating.

[0049] In this first embodiment, a single microprocessor is used to implement the entire process scheduling, which effectively reduces the occupation of GPU hardware resources and avoids the synchronization overhead between multiple processors, thereby reducing scheduling costs. The firmware uniformly manages the pointer states of the two types of cache units and dynamically generates scheduling instructions in combination with a preset priority mechanism to ensure that the graphics drawing, mesh shading, and task shading stages flow in an orderly manner according to priority, avoids data backlog or pipeline interruption, reduces redundant cache occupation, improves resource utilization, improves the efficiency of mesh shading scheduling, and thus improves the overall efficiency of graphics drawing.

[0050] Example 2 This second embodiment provides a grid coloring scheduling system based on multiple microprocessors. See [link to documentation]. Figure 2 This is a schematic diagram of a second structure of a multi-microprocessor-based mesh shading scheduling system provided in Embodiment 2 of the present invention. The system includes a GPU, which includes firmware, a first microprocessor, a second microprocessor, a third microprocessor, a mesh shading cache unit, a graphics rendering cache unit, a task shader, a mesh shader, and a graphics shader. The mesh shading cache unit has a first generate write pointer, a first dispatch write pointer, a first dispatch read pointer, and a first consumer read pointer. The graphics rendering cache unit has a second generate write pointer, a second dispatch write pointer, a second dispatch read pointer, and a second consumer read pointer. The first microprocessor is used to schedule target task coloring data, the second microprocessor is used to schedule target mesh coloring data, and the third microprocessor is used to schedule target graphics rendering data; The firmware is used to generate task shading instructions, mesh shading instructions and graphics drawing instructions according to various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit. The task shading instructions are used to drive the first microprocessor to schedule target task shading data, the mesh shading instructions are used to drive the second microprocessor to schedule target mesh shading data, and the graphics drawing instructions are used to drive the third microprocessor to schedule target graphics drawing data. The firmware is also used to update various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit according to the scheduling and operation of the target task shading data, target mesh shading data and target graphics drawing data. The task shader is used to perform calculations on the target task shader data to obtain several mesh shader data, and the target mesh shader data is determined from each mesh shader data; The mesh coloring cache unit is used to temporarily store mesh coloring data; The mesh shader is used to perform calculations on the target mesh coloring data to obtain several graphics drawing data, and the target graphics drawing data is determined from each of the graphics drawing data. The graphics drawing cache unit is used to temporarily store graphics drawing data; The graphics shader is used to perform calculations on the target graphics drawing data to obtain the graphics drawing result.

[0051] The firmware uses pointers to determine the data storage and processing progress of the corresponding cache unit, and then determines whether to trigger scheduling to ensure that data flows on demand and avoids cache overflow or idle operation.

[0052] The task shader is responsible for splitting the target task shader data at a high level. The first generate write pointer is used to mark the position of the latest split mesh shader data in the mesh shader cache unit. The first dispatch write pointer is used to mark the position of the last mesh shader data obtained from the currently split task shader data in the mesh shader cache unit. The first dispatch read pointer is used to mark the position of reading mesh shader data from the mesh shader cache unit, that is, the position of the target mesh shader data. The first consumer read pointer is used to mark the position of the latest mesh shader data that has been processed.

[0053] The second generation write pointer is used to mark the position of the latest split graphics drawing data in the graphics drawing cache unit. The second dispatch write pointer is used to mark the position of the last graphics drawing data obtained after the current split mesh coloring data is split in the graphics drawing cache unit. The second dispatch read pointer is used to mark the position of reading graphics drawing data from the graphics drawing cache unit, that is, the position of the target graphics drawing data. The second consumption read pointer is used to mark the position of the latest graphics drawing data that has been processed.

[0054] Both the mesh shading buffer unit and the graphics drawing buffer unit can be implemented using a circular buffer.

[0055] In one embodiment, the GPU may also contain two microprocessors, one of which supports data scheduling for two shaders and the other supports data scheduling for a single shader. For the method of a single microprocessor supporting data scheduling for multiple shaders, please refer to Embodiment 1, which will not be repeated here.

[0056] In one specific implementation, the step of generating scheduling instructions according to a preset priority based on the various pointers corresponding to the mesh shading cache unit and the various pointers corresponding to the graphics drawing cache unit includes: When the difference between the first dispatch write pointer and the first consumer read pointer is less than the capacity of the grid coloring cache unit, a task coloring instruction is generated and sent to the first microprocessor; When the first generate write pointer is greater than the first dispatch read pointer, and the difference between the second dispatch write pointer and the second consumer read pointer is less than the capacity of the graphics drawing cache unit, a mesh shading instruction is generated and sent to the second microprocessor. When the second generate write pointer is greater than the second dispatch read pointer and the graphics shader is in an idle state, a graphics drawing instruction is generated and sent to the third microprocessor.

[0057] The difference between the first dispatch write pointer and the first consumer read pointer can represent the number of mesh shading data that has been dispatched but not yet processed by the mesh shader. If this number is less than the capacity of the mesh shading cache unit, it means that there is remaining space in the mesh shading cache unit to receive new mesh shading data split by the task shader. Therefore, a task shading instruction is generated and sent to the first microprocessor.

[0058] When the first generate write pointer is greater than the first dispatch read pointer, it indicates that there is undistributed mesh shading data in the mesh shading cache unit. The difference between the second dispatch write pointer and the second consumer read pointer can characterize the number of distributed but not yet processed graphics drawing data. If this number is less than the capacity of the graphics drawing cache unit, it means that there is remaining space in the graphics drawing cache unit to receive new graphics drawing data split by the mesh shader. When both the existence of undistributed mesh shading data in the mesh shading cache unit and the remaining space in the graphics drawing cache unit to receive new graphics drawing data split by the mesh shader are satisfied, a mesh shading instruction is generated and sent to the second microprocessor.

[0059] When the second generate write pointer is greater than the second dispatch read pointer, it indicates that there is undistributed graphics drawing data in the graphics drawing buffer unit. If the graphics shader is idle at this time, a graphics drawing instruction is generated and sent to the third microprocessor.

[0060] This embodiment can effectively control the generation of data to avoid exceeding the capacity of the cache space. At the same time, through conditional judgment, it can make the shader output and the receiving capacity of the cache unit match to avoid blocking.

[0061] In one specific implementation, the system further includes a CPU; The first microprocessor is also configured to acquire data packets from the CPU, parse several task coloring data from the data packets, and use the task coloring data that is first in the parsing order and has not been processed as the target task coloring data. The scheduled target task coloring data includes: When the task coloring instruction is received, the target task coloring data is sent to the task shader; The scheduling target grid coloring data includes: When the mesh shading instruction is received, the target mesh shading data is determined from the mesh shading cache unit according to the first dispatch read pointer, the target mesh shading data is retrieved from the mesh shading cache unit and sent to the mesh shader, and the first dispatch read pointer is updated; The scheduling target graphical drawing data includes: When the graphics drawing instruction is received, the target graphics drawing data is determined from the graphics drawing cache unit according to the second dispatch read pointer, the target graphics drawing data is retrieved from the graphics drawing cache unit and sent to the graphics shader, and the second dispatch read pointer is updated.

[0062] In this process, the CPU, acting as the host, sends graphics rendering tasks to the GPU. The data required for these tasks can only be obtained by the GPU after processing the data packets sent by the CPU.

[0063] Specifically, when determining the target mesh coloring data from the mesh coloring cache unit according to the first dispatch read pointer, the capacity of the mesh coloring cache unit is used as the modulus. The capacity of the mesh coloring cache unit can be expressed as the number of cache lines contained in the mesh coloring cache unit. A modulo operation is performed on the first dispatch read pointer, and the mesh coloring data in the cache line corresponding to the result of the modulo operation is used as the target mesh coloring data.

[0064] The first read pointer is updated by incrementing the first read pointer by one.

[0065] When determining the target graphics drawing data from the graphics drawing cache unit according to the second distribution read pointer, the capacity of the graphics drawing cache unit is used as the modulus. The capacity of the graphics drawing cache unit can be expressed as the number of cache lines contained in the graphics drawing cache unit. A modulo operation is performed on the second distribution read pointer, and the graphics drawing data in the cache line corresponding to the result of the modulo operation is used as the target graphics drawing data.

[0066] The second-order read pointer is updated by incrementing the second-order read pointer by one.

[0067] By adding a modulo operation, the updates of the first and second dispatch read pointers do not need to consider loops, ensuring the accuracy of the firmware in generating scheduling instructions based on the various pointers corresponding to the mesh coloring cache unit and the various pointers corresponding to the graphics drawing cache unit.

[0068] In one specific implementation, updating the various pointers corresponding to the mesh shading cache unit and the various pointers corresponding to the graphics rendering cache unit based on the scheduling and computation of the target data includes: When any target task coloring data is sent to the task shader, the first dispatch write pointer is updated according to the number of splits corresponding to the target task coloring data; When any target mesh coloring data is sent to the mesh shader, the second dispatch write pointer is updated according to the number of splits corresponding to the target mesh coloring data.

[0069] The number of splits corresponding to the target task colored data can refer to the number of cache lines corresponding to the target task colored data. The update method of the first dispatch write pointer is to add the number of splits corresponding to the target task colored data to the first dispatch write pointer before the update to obtain the updated first dispatch write pointer.

[0070] The number of splits corresponding to the target mesh coloring data can refer to the number of cache lines corresponding to the target mesh coloring data. The update method of the second dispatch write pointer is to add the number of splits corresponding to the target mesh coloring data to the second dispatch write pointer before the update to obtain the updated second dispatch write pointer.

[0071] In one specific implementation, when the task shader performs calculations on the received target task coloring data, it sends each piece of mesh coloring data obtained from the calculation to the mesh coloring cache unit and updates the first generation write pointer.

[0072] The first generated write pointer is updated by incrementing it by 1.

[0073] In one specific implementation, when the mesh shader has finished processing the received target mesh coloring data, it updates the first consumer read pointer.

[0074] The first consumer read pointer is updated by incrementing it by 1.

[0075] In one specific implementation, when the mesh shader performs calculations on the received target mesh coloring data, it sends each piece of graphics drawing data obtained from the calculation to the graphics drawing cache unit and updates the second generation write pointer.

[0076] The second generated write pointer is updated by incrementing it by 1.

[0077] In one specific implementation, the graphics shader is used to perform calculations on the received target graphics drawing data, and after the target graphics drawing data has been calculated, the second consumer read pointer is updated.

[0078] The second consumer read pointer is updated by incrementing it by 1.

[0079] It should be noted that the pointer can be updated automatically by the shader based on the pointer address provided by the firmware, or the shader can generate a corresponding interrupt and send it to the firmware for updating.

[0080] In this second embodiment, multiple microprocessors are used to implement mesh shading scheduling, effectively providing parallelism for different instruction scheduling, thereby further improving the scheduling efficiency of mesh shading. By uniformly managing the pointer states of the two types of cache units through firmware to generate scheduling instructions, it is ensured that the graphics drawing, mesh shading, and task shading stages can be executed in parallel, avoiding data backlog or pipeline interruption, reducing redundant cache occupation, improving resource utilization, improving the efficiency of mesh shading scheduling, and thus improving the overall graphics drawing efficiency.

[0081] Example 3 This third embodiment provides a task coloring data splitting system, see [link to documentation]. Figure 3This is a flowchart illustrating the execution of a computer program by a microprocessor in a task coloring data splitting system according to Embodiment 3 of the present invention. The system includes a CPU and a GPU. The GPU includes a data cache unit, a microprocessor, and a memory storing the computer program. When the computer program is executed by the microprocessor, the following steps are implemented: S101, Obtain data packets from the CPU, and parse the data packets to obtain initial task data; S102, use the initial task data as temporary data; S103, according to the preset granularity, the remaining capacity corresponding to the data cache unit and the size information corresponding to the initial task data, the task coloring data is separated from the temporary data, the separated task coloring data is stored in the data cache unit, and the temporary data and the remaining capacity corresponding to the data cache unit are updated. S104, if the temporary data meets the preset splitting conditions, then return to step S103 until the temporary data no longer meets the splitting conditions, and obtain several task coloring data.

[0082] Among them, the preset granularity can refer to the maximum amount of task coloring data obtained by a single split set by the user, and the size information corresponding to the initial task data can characterize the three-dimensional shape information of the initial task data.

[0083] Splitting conditions can be used to determine whether temporary data can be further split.

[0084] In one specific implementation, the size information corresponding to the initial task data is (A, B, C), where A, B, and C are all positive integers; The step of extracting task coloring data from the temporary data based on the preset granularity, the remaining capacity corresponding to the data cache unit, and the size information corresponding to the initial task data includes: The smaller value between the preset granularity and the remaining capacity corresponding to the data cache unit is used as a reference value; When the temporary size is not empty and the temporary size meets the target condition, the current task coloring data is extracted from the temporary data according to the temporary size, and the temporary size is initially empty; When the temporary size is empty, if A is greater than or equal to the reference value, then the reference value is used as the first target value M, and the first preset value is used as the second target value N and the third target value K. If A is less than the reference value, then A is taken as the first target value M; If A is less than the reference value and A×B is greater than or equal to the reference value, then b that satisfies the first reference condition is determined as the second target value N, and the first preset value is determined as the third target value K, where b is an integer in the range [1, B]. If A is less than the reference value and A×B is less than the reference value, then B is taken as the second target value N, and c that satisfies the second reference condition is determined as the third target value K, where c is an integer in the range [1, C]. The size of the task-colored data for the current split is determined by M, N, and K; Based on the size of the currently split task coloring data, the current task coloring data is split from the temporary data.

[0085] The first preset value can be 1, and the temporary size can refer to the remaining size from the previous split.

[0086] The target condition can be used to determine whether the temporary size can be split. If the temporary size does not meet the target condition, it can wait for a preset time and then check whether the temporary size meets the target condition again.

[0087] When there is no remaining size in the current split, that is, when the temporary size is empty, it means that the shape of the temporary data is a rectangle and can be split normally. At this time, if A is greater than or equal to the reference value, the temporary data is split according to the row. Let the reference value be Q, and the size of the task coloring data of the current split is (Q, 1, 1).

[0088] If A is less than the reference value and A×B is greater than or equal to the reference value, then the temporary data is split, and the size of the task-colored data in the current split is (A, b, 1).

[0089] If A is less than the reference value and A×B is less than the reference value, then the temporary data is split into blocks, and the size of the currently split task-colored data is (A, b, c).

[0090] In this embodiment, without exceeding the preset granularity and the remaining capacity corresponding to the data cache unit, the size of the currently split task coloring data is increased as much as possible to reduce the number of splits, improve efficiency, and avoid the frequent occurrence of small task coloring data. As a result, when the task coloring data is applied to the grid coloring scheduling system, even if the task coloring data is small, it still requires almost the same amount of resources for scheduling and pointer updates as the task coloring data with a larger amount of data.

[0091] In one specific implementation, the first reference condition is that M×b is less than or equal to the reference value, and b is the maximum.

[0092] Where b is the largest integer value that satisfies M×b being less than or equal to the reference value.

[0093] In one specific implementation, the second reference condition is that M×N×c is less than or equal to the reference value, and c is the maximum.

[0094] Where c takes the largest integer value that satisfies M×N×c being less than or equal to the reference value.

[0095] In one specific implementation, when A is greater than or equal to the reference value, the difference between A and the reference value is used as the first temporary value D, and the first preset value is used as the second temporary value E and the third temporary value F. The temporary size is determined by D, E and F.

[0096] When A is greater than or equal to the reference value, the size of the currently split task coloring data cannot completely split a row of temporary data. Therefore, the remaining data in the row needs to be split first in subsequent splits. The size of the remaining data in the row is (AQ, 1, 1).

[0097] In one specific implementation, when A is less than the reference value and A×B is greater than or equal to the reference value, A is used as the first temporary value D, the difference between B and N is used as the second temporary value E, and the first preset value is used as the third temporary value F. The temporary size is determined by D, E, and F.

[0098] When A is less than the reference value and A×B is greater than or equal to the reference value, the size of the task coloring data currently split cannot completely split one face of the temporary data. Therefore, the remaining data of the face needs to be split first in subsequent splits. The size of the remaining data of the face is (A, BN, 1).

[0099] Specifically, when the temporary size is not empty and the temporary size meets the target conditions, the current task coloring data is extracted from the temporary data according to the temporary size, and then the temporary size is cleared.

[0100] In one specific implementation, the target condition is that D×E×F is less than or equal to the reference value.

[0101] Specifically, when the amount of data corresponding to the temporary size is less than the granularity and less than the remaining capacity of the data cache unit, the remaining data from the previous split can be separated from the temporary data.

[0102] In one specific implementation, the splitting condition is that the amount of temporary data is not zero.

[0103] When the amount of temporary data is not zero, it means that there is still undistributed data in the initial task data, which needs to be further split.

[0104] In this third embodiment, the splitting size of the task coloring data is determined by the preset granularity, the remaining capacity corresponding to the data cache unit, and the size information corresponding to the initial task data. This ensures that the split task coloring data not only meets the data volume limit and improves resource utilization, but also adapts to the storage capacity of the data cache unit. This avoids the task coloring data from being unable to be stored normally or taking too long to process in subsequent steps, reduces the scheduling overhead when applying the task coloring data, maximizes the amount of data split at one time, reduces the number of splits, and improves splitting efficiency.

[0105] While specific embodiments of the invention have been described in detail by way of example, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should also understand that various modifications can be made to the embodiments without departing from the scope and spirit of the invention. The scope of this invention is defined by the appended claims.

Claims

1. A grid coloring scheduling system based on a single microprocessor, characterized in that, The system includes a GPU, which includes firmware, a microprocessor, a mesh shader cache unit, a graphics rendering cache unit, a task shader, a mesh shader, and a graphics shader. The mesh shader cache unit has a first generate write pointer, a first dispatch write pointer, a first dispatch read pointer, and a first consume read pointer. The graphics rendering cache unit has a second generate write pointer, a second dispatch write pointer, a second dispatch read pointer, and a second consume read pointer. The microprocessor is used to schedule target data, which includes target task coloring data, target mesh coloring data, and target graphics rendering data. The firmware is used to generate scheduling instructions according to a preset priority based on various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit. The scheduling instructions are used to drive the microprocessor to schedule target data. The firmware is also used to update various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit according to the scheduling and operation of the target data; The task shader is used to perform calculations on the target task shader data to obtain several mesh shader data, and the target mesh shader data is determined from each mesh shader data; The mesh coloring cache unit is used to temporarily store mesh coloring data; The mesh shader is used to perform calculations on the target mesh coloring data to obtain several graphics drawing data, and the target graphics drawing data is determined from each of the graphics drawing data. The graphics drawing cache unit is used to temporarily store graphics drawing data; The graphics shader is used to perform calculations on the target graphics drawing data to obtain the graphics drawing result.

2. The single-microprocessor-based mesh coloring scheduling system according to claim 1, characterized in that, The scheduling instructions include task coloring instructions, mesh coloring instructions, and graphics drawing instructions; The step of generating scheduling instructions according to a preset priority based on various pointers corresponding to the mesh shading cache unit and various pointers corresponding to the graphics drawing cache unit includes: When the difference between the first dispatch write pointer and the first consumer read pointer is less than the capacity of the grid coloring cache unit, a task coloring instruction is generated and sent to the microprocessor; When the first generate write pointer is greater than the first dispatch read pointer, and the difference between the second dispatch write pointer and the second consumer read pointer is less than the capacity of the graphics drawing cache unit, a mesh shading instruction is generated and sent to the microprocessor. When the second generate write pointer is greater than the second dispatch read pointer and the graphics shader is in an idle state, a graphics drawing instruction is generated and sent to the microprocessor.

3. The single-microprocessor-based mesh coloring scheduling system according to claim 2, characterized in that, The generation priority of the graphics drawing instruction is greater than that of the mesh shading instruction, and the generation priority of the mesh shading instruction is greater than that of the task shading instruction.

4. The single-microprocessor-based mesh coloring scheduling system according to claim 2, characterized in that, The system also includes a CPU; The microprocessor is also used to acquire data packets from the CPU, parse the data packets to obtain several task coloring data, and take the task coloring data that is first in the parsing order and has not been processed as the target task coloring data. The scheduling target data includes: When the task coloring instruction is received, the target task coloring data is sent to the task shader; When the mesh shading instruction is received, the target mesh shading data is determined from the mesh shading cache unit according to the first dispatch read pointer, the target mesh shading data is retrieved from the mesh shading cache unit and sent to the mesh shader, and the first dispatch read pointer is updated; When the graphics drawing instruction is received, the target graphics drawing data is determined from the graphics drawing cache unit according to the second dispatch read pointer, the target graphics drawing data is retrieved from the graphics drawing cache unit and sent to the graphics shader, and the second dispatch read pointer is updated.

5. The single-microprocessor-based mesh coloring scheduling system according to claim 4, characterized in that, The step of updating various pointers corresponding to the mesh shading cache unit and the graphics drawing cache unit based on the scheduling and computation of the target data includes: When any target task coloring data is sent to the task shader, the first dispatch write pointer is updated according to the number of splits corresponding to the target task coloring data; When any target mesh coloring data is sent to the mesh shader, the second dispatch write pointer is updated according to the number of splits corresponding to the target mesh coloring data.

6. The single-microprocessor-based mesh coloring scheduling system according to claim 1, characterized in that, When the task shader performs calculations on the received target task shader data, it sends each mesh shader data obtained from the calculation to the mesh shader cache unit and updates the first generation write pointer. When the mesh shader finishes processing the received target mesh coloring data, it updates the first consumer read pointer.

7. The single-microprocessor-based mesh coloring scheduling system according to claim 1, characterized in that, When the mesh shader performs calculations on the received target mesh coloring data, it sends each piece of graphics drawing data to the graphics drawing cache unit and updates the second generation write pointer.

8. The single-microprocessor-based mesh coloring scheduling system according to claim 1, characterized in that, The graphics shader is used to perform calculations on the received target graphics drawing data. After the target graphics drawing data has been calculated, the second consumer read pointer is updated.

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