Flash memory module aging test method, system, device and storage medium
By pre-storing multiple candidate test firmware on the aging test board and selecting the target firmware using the power-on count value, the problems of high testing cost and low coverage in flash memory module aging testing are solved, achieving time and cost savings and full coverage testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ARTMEM TECHNOLOGY CO LTD
- Filing Date
- 2026-03-30
- Publication Date
- 2026-07-10
AI Technical Summary
Existing technologies suffer from high testing costs and low test coverage in flash memory module aging tests, especially due to the waste of resources and reduced coverage caused by the need for additional firmware burning and writing processes.
By pre-storing multiple candidate test firmware in a storage module on the aging test board, the target test firmware is selected using power-on count values and an index mapping table, reducing the firmware burning process, saving test time and costs, and ensuring full coverage testing.
This achieves savings in testing time and cost during flash memory module aging tests, while improving test coverage and ensuring testing of all physical flash memory space.
Smart Images
Figure CN122369552A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of flash memory testing technology, and in particular to a flash memory module aging test method, system, apparatus and storage medium thereof. Background Technology
[0002] Flash memory module products require burn-in aging tests during mass production. Burn-in aging tests are a common reliability screening method. Their purpose is to apply accelerated stress conditions to screen out potentially early-failure products, thereby ensuring the reliability and consistency of the final product. Burn-in testing typically involves writing test firmware into the flash memory module or onto storage resources (usually SPI-nor) on the burn-in board. However, writing the test firmware into the flash memory module itself requires pre-programming the firmware into each module before testing, incurring additional costs. Therefore, it is usually preferable to write the flash memory test firmware into the SPI-nor on the burn-in board. After the flash memory module is powered on, the test firmware is booted from the external SPI-nor. Since the burn-in board needs to test many different types of flash memory resources, the common practice is to package all the firmware for the flash memory to be tested together and burn it into the SPI-nor. When the flash memory module boots up, it selects and loads the corresponding test firmware based on the flash memory ID. Sometimes, different test firmwares need to be loaded for the same type of flash memory module product. For example, sometimes different test methods and parameter standards need to be set to screen the same flash memory resources to obtain flash memory module products of different specifications and levels. In this case, the solution of selecting test firmware by flash memory ID cannot meet the requirements of loading different test firmwares.
[0003] Currently, to select different candidate test firmware for flash memory modules with the same flash memory ID, the following approach is typically used: A new burning process is added to burn the corresponding candidate test firmware into the flash memory module. After power-on, the test is initiated by retrieving the firmware from the flash memory. However, this approach has two drawbacks: First, each flash memory module requires an additional firmware burning process, increasing testing costs. Second, burning the candidate test firmware into the flash memory module consumes at least one physical block. Since the burn-in test requires multiple power cycles to boot from the flash memory, the test firmware cannot be erased, rendering this physical block untestable. This results in reduced test coverage across the entire flash memory physical space. Summary of the Invention
[0004] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a flash memory module aging test method, system, apparatus, and storage medium, which can save testing time and testing costs and improve test coverage during the aging test of flash memory modules.
[0005] In a first aspect, embodiments of this application provide a flash memory module aging test method, applied to a flash memory module aging test system, the system comprising: an aging test board; a storage module configured on the aging test board, the aging test board being electrically connected to multiple flash memory module chips under test; the storage module being used to pre-store firmware packages, the firmware packages including multiple different candidate test firmware; the method comprising: Power on the aging test board, perform timing processing, and write the obtained power-on count value into the physical block of the flash memory module chip under test; After a preset power-on time, the aging test board is powered off; wherein, the preset power-on time is determined according to the firmware index number of the target test firmware to be called; the preset power-on time is different for different target test firmware. Power on the aging test board again, and perform a lookup table based on the power-on count value read from the physical block to determine the firmware index number; The target test firmware is read from the firmware package according to the firmware index number; Aging tests are performed on all the flash memory module chips under test according to the target test firmware.
[0006] Secondly, embodiments of this application provide a flash memory module aging test system, comprising: an aging test board; a storage module configured on the aging test board, the aging test board being electrically connected to a plurality of flash memory module chips to be tested; the storage module being used to pre-store firmware packages, the firmware packages including a plurality of different candidate test firmware; the flash memory module aging test system being used to implement the flash memory module aging test method as described in any one of the embodiments of the first aspect.
[0007] Thirdly, embodiments of this application provide a flash memory module aging test apparatus, including at least one processor and a memory for communicatively connecting to the at least one processor; the memory stores instructions executable by the at least one processor, which are executed by the at least one processor to enable the at least one processor to perform the flash memory module aging test method as described in any one of the embodiments of the first aspect.
[0008] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions for causing a computer to perform a flash memory module aging test method as described in any one of the embodiments of the first aspect.
[0009] This application embodiment includes: a flash memory module aging test system comprising: an aging test board configured with a storage module, the aging test board being electrically connected to multiple flash memory module chips under test; the storage module being used to pre-store firmware packages, the firmware packages including multiple different candidate test firmwares; in the process of aging test of the flash memory module chips under test using the flash memory module aging test system, firstly, the aging test board is powered on, and after timing processing, the obtained power-on count value is written into the physical block of the flash memory module chip under test; secondly, after a preset power-on time, the aging test board is powered off; wherein, the preset power-on time is determined according to the firmware index number of the target test firmware to be called; different target test firmwares correspond to different preset power-on times; then, the aging test board is powered on again, and a lookup table is performed based on the power-on count value read from the physical block to determine the firmware index number; next, the target test firmware is read from the firmware package according to the firmware index number; finally, aging test is performed on all the flash memory module chips under test according to the target test firmware. By pre-storing the firmware package in the storage module and setting a preset power-on time according to test requirements, the corresponding target test firmware is called based on the actual power-on count value to complete the test. This reduces the process of burning additional test firmware to the flash memory module chip under test, saving test time and test costs. Furthermore, since the test firmware is not written into the flash memory module chip under test, the entire physical space of the flash memory can be tested during the aging test, improving test coverage. In other words, the embodiments of this application can save test time and test costs and improve test coverage during the aging test of flash memory modules.
[0010] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures particularly pointed out in the description and the accompanying drawings. Attached Figure Description
[0011] Figure 1 This is a schematic diagram of the architecture of a flash memory module aging test system provided in one embodiment of this application; Figure 2 This is a schematic flowchart of a flash memory module aging test method provided in one embodiment of this application; Figure 3 This is a schematic diagram of an index mapping table provided in one embodiment of this application; Figure 4 This is a schematic diagram of the overall process of a flash memory module aging test method provided in one embodiment of this application; Figure 5 This is a schematic diagram of the structure of a flash memory module aging test device provided in one embodiment of this application. Detailed Implementation
[0012] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments.
[0013] It should be noted that although a logical order is shown in the flowcharts in this application, in some cases, the steps shown or described may be performed in a different order than that shown in the flowcharts. In the description of this application, "several" means one or more, and "more" means two or more. The terms "first" and "second" are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order in which the technical features are indicated.
[0014] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.
[0015] First, let me explain some of the terms used in this application: Burn-in testing, also known as aging testing, is a reliability screening test. It generally refers to applying high stress (such as high temperature, high pressure, and temperature transition) to chips before they leave the factory, causing them to operate under accelerated conditions for a period of time. This is done to induce and eliminate potentially early failure products, ensuring the reliability of delivered products.
[0016] Burn-in test board: In this application, it refers to a circuit board used for batch aging tests of flash memory modules (also referred to as an aging test board in this application). A burn-in test board consists of multiple test sub-boards. The test sub-boards have test sockets and other external resources (such as SPI-NOR). The flash memory module chips are placed in the test sockets for easy and flexible replacement.
[0017] Spi-nor: A type of NOR flash memory chip based on the SPI (Serial Peripheral Interface) communication protocol. It features a simple interface, fast random access, and no data loss when power is off. It is often used to store boot code.
[0018] This application provides a flash memory module aging test method, a flash memory module aging test system, a flash memory module aging test apparatus, and a computer-readable storage medium, relating to the field of flash memory testing technology. It can save testing time and costs and improve test coverage during the aging test of flash memory modules.
[0019] The embodiments of this application will be further described below with reference to the accompanying drawings.
[0020] like Figure 1 As shown, the flash memory module aging test system 1000 includes: an aging test board 100; a storage module 111 is configured on the aging test board 100, and the aging test board 100 is electrically connected to multiple flash memory module chips 112 under test; the storage module 111 is used to pre-store firmware packages, which include multiple different candidate test firmware.
[0021] like Figure 1 As shown, the flash memory module aging test system 1000 also includes a power switch 300, which is connected between the aging test board 100 and the power supply unit 200. When the power switch 300 is closed, the power supply unit 200 supplies power to the aging test board 100, and the aging test board 100 is powered on; when the power switch 300 is open, the power supply unit 200 does not supply power to the aging test board 100, and the aging test board 100 is powered off. Furthermore, the aging test board 100 is provided with multiple test sub-boards 110, each of which includes, but is not limited to, a test socket and a storage module 111. The test socket is used to insert the flash memory module chip 112 under test, and the storage module 111 is Spi-nor, used to store firmware packages.
[0022] This application embodiment implements the flash memory module aging test method provided in this application embodiment through the flash memory module aging test system 1000, which can save test time and test cost and improve test coverage during the aging test of flash memory modules.
[0023] Those skilled in the art will understand that the system structure shown in the figures does not constitute a limitation on the embodiments of this application, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0024] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0025] It will be understood by those skilled in the art that the system architecture and application scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. It is known by those skilled in the art that with the evolution of system architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.
[0026] Based on the above system structure, various embodiments of the flash memory module aging test method of this application are proposed below.
[0027] Firstly, such as Figure 2 As shown, this flash memory module aging test method can be applied to, for example... Figure 1 The flash memory module aging test system shown includes: an aging test board; a storage module is configured on the aging test board, and the aging test board is electrically connected to multiple flash memory module chips under test; the storage module is used to pre-store firmware packages, which include multiple different candidate test firmware; the flash memory module aging test method may include, but is not limited to, steps S100 to S500.
[0028] Step S100: Power on the aging test board, perform timing processing, and write the obtained power-on count value into the physical block of the flash memory module chip under test.
[0029] Step S200: After a preset power-on time, power off the aging test board; wherein, the preset power-on time is determined according to the firmware index number of the target test firmware to be called; the preset power-on time is different for different target test firmware.
[0030] Step S300: Power on the aging test board again, and perform a lookup table based on the power-on count value read from the physical block to determine the firmware index number.
[0031] Step S400: Read the target test firmware from the firmware package according to the firmware index number.
[0032] Step S500: Perform aging tests on all flash memory module chips under test according to the target test firmware.
[0033] In this embodiment of the application, through steps S100 to S500, during the aging test of the flash memory module chip under test using the flash memory module aging test system, firstly, the aging test board is powered on, and after timing processing, the obtained power-on count value is written into the physical block of the flash memory module chip under test; secondly, after a preset power-on time, the aging test board is powered off; wherein, the preset power-on time is determined according to the firmware index number of the target test firmware to be called; different target test firmwares correspond to different preset power-on times; then, the aging test board is powered on again, and a lookup table is performed based on the power-on count value read from the physical block to determine the firmware index number; next, the target test firmware is read from the firmware package according to the firmware index number; finally, aging tests are performed on all flash memory module chips under test according to the target test firmware. By pre-storing the firmware package in the storage module and setting a preset power-on time according to test requirements, the corresponding target test firmware is called based on the actual power-on count value to complete the test. This reduces the process of burning additional test firmware to the flash memory module chip under test, saving test time and test costs. Furthermore, since the test firmware is not written into the flash memory module chip under test, the entire physical space of the flash memory can be tested during the aging test, improving test coverage. Therefore, the embodiments of this application can save test time and test costs and improve test coverage during the aging test of flash memory modules.
[0034] Furthermore, steps S100 to S500 will be further explained.
[0035] According to some embodiments of this application, before executing step S100, that is, before powering on the aging test board, performing timing processing, and writing the obtained power-on count value into the physical block of the flash memory module chip under test, the method further includes, but is not limited to, the following steps: packaging all candidate test firmware to generate a firmware package; wherein, different test firmware have different test standards and test objects; and burning the firmware package into the storage module. This application improves test coverage by writing the test firmware into the storage module instead of into the flash memory module chip under test, allowing the entire physical space of the flash memory to be tested during the aging test.
[0036] Understandably, different test firmwares have different test standards and test objects. Specifically, for example... Figure 3 As shown, the test object of test firmware 1 is flash memory model 1, and the test standard adopted is test standard 1; the test object of test firmware 2 is flash memory model 1, and the test standard adopted is test standard 2; the test object of test firmware 4 is flash memory model 2, and the test standard adopted is test standard 1. Figure 3 The number and description of the candidate test firmware are for illustrative purposes only, and this application does not make any specific limitations on the number and purpose of the candidate test firmware in the firmware package.
[0037] According to some embodiments of this application, before executing step S100, that is, before powering on the aging test board, performing timing processing, and writing the obtained power-on count value into the physical block of the flash memory module chip under test, the method further includes, but is not limited to, the following steps: numbering all candidate test firmware according to the order of arrangement in the firmware package to generate firmware index numbers; establishing an index mapping table based on the firmware index number, preset power-on time, and pre-configured power-on time range; the index mapping table is used to indicate the first mapping relationship between the firmware index number and the preset power-on time, and the second mapping relationship between the firmware index number and the power-on time range. This application constructs an index mapping table to facilitate the table lookup processing in step S300, and determines the firmware index number based on the actually recorded power-on count value, thereby facilitating the determination of the target test firmware for aging testing.
[0038] like Figure 3 As shown, the index mapping table includes, but is not limited to: firmware index number, test firmware description, preset power-on time, and power-on time range. The firmware index number is obtained by numbering the candidate test firmware in the firmware package according to their order of arrangement. The firmware index number is unique, facilitating direct identification of the corresponding target test firmware.
[0039] Specifically, the preset power-on time refers to the time elapsed from the first power-on to the power-off when testing a batch of flash memory module chips using an aging test board. For example, if the flash memory module chip under test on the aging test board is model 1 and test standard 1 is required, then based on the index mapping table, the preset power-on time can be determined to be 2, and thus the preset power-on time of the aging test board is set to 2. If the flash memory module chip under test on the aging test board is model 1 and test standard 3 is required, then based on the index mapping table, the preset power-on time can be determined to be 12, and thus the preset power-on time of the aging test board is set to 12.
[0040] Specifically, such as Figure 3 As shown, the power-on time range includes a lower limit and an upper limit for the power-on count. It is understood that during actual power-on and power-off processes, the power-on count value recorded through timing processing may deviate from the preset power-on time of the actual aging test board. Setting a power-on time range for the read power-on count value, and determining the target test firmware by judging the power-on time range within which the power-on count value falls, can eliminate deviations caused by the circuit design of the aging test board and the accuracy of timing and counting, thus improving the compatibility of the solution in this application.
[0041] It should be noted that, assuming a certain test firmware corresponds to a power-on time of 2 seconds, and the program timing accuracy is to update the record every 0.5 seconds (i.e., a fixed interval of 0.5 seconds), after the aging test board is powered off, the power-on count value recorded by the program will most likely be 1.5 seconds / 2 seconds / 2.5 seconds. Alternatively, a larger power-on time range can be set for a certain firmware. For example, if a certain firmware corresponds to a preset power-on time of 5 seconds, a power-on time range of 4-6 seconds or 3-7 seconds can be specified for this firmware, the latter providing greater margin. This application does not impose specific limitations on the power-on time range.
[0042] According to some embodiments of this application, step S100 is further described. Step S100: After timing processing, the obtained power-on count value is written into the physical block of the flash memory module chip under test, including but not limited to steps S110 to S130.
[0043] Step S110: Start the first power-on timing and counting program, increment the count by one every fixed time interval, and obtain the latest power-on count value.
[0044] Step S120: Write the latest power-on count value to the physical page in the physical block.
[0045] Step S130: When the physical block is full, erase the physical block and start recording the latest power-on count value from the first physical page of the physical block again; until the aging test board is powered off.
[0046] Specifically, in one embodiment, the flash memory module chip under test is started from an external SPI-NOR and runs the first power-on timing and counting program, incrementing the count by one at fixed time intervals. This fixed time interval can typically be set to 1 second. Each time the count is updated, the latest power-on count value is written to the latest physical page of a fixed flash memory physical block. When the physical block is full, it is erased, and the latest recorded power-on count value is rewritten from page 0. This cycle continues until the burn-in test board's power-on time reaches a preset power-on time, at which point the power is turned off.
[0047] It is understood that the fixed time interval can also be other values, and this application does not impose specific restrictions on it.
[0048] The power-on timing is counted through steps S110 to S130 to obtain the latest power-on count value, so that the firmware index number of the target test firmware can be determined based on the power-on count value and the target test firmware can be read from the firmware package.
[0049] According to some embodiments of this application, step S300 is further described. Step S300: Based on the power-on count value read from the physical block, a lookup table is performed to determine the firmware index number, including but not limited to steps S310 to S320.
[0050] Step S310: Based on the power-on count value, query the index mapping table to obtain the power-on time range in which the power-on count value is located; wherein, the power-on time range is determined by the preset upper limit value and lower limit value of the power-on count.
[0051] Step S320: Based on the power-on time range of the power-on count value, query the index mapping table to determine the firmware index number of the target test firmware.
[0052] It is understandable that after repowering the aging test board through steps S310 to S320, the recorded power-on count value is read. Figure 3 The index mapping table shown corresponds to the power-on time range index and firmware index number for the power-on count value. Since there is a certain deviation between the read power-on time and the actual power-on time of the aging board in practice, determining the power-on time range within which the power-on count value falls can eliminate deviations caused by the aging board circuit design and timing accuracy, thus improving the compatibility of the solution.
[0053] According to some embodiments of this application, step S400 is further described: reading the target test firmware from the firmware package according to the firmware index number, including but not limited to steps S410 to S420.
[0054] Step S410: Calculate the offset of the target test firmware in the firmware package based on the firmware index number and the fixed size of a single firmware.
[0055] Step S420: Read the target test firmware from the storage module according to the offset.
[0056] Specifically, by determining the firmware index number, the target test firmware can be accurately read from the firmware package stored in the storage module and then into the flash memory module chip under test. This allows the program to jump to the test entry function and execute the aging test. Thus, by accurately reading the target test firmware directly from the storage module based on the firmware index number through steps S410 to S420, the process of burning additional test firmware into the flash memory module chip under test is reduced, saving test time and costs, and providing a test foundation for subsequent aging tests based on the target test firmware.
[0057] According to some embodiments of this application, step S500 is further described. Step S500: Perform aging tests on all flash memory module chips under test according to the target test firmware, including but not limited to the following steps: perform aging tests on all flash memory module chips under test on the aging test board according to the test standards in the target test firmware, and obtain test results; write the bad block table information in the test results into the flash memory module chips under test.
[0058] It should be noted that the same test firmware is used on all aging test boards, and the same model of flash memory module chip is placed on the board. This application reads the target test firmware into the flash memory module chip under test, and then completes the test based on the target test firmware. After each stage of the test is completed, the corresponding bad block table information is written to the flash memory, until all burn-in test stages are completed. Furthermore, since the test firmware is not written inside the flash memory module chip under test, the entire physical space of the flash memory can be tested during the aging test, improving test coverage.
[0059] like Figure 4 As shown in the figure, an example is given to illustrate the overall process of the flash memory module aging test method provided in the embodiments of this application.
[0060] Step S1: Create and burn the firmware package. Specifically, after creating the firmware package, burn it to the SPI-NOR of the burn-in test board. The firmware package contains candidate test firmware for all models.
[0061] Step S2: Define the index mapping table. Specifically, the index mapping table is used to characterize the first mapping relationship between the firmware index number of the test firmware and the preset power-on time, and the second mapping relationship between the firmware index number and the power-on time range.
[0062] Step S3: Set the preset power-on time for the burn-in test board according to the test requirements, and then power it on.
[0063] Step S4: After the flash memory module chip is powered on, a timing program is executed, and the power-on count value is written into the physical block of the flash memory module at fixed intervals.
[0064] Step S5: After the timer reaches the preset power-on time, turn off the power to the burn-in test board.
[0065] Step S6: Power on the burn-in test board again, and the flash memory module chip under test will boot from the external SPI-NOR.
[0066] Step S7: Determine the firmware index number by looking up the read power-on count value. Specifically, the actual recorded power-on count value is read from the physical block of the flash memory module chip under test, and the corresponding firmware index number is obtained by looking up the power-on count value in a table.
[0067] Step S8: Read the target test firmware using the firmware index number. Specifically, the corresponding target test firmware is read from the firmware package stored in the storage module using the firmware index number, stored in the flash memory module chip, and then executed.
[0068] Step S9: Perform testing based on the target test firmware. Specifically, complete the burn-in flash memory test according to the flash memory test firmware procedure based on the target test firmware.
[0069] It is understandable that when the model of the flash memory module chip under test loaded on the aging test board is 1, and test standard 1 is required, the preset power-on time can be determined to be 2 based on the index mapping table. Therefore, after setting the preset power-on time to 2 on the aging test board, steps S3 to S9 are performed to complete the test. If test standard 2 is required to continue testing the model of the flash memory module chip under test, the preset power-on time can be determined to be 7 based on the index mapping table. Therefore, after setting the preset power-on time to 7 on the aging test board, steps S3 to S9 are performed again to complete the test. It is evident that the embodiments of this application can be compatible with multiple test firmware schemes when performing burn-in aging tests on flash memory module chips, meeting the need for flash memory modules to flexibly select different test firmware. By controlling the power-on time of the burn-in board, the flash memory module program records the power-on time, maps different types of test firmware through different power-on count values, and starts different test firmware schemes by reading the power-on count values. When aging test input is limited, the power-on count value is used to control the scheme of loading different flash memory test firmware.
[0070] In summary, the flash memory module aging test method provided in this application adds a power-on timing and counting process to the burn-in test to obtain a power-on count value. By estimating, checking, and judging the power-on count value, different test firmware is selected for startup. Compared with the prior art, this method has at least two advantages: First, it reduces the process of burning additional test firmware to the flash memory module chip under test, saving test time and test costs. Second, the test firmware does not need to be written into the flash memory module chip; the entire physical space of the flash memory can be tested during the test, enhancing test coverage.
[0071] like Figure 5 As shown, the present invention also provides a flash memory module aging test apparatus, comprising: The processor 501 can be implemented using a general-purpose central processing unit (CPU), microprocessor, application specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 502 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 502 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 502 and is called and executed by the processor 501 using the flash memory module aging test method of the embodiments of this application. The input / output interface 503 is used to implement information input and output; The communication interface 504 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 505 transmits information between various components of the device (e.g., processor 501, memory 502, input / output interface 503, and communication interface 504); The processor 501, memory 502, input / output interface 503, and communication interface 504 are connected to each other within the device via bus 505.
[0072] This application embodiment also provides a storage medium, which is a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the above-described flash memory module aging test method.
[0073] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof. The device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate, and may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.
[0074] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.
[0075] The above provides a detailed description of the preferred embodiments of this application. However, this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by this application.
Claims
1. A flash memory module aging test method, characterized in that, An aging test system for flash memory modules is provided, the system comprising: an aging test board; a storage module configured on the aging test board, the aging test board being electrically connected to multiple flash memory module chips under test; the storage module being used to pre-store firmware packages, the firmware packages including multiple different candidate test firmware; the method comprising: Power on the aging test board, perform timing processing, and write the obtained power-on count value into the physical block of the flash memory module chip under test; After a preset power-on time, the aging test board is powered off; wherein, the preset power-on time is determined according to the firmware index number of the target test firmware to be called; the preset power-on time is different for different target test firmware. Power on the aging test board again, and perform a lookup table based on the power-on count value read from the physical block to determine the firmware index number; The target test firmware is read from the firmware package according to the firmware index number; Aging tests are performed on all the flash memory module chips under test according to the target test firmware.
2. The flash memory module aging test method according to claim 1, characterized in that, Before powering on the aging test board, performing timing processing, and writing the obtained power-on count value into the physical block of the flash memory module chip under test, the method further includes: All candidate test firmware are packaged to generate the firmware package; different test firmware have different test standards and test objects; The firmware package is burned into the storage module.
3. The flash memory module aging test method according to claim 2, characterized in that, Before powering on the aging test board, performing timing processing, and writing the obtained power-on count value into the physical block of the flash memory module chip under test, the method further includes: All candidate test firmware are numbered according to the order of arrangement in the firmware package to generate firmware index numbers; An index mapping table is established based on the firmware index number, the preset power-on time, and the pre-configured power-on time range; the index mapping table is used to indicate the first mapping relationship between the firmware index number and the preset power-on time, and the second mapping relationship between the firmware index number and the power-on time range.
4. The flash memory module aging test method according to claim 1, characterized in that, The step of writing the obtained power-on count value into the physical block of the flash memory module chip under test after timing processing includes: The first power-on timing and counting program is started and runs. The count is incremented by one every fixed time interval to obtain the latest power-on count value. Write the latest power-on count value to the physical page in the physical block; Once the physical block is full, the physical block is erased, and the latest power-on count value is recorded again starting from the first physical page of the physical block; until the aging test board is powered off.
5. The flash memory module aging test method according to claim 3, characterized in that, The step of determining the firmware index number by performing a lookup table process based on the power-on count value read from the physical block includes: Based on the power-on count value, a query is performed in the index mapping table to obtain the power-on time range in which the power-on count value falls; wherein, the power-on time range is determined by a preset upper limit value and a lower limit value for the power-on count; Based on the power-on time range in which the power-on count value falls, a query is performed in the index mapping table to determine the firmware index number of the target test firmware.
6. The flash memory module aging test method according to claim 1, characterized in that, The step of reading the target test firmware from the firmware package according to the firmware index number includes: The offset of the target test firmware in the firmware package is calculated based on the firmware index number and the fixed size of a single firmware. The target test firmware is read from the storage module according to the offset.
7. The flash memory module aging test method according to claim 1, characterized in that, The step of performing aging tests on all the flash memory module chips under test according to the target test firmware includes: Aging tests are performed on all the flash memory module chips under test on the aging test board according to the test standards in the target test firmware to obtain the test results. The bad block table information from the test results is written into the flash memory module chip under test.
8. A flash memory module aging test system, characterized in that, include: Aging test plate; The aging test board is equipped with a storage module and is electrically connected to multiple flash memory module chips under test. The storage module is used to pre-store firmware packages, which include multiple different candidate test firmwares; the flash memory module aging test system is used to implement the flash memory module aging test method as described in any one of claims 1 to 7.
9. A flash memory module aging test device, characterized in that, It includes at least one processor and a memory for communicatively connecting to the at least one processor; the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the flash memory module aging test method as described in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions for causing a computer to perform the flash memory module aging test method as described in any one of claims 1 to 7.