A broadband symmetrical power divider

Abstract

This invention relates to the field of communication technology, and particularly to a broadband symmetrical power divider. The broadband symmetrical power divider includes a dielectric substrate, an input microstrip line, a first output microstrip line, a second output microstrip line disposed on the dielectric substrate, and N cascaded symmetrical power divider units. The N symmetrical power divider units are arranged sequentially along the signal transmission direction from the input microstrip line to the first output microstrip line and the second output microstrip line. Each symmetrical power divider unit includes a first impedance transformation microstrip segment, a second impedance transformation microstrip segment, and an isolation resistor. The first impedance transformation microstrip segment and the second impedance transformation microstrip segment are mirror-symmetrical about the central axis of symmetry of the broadband symmetrical power divider. The first end of the isolation resistor is connected to the output end of the first impedance transformation microstrip segment, and the second end of the isolation resistor is connected to the output end of the second impedance transformation microstrip segment. Compared with the prior art, the broadband symmetrical power divider proposed in this invention has a wider bandwidth, smaller size, and is easier to integrate and process.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a broadband symmetrical power divider. Background Technology

[0002] Broadband symmetrical power dividers are key passive devices in radio frequency microwave systems that enable equal or unequal distribution of signal power. Their technological development is closely linked to the bandwidth requirements of fields such as communications, radar, and electronic warfare. They are widely used in various radio frequency microwave systems, including 5G communications, millimeter-wave communications, satellite communications, and software-defined radio, and directly affect the system's signal transmission quality, energy distribution efficiency, and overall stability.

[0003] In the early stages of RF microwave system development, narrowband power dividers (such as basic Wilkinson power dividers) were the mainstream application devices. Their core function was to distribute signal power within a narrow frequency band near the center frequency while ensuring certain insertion loss, isolation, and port matching characteristics. However, with the rapid promotion of new technologies such as 5G, millimeter-wave communication, and software-defined radio, various systems have placed unprecedentedly stringent requirements on the coverage of operating frequency bands. For example, 5G base stations need to support both Sub-6GHz and millimeter-wave bands, and satellite communication systems need to be compatible with multi-carrier signals. The frequency band coverage limitations of traditional narrowband power dividers can no longer meet the needs of practical applications. Therefore, the research and optimization of broadband power dividers has become a focus of industry research in the RF microwave field.

[0004] Currently, the core technology logic of broadband power dividers overcomes the bandwidth limitations of single-section structures through various methods such as multi-section impedance transformation networks, stepped transmission lines, and optimized coupling structures, resulting in a variety of mainstream technical solutions. Among them, the multi-section Wilkinson structure, by cascading multiple transmission line segments with different characteristic impedances and optimizing the parameters of each section using Chebyshev or Butterworth polynomials, can achieve octave-level bandwidth coverage and is one of the most widely used broadband solutions. Branch-line coupler-type power dividers, by leveraging the phase and amplitude characteristics of the coupling lines, can effectively broaden the bandwidth while significantly improving the isolation performance between ports, making them suitable for scenarios with high isolation requirements. Transmission line transformer-based solutions, with the advantages of combining magnetic coupling and distributed parameters, can achieve ultra-wideband coverage (such as 10MHz-10GHz) across multiple octaves, meeting the needs of ultra-wideband signal distribution.

[0005] However, despite the progress made in broadband power divider technology, there are still core technical challenges that urgently need to be addressed in the industry. The most prominent issue lies in the trade-off and balance between wide bandwidth and miniaturization / low insertion loss. On the one hand, achieving wider frequency coverage often requires increasing the number of transmission line segments or optimizing the transmission line structure, which directly leads to an increase in the overall size of the device, making it difficult to adapt to the trend of high integration and miniaturization in modern communication equipment. On the other hand, in high-frequency applications (such as millimeter waves), the requirements for dielectric materials and processing precision increase significantly due to increased signal transmission loss, further exacerbating the contradiction between wideband design and the need for low insertion loss.

[0006] Existing multi-stage Wilkinson power dividers require cascading multiple λ / 4 transmission lines to ensure broadband performance. This structure results in exceptionally large device sizes in low-frequency applications, severely limiting their use in miniaturized devices. Even using a multi-stage LC network composed of lumped inductors and capacitors to effectively replace the transmission lines still occupies a significant chip area, failing to meet the high integration requirements of modern devices. Furthermore, miniaturization designs of existing broadband power dividers often involve a series of performance degradation issues: a significant decrease in insertion loss and isolation, which exacerbates reflection and scattering during signal transmission, affecting signal quality; simultaneously, some miniaturization designs increase the difficulty of device fabrication, leading to higher manufacturing costs and hindering engineering mass production and widespread adoption.

[0007] Meanwhile, the integration requirements of 5G and subsequent next-generation communication systems are driving the rapid development of broadband power dividers towards on-chip and multi-port integration. This technological iteration not only needs to consider good electrical performance but also balance engineering costs and system compatibility. In summary, addressing the industry pain point of traditional broadband power dividers' difficulty in simultaneously achieving wide bandwidth, miniaturization, and low insertion loss, and considering the integration requirements of planar microwave circuits, there is an urgent need to propose an improved high-performance broadband power divider scheme that is simple in structure, easy to manufacture, and cost-controllable. This will fill the performance gap in existing designs and meet the practical application needs of various RF microwave systems.

[0008] Therefore, there is an urgent need for a new broadband symmetrical power divider to solve the above-mentioned technical problems. Summary of the Invention

[0009] This invention provides a broadband symmetrical power divider, which aims to provide a broadband symmetrical power divider with wide bandwidth, miniaturization, and low insertion loss.

[0010] In a first aspect, the present invention provides a broadband symmetrical power divider, the broadband symmetrical power divider comprising a dielectric substrate, an input microstrip line formed on the dielectric substrate, a first output microstrip line, a second output microstrip line, and N cascaded symmetrical power divider units, where N is a positive integer greater than or equal to 1; the N symmetrical power divider units are arranged sequentially along the signal transmission direction from the input microstrip line to the first output microstrip line or the second output microstrip line; the broadband symmetrical power divider has an axisymmetric structure about the line containing the input microstrip line;

[0011] Each symmetrical power divider unit includes a first impedance transformation microstrip segment, a second impedance transformation microstrip segment, and an isolation resistor. The first impedance transformation microstrip segment and the second impedance transformation microstrip segment are mirror images of each other about the axis of symmetry of the broadband symmetrical power divider. The first end of the isolation resistor is connected to the output end of the first impedance transformation microstrip segment, and the second end of the isolation resistor is connected to the output end of the second impedance transformation microstrip segment. The resistance value of the isolation resistor is adjusted according to the characteristic impedance and admittance of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment. The input terminals of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment of the symmetrical power divider unit described in the first section are both electrically connected to the output terminal of the input microstrip line. In two adjacent symmetrical power distribution units, the output terminal of the first impedance transformation microstrip segment of the symmetrical power distribution unit in the previous section is electrically connected to the input terminal of the first impedance transformation microstrip segment of the symmetrical power distribution unit in the next section; the output terminal of the second impedance transformation microstrip segment of the symmetrical power distribution unit in the previous section is electrically connected to the input terminal of the second impedance transformation microstrip segment of the symmetrical power distribution unit in the next section. The output terminal of the first impedance transformation microstrip segment of the symmetrical power divider unit described in the last section is electrically connected to the input terminal of the first output microstrip line; the output terminal of the second impedance transformation microstrip segment of the symmetrical power divider unit described in the last section is electrically connected to the input terminal of the second output microstrip line.

[0012] Preferably, a plurality of the first impedance transformation microstrip segments and the first output microstrip line are sequentially connected to form a first transmission line segment, and a plurality of the second impedance transformation microstrip segments and the second output microstrip line are sequentially connected to form a second transmission line segment. N isolation resistors divide the first transmission line segment and the second transmission line segment into N+1 segments respectively, and the resistance values ​​of the isolation resistors satisfy the following condition: ; ; in, Indicates the first x The resistance value of the isolation resistor in the symmetrical power distribution unit described in the section. Indicates the power distribution factor. This represents the load admittance of the first output microstrip line. Indicates the first x The normalized element values ​​of the symmetrical power distribution unit described in the section, as well as They represent the first x- 1 x, x+ Normalized characteristic admittance between the first transmission segment and the second transmission segment 1 Indicates the first x The electrical conductance between the first transmission line segment and the second transmission line segment.

[0013] Preferably, in the Nth section of the symmetrical power divider unit, the linewidths of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment increase sequentially along the signal transmission direction from the input microstrip line to the first output microstrip line or the second output microstrip line; in the same section of the symmetrical power divider unit, the linewidths of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment are equal.

[0014] Preferably, the dielectric substrate is made of glass fiber reinforced epoxy resin copper clad laminate with a relative permittivity of 4.3 and a loss tangent of 0.01.

[0015] Preferably, both the first impedance transformation microstrip segment and the second impedance transformation microstrip segment are U-shaped microstrip structures, and the opening of the U-shaped microstrip structure faces the axis of symmetry of the broadband symmetrical power divider.

[0016] Preferably, the broadband symmetrical power divider includes three cascaded symmetrical power divider units.

[0017] Preferably, the broadband symmetrical power divider has dimensions of 60mm × 40mm × 1.6mm.

[0018] Preferably, the lengths of the first transmission line segment and the second transmission line segment satisfy the following conditions: ; in, This indicates the length of the first transmission line segment or the length of the second transmission line segment. Represents the speed of light. This indicates the center operating frequency of the broadband symmetrical power divider. This represents the dielectric constant.

[0019] Compared with existing technologies, this invention adopts an N-section cascaded symmetrical power divider unit structure, combined with a multi-order impedance matching network design, breaking through the narrow-band limitation of existing power dividers and achieving a wider bandwidth. By designing the first and second impedance transformation microstrip segments as U-shaped, a miniaturized design of the broadband symmetrical power divider is achieved. By matching isolation resistors between the first and second impedance transformation microstrip segments in each symmetrical power divider unit, high isolation between the two output ports is achieved across the entire operating frequency band. This effectively absorbs unbalanced signals from the two outputs, suppresses signal reflection and scattering, and avoids the problems of decreased isolation and increased insertion loss associated with miniaturization. The resistance value of the isolation resistor is adjusted according to the characteristic impedance and admittance of the first and second impedance transformation microstrip segments, thereby improving the matching effect of the isolation resistor and ensuring good synchronization of power division. Attached Figure Description

[0020] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings: Figure 1 This is a schematic diagram of the layout structure of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the network structure of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of a four-port network of a broadband symmetrical power divider provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the upper and lower parallel transmission lines of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the transmission parallel lines of the broadband symmetrical power divider with resistors provided in the embodiments of the present invention; Figure 6 This is a schematic diagram of the Nth-order equivalent circuit of the broadband symmetrical power divider provided in the embodiment of the present invention; Figure 7 This is a schematic diagram of the equivalent circuit of the broadband symmetrical power divider when the excitation input is a microstrip line, as provided in the embodiment of the present invention. Figure 8 This is a schematic diagram of the hypothetical equivalent circuit of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 9 This is a schematic diagram of the equivalent circuit of the upper branch of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 10 This is a schematic diagram of the third-order upper half-path equivalent circuit of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 11This is a schematic diagram of a third-order single-port low-pass filter for a broadband symmetrical power divider provided in an embodiment of the present invention; Figure 12 This is a schematic diagram of the S-parameters of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 13 This is a schematic diagram of the S-parameters of the first and second output microstrip lines of the broadband symmetrical power divider provided in an embodiment of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0022] Example 1 Please refer to Figure 1 This invention provides a broadband symmetrical power divider 100, which includes a dielectric substrate 1, an input microstrip line 2, a first output microstrip line 3, a second output microstrip line 4 formed on the dielectric substrate 1, and N cascaded symmetrical power divider units 5, where N is a positive integer greater than or equal to 1; the N symmetrical power divider units 5 are arranged sequentially along the signal transmission direction from the input microstrip line 2 to the first output microstrip line 3 or the second output microstrip line 4. The broadband symmetrical power divider 100 has an axisymmetric structure about the line containing the input microstrip line 2. In this embodiment of the invention, cascading refers to the arrangement and connection of multiple independent functional units (i.e., symmetrical power distribution units 5) with the same function, arranged in series from end to end according to the direction of signal transmission. The output end of the previous unit is directly connected to the input end of the next unit. The signal must flow through each cascaded unit in sequence to finally complete the transmission.

[0023] Each of the symmetrical power divider units 5 includes a first impedance transformation microstrip segment 51, a second impedance transformation microstrip segment 52, and an isolation resistor. The first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 are mirror images of each other about the axis of symmetry of the broadband symmetrical power divider 100. The first end of the isolation resistor is connected to the output end of the first impedance transformation microstrip segment 51, and the second end of the isolation resistor is connected to the output end of the second impedance transformation microstrip segment 52. The resistance value of the isolation resistor is adjusted according to the characteristic impedance and admittance of the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52.

[0024] In this embodiment of the invention, the broadband symmetrical power divider 100 includes three cascaded symmetrical power divider units 5, i.e., N=3. The isolation resistors corresponding to the three symmetrical power divider units 5 are a first resistor R1, a second resistor R2, and a third resistor R3, respectively. The cascaded symmetrical power divider units 5 of this invention can flexibly adjust the number of cascaded units N according to the bandwidth requirements of actual applications to adapt to different bandwidth coverage requirements; simultaneously, by adjusting the power distribution coefficient and the parameters of the impedance transformation microstrip segment, equal or unequal power distribution requirements can be flexibly achieved.

[0025] The input terminals of the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 of the symmetrical power distribution unit 5 described in the first section are both electrically connected to the output terminal of the input microstrip line 2.

[0026] In the two adjacent symmetrical power distribution units 5, the output terminal of the first impedance transformation microstrip segment 51 of the previous symmetrical power distribution unit 5 is electrically connected to the input terminal of the first impedance transformation microstrip segment 51 of the next symmetrical power distribution unit 5; the output terminal of the second impedance transformation microstrip segment 52 of the previous symmetrical power distribution unit 5 is electrically connected to the input terminal of the second impedance transformation microstrip segment 52 of the next symmetrical power distribution unit 5.

[0027] The output terminal of the first impedance transformation microstrip segment 51 of the symmetrical power distribution unit 5 described in the last section is electrically connected to the input terminal of the first output microstrip line 3; the output terminal of the second impedance transformation microstrip segment 52 of the symmetrical power distribution unit 5 described in the last section is electrically connected to the input terminal of the second output microstrip line 4.

[0028] In this embodiment of the invention, both the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 are U-shaped microstrip structures, with the opening of the U-shaped microstrip structure facing the axis of symmetry of the broadband symmetrical power divider 100. By bending the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 into U-shaped microstrip structures, miniaturization of the broadband symmetrical power divider 100 and good power division effect are achieved simultaneously, and power division can be achieved over a wide bandwidth.

[0029] In this embodiment of the invention, multiple first impedance transformation microstrip segments 51 and first output microstrip lines 3 are sequentially connected to form a first transmission line segment, and multiple second impedance transformation microstrip segments 52 and second output microstrip lines 4 are sequentially connected to form a second transmission line segment. N isolation resistors divide the first transmission line segment and the second transmission line segment into N+1 segments respectively. The resistance values ​​of the isolation resistors satisfy the following condition: ; ; in, Indicates the first x The resistance value of the isolation resistor in the symmetrical power distribution unit described in the section. Indicates the power distribution factor. This represents the load admittance of the first output microstrip line. Indicates the first x The normalized element values ​​of the symmetrical power distribution unit described in the section, as well as They represent the first x- 1 x, x+ Normalized characteristic admittance between the first transmission segment and the second transmission segment 1 Indicates the first x The electrical conductance between the first transmission line segment and the second transmission line segment.

[0030] In this embodiment of the invention, the linewidths of the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 in the N-section symmetrical power division unit 5 increase sequentially along the signal transmission direction from the input microstrip line 2 to the first output microstrip line 3 or the second output microstrip line 4; in the same section of the symmetrical power division unit 5, the linewidths of the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 are equal.

[0031] In this embodiment of the invention, the dielectric substrate 1 is made of glass fiber reinforced epoxy resin copper clad laminate with a relative permittivity of 4.3 and a loss tangent of 0.01. Furthermore, using industry-standard glass fiber reinforced epoxy resin copper clad laminate as the dielectric substrate 1 maintains low insertion loss characteristics over a wide frequency band, ensuring efficient RF signal transmission and stable and reliable device performance.

[0032] In this embodiment of the invention, the broadband symmetrical power divider 100 has dimensions of 60mm × 40mm × 1.6mm. This significantly reduces the device size while maintaining the same bandwidth, achieving miniaturization of the broadband symmetrical power divider 100.

[0033] In the embodiments of the present invention, please refer to the following for a better understanding of the design concept: Figure 2 , Figure 2 This is a schematic diagram of the network structure of the broadband symmetrical power divider provided in an embodiment of the present invention; firstly, the structure of the broadband symmetrical power divider is decomposed into network A and network B, wherein... and Let represent the characteristic impedance and admittance of the first impedance transformation microstrip segment 51 (upper half transmission segment) in section i, respectively. Similarly, and Let the characteristic impedance and admittance of the second impedance transformation microstrip segment 52 (lower half of the transmission line) in section i be represented respectively. This represents the conductance between the upper and lower i-th transmission lines.

[0034] Please refer to Figures 3-5 , Figure 3 This is a schematic diagram of a four-port network of a broadband symmetrical power divider provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the upper and lower parallel transmission lines of the broadband symmetrical power divider provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the transmission parallel lines of a broadband symmetrical power divider with resistance provided in an embodiment of the present invention.

[0035] exist Figure 2 The three-port network A shown in the image can be viewed as a four-port network, such as... Figure 3 As shown, by Figure 4 The two adjacent transmission lines shown are Figure 5 The network blocks shown are connected in series, consisting of parallel conductors. Figure 4 The transmission matrix of two adjacent lines in a four-port network is shown in formula (1) below, where the subscript k represents the k-th discrete frequency in the broadband. and Let i and j represent the propagation constants of the upper and lower transmission lines of the i-th segment, respectively. and Let represent the lengths of the upper and lower transmission lines of the i-th segment, respectively. For convenience, the transmission matrix in formula (1) is represented by . express.

[0036] (1); Where the subscript k represents the k-th discrete frequency in the broadband, and Let these represent the propagation constants of the upper and lower transmission lines in the i-th segment, respectively. and Let represent the lengths of the upper and lower transmission lines of the i-th segment, respectively. For convenience, the transmission matrix in formula (1) is... express.

[0037] Figure 5 The transfer matrix of the parallel conductance of the four-port network is shown below: (2); in, , Let these represent the voltage and current of the i-th segment at port 1, respectively. , Let these represent the voltage and current of the i-th segment at the 2-port, respectively. , Let represent the voltage and current of the i-th segment of the 3-port circuit, respectively. , Let represent the voltage and current of the i-th segment of the 4-port network, respectively. This represents the conductance between the upper and lower transmission lines in the i-th segment.

[0038] The matrix in formula (2) is used The matrix of the four-port network A can be represented as follows: (3); in, The transmission matrix representing the discrete frequency k on the (N+1)th segment can be represented by the following transmission equation: (4); in, Represents a cascaded transmission matrix. express The block matrix.

[0039] The admittance matrix of the four-port network A can then be written as: (5); Furthermore, the admittance matrix can be represented by the transfer matrix as follows: (6); Figure 2 The input node 1 of network A (i.e., the left end of network A) and Figure 3 Input ports 1 and 4 are at the same potential. (7); and Figure 2 The input current of input node 1 in network A is equal to Figure 3 The sum of the currents at input ports 1 and 4 (8); Therefore, the admittance matrix of the four-port network in formula (6) can be obtained. Figure 2 The admittance matrix of the three-port network A is: (9); Figure 2 Network B in the diagram can be represented as: (10); in, , This is for the voltage and current at the input microstrip line port. , The voltage and current at the output of network B. The characteristic impedance of the transmission line in network B is... For the characteristic admittance of the transmission line of network B, This is the physical length of the transmission line segment. Propagation constant, is the attenuation constant, representing the signal loss with distance; This is a phase constant, representing the phase change of the signal with distance. , , , All of these represent the transmission matrix parameters of network B.

[0040] Using formulas (9) and (10), Figure 2 The overall transfer matrix can be obtained from formula (11). (11); in, , , The input currents at the three external ports of the broadband symmetrical power divider 100 are represented. , , The voltages represent the terminal voltages of the three external ports of the broadband symmetrical power divider 100, with port 0 being the input and ports 2 and 3 being the outputs. The total admittance matrix of the entire three-port network is obtained by combining network A (branch part) and network B (input segment). Let be the admittance matrix element of network A.

[0041] because For the reciprocal system, among which , , and As defined in formula (10), the scattering matrix of the broadband symmetric power divider 100 can finally be obtained from its admittance matrix, as shown in formula (12): (12) in, Here is the scattering matrix. Here is the load admittance matrix. Let YT be the total admittance matrix of the entire three-port network, where YT is defined in formula (11), and the load admittance matrix of YL is defined as follows: ; Next, initial parameters for the broadband symmetrical power divider 100 are provided through odd-mode and even-mode analysis. To minimize power loss in the resistors of the broadband symmetrical power divider 100, the voltages on the first impedance transformation microstrip segment 51 and the second impedance transformation microstrip segment 52 are made as equal as possible. Figure 6 As shown, Figure 6This is a schematic diagram of the Nth-order equivalent circuit of the broadband symmetrical power divider provided in this embodiment of the invention; here, the admittance of the upper branch (the branch of the first impedance transformation microstrip segment 51) is chosen to be K / (1-K) times the admittance of the lower branch (the branch of the second impedance transformation microstrip segment 52). Since the load admittance of port 2 and the load admittance of port 3 are generally not K / (1-K) times, the characteristic admittance of the loaded output segment is chosen to make... Figure 6 In .

[0042] Therefore, the initial characteristic admittance of the output line segment can be obtained as follows: ; When a width-symmetric power divider is energized at port 2 of its input microstrip line, the points equidistant from its input terminal in the upper and lower branches should be at the same potential, and the potentials across the resistors should also be the same. However, this configuration may cause a short circuit, so the upper and lower branches need to be connected in parallel during the design process. Please refer to [reference needed]. Figure 7 , Figure 7 This is a schematic diagram of the equivalent circuit of the broadband symmetrical power divider when the excitation input is a microstrip line, as provided in the embodiment of the present invention. Next, assuming the admittance of the lower branch is (1-K) / K times the admittance of the upper branch, then when they are connected in parallel, the following condition is satisfied: ; From this, we can obtain the following... Figure 8 The equivalent circuit diagram shown is as follows. Figure 8 This is a schematic diagram of the hypothetical equivalent circuit of the broadband symmetrical power divider provided in an embodiment of the present invention.

[0043] The next issue is impedance matching, specifically the input impedance. It should be connected to the output impedance via a transmission line. For matching, the present invention selects a step impedance as... and The average value. After obtaining the impedance, the input terminal of the first impedance transformation microstrip segment 51 and the width of the second impedance transformation microstrip segment 52 can be calculated. The characteristic impedance of the first impedance transformation microstrip segment 51 on the branch of the (N+1)th segment is... The second impedance transformation microstrip segment 52 of the lower branch needs to and (K / (1-K)) Matching is performed; furthermore, the length of the microstrip line in a typical power divider is equal to the center frequency. However, in order to reduce the length of the power divider, this invention selects a center frequency of... The details are as follows: ; Next, we obtain the initial value of the applied characteristic impedance. Assuming the output port of the broadband symmetrical power divider 100 is excited by odd-mode, the broadband symmetrical power divider 100 can be divided into two parts along the central axis, with the voltage on the central axis being 0. The upper part is as follows: Figure 9 As shown, Figure 9 This is a schematic diagram of the equivalent circuit of the upper branch of the broadband symmetrical power divider provided in an embodiment of the present invention; For odd-mode excitation at the output port, the initial resistance value can be selected as follows: =(K / (1-K)) This ensures that the input impedance at the 3-port of the first output microstrip line is equal to the input impedance at the center frequency. The impedance and admittance are respectively based on and After normalization, its equivalent circuit is as follows: Figure 10 As shown, Figure 10 This is a schematic diagram of the third-order upper half-path equivalent circuit of the broadband symmetrical power divider provided in an embodiment of the present invention; If the length of the transmission line is equal to Then the input admittance and input impedance of the first output microstrip line at port 3 are: ; ; Next, we need to determine... , and Beforehand, ensure that the normalized input impedance at port 3 of the first output microstrip line is equal to 1. Please refer to [reference needed]. Figure 11 , Figure 11 This is a schematic diagram of a third-order single-port low-pass filter for a broadband symmetrical power divider provided in an embodiment of the present invention; the series elements are represented by impedance, and the parallel elements are represented by admittance, therefore the input impedance can be obtained as: ; To determine the exact value, you can look it up in a table: ; Based on the above derivation, the resistance values ​​of the first resistor R1, the second resistor R2, and the third resistor R3 can be determined as follows: , , .

[0044] Subsequent simulations of the broadband symmetric power divider 100 were performed to obtain its S-parameters, as follows: Figure 12 As shown, Figure 12This is a schematic diagram of the S-parameters of the broadband symmetrical power divider provided in an embodiment of the present invention; it can be seen that by exciting the input microstrip line port 2, the designed broadband symmetrical power divider 100 operates within the range of 0.1-2.8 GHz. Less than -10dB, and and The near-complete overlap indicates that the power division of the broadband symmetrical power divider 100 is equal, achieving the expected design effect. To further verify the effect of the power divider, the standing waves at ports 3 of the first output microstrip line and ports 4 of the second output microstrip line were simulated and tested. Figure 13 As shown, Figure 13 This is a schematic diagram of the S-parameters of the first and second output microstrip lines of the broadband symmetrical power divider provided in an embodiment of the present invention. It can be seen that the standing wave ratios (SWR) at port 3 of the first output microstrip line and port 4 of the second output microstrip line are both less than 2 in the 0-3 GHz range, which meets the design expectations.

[0045] Compared with existing technologies, this invention adopts an N-section cascaded symmetrical power divider unit structure, combined with a multi-order impedance matching network design, breaking through the narrow-band limitation of existing power dividers and achieving a wider bandwidth. By designing the first and second impedance transformation microstrip segments as U-shaped, a miniaturized design of the broadband symmetrical power divider is achieved. By matching isolation resistors between the first and second impedance transformation microstrip segments in each symmetrical power divider unit, high isolation between the two output ports is achieved across the entire operating frequency band. This effectively absorbs unbalanced signals from the two outputs, suppresses signal reflection and scattering, and avoids the problems of decreased isolation and increased insertion loss associated with miniaturization. The resistance value of the isolation resistor is adjusted according to the characteristic impedance and admittance of the first and second impedance transformation microstrip segments, thereby improving the matching effect of the isolation resistor and ensuring good synchronization of power division.

[0046] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0047] The embodiments of the present invention have been described above with reference to the accompanying drawings. The disclosed embodiments are merely preferred embodiments of the present invention. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many equivalent changes in form without departing from the spirit and scope of the claims of the present invention, and all such changes are within the protection scope of the present invention.

Claims

1. A broadband symmetrical power divider, characterized in that, The broadband symmetrical power divider includes a dielectric substrate, an input microstrip line, a first output microstrip line, a second output microstrip line formed on the dielectric substrate, and N cascaded symmetrical power divider units, where N is a positive integer greater than or equal to 1; the N symmetrical power divider units are arranged sequentially along the signal transmission direction from the input microstrip line to the first output microstrip line or the second output microstrip line; the broadband symmetrical power divider has an axisymmetric structure about the line containing the input microstrip line; Each symmetrical power divider unit includes a first impedance transformation microstrip segment, a second impedance transformation microstrip segment, and an isolation resistor. The first impedance transformation microstrip segment and the second impedance transformation microstrip segment are mirror images of each other about the axis of symmetry of the broadband symmetrical power divider. The first end of the isolation resistor is connected to the output end of the first impedance transformation microstrip segment, and the second end of the isolation resistor is connected to the output end of the second impedance transformation microstrip segment. The resistance value of the isolation resistor is adjusted according to the characteristic impedance and admittance of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment. The input terminals of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment of the symmetrical power divider unit described in the first section are both electrically connected to the output terminal of the input microstrip line. In two adjacent symmetrical power distribution units, the output terminal of the first impedance transformation microstrip segment of the symmetrical power distribution unit in the previous section is electrically connected to the input terminal of the first impedance transformation microstrip segment of the symmetrical power distribution unit in the next section; the output terminal of the second impedance transformation microstrip segment of the symmetrical power distribution unit in the previous section is electrically connected to the input terminal of the second impedance transformation microstrip segment of the symmetrical power distribution unit in the next section. The output terminal of the first impedance transformation microstrip segment of the symmetrical power divider unit described in the last section is electrically connected to the input terminal of the first output microstrip line; the output terminal of the second impedance transformation microstrip segment of the symmetrical power divider unit described in the last section is electrically connected to the input terminal of the second output microstrip line. Multiple first impedance transformation microstrip segments and the first output microstrip line are sequentially connected to form a first transmission line segment, and multiple second impedance transformation microstrip segments and the second output microstrip line are sequentially connected to form a second transmission line segment. N isolation resistors divide the first transmission line segment and the second transmission line segment into N+1 segments respectively. The resistance values ​​of the isolation resistors satisfy the following condition: ； ； in, Indicates the first x The resistance value of the isolation resistor in the symmetrical power distribution unit described in the section. Indicates the power distribution factor. This represents the load admittance of the first output microstrip line. Indicates the first x The normalized element values ​​of the symmetrical power distribution unit described in the section, as well as They represent the first x- 1 x, x+ Normalized characteristic admittance between the first transmission segment and the second transmission segment 1 Indicates the first x The electrical conductance between the first transmission line segment and the second transmission line segment.

2. The broadband symmetrical power divider as described in claim 1, characterized in that, In the symmetrical power divider unit described in section N, the linewidths of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment increase sequentially along the signal transmission direction from the input microstrip line to the first output microstrip line or the second output microstrip line; in the same symmetrical power divider unit, the linewidths of the first impedance transformation microstrip segment and the second impedance transformation microstrip segment are equal.

3. The broadband symmetrical power divider as described in claim 1, characterized in that, The dielectric substrate is made of glass fiber reinforced epoxy resin copper clad laminate with a relative permittivity of 4.3 and a loss tangent of 0.

01.

4. The broadband symmetrical power divider as described in claim 1, characterized in that, Both the first impedance transformation microstrip segment and the second impedance transformation microstrip segment are U-shaped microstrip structures, with the opening of the U-shaped microstrip structure facing the axis of symmetry of the broadband symmetrical power divider.

5. The broadband symmetrical power divider as described in claim 1, characterized in that, The broadband symmetrical power divider includes three cascaded symmetrical power divider units.

6. The broadband symmetrical power divider as described in claim 1, characterized in that, The dimensions of the broadband symmetrical power divider are 60mm × 40mm × 1.6mm.

7. The broadband symmetrical power divider as described in claim 1, characterized in that, The lengths of the first transmission line segment and the second transmission line segment satisfy the following conditions: ； in, This indicates the length of the first transmission line segment or the length of the second transmission line segment. Represents the speed of light. This indicates the center operating frequency of the broadband symmetrical power divider. This represents the dielectric constant.

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