Dual-main-box wired stereo audio synchronous playing method and related equipment

Abstract

The application discloses a kind of double main box wired stereo audio synchronous playing method and related equipment.The method includes: obtaining the audio stream to be played and detecting the wired link connection state between two devices, obtaining link state information;Based on link state information, the audio stream is separated into sound channels, to obtain first sound channel data and second sound channel data;First sound channel data is routed to the first local playback path, and the second sound channel data is converted and sent to the second audio playback device through the wired link;After decoding and restoring the second sound channel data received by the second audio playback device, the local audio output source is switched to the restored second sound channel data and routed to the second local playback path;Obtain link transmission delay and insert corresponding delay compensation in the first local playback path, and synchronize the output and play of the compensated first sound channel data and the restored second sound channel data.Realize that two complete main box devices complete low-delay stereo synchronous playback through wired digital link.

Description

Technical Field

[0001] This invention relates to the field of audio signal processing technology, and in particular to a method and related equipment for synchronous playback of wired stereo audio from dual master boxes. Background Technology

[0002] With the rapid popularization of consumer electronics and smart homes, multi-device collaborative audio playback systems have become widely used. In the stereo speaker field, traditional solutions typically employ a "one master, one slave" architecture, where the master speaker handles audio input, decoding, and clock management, while the slave speaker only performs passive amplification or simplified decoding functions. While this architecture has lower implementation costs, the independent processing capabilities of the slave speaker are severely limited, resulting in poor device reusability and insufficient system flexibility. In recent years, with the increasing popularity of smart speaker products equipped with complete SoC, DAC, and amplifier capabilities, some manufacturers have begun to experiment with forming wireless stereo pairs using two functionally equivalent master speaker devices to improve device independence and deployment flexibility. These dual-master wireless pairing solutions typically rely on Wi-Fi, Bluetooth Low Energy (BLE), or proprietary 2.4GHz wireless protocols for audio distribution and playback synchronization between the two devices. Each device retains independent control and decoding capabilities even when paired, offering higher product reusability compared to the traditional master-slave architecture.

[0003] However, the aforementioned wireless dual-master-speaker synchronization solution faces a series of inherent technical defects in practical applications. The wireless channel itself is subject to interference from multiple factors such as network congestion, link jitter, retransmission mechanisms, and system scheduling, making it difficult for the audio synchronization delay between the two master speakers to converge to a stable and predictable range. To maintain basic synchronized playback, existing solutions generally require the introduction of a large synchronization buffer, which directly leads to a significant increase in end-to-end system latency. In timing-sensitive scenarios such as games, videos, and high-dynamic-range music playback, problems such as sound image shift, transient inconsistencies, and inconsistent arrival times of the left and right channels easily occur, severely impacting the listening experience. Furthermore, the wireless solution is highly dependent on environmental electromagnetic conditions and network configuration quality. Synchronization stability further decreases in complex electromagnetic environments, and packet loss recovery mechanisms also introduce additional irregular latency fluctuations. Therefore, establishing a stereo audio playback mechanism between two master speakers, each with full processing capabilities, that is latency-stable, has controllable synchronization errors, and is independent of the wireless network environment has become a critical problem that urgently needs to be solved in existing technologies. Summary of the Invention

[0004] The main objective of this invention is to solve the technical problem that existing dual-master stereo sound systems rely on wireless networks for channel synchronization, resulting in unstable playback delays and difficulty in converging synchronization errors between the left and right channels.

[0005] The first aspect of this invention provides a method for synchronous playback of wired stereo audio from two main speakers, applied to an audio synchronous playback system. The audio synchronous playback system includes a first audio playback device and a second audio playback device. The method comprises: acquiring an audio stream to be played and detecting the connection status of a wired digital audio link between the first and second audio playback devices to obtain link status information; based on the link status information, using the first audio playback device to perform channel separation on the audio stream to be played, obtaining first channel data and second channel data; and routing the first channel data to the first main speaker of the first audio playback device. The system firstly converts the format of the second channel data and sends it to the second audio playback device via the wired digital audio link. The second audio playback device decodes and restores the received second channel data, switches the local audio output source of the second audio playback device from the local audio source to the restored second channel data, and routes it to the second local playback path. The system then obtains the transmission delay of the wired digital audio link, inserts a corresponding delay compensation amount into the first local playback path based on the transmission delay, and synchronously outputs and plays the compensated first channel data via the first local playback path and the restored second channel data via the second local playback path.

[0006] A second aspect of the present invention provides a dual-master wired stereo audio synchronous playback device, applied to an audio synchronous playback system. The audio synchronous playback system includes a first audio playback device and a second audio playback device. The dual-master wired stereo audio synchronous playback device includes: a link detection module, used to acquire the audio stream to be played and detect the connection status of the wired digital audio link between the first audio playback device and the second audio playback device, obtaining link status information; a channel separation module, used to perform channel separation on the audio stream to be played using the first audio playback device based on the link status information, obtaining first channel data and second channel data; and an encoding and transmission module, used to route the first channel data to the first audio playback device. The system comprises a first local playback path, which converts the format of the second channel data and sends it to the second audio playback device via the wired digital audio link; a decoding and switching module, which uses the second audio playback device to decode and restore the received second channel data, switches the local audio output source of the second audio playback device from the local audio source to the restored second channel data, and routes it to the second local playback path; and a delay synchronization module, which obtains the transmission delay of the wired digital audio link, inserts a corresponding delay compensation amount in the first local playback path based on the transmission delay, and synchronously outputs and plays the compensated first channel data via the first local playback path and the restored second channel data via the second local playback path.

[0007] A third aspect of the present invention provides a dual-master wired stereo audio synchronous playback device, comprising: a memory and at least one processor, wherein the memory stores instructions; the at least one processor invokes the instructions in the memory to cause the dual-master wired stereo audio synchronous playback device to perform the various steps of the above-described dual-master wired stereo audio synchronous playback method.

[0008] A fourth aspect of the present invention provides a computer-readable storage medium storing instructions that, when executed on a computer, cause the computer to perform the steps of the above-described dual-master wired stereo audio synchronous playback method.

[0009] The above-described dual-master wired stereo audio synchronous playback method and related equipment. In this embodiment of the invention, the link status information is obtained by acquiring the audio stream to be played and detecting the connection status of the wired digital audio link between the first audio playback device and the second audio playback device; based on the link status information, the first audio playback device performs channel separation on the audio stream to be played to obtain first channel data and second channel data; the first channel data is routed to the first local playback path, and the second channel data is sent to the second audio playback device through the wired digital audio link after format conversion; the second audio playback device decodes and restores the received second channel data, switches the local audio output source from the local audio source to the restored second channel data, and routes it to the second local playback path; the transmission delay of the wired digital audio link is acquired, a corresponding delay compensation amount is inserted into the first local playback path based on the transmission delay, and the compensated first channel data and the restored second channel data are synchronously output and played through the first local playback path and through the second local playback path. This application establishes a wired digital audio transmission link between two main speaker devices with full processing capabilities. It replaces the wireless synchronization buffer architecture with channel separation, format conversion, and sample-level delay compensation mechanisms. This solves the technical problems of existing dual-main speaker stereo systems that rely on wireless networks for channel synchronization, resulting in unstable playback delays and difficulty in converging synchronization errors in the left and right channels. It achieves low-latency, high-synchronization-accuracy wired stereo playback between the two main speaker devices, effectively improving the system's sound image positioning stability and listening consistency in time-sensitive scenarios.

[0010] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained in accordance with the structures particularly pointed out in the description, claims and drawings.

[0011] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the first embodiment of the dual-master box wired stereo audio synchronous playback method in this invention; Figure 2 This is a schematic diagram of the second embodiment of the dual-master wired stereo audio synchronous playback method in this invention. Figure 3 This is a schematic diagram of one embodiment of the dual-master wired stereo audio synchronous playback device in this invention; Figure 4 This is a schematic diagram of one embodiment of the dual-master wired stereo audio synchronous playback device of the present invention. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0014] The terms "comprising" and "having," and any variations thereof, used in the embodiments of this invention are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the steps or units listed, but may optionally include other steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0015] The dual-master wired stereo audio synchronization playback method described in this invention is applicable to stereo pairing scenarios between two active speaker devices, each equipped with a complete SoC, DAC, and power amplifier capabilities. For example, two active bookshelf speakers can be placed in different rooms for individual use when operating independently. When a desktop stereo system is needed, the two devices are connected and paired via a coaxial cable to achieve high-synchronization-precision wired stereo playback without relying on a wireless network environment. To facilitate understanding of this embodiment, the specific process of this invention is described below. Please refer to [link to relevant documentation]. Figure 1 The first embodiment of the dual-master wired stereo audio synchronous playback method in this invention includes: 101. Obtain the audio stream to be played and detect the connection status of the wired digital audio link between the first audio playback device and the second audio playback device to obtain the link status information; In this embodiment, the input audio signal is de-encapsulated and decoded to obtain a uniformly formatted audio stream to be played; the wired digital audio link is subjected to cable connection detection and receiver phase-locked state detection to generate link detection parameters (link detection parameters include link access status, phase-locked flag, and sampling rate information; the link detection parameters are confirmed and monitored to obtain link status information, including: determining the access status and locking status of the link access status and phase-locked flag respectively to obtain status determination results; comparing the sampling rate information with a preset sampling rate range to obtain sampling rate comparison results; and obtaining link status information based on the status determination results and sampling rate comparison results); the link detection parameters are confirmed and monitored to obtain link status information.

[0016] In practical applications, the input audio signal is first de-encapsulated and decoded to obtain a unified audio stream for playback. The SoC (System-on-a-Chip), the core processing chip integrating a processor, audio decoding engine, and other functional modules, of the first audio playback device receives the raw audio signal from input sources such as local media, network streaming media, Bluetooth, or HDMI. Since different input sources use different audio encapsulation formats—for example, network streaming media uses AAC or FLAC encapsulation, and Bluetooth input uses SBC or aptX encoding—the SoC's built-in audio decoding engine first de-encapsulates the input signal, stripping the transport layer protocol header, and then performs the corresponding format decoding operation, uniformly converting the audio data into a PCM (Pulse Code Modulation, a standard format for digitally representing analog audio signals with a fixed sampling rate and bit depth) format raw sampled data stream, i.e., the audio stream to be played. After being uniformly converted to PCM format, the input data for all subsequent channel separation and format conversion operations has a consistent sampling rate and bit depth, eliminating processing compatibility issues caused by differences in input sources.

[0017] While acquiring the audio stream, the wired digital audio link between the first and second audio playback devices is tested for cable connection and receiver phase-locked state, generating link detection parameters. In this solution, the wired digital audio link can specifically be a coaxial digital audio cable (Coax), i.e., a physical connection channel for transmitting SPDIF format digital audio signals via an RCA interface. Cable connection detection is performed by the SPDIF receiver chip on the second audio playback device side. This chip continuously monitors whether a valid SPDIF carrier signal exists at the coaxial input. When a valid carrier is detected, it determines that the cable is physically connected and generates a valid signal, generating link access status parameters with values ​​of "connected" or "not connected". Phase-locked loop (PLL) state detection is also performed by the SPDIF receiver chip (e.g., AK4118) on the second audio playback device side. This chip has a built-in PLL circuit (a circuit that continuously compares the phase of the input signal with the phase of the local clock and dynamically adjusts the local clock frequency to keep the local clock synchronized with the input signal clock). It extracts the clock signal from the received SPDIF stream. When the local clock is fully synchronized with the transmitting clock, the PLL outputs a lock signal, generating a phase-locked loop flag with a value of "locked" or "unlocked". Simultaneously, the SPDIF receiver chip parses the current transmission sampling rate value from the channel status bit in the received SPDIF stream frame header, generating sampling rate information. These three parameters together constitute the link detection parameters. Separate acquisition of sampling rate information is necessary because subsequent delay compensation calculations require converting the delay in time units into the number of samples. This conversion process directly depends on the sampling rate value. If the sampling rate identification is incorrect, it will lead to deviations in the compensation calculation, resulting in asynchrony between the left and right channels.

[0018] Finally, based on the aforementioned link detection parameters, the link status is comprehensively confirmed to obtain link status information. This is achieved by judging the link access status and phase-locked loop (PLL) flag separately: if the link access status is "connected" and the PLL flag is "locked," the status judgment result is "normal"; if either is abnormal, the status judgment result is "abnormal." Simultaneously, the sampling rate information is compared with a preset sampling rate range. The preset sampling rate range is pre-configured in the device firmware according to the sampling rate set supported by the SPDIF protocol. If the sampling rate information falls within the preset range, the sampling rate comparison result is "passed"; otherwise, it is "failed." Combining the status judgment result and the sampling rate comparison result, only when both results are normal is the link status information confirmed as "link ready," and the system can enter the dual-master stereo pairing mode; otherwise, the link status information is confirmed as "link abnormal," and the device remains in local standalone playback mode. For example, in a specific scenario: after a user connects a coaxial cable to two devices, the AK4118 of the second audio playback device detects a valid SPDIF carrier to confirm the cable connection. The PLL completes clock locking and reports the sampling rate. The control module confirms that all three parameters are normal, and the link status information outputs "link ready," then initiates the subsequent channel separation and pairing process. This comprehensive judgment mechanism effectively avoids erroneous triggering of the pairing mode when the signal quality is insufficient (such as phase-locked loop failure or insufficient sampling rate), even though the cable is physically connected, preventing erroneous audio data from directly passing through the DAC and generating audible noise.

[0019] 102. Based on link status information, use the first audio playback device to perform channel separation on the audio stream to be played, and obtain the first channel data and the second channel data; In this embodiment, the number of channels of the audio stream to be played is identified to obtain channel structure information; based on the channel structure information, the channel mapping relationship between the first channel data and the second channel data is determined; based on the channel mapping relationship, the first channel signal is extracted from the audio stream to be played as the first channel data, and the second channel signal is extracted as the second channel data (based on the channel mapping relationship, extracting the first channel signal from the audio stream to be played as the first channel data and extracting the second channel signal as the second channel data includes: based on the channel mapping relationship, performing channel separation on the audio stream to be played to extract the first channel signal and the second channel signal; performing frequency band separation on the second channel signal to obtain the target frequency band signal; encapsulating the target frequency band signal into the corresponding digital audio channel to obtain the encapsulated second channel data, and using the first channel signal as the first channel data).

[0020] In practical applications, once the link status information confirms "link ready," the SoC of the first audio playback device identifies the number of channels in the audio stream to be played, obtaining channel structure information. Channel structure information describes the number of channels in the current PCM audio stream and their arrangement. For example, the channel structure information for two-channel stereo audio is represented as a two-channel structure of "left channel + right channel." The SoC completes channel number identification by reading the metadata field in the frame header of the PCM data stream. This field is parsed and stored in the SoC's internal register during the audio decoding and decapsulation process; channel number identification can be completed simply by reading the value of this register. Taking a two-channel music playback scenario as an example, if the SoC reads that the number of channels is 2 and the channel arrangement is left and right stereo, the channel structure information is confirmed as a standard two-channel stereo structure. Accurate identification of the channel structure ensures that subsequent channel mapping operations are based on the correct number and arrangement of channels, avoiding incorrect allocation of left and right channel data to two devices due to incorrect channel structure judgment.

[0021] Then, based on the channel structure information, the channel mapping relationship between the first channel data and the second channel data is determined. The channel mapping relationship refers to the corresponding allocation rules between the specific channels in the audio stream to be played and the local playback path of the first audio playback device and the remote transmission path of the wired digital audio link. In other words, it clarifies which channel is played locally by the first audio playback device and which channel is sent to the second audio playback device via the wired digital audio link. In a dual-master stereo pairing scenario, after the user specifies the first audio playback device as the left channel playback end and the second audio playback device as the right channel playback end in the App settings interface, the SoC determines the channel mapping relationship based on this specification: the left channel signal is mapped to the first channel data played locally, and the right channel signal is mapped to the second channel data sent via the wired link. After the channel mapping relationship is determined, it is written to the SoC's audio routing configuration register, and subsequent channel extraction operations are executed directly according to this configuration.

[0022] Finally, based on the channel mapping relationship, the audio routing module inside the SoC performs channel separation on the audio stream to be played. PCM dual-channel data is organized by interleaving the left and right channel sample values ​​according to channel indices. The SoC's hardware channel deinterleaving unit extracts the sample sequences belonging to the left channel and the sample sequences belonging to the right channel from the PCM data frame according to the channel indices, obtaining the first channel signal (left channel sample sequence) and the second channel signal (right channel sample sequence). The two signals are perfectly aligned in time and share the same sampling clock reference. After extracting the second channel signal, if a frequency division playback mode is configured, the second channel signal will also undergo frequency band separation. That is, the second channel signal is split into target frequency band signals, such as high-frequency signals and low-frequency signals, according to preset frequency boundary points using the SoC's built-in digital filter. The target frequency band signal refers to the audio data of each frequency band that needs to be independently driven by the corresponding speaker unit by the second audio playback device after frequency band separation. Each target frequency band signal is then encapsulated into a digital audio subframe channel supported by the SPDIF protocol frame structure, resulting in encapsulated second channel data. This encapsulation rule is synchronously written into the channel status bit of the SPDIF bitstream. The second audio playback device, after parsing the channel status bit at the receiving end, can determine the frequency band information carried by each subframe channel, and thus recover each target frequency band signal according to the same rule, driving the corresponding speaker unit for playback. If a frequency division playback mode is not configured, the extracted right channel sampling sequence is directly used as the encapsulated second channel data, and the left channel sampling sequence is used as the first channel data, entering the subsequent processing paths respectively. The channel separation and frequency band encapsulation process is entirely completed within the SoC of the first audio playback device. The first channel data and the encapsulated second channel data always share the same sampling clock reference, fundamentally eliminating the problem of inconsistent channel data preparation time caused by network scheduling delays in wireless transmission schemes.

[0023] 103. The first channel data is routed to the first local playback path of the first audio playback device, and the second channel data is converted into a different format and sent to the second audio playback device through a wired digital audio link; In this embodiment, the second channel data is encapsulated in I²S format to obtain an I²S digital audio stream; the I²S digital audio stream is then converted to SPDIF format and verified to obtain a serial digital audio stream (the conversion to SPDIF format and verification to obtain a serial digital audio stream includes: performing biphase modulation encoding on the I²S digital audio stream, and performing sampling rate detection and check bit generation on the encoding result to obtain a self-synchronized serial stream; and performing frame format verification on the self-synchronized serial stream to obtain a verified serial digital audio stream); the serial digital audio stream is then sent to the second audio playback device via a wired digital audio link. In addition, before sending the second channel data to the second audio playback device via a wired digital audio link after format conversion, the process includes attaching control signaling to the wired digital audio link: when the first audio playback device performs SPDIF format encoding conversion, it generates volume synchronization parameters and a mute control flag, and encapsulates the volume synchronization parameters and the mute control flag into the user data bits corresponding to the serial digital audio bitstream to obtain a serial digital audio bitstream carrying control signaling; the serial digital audio bitstream carrying control signaling is transmitted to the second audio playback device via the wired digital audio link, and the second audio playback device extracts the volume synchronization parameters and the mute control flag from the user data bits when performing SPDIF decoding recovery; based on the volume synchronization parameters and the mute control flag, the output volume and mute status of the second audio playback device are updated synchronously.

[0024] In practical applications, after channel separation is completed, the first channel data (left channel sampling sequence) is directly sent to the first local playback path by the SoC's audio routing module. The first local playback path refers to the complete signal path within the first audio playback device, from the SoC's audio output port, through the I²S bus to the local DAC, where the DAC converts the digital sampled values ​​into analog audio voltage signals before sending them to the power amplifier module, which ultimately drives the speaker unit to produce sound. The I²S bus (Inter-IC Sound Bus, a serial bus standard designed for short-distance digital audio transmission between chips, consisting of three signal lines: bit clock line BCLK, left / right channel selection line LRCK, and serial data line DATA) undertakes the digital audio transmission task between the SoC and the DAC. When the first channel data is transmitted along this path, it does not undergo any network buffering or additional protocol encapsulation, resulting in the shortest signal path, fixed and predictable transmission delay, and a stable timing reference for the left channel signal played locally by the first audio playback device. This provides a reference for subsequent delay alignment with the right channel signal of the second audio playback device. It is worth noting that the SPDIF encoding output process of the second channel data by the first audio playback device and the output process of the first channel data via the first local playback path are bound to the same audio playback scheduling beat within the SoC. That is, the two output operations are triggered by the same system clock and have the same source time reference. This design ensures that the first channel data and the second channel data have a strictly consistent starting point when leaving the SoC, providing a deterministic timing reference for subsequent delay compensation calculations and fundamentally avoiding the problem of introducing additional uncertain timing errors due to the inconsistent scheduling timing of the two outputs.

[0025] Meanwhile, the second channel data (right channel sampling sequence) enters the format conversion process. First, the second channel data is encapsulated in I²S format according to the I²S bus standard to obtain an I²S digital audio stream. The specific process of I²S format encapsulation is as follows: Under the drive of the BCLK clock signal, the I²S output interface of the SoC serially outputs the right channel PCM sample value bit by bit to the DATA data line. At the same time, at the beginning of each sampling frame, the LRCK signal is set to a low level to indicate that the data of that frame belongs to the right channel (the LRCK signal flips periodically at the sampling rate frequency, with a high level corresponding to the left channel frame and a low level corresponding to the right channel frame, and the receiving end uses this to distinguish the left and right channel data). This forms a standard I²S digital audio stream containing bit clock, channel identifier, and audio data. Subsequently, the I²S digital audio stream is sent to a dedicated digital audio interface conversion chip (such as AK4118) to perform SPDIF format encoding conversion. SPDIF (Sony / Philips Digital Interface, a digital audio transmission standard jointly developed by Sony and Philips, suitable for coaxial cable transmission scenarios) encoding conversion is completed in two steps: First, the conversion chip performs biphase modulation encoding on the I²S digital audio stream, namely BMC encoding (a modulation method that encodes each data bit into two consecutive level states. The encoding rule is: when the data bit is "1", a level transition occurs in the middle of the bit period; when the data bit is "0", no level transition occurs in the middle of the bit period, so that the encoded bit stream carries its own clock information, and the receiving end can directly extract the synchronization clock from the bit stream without an independent clock line). After the encoding is completed, the sampling rate of the encoding result is detected to confirm that the output sampling rate is consistent with the input, and parity bits are generated in each subframe according to the SPDIF protocol specification to obtain a self-synchronized serial bit stream. The self-synchronized serial bit stream refers to a serial data stream in which the clock synchronization information is embedded in the bit stream after BMC encoding. The receiving end can independently extract the clock from the bit stream without the need for an external clock reference. The second step involves the conversion chip verifying the frame format of the self-synchronized serial stream according to the SPDIF frame format specification. It checks frame by frame whether the preamble pattern, auxiliary data bits, and parity bits conform to the SPDIF protocol requirements. Once verification is successful, it outputs the serial digital audio stream. Taking a real-world scenario as an example, the first audio playback device uses the AK4118 chip to complete the above encoding conversion. After outputting a serial digital audio stream conforming to the SPDIF standard, it is sent to the second audio playback device via a coaxial cable through an RCA coaxial interface.The fundamental reason for using SPDIF coaxial wired link transmission is that the transmission delay of the coaxial link is fixed at the sub-millisecond level and is not affected by environmental electromagnetic interference. The link quality is highly stable, which fundamentally eliminates the irregular delay fluctuations introduced by retransmission mechanisms and network jitter in wireless transmission. This allows the audio synchronization error between the two devices to converge to a predictable and fixed range. It should be noted that the wired digital audio link is not limited to the specific implementation of the SPDIF coaxial interface. Without deviating from the core idea of ​​this invention, any wired digital audio interface with low latency and stable transmission characteristics can be applied to this solution. The SPDIF coaxial interface is only one of the preferred implementation methods.

[0026] While performing SPDIF format encoding conversion, the first audio playback device appends control signaling to the serial digital audio stream. The SPDIF protocol frame structure includes a user data bit, which reserves a dedicated channel for the transmission of user-defined data and does not occupy the transmission bandwidth of the audio sampling data. During the SPDIF encoding conversion, the control module of the first audio playback device generates volume synchronization parameters and a mute control flag, and writes both into the user data bit of the corresponding frame of the serial digital audio stream, resulting in a serial digital audio stream carrying control signaling. The volume synchronization parameter refers to the current output volume value of the first audio playback device (e.g., an integer volume level ranging from 0 to 100), and the mute control flag is a control indicator indicating whether the device is currently in a mute state (with a value of "mute" or "not mute"). After the serial digital audio stream carrying control signaling is transmitted to the second audio playback device via a coaxial cable, the SPDIF receiver chip of the second audio playback device, while performing SPDIF decoding and recovery, synchronously extracts the volume synchronization parameters and mute control flag from the user data bits of each received frame of the stream, and sends the extraction results to the volume control module of the second audio playback device. The output volume is updated according to the volume synchronization parameters, and the mute status is updated according to the mute control flag. For example, in a real-world scenario, when a user adjusts the volume from 50 to 30 via an app, the first audio playback device writes the value 30 into the user data bits of the next frame of the SPDIF stream. Upon receiving this frame, the second audio playback device immediately updates its own output volume to 30. The volume changes of the two devices are synchronized within the same transmission frame period. Multiplexing the control signaling to the SPDIF user data bits and transmitting it along with the audio stream avoids the need to establish an independent control communication channel between the two devices. This reduces system hardware complexity while ensuring that the transmission delay of the control commands and audio data is completely consistent, guaranteeing the synchronization accuracy between volume changes and audio playback status.

[0027] 104. Use the second audio playback device to decode and restore the received second channel data, switch the local audio output source of the second audio playback device from the local audio source to the restored second channel data, and route it to the second local playback path; In this embodiment, the SPDIF serial stream received by the second audio playback device via a wired digital audio link is used for clock synchronization to obtain a synchronization clock. Based on the synchronization clock, the second channel data is decoded and frame synchronized to obtain the recovered I²S format second channel data. The recovered I²S format second channel data is subjected to sampling rate detection and frame CRC verification to obtain the detection and verification results. Based on the detection and verification results, the audio output source of the second audio playback device is switched from the local audio source to the recovered I²S format second channel data and routed to the second local playback path. (Switching the audio output source of the second audio playback device from the local audio source to the recovered I²S format second channel data based on the detection and verification results includes: based on the detection and verification results, attenuating the amplitude of the output signal corresponding to the local audio output source of the second audio playback device by a preset step size to obtain a mute transition signal with amplitude attenuated to a preset mute threshold; based on the mute transition signal, the audio output source is switched from the local audio source to the recovered I²S format second channel data and the output signal amplitude is increased by a preset step size to obtain the recovered I²S format second channel data.) In a preferred embodiment, the aforementioned preset step size is dynamically determined using an adaptive gradual step size control mechanism based on the inter-frame RMS amplitude variation. The specific implementation process is as follows: In practical applications, after the second audio playback device receives the SPDIF serial stream from the first audio playback device via a coaxial input interface, the device's built-in SPDIF receiver chip (e.g., AK4118) performs clock synchronization processing on the stream. The specific clock synchronization process is as follows: the AK4118's built-in phase-locked loop circuit continuously monitors the clock transition information carried by the BMC encoding in the received SPDIF stream. By dynamically adjusting the output frequency of its internal voltage-controlled oscillator, it ensures that the frequency and phase of its local clock are completely consistent with the clock of the transmitting end (the first audio playback device), outputting a synchronization clock synchronized with the transmitting end. After the synchronization clock is established, the AK4118 performs BMC decoding bit by bit on the SPDIF stream, restoring each dual-level encoded state to its original data bits, and then splits the continuous data bit sequence into independent audio sampling frames according to the SPDIF frame structure. Frame synchronization processing refers to the AK4118 determining the start position of each frame's data by identifying the preamble pattern at the beginning of each frame in the SPDIF bitstream (the SPDIF protocol specifies a specific and unique level transition sequence at the start of each frame, which differs from the transition pattern of normal data bits; the AK4118 uses this to locate the frame boundary). This ensures that the extraction position of subsequent audio sampling data is perfectly aligned with the frame boundary at the transmitting end. After completing frame boundary positioning, the AK4118 extracts audio sampling data from each frame and restores the channel assignment according to the LRCK channel identifier, finally outputting the restored I²S format second channel data. The advantage of using a wired SPDIF link for clock synchronization is that coaxial transmission has extremely low and stable clock jitter. After the AK4118's phase-locked loop locks in, it can maintain high-precision clock synchronization for a long time. The DAC of the second audio playback device uses this synchronized clock to drive the digital-to-analog converter, and its sampling beat comes from the same clock source as the sampling beat of the local DAC of the first audio playback device, physically ensuring the consistency of the sampling timing of the audio output from the two devices.

[0028] Then, after the AK4118 outputs the recovered I²S format second channel data, it performs sampling rate detection and frame CRC verification on the data to obtain the detection and verification results. The specific process of sampling rate detection is as follows: the AK4118's internal counter counts the number of received audio sampling frames within a fixed time window, converts the counting result into the current actual sampling rate value, and compares it with the sampling rate set pre-configured in the system firmware (pre-written into the device firmware according to the standard sampling rate values ​​supported by the SPDIF protocol) to determine whether the current sampling rate is stable and falls within the preset range. The specific process of frame CRC verification is as follows: the AK4118 recalculates the check value for each frame of I²S data according to the CRC algorithm specified by the SPDIF protocol. The calculation result of the CRC algorithm (cyclic redundancy check, which obtains the remainder as the check value by performing a modulo-2 division operation on the data frame content using a fixed polynomial) is compared bit by bit with the check code attached to the sending end in the frame. If they are completely consistent, the frame data is complete and error-free; otherwise, it is determined to be a frame error. The sampling rate detection results and frame CRC check results for a series of consecutive frames (the specific number of frames is determined according to the device firmware configuration to ensure the reliability of the link stability judgment) are summarized: only when the sampling rate is continuously stable and the CRC check of consecutive frames passes, the detection and check result is confirmed as "check passed", triggering the subsequent audio output source switching; if any one of them is abnormal, the detection and check result is confirmed as "check abnormal", the device maintains the current local audio source output and does not perform switching, to prevent abnormal data from directly passing through the DAC and generating audible noise. Taking a real-world scenario as an example, after the first audio playback device starts sending the right channel SPDIF bitstream, the AK4118 of the second audio playback device completes phase locking and passes multiple frames of CRC checks consecutively. The detection and check result output is "check passed", and then the audio output source switching process is triggered. Performing sampling rate detection and frame CRC dual checks before switching is because relying solely on the phase-locked state to confirm the switching timing is insufficient—phase locking completion only represents clock synchronization, not that the data frame content is correct. Adding frame CRC checks can further confirm the link transmission quality at the data level, avoiding premature switching when the data is not yet stable, which could cause momentary noise.

[0029] After the verification result is confirmed as "verification passed", a gradual switching operation is performed on the audio output source of the second audio playback device. The switching process is divided into two stages, both of which use an adaptive gradual step size control mechanism based on the inter-frame RMS amplitude change to update the output amplitude frame by frame. The preset silence threshold refers to the lowest signal amplitude boundary value that the human ear cannot perceive. The specific execution process of the adaptive gradual step size control mechanism is as follows: First, calculate the root mean square amplitude of the current audio processing frame. The calculation formula is: ; Where k is the index of the current audio processing frame, N is the number of sampling points per frame (determined by the length of the audio processing cycle, for example, N=48 when the sampling rate is 48kHz and the frame length is 1ms), and s(kN+i) is the (kN+i)th audio sample value (normalized or integer PCM value). The root mean square amplitude of the k-th frame reflects the overall energy level of that frame. The second step is to calculate the inter-frame amplitude variation. The calculation formula is: ; in Let ΔA be the RMS amplitude change between the k-th frame and the previous frame, reflecting the transient intensity of the signal. Percussion attack segments have a large ΔA, while string sustained notes have a small ΔA. The third step is to calculate the adaptive gradual step size μ(k) based on the inter-frame amplitude change ΔA(k). The calculation formula is as follows: ; Where μ(k) is the adaptive gradient step size of the k-th frame (normalized gain unit / frame), and μ0 is the base step size (i.e., the upper limit value that the adaptive gradient step size μ(k) approaches when the signal is completely stationary (ΔA(k) approaches zero), which is calibrated and stored in the firmware according to the target transition time during the production testing phase). For adaptive coefficients ( >0 controls the modulation intensity of the inter-frame variation on the step size. The larger the value, the stronger the transient suppression. ref This serves as a normalized reference amplitude base (typically the full-scale amplitude, e.g., 2²³ = 8388608 for a 24-bit PCM). When When μ approaches zero (signal stability), μ(k) approaches μ0, the step size is the largest, and the fading is the fastest; when... When the signal transients are large, the denominator increases, the step size automatically decreases, and the fade-out slows down to avoid step distortion. The fourth step involves updating the output amplitude gain coefficient G(k) frame-by-frame based on the adaptive gradual step size μ(k). G(k) is the output amplitude gain coefficient for the k-th frame, with a value range of [0,1]. Multiplying G(k) by the PCM sample value yields the actual output amplitude. The update formula for the fade-out phase (local audio source attenuates to mute) is: The update formula for the fade-in phase (where the second channel data is gradually increased to the target volume after recovery) is: G min G is the gain value corresponding to the preset mute threshold. target The gain value corresponding to the target playback volume (given by the volume control module) is specified. In the first stage (fade-out stage), the volume control module of the second audio playback device updates the amplitude gain coefficient of the current local audio source's output signal frame by frame according to the aforementioned adaptive gradual step size control mechanism. Each frame, G(k) is reduced by μ(k) until G(k) drops to G...min This yields a mute transition signal whose amplitude decays to a preset mute threshold. In the second stage, as G(k) decreases to G... min Subsequently, the I²S switching module (a hardware multiplexer circuit responsible for selecting which I²S signal to send to the DAC within the second audio playback device) switches the audio output source from the I²S output by the local SoC to the second channel data in I²S format recovered by the AK4118. Then, the volume control module updates the amplitude gain coefficient of the recovered I²S format second channel data frame by frame according to an adaptive gradual step size control mechanism, increasing G(k) by μ(k) each frame until G(k) reaches G target This completes the fade-in transition. For example, setting the parameters to frame length N=48 (sampling rate 48kHz, frame length 1ms), μ0=0.05, =10, A ref Take the normalized full-scale value as 1.0. Scenario 1: Stable signal (long string note). =0.30, =0.29, =0.01, μ(k)=0.05 / (1+10×0.01)≈0.0455, the step size is close to the base value, and the fade-out transition is completed in about 11 frames (11ms), with a rapid and transparent switch. Scenario 2: Severe signal transients (drum attack segment). =0.80, =0.45, =0.35, μ(k)=0.05 / (1+10×0.35)≈0.011, the step size is automatically reduced to about 22% of the base value, the fade-out speed is significantly slowed down, and amplitude step distortion is effectively avoided at high-energy transients. Compared with a fixed step size, the adaptive gradual step size control mechanism minimizes the switching transition time when the signal is stable, and automatically reduces the step size to prevent popping when the signal transients are severe. The same set of parameters can adapt to different music styles such as percussion, pop, and classical without classifying the music genre. In addition, the algorithm runs in the switching transition phase, and does not overlap or interfere with the delay estimation dynamic update algorithm in step 207 in terms of timing. μ0 and It can be calibrated independently with the preset basic step size α and preset jitter suppression coefficient λ in step 207, which facilitates optimization for different models of equipment and reduces the adaptation cost of multiple product lines.

[0030] 105. Obtain the transmission delay of the wired digital audio link, insert the corresponding delay compensation amount into the first local playback path based on the transmission delay, and output the compensated first channel data and the restored second channel data synchronously through the second local playback path.

[0031] In this embodiment, in addition to synchronously outputting and playing the compensated first channel data via the first local playback path and the restored second channel data via the second local playback path, the method further includes the following steps: detecting the connection status corresponding to the wired digital audio link to obtain the link detection result, the connection status including phase-locked state, frame synchronization state and sampling rate information; comparing the link detection result with a preset anomaly judgment condition, if the link detection result meets the preset anomaly judgment condition, then attenuating the output amplitude of the second local playback path to a muted state, and pausing the routing of the restored I²S format second channel data to the second local playback path; after the output amplitude is attenuated to a muted state, switching the audio output source of the second audio playback device from the restored I²S format second channel data back to the local audio source, and routing it to the second local playback path. Secondly, after synchronously outputting the compensated first channel data via the first local playback path and the restored second channel data via the second local playback path, the process further includes a step of reassigning the playback roles of the first and second audio playback devices: obtaining a pairing setting instruction, and based on the pairing setting instruction, switching the second audio playback device to a distribution device and the first audio playback device to a receiving device; on the distribution device side, performing channel separation on the audio stream to be played, sending the second channel data to the receiving device via a wired digital audio link after format conversion, and routing the first channel data to the local playback path of the distribution device; on the receiving device side, decoding and restoring the received digital audio stream, switching the audio output source to the restored first channel data and routing it to the local playback path, and re-obtaining the transmission delay of the wired digital audio link, converting the transmission delay into an updated delay compensation amount, and inserting it into the delay buffer in the local playback path of the distribution device.

[0032] In practical applications, after the second audio playback device completes the audio output source switching and begins playing the restored I²S format second channel data, it is necessary to measure the timing difference between the first local playback path of the first audio playback device and the second local playback path of the second audio playback device to obtain the transmission delay of the wired digital audio link. The transmission delay is obtained by measuring the delay of three paths: the first is the local path delay of the first audio playback device, i.e., the time it takes for the first channel data to be sent from the SoC audio output port via the I²S bus to the local DAC for digital-to-analog conversion and output; the second is the remote output path delay of the first audio playback device, i.e., the time it takes for the second channel data to be sent from the SoC audio output port via the I²S bus to the AK4118 class converter chip for SPDIF encoding and output from the coaxial interface; the third is the decoding path delay of the second audio playback device, i.e., the time it takes for the SPDIF serial stream to complete clock recovery, BMC decoding, and frame synchronization processing from the coaxial input interface via the AK4118 to output the restored I²S format second channel data. The delays of the three paths mentioned above were calibrated during the production testing phase. Specifically, test audio frames with known timestamps were injected into the input of each path on the production testing fixture. The actual arrival time of the test audio frame was captured at the output of each path. The fixed delay value of the corresponding path was obtained by subtracting the input timestamp from the output arrival time. The calibration results were stored in the configuration area of ​​the device firmware in units of sampling points. The device could be read and used directly after powering on without needing to be remeasured each time it was run.

[0033] After obtaining the delays of the three paths, the delay compensation amount is calculated and inserted into the delay buffer in the first local playback path according to the following steps. First, the remote output path delay of the first audio playback device is summed with the decoding path delay of the second audio playback device to obtain the total remote link delay. The total remote link delay represents the complete transmission time of the second channel data from the SoC output to the DAC input of the second audio playback device. Second, the total remote link delay is subtracted from the local path delay of the first audio playback device to obtain the delay difference value. This delay difference value is the fixed time deviation of the second local playback path relative to the first local playback path, which is the amount of time by which the right channel signal arrives at the DAC input later than the left channel signal without any compensation. Subsequently, the delay difference value is multiplied by the current sampling rate information and rounded to convert the delay difference value in time units into a delay compensation amount in units of sampling points. Taking a production testing calibration scenario as an example, if the measured total delay of the remote link is more than the local path delay by a fixed time deviation, under the condition of a sampling rate of 48000Hz, this time deviation multiplied by 48000 and rounded down gives the delay compensation amount (in terms of the number of sampling points) that needs to be inserted into the first local playback path. The conversion result is then written to the depth configuration register of the delay buffer inside the first audio playback device SoC, completing the insertion of the delay compensation amount. The delay buffer refers to a configurable depth digital audio data buffer queue set on the audio output path inside the first audio playback device SoC. After the first channel data is written to the delay buffer, it waits for the corresponding number of sampling points according to the number of sampling points stored in the depth configuration register before being read out and sent to the local DAC. Its effect is to artificially delay the output time of the first local playback path by the time length corresponding to the delay compensation amount. The configurable feature of the depth configuration register ensures that different device combinations and different link configurations can be adapted to the actual delay by rewriting the calibration value without modifying the hardware circuit.

[0034] After the delay compensation is inserted, the compensated first-channel data is sent to the local DAC of the first audio playback device via the first local playback path, and the restored I²S format second-channel data is sent to the local DAC of the second audio playback device via the second local playback path. The two signals synchronously complete digital-to-analog conversion and drive their respective power amplifier modules to output to the speaker units, achieving synchronous output playback of the left and right channels. Since the transmission delay of the coaxial wired link is fixed at the sub-millisecond level and is not affected by environmental electromagnetic interference, the time deviation corresponding to the delay compensation is extremely small, and the waiting time of the first-channel data in the delay buffer is extremely short. The overall end-to-end latency of the system is significantly lower than that of the wireless dual-speaker solution that relies on wireless transmission and requires tens of milliseconds of synchronization buffer. Taking a real listening scenario as an example, the left channel signal, after delay compensation, arrives at the user's listening position almost simultaneously with the right channel signal, resulting in a stable, centered sound image and a significantly improved audio-visual synchronization experience in games and video scenarios.

[0035] In addition, during the dual-master stereo pairing playback, the connection status of the wired digital audio link is continuously monitored to obtain the link detection results. The connection status detection is performed in real-time by the AK4118 receiver chip of the second audio playback device, specifically detecting three parameters: phase-locked loop (whether the AK4118's phase-locked loop continuously maintains lock on the transmitting clock; loss of lock indicates an interruption of the link clock signal), frame synchronization (whether the AK4118 can continuously identify the preamble pattern in the SPDIF bitstream to maintain frame boundary positioning; loss of frame synchronization indicates a serious bitstream error or interruption), and sampling rate information (whether the currently received sampling rate is consistent with the sampling rate recorded when pairing was established). These three parameters are reported in real-time to the corresponding control module of the second audio playback device, which compares the link detection results with preset anomaly judgment conditions. The preset anomaly judgment conditions are the link anomaly judgment rules pre-written into the device firmware. Specifically, the following conditions are triggered: the phase-locked loop loses lock, or the AK4118 continuously reports the frame synchronization loss state to reach the continuous abnormal frame number threshold configured in the firmware (this threshold is written into the firmware according to the link stability requirements during the production test stage to distinguish between occasional single frame errors and continuous link failures), or the sampling rate jumps. Any one of these three conditions is judged as a link anomaly. Taking a real-world scenario as an example, if a user accidentally unplugs the coaxial cable during playback, the AK4118 detects a loss of lock in the phase-locked loop (PLL). The link detection result meets the preset anomaly judgment conditions, and the control module immediately executes the protection procedure: the output amplitude of the second local playback path is gradually attenuated to a silent state using corresponding gradual step sizes. Simultaneously, the routing of the recovered I²S format second channel data to the second local playback path is paused to prevent erroneous data output by the AK4118 after lockout from directly passing through the DAC and causing popping noises. After the output amplitude has completely attenuated to a silent state, the I²S switching module switches the audio output source of the second audio playback device from the recovered I²S format second channel data back to the local audio source, routing it to the second local playback path. The second audio playback device then returns to independent standalone playback mode. Continuous detection, rather than just a single detection during pairing establishment, ensures that the system can respond to link anomalies and safely back off at any time during playback, preventing link failures from causing the second audio playback device to enter a silent output state.

[0036] Furthermore, after completing the dual-master stereo pairing and playback, it also supports reassigning the playback roles of the two devices. When the user issues a role swap operation in the App settings interface, the pairing settings command is obtained, switching the original second audio playback device to the distribution device and the original first audio playback device to the receiving device. The distribution device refers to the device responsible for audio decoding, channel separation, and remote digital audio transmission in the current pairing session, while the receiving device refers to the device responsible for receiving the SPDIF bitstream, completing decoding and recovery, and driving the local speakers to play the corresponding channels. After the roles are reassigned, on the distribution end device (formerly the second audio playback device), its SoC re-executes channel separation on the currently playing audio stream. The second channel data is converted from I²S to SPDIF format and sent to the receiving end device via a wired digital audio link. The first channel data is routed to the distribution end device's own local playback path. On the receiving end device (formerly the first audio playback device), its AK4118 performs clock synchronization, data decoding, and frame synchronization processing on the received digital audio stream. After decoding and recovery, the audio output source is switched to the recovered first channel data and routed to the local playback path. After the role swap, the control module of the current distribution end device (formerly the second audio playback device) rereads the three-segment path delay calibration values ​​stored in the firmware. It recalculates the updated delay compensation by subtracting the total delay of the remote link from the local path delay, multiplying by the sampling rate, and rounding down. The updated delay compensation is then written to the delay buffer depth configuration register in the distribution end device's local playback path, re-aligning the local channel output time of the distribution end device with the channel output time of the receiving end device. Taking a real-world scenario as an example, after adjusting the placement of the desktop speakers, the user performs a role swap in the App. After completing the above process, the original right speaker becomes the new distribution end and the original left speaker becomes the new receiving end. The latency compensation is updated synchronously. There is no need to replace hardware or rewire. The equivalent physical capabilities of the two devices ensure that either one can assume any role.

[0037] In this embodiment of the invention, by establishing a wired digital audio transmission link between two main speaker devices with full processing capabilities, and replacing the wireless synchronization buffer architecture with a channel separation, format conversion, and sample-level delay compensation mechanism, the technical problems of unstable playback delay and difficulty in converging synchronization errors in existing dual-main speaker stereo systems that rely on wireless networks for channel synchronization are solved. This achieves low-latency, high-synchronization-precision wired stereo playback between the two main speaker devices, effectively improving the stability of sound image positioning and listening consistency of the system in time-sensitive scenarios.

[0038] Please see Figure 2 The second embodiment of the dual-master wired stereo audio synchronous playback method in this invention includes: 201. Obtain the audio stream to be played and detect the connection status of the wired digital audio link between the first audio playback device and the second audio playback device to obtain the link status information; 202. Based on link status information, use the first audio playback device to perform channel separation on the audio stream to be played, and obtain the first channel data and the second channel data; 203. The first channel data is routed to the first local playback path of the first audio playback device, and the second channel data is converted into a different format and sent to the second audio playback device through a wired digital audio link; 204. Use the second audio playback device to decode and restore the received second channel data, switch the local audio output source of the second audio playback device from the local audio source to the restored second channel data, and route it to the second local playback path; 205. Obtain the local path delay of the first audio playback device, the remote output path delay of the first audio playback device, and the decoding path delay of the second audio playback device, respectively. In this embodiment, obtaining the local path latency of the first audio playback device, the remote output path latency of the first audio playback device, and the decoding path latency of the second audio playback device includes: during the production testing phase, performing latency calibration measurements on the local path, remote output path, and decoding path of the first audio playback device, and storing the measurement results as initial fixed latency parameters in the device; during the operation phase, using the initial fixed latency parameters as the initial value of the latency compensation amount, and continuously correcting the latency compensation amount in conjunction with the corresponding dynamic update mechanism.

[0039] In practical applications, the three-segment path delay is obtained through calibration measurement during the production testing phase. The specific calibration measurement process is as follows: On the production test fixture, a test PCM audio frame with a precise timestamp is injected into the SoC audio output port of the first audio playback device. The actual arrival time of the test audio frame is captured at the DAC input of the local path and the coaxial interface output of the remote output path, respectively. The difference between each capture time and the injected timestamp is used to obtain the calibration values ​​of the local path delay (i.e., the time for the first channel data to be output from the SoC to the local DAC input) and the remote output path delay (i.e., the time for the second channel data to be output from the SoC, pass through the I²S bus to the AK4118 to complete SPDIF encoding and be output from the coaxial interface). Similarly, the same timestamped test signal is injected into the coaxial input interface of the second audio playback device. The arrival time of the recovered data frame is captured at the I²S output of the AK4118. The difference between the capture time and the injected timestamp is used to obtain the calibration value of the decoding path delay (i.e., the time for the SPDIF bitstream to complete clock recovery, BMC decoding, and frame synchronization processing from the coaxial input interface through the AK4118 to the I²S output). The three delay calibration values, recorded in milliseconds, are stored in the non-volatile memory area of ​​the device firmware as initial fixed delay parameters. After the device powers on and enters the dual-master stereo pairing mode, the control module directly reads the initial fixed delay parameters from the firmware storage area and converts them into sampling point counts in the subsequent delay compensation conversion step. The reason for completing the calibration during the production testing phase is that the fixed delay of the coaxial wired link is determined by the number of chip processing stages and circuit transmission stages, which has a high degree of consistency across devices of the same model. A single production testing calibration can cover all factory-shipped devices of that model, providing a reliable initial benchmark for the dynamic update mechanism, while avoiding the startup delay caused by re-measuring each time the device is powered on.

[0040] 206. Sum the remote output path delay and the decoding path delay to obtain the total remote link delay, and subtract the total remote link delay from the local path delay to obtain the delay difference. In this embodiment, after obtaining the initial fixed delay parameters of the three path delays, the delay difference is calculated and converted into a delay compensation amount according to the following steps. The remote output path delay of the first audio playback device is added to the decoding path delay of the second audio playback device to obtain the total remote link delay. The total remote link delay represents the complete transmission time of the second channel data from the SoC output of the first audio playback device to the DAC input of the second audio playback device. Then, the total remote link delay is subtracted from the local path delay of the first audio playback device to obtain the delay difference. This delay difference is the fixed time deviation of the second local playback path relative to the first local playback path, which is the amount of time the right channel signal arrives at its respective DAC input later than the left channel signal without any compensation.

[0041] 207. Multiply the delay difference by the sampling rate information and round down to obtain the delay compensation amount, and insert the delay compensation amount into the delay buffer in the first local playback path.

[0042] In this embodiment, inserting the delay compensation amount into the delay buffer in the first local playback path includes: obtaining the measured delay value of the wired digital audio link, and subtracting the measured delay value from the delay compensation amount to obtain the delay deviation; calculating the delay update step size based on the delay deviation and a preset jitter suppression coefficient, and adding the product of the delay update step size and the delay deviation to the delay compensation amount to obtain the estimated delay compensation amount; rounding the estimated delay compensation amount to obtain the updated delay compensation amount, and updating the delayed compensation amount into the delay buffer in the first local playback path (calculating the delay update step size based on the delay deviation and a preset jitter suppression coefficient, and adding the product of the delay update step size and the delay deviation to the delay compensation amount to obtain the estimated delay compensation amount includes: squaring the delay deviation, multiplying the square of the delay deviation by the preset jitter suppression coefficient and adding one to obtain the jitter suppression factor; dividing the preset base step size by the jitter suppression factor to obtain the delay update step size; multiplying the delay update step size by the delay deviation to obtain the delay estimation correction amount, and adding the delay estimation correction amount to the delay compensation amount to obtain the estimated delay compensation amount). Furthermore, both the preset base step size and the preset jitter suppression coefficient are configurable parameters. The dual-main-box wired stereo audio synchronous playback method also includes: during the production testing phase, the preset base step size and the preset jitter suppression coefficient are independently calibrated according to the link characteristics of the specific wired digital audio link, and the calibration results are stored in the device; during the operation phase, the above-mentioned delay update step size calculation is performed based on the stored calibration results, and the preset base step size and the preset jitter suppression coefficient can be dynamically adjusted during operation to adapt to the link characteristics of different product models.

[0043] In practical applications, the delay difference is multiplied by the current sampling rate information and rounded down. This converts the delay difference in time units into a delay compensation amount in units of sampling points. For example, under a sampling rate of 48000Hz, a delay difference of 0.4ms corresponds to a delay compensation amount of 0.4 × 10⁻⁶. -3 ×48000 = 19.2, rounded down to 19 sampling points. This delay compensation amount is then used as the initial value. Write the delay buffer depth configuration register in the first local playback path. The delay buffer refers to a configurable depth digital audio data buffer queue set on the audio output path inside the first audio playback device SoC. After the first channel data is written to the delay buffer, it must wait for the number of sampling points corresponding to the delay compensation amount before it is read out and sent to the local DAC. Its effect is to artificially delay the output time of the first local playback path by the time length corresponding to the delay compensation amount, so that the actual arrival time of the left channel signal at the DAC is aligned with the actual arrival time of the right channel signal at the DAC.

[0044] After the initial delay compensation amount is written to the delay buffer, a dynamic update mechanism is initiated to continuously correct the delay compensation amount. The dynamic update involves three stages: deviation definition, link delay estimation update, and compensation output, which are explained in turn below. First, the deviation definition is executed. This is done by periodically acquiring the measured delay value of the wired digital audio link. The measured latency value is obtained as follows: The first audio playback device locally records the transmission time of a specific SPDIF test frame sent to the coaxial interface. The AK4118 of the second audio playback device detects the time when the test frame recovery is completed at the I²S output terminal, and transmits the reception time back to the first audio playback device through the existing LAN control channel between the two devices. The first audio playback device calculates the difference between the reception time and the transmission time to obtain the measured latency value. (Based on the number of sampling points). The measured delay value... Estimated delay compensation amount compared to the previous period By subtracting the values, we obtain the delay deviation. The formula for defining the deviation is: ,in This represents the difference between the current measurement and the estimated value from the previous period (unit: number of sampling points). This represents the measured remote link latency (number of sampling points) for this period. This is the estimated delay compensation amount (number of sampling points) for the previous period. A latency close to zero indicates stable link latency. A sudden increase indicates link jitter or a single abnormal measurement.

[0045] Then, the delay deviation is obtained. Then, the link delay estimate is updated. The specific calculation steps are as follows: Performing the square operation yields ,Will Multiply by the preset jitter suppression coefficient λ and add one to obtain the jitter suppression factor ( Divide the preset base step size α by the jitter suppression factor to obtain the effective learning rate, which is the delayed update step size. Delay update step size and Multiplying them yields the delay estimate correction, which is then added to the current estimate. The estimated delay compensation amount is obtained. The link delay estimation update formula is: ; in This represents the estimated delay compensation amount after the nth update (unit: number of sampling points). The number of sampling points is the estimated value from the previous cycle. α is the preset base step size (0 < α ≤ 1, controlling the tracking speed; a larger α results in faster tracking but greater sensitivity to noise). λ is the preset jitter suppression coefficient (λ > 0, controlling the suppression of large deviations; a larger λ results in stronger suppression of abnormal measurements). Effective learning rate. Its adaptive characteristics enable the algorithm to continuously track slow changes such as temperature drift at a rate close to α when the link is stable, and at δ n When the value suddenly increases, the learning rate is automatically reduced to keep the estimated value stable, thus avoiding large jumps in compensation caused by a single abnormal measurement.

[0046] Finally, perform the compensation output. Estimate the delay compensation amount. Perform a rounding operation to obtain the updated latency compensation amount finally written to the latency buffer depth configuration register. The compensation output formula is: ,in The final number of compensation sample points applied to the delay buffer of the first local playback path. This is for rounding to the nearest integer. The reason for rounding is that the delay buffer depth configuration register uses integer sample points as its unit and cannot accept decimal input; the rounded value is used for this purpose. This is the actual compensation amount for the inserted delay buffer in this cycle. Verification is performed using a specific numerical scenario: sampling rate 48000Hz, α=0.1, λ=2.0, initial values ​​for production testing calibration. =19.2 sampling points; Scenario 1, normal link with slight drift. =19.5 sampling points, =19.5-19.2=0.3, =19.2+0.1 / (1+2×0.09)×0.3≈19.23, C1=round(19.23)=19, the compensation only corrects 0.03 sampling points, and the tracking is stable; Scenario 2, poor cable contact leads to abnormal measurement, =25.0 sampling points, =25.0-19.23=5.77, =19.23+0.1 / (1+2×33.3)×5.77≈19.24, C2=round(19.24)=19, the effective learning rate drops to about 0.0015, the estimated value remains almost unchanged, outlier measurements are effectively masked, and audible noise is avoided.

[0047] Both the preset base step size α and the preset jitter suppression coefficient λ are configurable parameters. During production testing, they are independently calibrated based on the specific characteristics of the wired digital audio link (including fixed latency, temperature drift rate, and typical jitter amplitude). The calibration results are stored in the non-volatile storage area of ​​the device firmware and can be directly read and used during operation. α and λ also support dynamic adjustment via control commands during runtime to adapt to the differences in link characteristics between different product models. Parameter adaptation can be completed without modifying the firmware, reducing the adaptation cost for multiple product lines. After the above dynamic update is completed, the updated latency compensation amount C... n The delay buffer depth configuration register is continuously written to the first local playback path. The compensated first channel data is sent to the local DAC of the first audio playback device for digital-to-analog conversion via the first local playback path. The restored I²S format second channel data is sent to the local DAC of the second audio playback device for digital-to-analog conversion via the second local playback path. The two signals drive their respective power amplifier modules to output to the speaker units, achieving synchronous output playback of the left and right channels. Because the delay compensation is continuously and dynamically corrected during operation, the system can automatically compensate for slow delay changes caused by temperature drift during long-term operation, maintaining the continuous synchronization accuracy of the left and right channels.

[0048] In this embodiment of the invention, by establishing a wired digital audio transmission link between two main speaker devices with full processing capabilities, and replacing the wireless synchronization buffer architecture with a channel separation, format conversion, and sample-level delay compensation mechanism, the technical problems of unstable playback delay and difficulty in converging synchronization errors in existing dual-main speaker stereo systems that rely on wireless networks for channel synchronization are solved. This achieves low-latency, high-synchronization-precision wired stereo playback between the two main speaker devices, effectively improving the stability of sound image positioning and listening consistency of the system in time-sensitive scenarios.

[0049] The above describes the method for synchronous playback of wired stereo audio from dual main speakers in an embodiment of the present invention. The following describes the device for synchronous playback of wired stereo audio from dual main speakers in an embodiment of the present invention. Please refer to [link / reference]. Figure 3 One embodiment of the dual-master wired stereo audio synchronous playback device of the present invention includes: The link detection module 301 is used to acquire the audio stream to be played and detect the connection status of the wired digital audio link between the first audio playback device and the second audio playback device to obtain link status information. The channel separation module 302 is used to perform channel separation on the audio stream to be played using the first audio playback device based on the link status information, so as to obtain first channel data and second channel data. The encoding and transmission module 303 is used to route the first channel data to the first local playback path of the first audio playback device, and to convert the format of the second channel data and send it to the second audio playback device through the wired digital audio link. The decoding switching module 304 is used to decode and restore the received second channel data using the second audio playback device, switch the local audio output source of the second audio playback device from the local audio source to the restored second channel data and route it to the second local playback path; The delay synchronization module 305 is used to obtain the transmission delay of the wired digital audio link, insert a corresponding delay compensation amount into the first local playback path based on the transmission delay, and synchronously output and play the compensated first channel data through the first local playback path and the restored second channel data through the second local playback path.

[0050] In this embodiment of the invention, by establishing a wired digital audio transmission link between two main speaker devices with full processing capabilities, and replacing the wireless synchronization buffer architecture with a channel separation, format conversion, and sample-level delay compensation mechanism, the technical problems of unstable playback delay and difficulty in converging synchronization errors in existing dual-main speaker stereo systems that rely on wireless networks for channel synchronization are solved. This achieves low-latency, high-synchronization-precision wired stereo playback between the two main speaker devices, effectively improving the stability of sound image positioning and listening consistency of the system in time-sensitive scenarios.

[0051] above Figure 3 The dual-master wired stereo audio synchronous playback device in this embodiment of the invention is described in detail from the perspective of modular functional entities. The dual-master wired stereo audio synchronous playback device in this embodiment of the invention is described in detail below from the perspective of hardware processing.

[0052] Figure 4This is a schematic diagram of a dual-master wired stereo audio synchronous playback device 400 provided in an embodiment of the present invention. The dual-master wired stereo audio synchronous playback device 400 can vary significantly due to different configurations or performance characteristics. It may include one or more central processing units (CPUs) 410 (e.g., one or more processors) and a memory 420, and one or more storage media 430 (e.g., one or more mass storage devices) storing application programs 433 or data 432. The memory 420 and storage media 430 can be temporary or persistent storage. The program stored in the storage media 430 may include one or more modules (not shown in the diagram), each module may include a series of instruction operations on the dual-master wired stereo audio synchronous playback device 400. Furthermore, the processor 410 may be configured to communicate with the storage media 430 and execute the series of instruction operations in the storage media 430 on the dual-master wired stereo audio synchronous playback device 400.

[0053] The dual-main-speaker wired stereo audio synchronous playback device 400 may also include one or more power supplies 440, one or more wired or wireless network interfaces 450, one or more input / output interfaces 460, and / or one or more operating systems 431, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc. Those skilled in the art will understand that... Figure 4 The illustrated dual-master wired stereo audio synchronous playback device structure does not constitute a limitation on dual-master wired stereo audio synchronous playback devices. It may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0054] The present invention also provides a dual-master wired stereo audio synchronous playback device. The computer device includes a memory and a processor. The memory stores computer-readable instructions. When the computer-readable instructions are executed by the processor, the processor performs each step of the dual-master wired stereo audio synchronous playback method in the above embodiments.

[0055] The present invention also provides a computer-readable storage medium, which can be a non-volatile computer-readable storage medium or a volatile computer-readable storage medium, wherein the computer-readable storage medium stores instructions that, when the instructions are executed on a computer, cause the computer to perform each step of the dual-master wired stereo audio synchronous playback method.

[0056] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0057] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0058] This application can be used in a wide variety of general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices. This application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform specific tasks or implement specific abstract data types. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0059] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for synchronized playback of wired stereo audio from dual main speakers, applied to an audio synchronization playback system, the audio synchronization playback system comprising a first audio playback device and a second audio playback device, characterized in that... The dual-master box wired stereo audio synchronous playback method includes: Acquire the audio stream to be played and detect the connection status of the wired digital audio link between the first audio playback device and the second audio playback device to obtain link status information; Based on the link status information, the first audio playback device is used to perform channel separation on the audio stream to be played to obtain first channel data and second channel data. The first channel data is routed to the first local playback path of the first audio playback device, and the second channel data is converted into a format and then sent to the second audio playback device through the wired digital audio link; The second audio playback device is used to decode and restore the received second channel data, and the local audio output source of the second audio playback device is switched from the local audio source to the restored second channel data and routed to the second local playback path; The transmission delay of the wired digital audio link is obtained, and a corresponding delay compensation amount is inserted into the first local playback path based on the transmission delay. The compensated first channel data and the restored second channel data are synchronously output and played through the first local playback path and through the second local playback path. The step of obtaining the transmission delay of the wired digital audio link and inserting a corresponding delay compensation amount into the first local playback path based on the transmission delay includes: obtaining the local path delay of the first audio playback device, the remote output path delay of the first audio playback device, and the decoding path delay of the second audio playback device; summing the remote output path delay and the decoding path delay to obtain the total remote link delay, and subtracting the total remote link delay from the local path delay to obtain a delay difference; multiplying the delay difference with the sampling rate information of the wired digital audio link and rounding to obtain a delay compensation amount, and inserting the delay compensation amount into the delay buffer in the first local playback path.

2. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 1, characterized in that, The step of acquiring the audio stream to be played and detecting the connection status of the wired digital audio link between the first audio playback device and the second audio playback device to obtain link status information includes: The input audio signal is de-encapsulated and decoded to obtain a unified audio stream to be played. The wired digital audio link is subjected to cable connection detection and receiver phase-locked state detection to generate link detection parameters; The link detection parameters are verified and monitored to obtain link status information.

3. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 2, characterized in that, The link detection parameters also include link access status, phase-locked loop (PLL) flag, and sampling rate information. The link status information obtained by confirming and monitoring the link detection parameters includes: The access status of the link and the phase-locked flag are judged separately to determine the access status and the locking status, respectively, and the status determination results are obtained. The sampling rate information is compared with a preset sampling rate range to obtain the sampling rate comparison result; Based on the state determination result and the sampling rate comparison result, the link state information is obtained.

4. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 1, characterized in that, The step of performing channel separation on the audio stream to be played using the first audio playback device based on the link status information to obtain first channel data and second channel data includes: The audio stream to be played is subjected to channel number identification to obtain channel structure information; Based on the channel structure information, determine the channel mapping relationship between the first channel data and the second channel data; Based on the channel mapping relationship, the first channel signal is extracted from the audio stream to be played as the first channel data, and the second channel signal is extracted as the second channel data.

5. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 4, characterized in that, The step of extracting the first channel signal as the first channel data and the second channel signal as the second channel data from the audio stream to be played based on the channel mapping relationship includes: Based on the aforementioned channel mapping relationship, the audio stream to be played is subjected to channel separation to extract the first channel signal and the second channel signal; The second channel signal is subjected to frequency band separation to obtain the target frequency band signal; The target frequency band signal is encapsulated into the corresponding digital audio channel to obtain the encapsulated second channel data, and the first channel signal is used as the first channel data.

6. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 1, characterized in that, The step of converting the format of the second channel data and sending it to the second audio playback device via the wired digital audio link includes: The second channel data is encapsulated in I²S format to obtain an I²S digital audio stream; The I²S digital audio stream is converted to SPDIF format and the audio bitstream is verified to obtain a serial digital audio bitstream; The serial digital audio stream is transmitted to the second audio playback device via the wired digital audio link.

7. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 6, characterized in that, The step of performing SPDIF format encoding conversion and audio bitstream verification on the I²S digital audio stream to obtain a serial digital audio bitstream includes: The I²S digital audio stream is subjected to biphase modulation encoding, and the encoding result is subjected to sampling rate detection and parity bit generation to obtain a self-synchronized serial code stream; The frame format of the self-synchronized serial bitstream is verified to obtain the verified serial digital audio bitstream.

8. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 1, characterized in that, The step of decoding and restoring the received second channel data using the second audio playback device, and switching the local audio output source of the second audio playback device from the local audio source to the restored second channel data, includes: The second audio playback device uses the SPDIF serial stream received via the wired digital audio link to perform clock synchronization, obtains a synchronization clock, and performs data decoding and frame synchronization processing on the second channel data based on the synchronization clock to obtain the recovered I²S format second channel data. The sampling rate of the recovered I²S format second channel data is detected and frame CRC is checked to obtain the detection and verification results. Based on the detection and verification results, the audio output source of the second audio playback device is switched from the local audio source to the recovered I²S format second channel data.

9. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 8, characterized in that, The step of switching the audio output source of the second audio playback device from the local audio source to the restored I²S format second channel data based on the detection and verification results includes: Based on the detection and verification results, the amplitude of the output signal corresponding to the local audio output source of the second audio playback device is attenuated by a preset step size to obtain a mute transition signal whose amplitude is attenuated to a preset mute threshold. Based on the mute transition signal, the audio output source is switched from the local audio source to the restored I²S format second channel data, and the output signal amplitude is increased by a preset step size to obtain the restored I²S format second channel data.

10. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 1, characterized in that, The step of inserting the delay compensation amount into the delay buffer in the first local playback path includes: Obtain the measured delay value of the wired digital audio link, and subtract the measured delay value from the delay compensation amount to obtain the delay deviation amount; The delay update step size is calculated based on the delay deviation and the preset jitter suppression coefficient, and the product of the delay update step size and the delay deviation is added to the delay compensation amount to obtain the estimated delay compensation amount. The estimated delay compensation amount is rounded down to obtain the updated delay compensation amount, and the updated delay compensation amount is then used to update the delay buffer in the first local playback path.

11. The method for synchronous playback of wired stereo audio from dual main speakers according to claim 10, characterized in that, The step of calculating the delay update step size based on the delay deviation and the preset jitter suppression coefficient, and then adding the product of the delay update step size and the delay deviation to the delay compensation amount to obtain the estimated delay compensation amount includes: The delay deviation is squared, and the squared value of the delay deviation is multiplied by the preset jitter suppression coefficient and then one is added to obtain the jitter suppression factor. Divide the preset base step size by the jitter suppression factor to obtain the delayed update step size; Multiply the delay update step size by the delay deviation to obtain the delay estimate correction amount, and then add the delay estimate correction amount to the delay compensation amount to obtain the estimated delay compensation amount.

12. A dual-master wired stereo audio synchronous playback device, applied to an audio synchronous playback system, characterized in that, The audio synchronization playback system includes a first audio playback device and a second audio playback device, and the dual-main-box wired stereo audio synchronization playback device includes: The link detection module is used to acquire the audio stream to be played and detect the connection status of the wired digital audio link between the first audio playback device and the second audio playback device to obtain link status information. The channel separation module is used to perform channel separation on the audio stream to be played using the first audio playback device based on the link status information, so as to obtain first channel data and second channel data. The encoding and transmission module is used to route the first channel data to the first local playback path of the first audio playback device, and to convert the format of the second channel data and send it to the second audio playback device through the wired digital audio link; The decoding switching module is used to decode and restore the received second channel data using the second audio playback device, switch the local audio output source of the second audio playback device from the local audio source to the restored second channel data, and route it to the second local playback path. The delay synchronization module is used to obtain the transmission delay of the wired digital audio link, insert a corresponding delay compensation amount into the first local playback path based on the transmission delay, and synchronously output and play the compensated first channel data through the first local playback path and the restored second channel data through the second local playback path. The step of obtaining the transmission delay of the wired digital audio link and inserting a corresponding delay compensation amount into the first local playback path based on the transmission delay includes: obtaining the local path delay of the first audio playback device, the remote output path delay of the first audio playback device, and the decoding path delay of the second audio playback device; summing the remote output path delay and the decoding path delay to obtain the total remote link delay, and subtracting the total remote link delay from the local path delay to obtain a delay difference; multiplying the delay difference with the sampling rate information of the wired digital audio link and rounding to obtain a delay compensation amount, and inserting the delay compensation amount into the delay buffer in the first local playback path.

13. A dual-master wired stereo audio synchronous playback device, characterized in that, The dual-master wired stereo audio synchronous playback device includes: a memory and at least one processor, wherein the memory stores instructions; The at least one processor invokes the instructions in the memory to cause the dual-master wired stereo audio synchronous playback device to perform the steps of the dual-master wired stereo audio synchronous playback method as described in any one of claims 1-11.

14. A computer-readable storage medium storing instructions thereon, characterized in that, When the instructions are executed by the processor, they implement the various steps of the dual-master wired stereo audio synchronous playback method as described in any one of claims 1-11.

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