Semiconductor structure, method of forming semiconductor devices and thin film transistors
By forming source and drain contact via structures and electrically doping the active layer in thin-film transistors, the problem of balancing high carrier mobility and low cutoff current in TFT manufacturing is solved, thereby improving performance stability and reliability, and making it suitable for back-end process technology.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
- Filing Date
- 2025-12-29
- Publication Date
- 2026-07-10
AI Technical Summary
The current manufacturing of thin-film transistors (TFTs) faces the challenge of balancing high carrier mobility and low cutoff current, and their integration into back-end processes presents complexity and performance inconsistencies.
Gate electrode, source electrode, and drain electrode are formed within the dielectric material layer, and source and drain contact via structures are formed through the gate dielectric layer. Combined with the electric dopant implantation of the active layer, the doping process is controlled by an ion implantation mask to reduce damage to the active layer.
It achieves a balance between high carrier mobility and low cutoff current, reduces defects, and improves the performance stability and reliability of thin-film transistors, making them suitable for integration into back-end manufacturing processes.
Smart Images

Figure CN122373385A_ABST