Method of manufacturing a semiconductor device and corresponding semiconductor device
By employing raised conductive leads and conductive clamps in semiconductor devices, the problem of reduced design flexibility and compactness in DSC packaging is solved, achieving effective heat dissipation and low-power electrical coupling.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- STMICROELECTRONICS INT NV
- Filing Date
- 2026-01-09
- Publication Date
- 2026-07-10
Smart Images
Figure CN122373841A_ABST
Abstract
Description
[0001] Priority requirements
[0002] This application claims priority to Italian Patent Application No. 102025000000285, filed on January 10, 2025, the contents of which are incorporated herein by reference in their entirety to the fullest extent permitted by law. Technical Field
[0003] This description relates to semiconductor devices.
[0004] One or more embodiments can be applied to power semiconductor devices, such as those including integrated circuits (ICs). Background Technology
[0005] Power semiconductor devices can be equipped with double-sided cooling (DSC) packages, which facilitate the dissipation of heat generated during device operation.
[0006] DSC power devices include one or more semiconductor (e.g., Si, SiC, or GaN) integrated circuit (IC) dies disposed on a substrate (e.g., a lead frame) and electrically coupled to one or more selected pads in the substrate via conductive clamps. The assembly is embedded in a plastic (electrically insulating), protective package.
[0007] The heat generated by the semiconductor die embedded in the package can be dissipated via the substrate and conductive clamps, both of which are exposed at the outer surface of the DSC package.
[0008] Exposing both the substrate and the fixture on the outer surface of the package reduces the flexibility and compactness of device design. For example, providing low-power electrical coupling via conductive wires becomes difficult due to the volume of the fixtures provided for power coupling. This can be relevant in so-called system-in-package (SiP) devices, where power semiconductor dies are electrically coupled to a second semiconductor die (e.g., a controller or driver semiconductor die) via conductive wires extending between two semiconductor dies.
[0009] References are made to U.S. Patent Application Publications Nos. 2008 / 0023807 A1, 2024 / 0145340 A1, 2023 / 0079413A1, and 2023 / 0028579 A1, as well as U.S. Patent No. 9,620,440 B1 and Chinese Patent No. 108573946 B, all of which are incorporated herein by reference, providing background information in the relevant technical fields.
[0010] There is a need in this field to overcome the shortcomings discussed above. Summary of the Invention
[0011] One or more embodiments also relate to a method.
[0012] One or more embodiments also relate to a corresponding semiconductor device.
[0013] The solutions described in this article facilitate the design of DSC packages that are flexible and relatively simple to implement.
[0014] In the solution described herein, the semiconductor die is arranged on a substrate including conductive leads with raised portions.
[0015] The solutions described herein involve applying conductive clamps to a semiconductor die and to conductive wires that provide low-power electrical coupling to the semiconductor die.
[0016] In the solution described herein, the conductive clamp is arranged such that its peripheral portion makes electrical contact with the raised portion of the lead.
[0017] In one embodiment, a method includes: arranging a semiconductor die at a die pad of a leadframe, wherein the leadframe includes an array of conductive leads surrounding the die pad, the array including a first set of conductive leads and a second set of conductive leads, wherein at least one conductive lead in the first set of conductive leads includes a base lead portion coplanar with the die pad and a raised lead portion, wherein the die pad is arranged at a recessed position relative to the raised lead portion; electrically coupling the semiconductor die to a lead in the second set of conductive leads via conductive wires extending therebetween; and electrically coupling the semiconductor die to the at least one conductive lead in the first set of conductive leads by applying a conductive clamp to the semiconductor die at a position extending above the conductive wires of the leads electrically coupled to the semiconductor die in the second set of conductive leads, the conductive clamp including a conductive protrusion electrically coupled to the semiconductor die and at least one distal portion of the raised lead portion electrically coupled to the at least one conductive lead in the first set of conductive leads.
[0018] In one embodiment, a device includes: a semiconductor die disposed at a die pad of a leadframe, wherein the leadframe includes an array of conductive leads surrounding the die pad, the array including a first set of conductive leads and a second set of conductive leads, wherein at least one conductive lead in the first set of conductive leads includes a base lead portion coplanar with the die pad and a raised lead portion, wherein the die pad is disposed at a recessed position relative to the raised lead portion; a conductive wire extending between the semiconductor die and the leads in the second set of conductive leads to provide electrical coupling therebetween; and a conductive clamp applied to the semiconductor die at a position extending above the conductive wire that electrically couples the semiconductor die to the leads in the second set of conductive leads to provide electrical coupling between the semiconductor die and the at least one conductive lead in the first set of conductive leads, wherein the conductive clamp includes a conductive protrusion electrically coupled to the semiconductor die and at least one distal portion of the raised lead portion electrically coupled to the at least one conductive lead in the first set of conductive leads. Attached Figure Description
[0019] One or more embodiments will now be described by way of example only with reference to the accompanying drawings, in which:
[0020] Figure 1 It is a perspective view of a semiconductor device;
[0021] Figures 2A to 2E This is a cross-sectional view illustrating the processing steps used to manufacture semiconductor devices;
[0022] Figure 3 It is a cross-sectional view of a semiconductor device that can be obtained through the processing steps described herein;
[0023] Figures 4 to 6 It is a plan view illustrating certain aspects of a semiconductor device; and
[0024] Figures 7 to 8 This is a cross-sectional view illustrating another embodiment. Detailed Implementation
[0025] Unless otherwise indicated, corresponding numbers and symbols in different figures generally refer to the corresponding parts.
[0026] The accompanying drawings are provided to clearly illustrate relevant aspects of the embodiments and are not necessarily drawn to scale.
[0027] The edges of features drawn in the attached figures do not necessarily indicate the end of the feature's range.
[0028] In the following description, one or more specific details are set forth to provide a thorough understanding of examples of embodiments described herein. Embodiments may be obtained without one or more of these specific details, or using other methods, components, materials, etc. In other instances, known structures, materials, or operations have not been detailed or described in order not to obscure certain aspects of the embodiments.
[0029] References to “embodiment” or “one embodiment” within the framework of this description are intended to indicate that a particular configuration, structure, or feature described with respect to that embodiment is included in at least one embodiment. Therefore, phrases such as “in an embodiment” or “in one embodiment” that may appear at one or more points in this description do not necessarily refer to the same embodiment.
[0030] Moreover, specific configurations, structures, or features can be combined in any suitable manner in one or more embodiments.
[0031] The headings / references used herein are provided for convenience only and therefore do not limit the scope or range of protection of the embodiments.
[0032] For the sake of simplicity and ease of explanation, the same parts or elements are indicated by the same reference numerals in the various figures unless the context otherwise indicates, and the corresponding description will not be repeated for each figure.
[0033] Figure 1 This is a perspective view of the structure of a semiconductor device 100, such as a power device for automotive applications.
[0034] Figure 1 The exemplary semiconductor device 100 illustrated in the figure includes: a substrate, such as a lead frame, for example having one or more semiconductor chips or dies 14A, 14B, 14C (the terms chip and die are considered synonyms) disposed at respective die pads 10 on the substrate; conductive structures 16, 18 providing electrical coupling between semiconductor dies 14A, 14B, 14C and between semiconductor dies and leads 12 (external pads) in the substrate; and an electrically insulating package 20 molded on the assembly to provide a plastic body to the device 100. Figure 1 (Details of the illustrated device 100 are shown in the figure, but are transparent).
[0035] The term “leadframe” (or “lead frame”) is currently used (see, for example, the USPC Generalized Glossary of Terms) to refer to a metal frame that provides support for an integrated circuit chip or die (the terms chip and die are considered synonyms herein) and provides electrical leads for interconnecting the integrated circuit in the die or chip to other electrical components or contacts.
[0036] Essentially, the leadframe comprises an array of conductive structures (or leads) 12 extending inward from the outline location in the direction of the semiconductor die, thereby forming an array of conductive structures from die pads 10 configured to have at least one semiconductor die 14A, 14B, 14C attached thereto. This can be achieved via conventional means such as die attachment adhesive (e.g., die attachment film (DAF)).
[0037] exist Figure 1 In the power semiconductor device 100 illustrated, the current delivered from the high-power section (e.g., including semiconductor dies 14A and 14B) to the output pad 12 of the device 100 can be significant, and for this purpose a clamp 18 (or strip) is used instead of wire (i.e., bonding wire).
[0038] As illustrated, wire 16 can still be used to provide electrical coupling to low-power sections in device 100, such as controller dies like semiconductor die 14C.
[0039] like Figure 1 The device 100 shown is intended to be mounted on a support (such as a printed circuit board (PCB), which is not visible in the figure for simplicity) via, for example, solder material.
[0040] The structures of the devices discussed so far are conventional in the prior art, making it unnecessary to provide a more detailed description in this paper.
[0041] Power semiconductor devices (e.g., such as) Figure 1 The device 100 illustrated in the figure can generate a large amount of heat during normal operation.
[0042] For example, heat dissipation (e.g., generated by power semiconductor dies 14A, 14B) can occur via die pads 10 made of a thermally conductive (and electrically conductive) material such as copper. Heat can be transferred to the device's support (e.g., PCB) via one or more thermally conductive die pads 10.
[0043] In a so-called double-sided cooling (DSC) package, heat dissipation can also occur via conductive clamps 18 exposed on the front / top surface of the package 20. In a DSC package, the conductive clamps are therefore advantageously used for: transferring current from the high-power section of the device to the (power) leads 12 in the substrate; and dissipating the heat generated by the power semiconductor dies 14A, 14B.
[0044] As mentioned, in such Figure 1In the illustrated device 100, semiconductor dies 14A and 14B are electrically coupled to (power) leads 12 via conductive clamps 18. In addition, semiconductor dies 14A and 14B are electrically coupled to (low-power) leads 12 and / or additional semiconductor dies 14C (e.g., controller dies) via conductive wires 16.
[0045] Providing the desired electrical coupling between semiconductor dies 14A, 14B, and 14C, and between semiconductor dies 14A, 14B, and 14C and lead 12, may undesirably impose constraints on the design of device 100.
[0046] For example, in order to make room for the conductive wire 16 falling on the front / top surface of the power semiconductor die 14B (at the die bonding pads or electrical contacts provided thereon), the conductive clamp 18 may have a cutout portion, which undesirably reduces the area of the exposed surface of the conductive clamp 18.
[0047] The solutions described in this article facilitate the design of DSC packages that are flexible and relatively simple to implement.
[0048] In the solution described herein, the semiconductor die is arranged on a substrate including conductive leads with raised portions.
[0049] The solution described herein involves applying a conductive clamp to a semiconductor die and extending over a conductive wire that provides low-power electrical coupling to the semiconductor die. The conductive wire may extend below a portion of the conductive clamp applied to the semiconductor die.
[0050] Figures 2A to 2E This is a cross-sectional view illustrating a sequence of processing steps for manufacturing a semiconductor device according to an embodiment.
[0051] Furthermore, it will be recognized that... Figures 2A to 2E The sequence of steps is merely exemplary because: Figures 2A to 2E One or more steps shown may be omitted, performed in a different manner (e.g., using other tools), and / or replaced by other steps; additional steps may be added; and one or more steps may be performed in a sequence different from the sequence shown.
[0052] Figure 2A The illustration shows a lead frame 21 according to an embodiment, arranged on a temporary (and possibly sacrificial) carrier C.
[0053] As illustrated, the lead frame 21 includes at least one die pad 10 configured to have a semiconductor die attached thereto, and an array of conductive leads 22 surrounding the die pad 10.
[0054] The array of conductive leads 22 may include: a first group (high-power) leads 22 configured to provide power input / output terminals to a semiconductor device; and a second group (low-power) leads (e.g., in...). Figures 4 to 6 As can be seen in (and referenced in the figure with reference numeral 12), it is configured to provide low-power input / output terminals (e.g., control terminals) to a semiconductor device.
[0055] In one or more embodiments, the first set of leads 22 may include at least one lead having an “S” shape, having a base portion 22A at the same level as the die pad 10 and a raised portion 22B raised relative to the base portion 22A of the lead 22 (and relative to the die pad 10).
[0056] That is, at least one lead 22 in the first group (high power) leads includes a base lead portion 22A and a raised lead portion 22B, wherein the base lead portion 22A and the die pad 10 include lead frame material (e.g., copper) in a first plane, and the raised lead portion 22B of the lead includes lead frame material in a second plane parallel to the first plane (and at a distance H1 above it).
[0057] In one or more embodiments, the (high power) lead 22 in the first group and the (low power) lead 12 in the second group both have an "S" shape as illustrated in the figure.
[0058] In other words, at least one of the first set of conductive leads 22 includes a base lead portion 22A and a raised lead portion 22B that are coplanar with the die pad 10. The die pad 10 is arranged at a recessed position relative to the raised lead portion 22B.
[0059] exist Figure 2A In the embodiment illustrated in the figure, the lead 22 is arranged such that the raised lead portion 22B faces (i.e., closer to) the die pad 10, while the base lead portion 22A is arranged away from (i.e., further away from) the die pad 10.
[0060] In one or more embodiments, the lead 22 may instead be arranged such that the raised lead portion 22B faces away from the die pad 10 (i.e., the base lead portion 22A faces the semiconductor die 14), as referenced below. Figure 3 As described.
[0061] Note that the lead frame 21 illustrated in Figure 2 may be part of a lead frame reel or panel, comprising multiple such lead frames held together via sacrificial connecting strips extending at the periphery of each lead frame 21. Indeed, in current semiconductor device manufacturing processes, multiple devices are manufactured concurrently to be separated into individual devices in the final singulation. For simplicity and ease of explanation, the following description will refer to the manufacture of a single device.
[0062] Figure 2B The illustration shows a (power) semiconductor (e.g., Si, SiC, or GaN) die 14 disposed on the top / front surface of a die pad 10. As shown, this can be achieved, for example, via a die-attachment material (DAM) such as die-attach adhesive.
[0063] Figure 2C The diagram illustrates a wire bonding process in which conductive wires 16 are provided to electrically couple a semiconductor die 14 disposed at a die pad 10 with a low-power lead 12 selected from an array of conductive leads (i.e., in a second set of leads).
[0064] Conductive wire 16 extends between semiconductor die 14 and (low-power) lead 12 arranged adjacent to (high-power) lead 22 visible in the figure; this is emphasized in the figure by illustrating conductive wire 16 with dashed lines.
[0065] As shown in the figure, the conductive wire 16 may have a loop height L at the semiconductor die 14.
[0066] As is known to those skilled in the art, providing such Figure 2C The wire 16 shown in the figure may involve: forming a first bond at the top / front surface of the semiconductor die 14 disposed at the die pad 10; extending the wire 16 from the semiconductor die 14 to the proximal portion of the lead 12 in a desired wire loop L; and forming a second bond at the lead 12.
[0067] Providing the conductive wire 16 as described above—often referred to as direct bonding—can be accomplished via conventional wire bonding devices, making it unnecessary to provide a more detailed description herein.
[0068] Figure 2D The illustration shows a conductive clamp 28 applied to a semiconductor die 14 to provide electrical coupling between the semiconductor die 14 and at least one (high-power) lead 22 in a first set of leads 22, according to an embodiment of the description.
[0069] As illustrated, the conductive clamp 28 includes a body (e.g., a substantially flat body, as discussed below). Figures 4 to 6(Also visible in the plan view) and columnar base portions or protrusions 280 that protrude from the surface of the main body (the bottom surface in the figure).
[0070] The conductive clamp 28 can be sized and dimensioned such that the conductive wire 16 provided between the semiconductor die 14 and the lead 12 in the second set of leads extends below the body of the conductive clamp 28 along a path that does not interfere with the conductive clamp 28.
[0071] For this purpose, for example, the protrusion 280 of the conductive clamp 28 can be formed to have a greater height B than the loop L of the wire 16.
[0072] In such Figure 2D (and Figure 2E In the embodiment illustrated in [reference to image], the conductive clamp 28 includes a distal portion 282 that bends toward the raised portion 22B of the lead 22. This bending of the distal portion 282 facilitates electrical contact with the lead and simultaneously provides sufficient space for the conductive wire 16 to extend beneath the conductive clamp 28.
[0073] The conductive clamp 28 described above can be provided by stamping or punching a sheet of metal (e.g., made of copper).
[0074] As shown in the figure, a conductive clamp 28 is applied to a semiconductor die 14, wherein the protrusion (or base portion) 280 of the conductive clamp 28 is in (electrical) contact with the top / front surface of the semiconductor die 14. An attachment material (AM) such as solder paste or conductive adhesive may be provided at the top / front surface of the semiconductor die 14 to facilitate the formation of electrical coupling between the clamp 28 and the semiconductor die 14 at die bonding pads provided at the top / front surface of the semiconductor die 14 (the die bonding pads at the top / front surface of the semiconductor die 14 are not visible in the figure due to scale).
[0075] One or more distal portions 282 of the conductive clamp 28 are in electrical contact with the (high-power) lead 22 at their raised lead portion 22B; attachment material (AM) may also be provided at the top / front surface of the raised lead portion 22B to facilitate electrical coupling between the lead 22 and the clamp 28.
[0076] Figure 2E The illustration shows an electrically insulating package 20 molded onto the component to provide a protective plastic enclosure for device 200.
[0077] Encapsulation 20 is formed by molding an electrically insulating molding compound (e.g., epoxy resin) onto the component; a curing step (known per se) may follow the molding step.
[0078] As illustrated, the top / front surface 28A of the conductive clamp 28 is exposed at the top / front surface of the electrically insulating package 20, that is, the surface 28A of the conductive clamp 28 is not covered by the molding compound forming the electrically insulating package 20.
[0079] The top / front surface 28A of the fixture 28 being exposed at the surface of the package 20 may involve a back-side grinding step and / or a film-assisted molding step (which are conventional processing steps in the prior art).
[0080] In short, regarding Figures 2A to 2E The described processing steps include arranging a semiconductor die 14 at a die pad 10 of a lead frame 21. The lead frame 21 includes an array of conductive leads 12, 22 surrounding the die pad 10. The array of conductive leads 12, 22 includes a first set of conductive leads (e.g., high-power leads 22) and a second set of conductive leads (e.g., low-power leads 12). At least one conductive lead 22 in the first set includes a base lead portion 22A coplanar with the die pad 10 and a raised lead portion 22B, wherein the die pad 10 is arranged at a recessed position relative to the raised lead portion 22B.
[0081] The semiconductor die 14 is electrically coupled to the leads 12 in the second set of conductive leads 12 via conductive wires 16 extending therebetween.
[0082] Subsequently, at a position extending above the conductive wire 16 of the lead 12 in the second set of conductive leads 12, the semiconductor die 14 is electrically coupled to at least one conductive lead 22 in the first set of conductive leads 22 by applying a conductive clamp 28 to the semiconductor die 14. The conductive clamp 28 includes a conductive protrusion 280 electrically coupled to the semiconductor die 14 and at least one distal portion 282 of the raised lead portion 22B electrically coupled to at least one conductive lead 22 in the first set of conductive leads 22.
[0083] The conductive wire 16 provided between the semiconductor die 14 and at least one of the leads 22 in the first set of leads 22 can extend below the conductive clamp 28, that is, extend between a first plane defined by the die pad 10 (or by the base lead portion 22A of at least one lead 22) and a second plane defined by the body of the conductive clamp 28 applied to the semiconductor die 14.
[0084] An electrically insulating package 20 can be molded onto a semiconductor die 14 on which conductive clamps 28 are applied. The electrically insulating package 20 has a surface opposite to the die pads 10. The surface 28A of the conductive clamps 28 applied to the semiconductor die 14 and the conductive wires 16 electrically coupled to the semiconductor die 14 are exposed at said surface of the electrically insulating package 20.
[0085] The solution described above thus facilitates the provision of a semiconductor device in which: a conductive clamp 28 has a surface 28A exposed at the (top / front) surface of the electrically insulating package 20 of the device 200; and a conductive wire 16 (e.g., for low-power electrical coupling) is provided below the clamp 28 along a path that does not interfere with the conductive clamp 28.
[0086] Exposing the surface 28A of the conductive (and thermally conductive) clamp 28 at the (top / front) surface of the package 20 of the device 200 facilitates the dissipation of heat that the device 200 may generate during normal operation. Furthermore, conductive wires 16 can be provided for low-power electrical coupling without affecting the dimensions of the exposed surface 28A of the conductive clamp 28.
[0087] Figure 3 The illustration shows a device 200 according to another embodiment. As illustrated, the device 200 includes conductive leads 22 in a first set of leads, which are arranged such that a base lead portion 22A faces the die pad 10 (and an elevated lead portion 22B faces away from the die pad 10).
[0088] Used to obtain, for example Figure 3 The processing steps of device 200 shown in the diagram are similar to those of the device 200 shown in the diagram. Figures 2A to 2E The processing steps are described, and similar descriptions will not be repeated for the sake of brevity.
[0089] Advantageously, the conductive wire 16 that electrically couples the semiconductor die 14 to the (low-power) lead 12 can be provided via reverse bonding.
[0090] That is, providing conductive wire 16 may involve, for each wire 16: forming a first bond at lead 12; extending the conductive wire from the first bond at lead 12 to semiconductor die 14; and forming a second bond at semiconductor die 14 (at die bonding pads provided on the top / front surface of semiconductor die 14).
[0091] Reverse bonding can be advantageous because it facilitates the provision of a (conductive) wire 16 with lower loop length at the semiconductor die 14.
[0092] like Figure 3 As illustrated in the figure, the distal portion 282 of the conductive clamp 28 of the raised portion 22B of the electrical contact lead 22 may have a surface exposed at the top / front surface of the electrically insulating package, thereby further promoting the dissipation of heat generated during operation of the device 200.
[0093] Figures 4 to 6 This is a plan view of various aspects of a semiconductor device 200 according to an embodiment of the present description (e.g., from each of the following diagrams). Figure 2E and Figure 3 Arrows I and II indicate the viewing direction.
[0094] In these figures, half of the conductive clamp 28 (the right-hand half in the figure) is shown as "transparent" in order to illustrate the structure of the device 200 below the conductive clamp 28.
[0095] like Figure 4 and Figure 5 As illustrated in the figure, the conductive clamp 28 may include a distal portion 282 protruding from the body of the clamp 28 (e.g., Figure 4 (as illustrated in the example) or has a distal portion 282 with the same width as the body of the clamp 28 (e.g.) Figure 5 (Example in the text).
[0096] Note that in these embodiments, the distal portion 282 of the clamp may be exposed at the (top / front) surface of the electrically insulating package 20 (e.g., as shown in the image). Figure 3 (as illustrated in the example) or can be bent toward lead 22 (e.g., as shown in the example). Figure 2E exemplified in ).
[0097] like Figure 4 and Figure 5 As shown in the diagram, the low-power lead 12 and the high-power lead 22 can be arranged on different sides of the lead frame 21.
[0098] In such Figure 6 In the illustrated embodiment, the lead frame 21 of the device 200 includes low-power leads 12 and high-power leads 22 arranged adjacent to each other on the same side of the lead frame 21.
[0099] Figure 6 and Figure 7 An embodiment described herein is illustrated, wherein device 200 includes two (or more) semiconductor dies 14, 15.
[0100] That is, additional semiconductor dies 15 (e.g., controller dies) can be arranged (via die attachment material DAM) at corresponding additional die pads 15 in the lead frame 21. Note that the two die pads 10, 11 can be connected to form a single die pad with two dies mounted at corresponding die mounting positions on the (single) die pad, rather than as distinct components as illustrated in the figure.
[0101] Conductive wire 16 is provided to electrically couple semiconductor die 14 to low-power lead 12, and additional conductive wire 17 is provided to electrically couple semiconductor die 14 to another semiconductor die 15.
[0102] A conductive clamp 28 having a protrusion or base portion 280 is applied to semiconductor dies 14, 15 and conductive wire 16 as well as additional conductive wire 17.
[0103] As illustrated, the conductive clamp 28 is applied as a protrusion 280 that makes electrical contact with the (first, power) semiconductor die 14, and the distal portion(s) makes electrical contact with one or more leads 22 in the first set of conductive leads.
[0104] Advantageously, additional conductive wires 17 electrically coupling semiconductor die 14 to another semiconductor die 15 can extend below the conductive clamp 28, that is, between the body of the conductive clamp 28 and the plane defined by the die pads 14, 15.
[0105] The device 200, including the additional semiconductor die 15 shown in the figure, can provide a raised portion 22B of at least one of the first set of conductive leads 22 facing the die pad 10 (e.g., Figure 7 (as shown in the diagram) or 10 away from the die pad (e.g.) Figure 8 (As shown in the diagram).
[0106] In such Figure 7 and Figure 8 In the illustrated device 200, one or more distal portions 282 may be bent toward the raised portion 22B of the lead 22 (e.g., Figure 7 (as shown in the diagram) or may have a surface exposed at the top / front surface of the electrically insulating package 20 (such as...) Figure 8 (As shown in the diagram).
[0107] Advantageously, one or more other distal portions 284 of the conductive clamp 28 (i.e., the distal portion 284 on the left side of the figure) may extend over the additional semiconductor die 15 and may have a surface exposed at the top / front surface of the electrically insulating package 20, thereby further improving the dissipation of heat generated by the device 200.
[0108] Without prejudice to the fundamental principles, details and embodiments may vary, even significantly, relative to what has been described by way of example only, without departing from the scope of the embodiments.
[0109] The claims are an integral part of the technical teachings provided with respect to the embodiments.
[0110] The scope of protection is determined by the appended claims.
Claims
1. A method comprising: A first semiconductor die is disposed at a die pad of a leadframe, the leadframe including an array of conductive leads around the die pad, wherein the array includes a first set of conductive leads and a second set of conductive leads, wherein at least one conductive lead in the first set of conductive leads includes a base lead portion coplanar with the die pad and a raised lead portion, and wherein the die pad is disposed at a recessed position relative to the raised lead portion. The first semiconductor die is electrically coupled to the second set of conductive leads via conductive wires extending therebetween; as well as At a location extending above the conductive wire of the lead in the second set of conductive leads, the first semiconductor die is electrically coupled to at least one conductive lead in the first set of conductive leads by applying a conductive clamp to the first semiconductor die. The conductive clamp includes a conductive protrusion electrically coupled to the first semiconductor die and at least one distal portion of an elevated lead portion electrically coupled to at least one conductive lead in the first set of conductive leads.
2. The method of claim 1, further comprising molding an electrically insulating package onto a first semiconductor die on which conductive clamps are applied, the electrically insulating package having a surface opposite to die pads, wherein the electrically insulating package encapsulates the first semiconductor die and the conductive wires, and wherein the surface of the conductive clamps applied to the first semiconductor die and the conductive wires is exposed at the surface of the electrically insulating package.
3. The method of claim 2, wherein the surface of the die pad and the surface of the base lead portion are exposed from the electrically insulating package, and wherein the surface of the die pad and the surface of the base lead portion are coplanar with each other.
4. The method of claim 1, wherein the at least one conductive lead in the first group of conductive leads includes a raised lead portion disposed near the die pad.
5. The method of claim 4, wherein the leads electrically coupling the first semiconductor die to the second set of conductive leads via conductive wires comprise: A first bond is formed at the first semiconductor die; The conductive wire extends from the first semiconductor die to the lead in the second set of conductive leads; as well as A second bond is formed at the lead in the second set of conductive leads.
6. The method of claim 1, wherein the at least one conductive lead in the first group of conductive leads includes a base lead portion disposed near the die pad.
7. The method of claim 6, wherein the leads electrically coupling the first semiconductor die to the second set of conductive leads via conductive wires comprise: A first bond is formed at the lead in the second set of conductive leads; The conductive wire is extended from the lead in the second set of conductive leads to the first semiconductor die; as well as A second bond is formed at the first semiconductor die.
8. The method of claim 1, further comprising: A second semiconductor die is arranged at the second die pad of the lead frame; The first semiconductor die is electrically coupled to the second semiconductor die via an additional conductive wire extending therebetween. as well as At a location extending above the conductive wire and the other conductive wire, the first semiconductor die is electrically coupled to at least one of the conductive leads in the first set of conductive leads by applying a conductive clamp to the first semiconductor die.
9. A device comprising: A lead frame comprising an array of conductive leads around a die pad, the array comprising a first set of conductive leads and a second set of conductive leads, wherein at least one conductive lead in the first set of conductive leads comprises a base lead portion coplanar with the die pad and a raised lead portion, wherein the die pad is disposed at a recessed position relative to the raised lead portion. The first semiconductor die is disposed at the die pad of the lead frame; A conductive wire extending between a first semiconductor die and a lead in a second set of conductive leads, thereby providing electrical coupling therebetween; as well as A conductive clamp is applied to a first semiconductor die and positioned to extend over the conductive wires of the leads that electrically couple the first semiconductor die to the leads in a second set of conductive leads, to provide electrical coupling between the first semiconductor die and at least one of the conductive leads in the first set of conductive leads; The conductive clamp includes a conductive protrusion electrically coupled to a first semiconductor die and at least one distal portion of an elevated lead portion electrically coupled to at least one of the conductive leads in a first set of conductive leads.
10. The device of claim 9, comprising an electrically insulating package molded onto a first semiconductor die to which conductive clamps are applied, the electrically insulating package having a surface opposite to die pads, wherein the electrically insulating package encapsulates the first semiconductor die and the conductive wires, and wherein the surface of the conductive clamps applied to the first semiconductor die and the conductive wires is exposed at the surface of the electrically insulating package.
11. The device of claim 10, wherein the surface of the die pad and the surface of the base lead portion are exposed from the electrically insulating package, and wherein the surface of the die pad and the surface of the base lead portion are coplanar with each other.
12. The device of claim 9, wherein the at least one conductive lead in the first group of conductive leads includes a raised lead portion disposed near the die pad.
13. The device of claim 9, wherein the at least one conductive lead in the first group of conductive leads includes a base lead portion disposed near the die pad.
14. The device of claim 9, further comprising: The second semiconductor die is disposed at the second die pad of the lead frame; Additional conductive wires extend between the first semiconductor die and the second semiconductor die to provide electrical coupling therebetween. as well as The conductive clamp is applied to the first semiconductor die and positioned to extend over the conductive wire and the additional conductive wire.