Semiconductor light emitting device

Abstract

The present application provides a semiconductor light emitting device (10) having a substrate (20), a plurality of semiconductor light emitting elements (30) disposed on the substrate (20), and a plurality of drive circuits (40A-40H) disposed on the substrate (20) and driving one or more semiconductor light emitting elements of the plurality of semiconductor light emitting elements (30). The plurality of semiconductor light emitting elements (30) are each composed of a light emitting element that emits light in a direction intersecting a main surface (21) of the substrate (20). The plurality of drive circuits (40A-40H) each include a switching element (411-418) that controls one or more semiconductor light emitting elements of the plurality of semiconductor light emitting elements (30), and a capacitor (421-428) that supplies current to the one or more semiconductor light emitting elements of the plurality of semiconductor light emitting elements (30).

Description

Technical Field

[0001] This disclosure relates to semiconductor light-emitting devices. Background Technology

[0002] As a type of semiconductor light-emitting device, there is a semiconductor laser device that uses a semiconductor laser element as a light source. Semiconductor laser devices are widely used as light source devices mounted on various electronic devices. Patent Document 1 discloses an example of a semiconductor laser device.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2016-29718 Summary of the Invention

[0006] In recent years, there has been a demand for further improvements in the performance of semiconductor light-emitting devices. For example, when applying semiconductor light-emitting devices to laser systems such as LiDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) that utilize three-dimensional distance measurement, there are requirements for expanded field of view and improved resolution. To meet these demands, there is a need to further increase the number of semiconductor light-emitting elements that can be mounted in semiconductor light-emitting devices.

[0007] One aspect of this disclosure provides a semiconductor light-emitting device comprising: a substrate; a plurality of semiconductor light-emitting elements disposed on the substrate; and a plurality of driving circuits disposed on the substrate, each driving one or more of the plurality of semiconductor light-emitting elements. Each of the plurality of semiconductor light-emitting elements is composed of a light-emitting element located on a main surface of the substrate and emitting light in a direction intersecting the main surface. Each of the plurality of driving circuits includes: a switching element for controlling one or more of the plurality of semiconductor light-emitting elements; and a capacitor for supplying current to the one or more of the plurality of semiconductor light-emitting elements. Attached Figure Description

[0008] Figure 1 This is a simplified top view of an exemplary semiconductor light-emitting device according to the first embodiment.

[0009] Figure 2 It is Figure 1 A simplified top view showing the enlarged central region of the semiconductor light-emitting device.

[0010] Figure 3 It is Figure 1A simplified top view showing a portion of the peripheral area of ​​a semiconductor light-emitting device.

[0011] Figure 4 It is Figure 1 A simplified top view showing a portion of the peripheral area of ​​a semiconductor light-emitting device.

[0012] Figure 5 It is Figure 1 A simplified top view showing a portion of the peripheral area of ​​a semiconductor light-emitting device.

[0013] Figure 6 It is Figure 1 A simplified top view showing a portion of the peripheral area of ​​a semiconductor light-emitting device.

[0014] Figure 7 It is along Figure 3 A simplified cross-sectional view of the semiconductor light-emitting device of the F7-F7 line.

[0015] Figure 8 This is a simplified three-dimensional diagram of a semiconductor light-emitting element.

[0016] Figure 9 yes Figure 1 A simplified top view of the back electrode layer of a semiconductor light-emitting device.

[0017] Figure 10 yes Figure 1 A simplified top view of the intermediate electrode layer of a semiconductor light-emitting device.

[0018] Figure 11 It means Figure 1 A simplified cross-sectional view of the current path of a semiconductor light-emitting device.

[0019] Figure 12 It includes Figure 1 A simplified circuit diagram of an exemplary light-emitting system, including a semiconductor light-emitting device.

[0020] Figure 13 This is a simplified top view of an exemplary semiconductor light-emitting device according to the second embodiment.

[0021] Figure 14 It is Figure 13 A simplified top view of the central part of the semiconductor light-emitting device, shown in magnification.

[0022] Figure 15 It is Figure 13 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0023] Figure 16 It is Figure 13A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0024] Figure 17 It is Figure 13 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0025] Figure 18 It is Figure 13 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0026] Figure 19 yes Figure 13 A simplified top view of the back electrode layer of a semiconductor light-emitting device.

[0027] Figure 20 yes Figure 13 A simplified top view of the surface-side intermediate electrode layer of a semiconductor light-emitting device.

[0028] Figure 21 yes Figure 13 A simplified top view of the middle electrode layer on the back side of a semiconductor light-emitting device.

[0029] Figure 22 This is a simplified top view of an exemplary semiconductor light-emitting device according to the third embodiment.

[0030] Figure 23 It is Figure 22 A simplified top view of the central part of the semiconductor light-emitting device, shown in magnification.

[0031] Figure 24 It is Figure 22 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0032] Figure 25 It is Figure 22 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0033] Figure 26 It is Figure 22 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0034] Figure 27 It is Figure 22 A simplified top view showing a portion of the surface electrode layer of a semiconductor light-emitting device.

[0035] Figure 28 yes Figure 22 A simplified top view of the back electrode layer of a semiconductor light-emitting device.

[0036] Figure 29 yes Figure 22 A simplified top view of the surface-side intermediate electrode layer of a semiconductor light-emitting device.

[0037] Figure 30 yes Figure 22 A simplified top view of the middle electrode layer on the back side of a semiconductor light-emitting device. Detailed Implementation

[0038] (Detailed explanation)

[0039] Hereinafter, several embodiments of the semiconductor light-emitting device of this disclosure will be described with reference to the accompanying drawings. Furthermore, to simplify and clarify the description, the constituent elements shown in the drawings are not necessarily drawn to a fixed scale. Additionally, for ease of understanding, shading lines are sometimes omitted in sectional views. The accompanying drawings are merely illustrative of embodiments of this disclosure and should not be considered as limiting the scope of this disclosure.

[0040] The following detailed description includes apparatus, systems, and methods that embody exemplary embodiments of the present disclosure. This detailed description is merely illustrative and is not intended to limit the embodiments of the present disclosure or the application and use of such embodiments.

[0041] (First Implementation)

[0042] Reference Figures 1-12 The semiconductor light-emitting device 10 of the first embodiment will be described.

[0043] Figure 1 A simplified top view of the semiconductor light-emitting device 10 is shown. Figure 2 A simplified top view of the central portion of the semiconductor light-emitting device 10 is shown. Figures 3-6 A simplified top view of the four distinct portions of the peripheral region of the semiconductor light-emitting device 10 is shown. Figure 7 Show along Figure 3 A simplified cross-sectional view of the F7-F7 line. Figure 8 This is a simplified three-dimensional diagram of a semiconductor light-emitting element. Figure 9 A simplified back electrode structure of the semiconductor light-emitting device 10 is shown. Figure 10 A simplified intermediate electrode structure of the semiconductor light-emitting device 10 is shown. Figure 11 This is a diagram illustrating the current path of the semiconductor light-emitting device 10. Figure 12 A simplified circuit diagram of the light-emitting system 200, including the semiconductor light-emitting device 10, is shown.

[0044] Furthermore, in this disclosure, the constituent components are sometimes described based on the mutually orthogonal XYZ axes shown in the figures. The term "top view" as used in this disclosure refers to viewing the semiconductor light-emitting device 10 along the Z-axis direction.

[0045] (1-1. Overall structure of semiconductor light-emitting device)

[0046] like Figure 1 As shown, the semiconductor light-emitting device 10 includes a substrate 20 and a plurality of (in) Figure 1 For example, eight) semiconductor light-emitting elements 30 and multiple (in Figure 1 (For example, there are eight) drive circuits 40A to 40H. In the following description, without distinguishing between drive circuits 40A to 40H, drive circuits 40A to 40H will be referred to as drive circuit 40 (or each drive circuit 40).

[0047] Multiple semiconductor light-emitting elements 30 and multiple driving circuits 40 are disposed on the substrate 20. The semiconductor light-emitting device 10 is specifically configured to utilize multiple driving circuits 40 to drive multiple semiconductor light-emitting elements 30 in a multi-channel configuration. Figure 1 The example shown is an eight-channel driven light-emitting module. Furthermore, the number of semiconductor light-emitting elements 30 and the number of driving circuits 40 can be appropriately changed according to the number of channels.

[0048] The substrate 20 has a rectangular shape when viewed from above. Figure 1 In this example, the substrate 20 is square, but it can have any shape when viewed from above. Furthermore, the shape viewed from above differs from that along the thickness direction of the substrate 20 (in...). Figure 1 The direction perpendicular to the paper (referring to the direction of observation) is the same as observing the semiconductor light-emitting device 10. The substrate 20 includes a main surface 21 and a back surface 22 located on its opposite side (see reference). Figure 7 ) and the first to fourth sides 23 to 26. The first and second sides 23 and 24 correspond to the two end faces of the substrate 20 in the Y-axis direction. Figure 1 In this example, the first side surface 23 is located below the paper surface, and the second side surface 24 is located above the paper surface. The third and fourth side surfaces 25 and 26 correspond to the two end surfaces of the substrate 20 in the X-axis direction. Figure 1 In the example, the third side 25 is located on the left side of the paper, and the fourth side 26 is located on the right side of the paper.

[0049] like Figure 7 As shown, substrate 20 uses, for example, a multilayer substrate. Figure 7 In this example, substrate 20 is a four-layer substrate, including first to fourth electrode layers 28A to 28D and first to third substrates 27A to 27C located between the first to fourth electrode layers 28A to 28D. The first to fourth electrode layers 28A to 28D are formed, for example, from one or more materials selected from the group consisting of Ti (titanium), TiN (titanium nitride), Au (gold), Ag (silver), Cu (copper), Al (aluminum), and W (tungsten).

[0050] The first to third substrates 27A to 27C are formed of an insulating material, for example. One example of the insulating material is a material containing epoxy resin, such as glass epoxy resin. Another example of the insulating material is a material containing ceramic. For example, aluminum nitride (AlN) or aluminum oxide (Al2O3) can be used as the ceramic-containing material. If a ceramic-containing material is used, the heat dissipation performance of the first to third substrates 27A to 27C is improved, thereby suppressing excessive temperature rise in the semiconductor light-emitting device 10.

[0051] The first substrate 27A includes the main surface 21 of the substrate 20. The second substrate 27B includes the back surface 22 of the substrate 20. In other words, the main surface of the first substrate 27A corresponds to the main surface 21 of the substrate 20, and the back surface of the second substrate 27A corresponds to the back surface 22 of the substrate 20. The third substrate 27C is located in the middle between the first substrate 27A and the second substrate 27B. The four sides of each of the first to third substrates 27A to 27C correspond to the first to fourth sides 23 to 26 of the substrate 20.

[0052] The main surface 21 of the substrate 20 is covered by a main surface resist layer 29A, and the back surface 22 of the substrate 20 is covered by a back surface resist layer 29B. The main surface resist layer 29A and the back surface resist layer 29B are formed, for example, by an insulating material such as epoxy resin or polyimide resin. The main surface resist layer 29A and the back surface resist layer 29B may also contain fillers such as silicon dioxide or aluminum oxide.

[0053] Furthermore, the ends of the first to fourth electrode layers 28A to 28D are not located on the first to fourth sides 23 to 26 of the substrate 20. Figure 7 The right end face in the middle indicates that the first side face 23) is exposed. For example... Figure 7 As shown, the end of the first electrode layer 28A located on the main surface 21 of the substrate 20 is covered by the main surface resist layer 29A, and the end of the second electrode layer 28B located on the back surface 22 of the substrate 20 is covered by the back surface resist layer 29B. The ends of the second and third electrode layers 28C and 28D located between the first and third substrates 27A and 27C are covered by the first and third substrates 27A and 27C. Additionally, in Figure 7 In the illustration, the interfaces between the first to third substrates 27A to 27C are shown with solid lines, but their interfaces are sometimes not actually clear.

[0054] (1-2. Semiconductor light-emitting elements)

[0055] Multiple semiconductor light-emitting elements 30 are respectively located on the main surface 21 of the substrate 20 and in the direction intersecting with the main surface 21 (in Figure 1The semiconductor light-emitting element 30 is composed of light-emitting elements that emit light in the Z-axis direction, and functions as the light source of the semiconductor light-emitting device 10. While the mounting configuration of each semiconductor light-emitting element 30 is not particularly limited, in the first embodiment, multiple semiconductor light-emitting elements 30 are located on the main surface 21 of the substrate 20, separated by the first electrode layer 28A. For example, each semiconductor light-emitting element 30 is composed of a photonic crystal surface-emitting laser (PCSEL) element that outputs laser light in a specified wavelength range. PCSEL elements have the following characteristics: they are capable of high-output operation (high-brightness operation) based on beam emission with high beam quality and a narrow divergence angle, and have low temperature dependence on the operating wavelength. The structures of each semiconductor light-emitting element 30 are identical. As an example, the beam divergence angle of the PCSEL element used in each semiconductor light-emitting element 30, expressed in terms of Full Width at Half Maximum (FWHM), is 1° or less, more preferably 0.10° or more and 0.15° or less, and the spectral width is 0.2 nm or less. Regarding the dimensions of PCSEL components, for example, when viewed from above, the size is approximately 1.0mm × 1.0mm, and the thickness is less than 0.2mm. Furthermore, the laser can be visible light or infrared light, which have wavelengths longer than visible light.

[0056] like Figure 1 and Figure 2 As shown, each semiconductor light-emitting element 30 has a rectangular shape when viewed from above, for example, a square shape. Multiple semiconductor light-emitting elements 30 are concentrated in the central region AC of the substrate 20. Furthermore, the central region AC refers to the region including the center of the substrate 20 when viewed from above. In one example, several elements (in...) of the multiple semiconductor light-emitting elements 30 are included. Figure 1 In the example, four out of eight) are arranged in a row along the X-axis within the central region AC, including the remaining semiconductor light-emitting elements 30 (in Figure 1 In the example of the remaining four, the second group is adjacent to the first group in the central region AC along the Y-axis and arranged in a column along the X-axis. Therefore, multiple semiconductor light-emitting elements 30 are arranged in a matrix, adjacent to each other in the central region AC of the substrate 20. Furthermore, the arrangement of the semiconductor light-emitting elements 30 is not limited to... Figure 1 The diagram shows two rows and four columns.

[0057] like Figure 7 and Figure 8As shown, each semiconductor light-emitting element 30 includes an element surface 31 and an element back surface 32 located on the opposite side. The semiconductor light-emitting element 30 has a light-emitting region 33 in the central portion of the element surface 31. A surface electrode 34 is provided on the element surface 31. The surface electrode 34 is formed in a rectangular ring shape, for example, having an opening (through-hole) that exposes the light-emitting region 33 on the element surface 31. A back electrode 35 is provided on the element back surface 32. The back electrode 35 is formed over, for example, the entire surface of the element back surface 32. The surface electrode 34 corresponds to the cathode electrode, and the back electrode 35 corresponds to the anode electrode.

[0058] (1-3. Driving circuit of semiconductor light-emitting device)

[0059] like Figure 1 As shown, the driving circuits 40A to 40H are for driving multiple (in) components mounted on the semiconductor light-emitting device 10. Figure 1 The circuits 40A to 40H are configured to drive one or more of the multiple semiconductor light-emitting elements 30. Figure 1 In the example, each channel (each driving circuit 40) is provided with a semiconductor light-emitting element 30, and driving circuits 40A to 40H drive one of the eight semiconductor light-emitting elements 30 respectively. In addition, since the structure of each driving circuit 40 is the same, driving circuit 40A will be described below, and detailed descriptions of driving circuits 40B to 40H will be omitted.

[0060] The driving circuit 40A includes a switching element 411 and one or more capacitors 421. The switching element 411 is configured to control one or more of the plurality of semiconductor light-emitting elements 30. Figure 1 In this example, the switching element 411 drives one of the eight semiconductor light-emitting elements 30. The switching element 411 is positioned near the semiconductor light-emitting element 30 that it controls. Figure 1 In this example, the switching element 411 is positioned adjacent to or close to the semiconductor light-emitting element 30 in the Y-axis direction.

[0061] The switching element 411 has a rectangular shape when viewed from above. Figure 1In this example, the switching element 411 is square, but it can have any shape when viewed from above. The switching element 411 uses, for example, a vertical transistor. Examples of such vertical transistors include MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), and bipolar transistors. In the first embodiment, an n-type MOSFET is used as the switching element 411.

[0062] like Figure 7 As shown, the switching element 411 includes an element surface 41A and an element back surface 41B located on the opposite side. A source electrode 41S and a gate electrode 41G are disposed on the element surface 41A (see reference). Figure 3 The source electrode 41S is disposed, for example, over most of the element surface 41A. The gate electrode 41G is disposed, for example, near a corner of the element surface 41A. Figure 7 As shown, a drain electrode 41D is provided on the back side 41B of the component. The drain electrode 41D is arranged, for example, covering the entire back side 41B of the component.

[0063] Return to Figure 1 The capacitor 421 is configured to supply current to one or more of the plurality of semiconductor light-emitting elements 30. Figure 1 In this example, the drive circuit 40A includes four capacitors 421 connected in parallel, which are configured to supply current to a semiconductor light-emitting element 30, which is controlled by the switching element 411. The four capacitors 421 are located near the switching element 411. Figure 1 In this example, four capacitors 421 are positioned adjacent to or close to the switching element 411 in the Y-axis direction. The four capacitors 421 are positioned in the Y-axis direction further away from the first side 23 of the substrate 20 than the switching element 411.

[0064] Capacitor 421 uses, for example, a ceramic capacitor. Each capacitor 421 is rectangular in shape from top view, including two long sides along the Y-axis and two short sides along the X-axis. Four capacitors 421 are arranged in a row along the X-axis, spaced apart from each other and with their long sides adjacent to each other. Figure 7 As shown, each capacitor 421 includes a first electrode 42A and a second electrode 42B. The first electrode 42A is located at one end of the capacitor 421 in the Y-axis direction, and the second electrode 42B is located at the other end of the capacitor 421 in the Y-axis direction.

[0065] Furthermore, similar to drive circuit 40A, drive circuits 40B to 40H also include switching elements 412 to 418 configured in the same way as switching element 411, and capacitors 422 to 428 configured in the same way as capacitor 421. Also, similar to drive circuit 40A, the number of capacitors 422 in drive circuit 40B is, for example, four, and this is also true for capacitors 423 to 428 in the other drive circuits 40C to 40H.

[0066] (1-4. Protection Diode)

[0067] like Figure 1 As shown, in addition to the plurality of semiconductor light-emitting elements 30 and the plurality of driving circuits 40 described above, the semiconductor light-emitting device 10 also includes a plurality of (in) protective devices for the semiconductor light-emitting elements 30 mounted on the semiconductor light-emitting device 10. Figure 1 For example, there are eight protection diodes 70A to 70H. Protection diodes 70A to 70H are provided for each channel (drive circuit 40), for example. Furthermore, since the structure of each protection diode 70A to 70H is the same, the following description focuses on protection diode 70A, omitting detailed descriptions of protection diodes 70B to 70H.

[0068] like Figure 12 As shown, the protection diode 70A is connected in anti-parallel to one semiconductor light-emitting element 30, which is controlled by the switching element 411 (drive circuit 40A). However, the number of semiconductor light-emitting elements 30 connected to the protection diode 70A is not limited to one. The protection diode 70A can be connected in anti-parallel to more than one semiconductor light-emitting element 30 arranged in each channel (each drive circuit 40). Furthermore, in Figure 12 To make the illustrations clear, only drive circuits 40A, 40B, 40G, and 40H and their associated circuit elements are shown, while drive circuits 40C, 40D, 40E, and 40F and their associated circuit elements are omitted.

[0069] (1-5. Electrode layer of substrate)

[0070] Next, the structure of the multiple electrode layers of the substrate 20, namely the first to fourth electrode layers 28A to 28D, will be described. For example... Figure 7As shown, the first electrode layer 28A is provided as a surface electrode layer located on the main surface 21 of the substrate 20. The second electrode layer 28B is provided as a back electrode layer located on the back surface 22 of the substrate 20. The third and fourth electrode layers 28C and 28D are respectively provided as intermediate electrode layers located between the first electrode layer 28A and the second electrode layer 28B in the thickness direction of the substrate 20. Specifically, the third electrode layer 28C is provided as a surface-side intermediate electrode layer located biased towards the first electrode layer 28A (surface electrode layer), and the fourth electrode layer 28D is provided as a back-side intermediate electrode layer located biased towards the second electrode layer 28B (back electrode layer). In the first embodiment, the third and fourth electrode layers 28C and 28D, for example, have the same structure.

[0071] (1-5A. First electrode layer (surface electrode layer))

[0072] like Figures 1-6 As shown, the first electrode layer 28A (surface electrode layer) located on the main surface 21 of the substrate 20 includes a plurality of surface electrodes (patterned electrodes) separated from each other. In the first embodiment, the first electrode layer 28A includes first surface electrodes 61A-61H, second surface electrodes 62A-62H, third surface electrodes 63A-63H, fourth surface electrode 64, fifth surface electrodes 65A-65H, and sixth surface electrodes 66A-66H.

[0073] The first surface electrodes 61A-61H are used for mounting multiple semiconductor light-emitting elements 30. In the first embodiment, one semiconductor light-emitting element 30 is mounted on each of the first surface electrodes 61A-61H. The second surface electrodes 62A-62H, the third surface electrodes 63A-63H, the fourth surface electrode 64, the fifth surface electrodes 65A-65H, and the sixth surface electrodes 66A-66H are used for mounting driving circuits 40A-40H.

[0074] like Figure 2 As shown, the first surface electrodes 61A to 61H are located in the central region AC of the substrate 20. Figures 3-6 As shown, the other surface electrodes besides the first surface electrodes 61A-61H, namely the second surface electrodes 62A-62H, the third surface electrodes 63A-63H, the fourth surface electrode 64, the fifth surface electrodes 65A-65H, and the sixth surface electrodes 66A-66H, are located in the peripheral region AP of the substrate 20, which is located outside the first surface electrodes 61A-61H when viewed from above. Additionally, as... Figure 1 As shown, the fourth surface electrode 64 is formed in a ring shape surrounding the first surface electrodes 61A-61H, the second surface electrodes 62A-62H and the third surface electrodes 63A-63H when viewed from above.

[0075] The first surface electrodes 61A to 61H are concentrated in the central region AC of the substrate 20. In the first embodiment, the first surface electrodes 61A to 61D are arranged in a row along the X-axis direction, and the remaining first surface electrodes 61E to 61H are arranged in a row along the X-axis direction, adjacent to each other in the Y-axis direction. Therefore, the first surface electrodes 61A to 61H are arranged in a matrix adjacent to each other in the central region AC of the substrate 20. Thus, eight semiconductor light-emitting elements 30 are mounted in the central region AC. Figure 7 As shown, the semiconductor light-emitting element 30 is mounted to the first surface electrode 61A via a conductive bonding material SD. Similarly, semiconductor light-emitting elements 30 are also mounted on the other first surface electrodes 61B to 61H.

[0076] The first surface electrodes 61A-61H, the second surface electrodes 62A-62H, the third surface electrodes 63A-63H, the fourth surface electrode 64, the fifth surface electrodes 65A-65H, and the sixth surface electrodes 66A-66H are arranged in a symmetrical relationship within the substrate 20. In the first embodiment, these surface electrodes are arranged in a linearly symmetrical relationship with respect to an imaginary center line VC extending along the Y-axis direction at the center position of the substrate 20 in the X-axis direction. Furthermore, these surface electrodes are also arranged in a linearly symmetrical relationship with respect to an imaginary center line HC extending along the X-axis direction at the center position of the substrate 20 in the Y-axis direction.

[0077] Here, the peripheral region AP of substrate 20 includes four wiring (electrode) configuration areas divided based on the two imaginary center lines VC and HC mentioned above. Figure 1 The first peripheral region AP1, the second peripheral region AP2, the third peripheral region AP3, and the fourth peripheral region AP4 correspond to the lower right region, the lower left region, the upper right region, and the upper left region of the substrate 20, respectively. The surface electrode layout within the first to fourth peripheral regions AP1 to AP4 will be described below.

[0078] like Figure 3 As shown, the first surrounding area AP1 (in Figure 1 The lower right region (in the middle) is used for a portion of the second surface electrodes 62A, 62B, the third surface electrodes 63A, 63B, and the fourth surface electrode 64 (in Figure 1 The arrangement of the fifth surface electrodes 65A and 65B and the sixth surface electrodes 66A and 66B (the lower right region in the middle). As described above, the first surface electrodes 61A and 61B are disposed in the central region AC of the substrate 20.

[0079] The first surface electrodes 61A and 61B are used for mounting a semiconductor light-emitting element 30 as described above. The second to fifth surface electrodes 62A, 63A, 64, and 65A are used for mounting a driving circuit 40A. Additionally, the fifth and sixth surface electrodes 65A and 66A are used for mounting a protection diode 70A. The second to fifth surface electrodes 62B, 63B, 64, and 65B are used for mounting a driving circuit 40B. Additionally, the fifth and sixth surface electrodes 65B and 66B are used for mounting a protection diode 70B.

[0080] Therefore, the fourth surface electrode 64 within the first peripheral region AP1 (in Figure 1 The lower right area (in the middle) is shared in the mounting of drive circuits 40A and 40B. Thus, the first peripheral area AP1 of substrate 20 is allocated to the mounting of two semiconductor light-emitting elements 30, two drive circuits 40A and 40B, and two protection diodes 70A and 70B.

[0081] The switching element 411 of the drive circuit 40A is mounted on the second surface electrode 62A. The second surface electrode 62A is located adjacent to or close to the first surface electrode 61A in the Y-axis direction. The drain electrode 41D of the switching element 411 (see reference) Figure 7 ) through conductive bonding material SD (refer to Figure 7 The second surface electrode 62A is connected to the surface electrode 34 (cathode electrode) of the semiconductor light-emitting element 30 mounted on the first surface electrode 61A via a wire W1. Therefore, the drain electrode 41D of the switching element 411 (refer to...) Figure 7 It is connected to the surface electrode 34 of the semiconductor light-emitting element 30 on the first surface electrode 61A through the second surface electrode 62A and the wire W1.

[0082] The source electrode 41S of the switching element 411 is connected to the fourth surface electrode 64 via a wire W2. The gate electrode 41G of the switching element 411 is connected to the third surface electrode 63A via a wire W3. The third surface electrode 63A is located adjacent to or close to the second surface electrode 62A (the gate electrode 41G of the switching element 411) in the X-axis direction. The fourth surface electrode 64 includes a portion adjacent to or close to the second surface electrode 62A (the mounting area of ​​the switching element 411) in the Y-axis direction.

[0083] Wires W1 to W3 are bonding wires formed by a wire bonding device, such as using conductors like Au, Al, or Cu. The number of each of wires W1 to W3 is not particularly limited, as long as there is one or more. In the first embodiment, for example from the viewpoint of reducing the overall wiring inductance of the circuit, the current path CP located between the switching element 411 and the semiconductor light-emitting element 30 (see reference...) Figure 11The number of wires W1 and W2 on the ) is set to multiple (e.g., more than four).

[0084] The four capacitors 421 of the drive circuit 40A are mounted on both the fourth and fifth surface electrodes 64 and 65A. The first electrode 42A of each capacitor 421 is connected to a conductive bonding material SD (see reference). Figure 7 And is bonded to the fourth surface electrode 64, the second electrode 42B of each capacitor 421 is bonded to the conductive bonding material SD (see reference). Figure 7 It is then bonded to the fifth surface electrode 65A.

[0085] Furthermore, although omitted in the cross-sectional view, the protection diode 70A is mounted on both the fifth and sixth surface electrodes 65A and 66A. The protection diode 70A includes an anode electrode 71 and a cathode electrode 72. The anode electrode 71 is bonded to the sixth surface electrode 66A through a conductive bonding material, and the cathode electrode 72 is bonded to the fifth surface electrode 65A through a conductive bonding material.

[0086] The switching element 412 of the driving circuit 40B is mounted on the second surface electrode 62B. The second surface electrode 62B is positioned adjacent to or close to the first surface electrode 61B in the X-axis direction. Although omitted in the cross-sectional view, similar to the switching element 411, the drain electrode 41D of the switching element 412 is bonded to the second surface electrode 62B via a conductive bonding material. The second surface electrode 62B is connected to the surface electrode 34 (cathode electrode) of the semiconductor light-emitting element 30 mounted on the first surface electrode 61B via a wire W1. Therefore, the drain electrode 41D of the switching element 412 is connected to the surface electrode 34 of the semiconductor light-emitting element 30 on the first surface electrode 61B via the second surface electrode 62B and the wire W1.

[0087] The source electrode 41S of the switching element 412 is connected to the fourth surface electrode 64 via a wire W2. The gate electrode 41G of the switching element 412 is connected to the third surface electrode 63B via a wire W3. The third surface electrode 63B is located adjacent to or close to the second surface electrode 62B (the gate electrode 41G of the switching element 412) in the Y-axis direction. The fourth surface electrode 64 includes a portion adjacent to or close to the second surface electrode 62B (the mounting area of ​​the switching element 412) in the X-axis direction.

[0088] Here, similar to the switching element 411, from the viewpoint of reducing the overall wiring inductance of the circuit, for example, the current path CP between the switching element 412 and the semiconductor light-emitting element 30 (see reference) Figure 11 The number of wires W1 and W2 on the ) is set to multiple (e.g., more than four).

[0089] The four capacitors 422 of the drive circuit 40B are mounted on both the fourth and fifth surface electrodes 64 and 65B. Although omitted in the cross-sectional view, similar to capacitor 421, the first electrode 42A of each capacitor 422 is bonded to the fourth surface electrode 64 through a conductive bonding material, and the second electrode 42B of each capacitor 422 is bonded to the fifth surface electrode 65B through a conductive bonding material.

[0090] Furthermore, although omitted in the cross-sectional view, the protection diode 70B is mounted on both the fifth and sixth surface electrodes 65B and 66B. The anode electrode 71 of the protection diode 70B is bonded to the sixth surface electrode 66B through a conductive bonding material, and the cathode electrode 72 of the protection diode 70B is bonded to the fifth surface electrode 65B through a conductive bonding material.

[0091] like Figure 4 As shown, the second surrounding area AP2 (in Figure 1 The lower left region (center) is used for the arrangement of the second surface electrodes 62C, 62D, the third surface electrodes 63C, 63D, the fourth surface electrode 64, the fifth surface electrodes 65C, 65D, and the sixth surface electrodes 66C, 66D. As described above, the first surface electrodes 61C, 61D are disposed in the central region AC of the substrate 20.

[0092] The first surface electrodes 61C and 61D are used for mounting a semiconductor light-emitting element 30 as described above. The second to fifth surface electrodes 62C, 63C, 64, and 65C are used for mounting a driving circuit 40C. Additionally, the fifth and sixth surface electrodes 65C and 66C are used for mounting a protection diode 70C. The second to fifth surface electrodes 62D, 63D, 64, and 65D are used for mounting a driving circuit 40D. Additionally, the fifth and sixth surface electrodes 65D and 66D are used for mounting a protection diode 70D.

[0093] Therefore, the area of ​​the fourth surface electrode 64 located within the second peripheral region AP2 is shared in the mounting of the driving circuits 40C and 40D. In this way, the second peripheral region AP2 of the substrate 20 is allocated to the mounting of the two semiconductor light-emitting elements 30, the two driving circuits 40C and 40D, and the two protection diodes 70C and 70D.

[0094] The surface electrodes (and elements mounted on the surface electrodes) disposed in the second peripheral region AP2 and the surface electrodes (and elements mounted on the surface electrodes) disposed in the first peripheral region AP1 are arranged in a linearly symmetrical relationship with respect to the imaginary center line VC. Therefore, detailed descriptions of the configuration of the first surface electrodes 61C, 61D, the second surface electrodes 62C, 62D, the third surface electrodes 63C, 63D, the fourth surface electrode 64, the fifth surface electrodes 65C, 65D and the sixth surface electrodes 66C, 66D, as well as the two semiconductor light-emitting elements 30, the driving circuits 40C, 40D (switching elements 413, 414 and capacitors 423, 424) and the protection diodes 70C, 70D mounted on these surface electrodes are omitted.

[0095] like Figure 5 As shown, the third surrounding area AP3 (in Figure 1 The upper right region (center) is used for the configuration of the second surface electrodes 62E and 62F, the third surface electrodes 63E and 63F, the fourth surface electrode 64, the fifth surface electrode 65E and 65F, and the sixth surface electrodes 66E and 66F. As described above, the first surface electrodes 61E and 61F are disposed in the central region AC of the substrate 20.

[0096] The first surface electrodes 61E and 61F are used for mounting a semiconductor light-emitting element 30 as described above. The second to fifth surface electrodes 62E, 63E, 64, and 65E are used for mounting a driving circuit 40E. Additionally, the fifth and sixth surface electrodes 65E and 66E are used for mounting a protection diode 70E. The second to fifth surface electrodes 62F, 63F, 64, and 65F are used for mounting a driving circuit 40F. Additionally, the fifth and sixth surface electrodes 65F and 66F are used for mounting a protection diode 70F.

[0097] Therefore, the area of ​​the fourth surface electrode 64 located within the third peripheral region AP3 is shared in the mounting of the drive circuits 40E and 40F. In this way, the third peripheral region AP3 of the substrate 20 is allocated to the mounting of the two semiconductor light-emitting elements 30, the two drive circuits 40E and 40F, and the two protection diodes 70E and 70F.

[0098] The surface electrodes (and elements mounted on the surface electrodes) configured in the third peripheral region AP3 and the surface electrodes (and elements mounted on the surface electrodes) configured in the first peripheral region AP1 are arranged in a linearly symmetrical relationship with respect to the imaginary center line HC. Therefore, detailed descriptions of the configuration of the first surface electrodes 61E, 61F, the second surface electrodes 62E, 62F, the third surface electrodes 63E, 63F, the fourth surface electrode 64, the fifth surface electrodes 65E, 65F, and the sixth surface electrodes 66E, 66F, as well as the two semiconductor light-emitting elements 30, the driving circuits 40E, 40F (switching elements 415, 416 and capacitors 425, 426), and the protection diodes 70E, 70F mounted on these surface electrodes are omitted.

[0099] like Figure 6 As shown, the fourth surrounding area AP4 (in Figure 1 The upper left region (center) is used for the configuration of the second surface electrodes 62G and 62H, the third surface electrodes 63G and 63H, the fourth surface electrode 64, the fifth surface electrodes 65G and 65H, and the sixth surface electrodes 66G and 66H. As described above, the first surface electrodes 61G and 61H are disposed in the central region AC of the substrate 20.

[0100] The first surface electrodes 61G and 61H are used for mounting a semiconductor light-emitting element 30 as described above. The second to fifth surface electrodes 62G, 63G, 64, and 65G are used for mounting a driving circuit 40G. Additionally, the fifth and sixth surface electrodes 65G and 66G are used for mounting a protection diode 70G. The second to fifth surface electrodes 62H, 63H, 64, and 65H are used for mounting a driving circuit 40H. Additionally, the fifth and sixth surface electrodes 65H and 66H are used for mounting a protection diode 70H.

[0101] Therefore, the area of ​​the fourth surface electrode 64 located within the fourth peripheral region AP4 is shared in the mounting of the driving circuits 40G and 40H. In this way, the fourth peripheral region AP4 of the substrate 20 is allocated to the mounting of the two semiconductor light-emitting elements 30, the two driving circuits 40G and 40H, and the two protection diodes 70G and 70H.

[0102] The surface electrodes (and elements mounted on them) disposed in the fourth peripheral region AP4 and the surface electrodes (and elements mounted on them) disposed in the second peripheral region AP2 are arranged in a linearly symmetrical relationship with respect to the imaginary center line HC. Furthermore, the surface electrodes (and elements mounted on them) disposed in the fourth peripheral region AP4 and the surface electrodes (and elements mounted on them) disposed in the third peripheral region AP3 are arranged in a linearly symmetrical relationship with respect to the imaginary center line VC. Therefore, detailed descriptions of the configuration of the first surface electrodes 61G, 61H, the second surface electrodes 62G, 62H, the third surface electrodes 63G, 63H, the fourth surface electrode 64, the fifth surface electrodes 65G, 65H, and the sixth surface electrodes 66G, 66H, as well as the two semiconductor light-emitting elements 30, the driving circuits 40G, 40H (switching elements 417, 418 and capacitors 427, 428), and the protection diodes 70G, 70H mounted on these surface electrodes are omitted.

[0103] like Figure 7 As shown, the main surface resist layer 29A includes multiple openings that expose a portion of the first electrode layer 28A. Components of multiple semiconductor light-emitting elements 30, driving circuits 40A-40H, and protection diodes 70A-70H are mounted on the portion of the first electrode layer 28A exposed through the openings of the main surface resist layer 29A. Furthermore, in Figures 1-6 In the diagram, the opening of the main surface anti-corrosion layer 29A is indicated by a double-dotted line.

[0104] (1-5B. Second electrode layer (back electrode layer))

[0105] like Figure 9 As shown, the second electrode layer 28B (back electrode layer) located on the back side 22 of the substrate 20 includes a plurality of back electrodes (patterned electrodes) separated from each other. These back electrodes function as external electrode terminals electrically connected to the circuit substrate when the semiconductor light-emitting device 10 is mounted relative to the circuit substrate (not shown). In the first embodiment, the second electrode layer 28B includes first back electrodes 81A-81H, second back electrodes 82A-82H, third back electrodes 83A-83H, fourth back electrodes 84A-84D, and fifth back electrodes 85A-85H.

[0106] The first back electrode 81A-81H, the second back electrode 82A-82H, the third back electrode 83A-83H, the fourth back electrode 84A-84D, and the fifth back electrode 85A-85H are arranged in a linearly symmetrical relationship with respect to the two imaginary center lines VC and HC. As described above, the peripheral region AP includes the first to fourth peripheral regions AP1 to AP4, which are four wiring configuration regions divided based on the imaginary center lines VC and HC. When viewing the substrate 20 from the back side 22, the first peripheral region AP1, the second peripheral region AP2, the third peripheral region AP3, and the fourth peripheral region AP4 are respectively aligned with the two imaginary center lines VC and HC. Figure 9 The lower left, lower right, upper left, and upper right regions of the substrate 20 correspond to each other. The layout of the back electrode within the first to fourth peripheral regions AP1 to AP4 will be described below.

[0107] First surrounding area AP1 (in Figure 9 The lower left area (center) is used for the configuration of the first back electrode 81A, 81B, the second back electrode 82A, 82B, the third back electrode 83A, 83B, the fourth back electrode 84A, and the fifth back electrode 85A, 85B.

[0108] The first to fifth back electrodes 81A, 82A, 83A, 84A, and 85A are provided for electrical connection between the drive circuit 40A (switching element 411 and capacitor 421), a semiconductor light-emitting element 30 that is driven by the drive circuit 40A, and a protection diode 70A.

[0109] The first back electrode 81A is positioned relative to the first and fifth surface electrodes 61A and 65A (see reference) when viewed from above. Figure 3 The first back electrode 81A is formed as, for example, a strip extending along the Y-axis. The second back electrode 82A is positioned at the location where, when viewed from above, it overlaps with the second surface electrode 62A (see reference). Figure 3 The second back electrode 82A is formed, for example, in an elongated oval shape, and is disposed adjacent to or close to the first back electrode 81A in the X-axis direction.

[0110] The third rear electrode 83A is positioned above the third surface electrode 63A (see reference). Figure 3 The third back electrode 83A is formed as a bent strip, for example, with a shorter dimension in the Y-axis direction compared to the first back electrode 81A, and is disposed adjacent to or close to the first back electrode 81A in the X-axis direction. The fourth back electrode 84A is disposed in a portion of the fourth surface electrode 64 within the first peripheral region AP1 when viewed from above (see reference). Figure 3 The fifth rear electrode 85A is positioned at the overlapping position with the sixth surface electrode 66A (see reference 1) when viewed from above. Figure 3 The overlapping position. The fifth back electrode 85A is formed, for example, in an elongated oval shape, and is located between the first back electrode 81A and the third back electrode 83A in the X-axis direction.

[0111] The first to fifth back electrodes 81B, 82B, 83B, 84A, and 85B are provided for electrical connection between the drive circuit 40B (switching element 412 and capacitor 422), a semiconductor light-emitting element 30 that is driven by the drive circuit 40B, and a protection diode 70B.

[0112] The first back electrode 81B is positioned alongside the first and fifth surface electrodes 61B and 65B (see reference 1) when viewed from above. Figure 3 The first back electrode 81B is formed as, for example, a strip extending along the X-axis. The second back electrode 82B is positioned at the location where, when viewed from above, it overlaps with the second surface electrode 62B (see reference). Figure 3 The second back electrode 82B is formed, for example, in an elongated oval shape, and is disposed adjacent to or close to the first back electrode 81B in the Y-axis direction.

[0113] The third rear electrode 83B is positioned above the third surface electrode 63B (see reference). Figure 3 The third back electrode 83B is formed as a bent strip, for example, with a shorter dimension in the X-axis direction than the first back electrode 81B, and is disposed adjacent to or close to the first back electrode 81B in the Y-axis direction. The fifth back electrode 85B is positioned at a position where, when viewed from above, it overlaps with the sixth surface electrode 66B (see reference). Figure 3 The overlapping position. The sixth back electrode 85B is formed, for example, in an elongated oval shape, and is located between the first back electrode 81B and the third back electrode 83B in the Y-axis direction.

[0114] Second surrounding area AP2 (in Figure 9 The lower right area (center) is used for the configuration of the first back electrode 81C, 81D, the second back electrode 82C, 82D, the third back electrode 83C, 83D, the fourth back electrode 84B, and the fifth back electrode 85C, 85D.

[0115] The first to fifth back electrodes 81C, 82C, 83C, 84B, and 85C are provided for electrical connection between the drive circuit 40C (switching element 413 and capacitor 423), a semiconductor light-emitting element 30 driven by the drive circuit 40C, and a protection diode 70C. The first to fifth back electrodes 81D, 82D, 83D, 84B, and 85D are provided for electrical connection between the drive circuit 40D (switching element 414 and capacitor 424), a semiconductor light-emitting element 30 driven by the drive circuit 40D, and a protection diode 70D.

[0116] The back electrode disposed in the second peripheral region AP2 and the back electrode disposed in the first peripheral region AP1 are arranged in a linearly symmetrical relationship with respect to the imaginary center line VC. Therefore, detailed descriptions of the configurations of the first back electrode 81C, 81D, the second back electrode 82C, 82D, the third back electrode 83C, 83D, the fourth back electrode 84B, and the fifth back electrode 85C, 85D are omitted.

[0117] The third surrounding area AP3 (in Figure 9 The upper left area (center) is used for the configuration of the first back electrode 81E, 81F, the second back electrode 82E, 82F, the third back electrode 83E, 83F, the fourth back electrode 84C, and the fifth back electrode 85E, 85F.

[0118] The first to fifth back electrodes 81E, 82E, 83E, 84C, and 85E are provided for electrical connection between the drive circuit 40E (switching element 415 and capacitor 425), a semiconductor light-emitting element 30 driven by the drive circuit 40E, and a protection diode 70E. The first to fifth back electrodes 81F, 82F, 83F, 84C, and 85F are provided for electrical connection between the drive circuit 40F (switching element 416 and capacitor 426), a semiconductor light-emitting element 30 driven by the drive circuit 40F, and a protection diode 70F.

[0119] The back electrode disposed in the third peripheral region AP3 and the back electrode disposed in the first peripheral region AP1 are arranged in a linearly symmetrical relationship with respect to the imaginary center line HC. Therefore, detailed descriptions of the configurations of the first back electrode 81E, 81F, the second back electrode 82E, 82F, the third back electrode 83E, 83F, the fourth back electrode 84C, and the fifth back electrode 85E, 85F are omitted.

[0120] The fourth surrounding area AP4 (in Figure 9The upper right area (in the middle) is used for the configuration of the first back electrode 81G, 81H, the second back electrode 82G, 82H, the third back electrode 83G, 83H, the fourth back electrode 84D, and the fifth back electrode 85G, 85H.

[0121] The first to fifth back electrodes 81G, 82G, 83G, 84D, and 85G are provided for electrical connection between the drive circuit 40G (switching element 417 and capacitor 427), a semiconductor light-emitting element 30 driven by the drive circuit 40G, and a protection diode 70G. The first to fifth back electrodes 81H, 82H, 83H, 84D, and 85H are provided for electrical connection between the drive circuit 40H (switching element 418 and capacitor 428), a semiconductor light-emitting element 30 driven by the drive circuit 40H, and a protection diode 70H.

[0122] The back electrode disposed in the fourth peripheral region AP4 and the back electrode disposed in the second peripheral region AP2 are arranged in a linearly symmetrical relationship with respect to the imaginary center line HC. Furthermore, the back electrode disposed in the fourth peripheral region AP4 and the back electrode disposed in the third peripheral region AP3 are arranged in a linearly symmetrical relationship with respect to the imaginary center line VC. Therefore, detailed descriptions of the arrangements of the first back electrode 81G, 81H, the second back electrode 82G, 82H, the third back electrode 83G, 83H, the fourth back electrode 84D, and the fifth back electrode 85G, 85H are omitted.

[0123] like Figure 7 As shown, the back resist layer 29B includes multiple openings that expose a portion of the second electrode layer 28B. The semiconductor light-emitting device 10 is mounted on a circuit board (not shown) through the portion of the second electrode layer 28B exposed by the openings in the back resist layer 29B. Therefore, the semiconductor light-emitting device 10 can be referred to as a surface-mount device mounted on a circuit board. Furthermore, in Figure 9 In the diagram, the opening of the back anti-corrosion layer 29B is indicated by a double-dotted line.

[0124] (1-5C. Third and fourth electrode layers (intermediate electrode layers))

[0125] like Figure 7As shown, third and fourth electrode layers 28C and 28D, respectively serving as intermediate electrode layers, are embedded in the substrate 20. The third electrode layer 28C, serving as a surface-side intermediate electrode layer, is located between the first substrate 27A, which includes the main surface 21 of the substrate 20, and the third substrate 27C, which is located at the center in the thickness direction of the substrate 20. On the other hand, the fourth electrode layer 28D, serving as a back-side intermediate electrode layer, is located between the second substrate 27B and the third substrate 27C, which include the back-side surface 22 of the substrate 20. In the first embodiment, the third electrode layer 28C (surface-side intermediate electrode layer) and the fourth electrode layer 28D (back-side intermediate electrode layer) have the same structure. Therefore, the third electrode layer 28C will be described below, while a detailed description of the fourth electrode layer 28D will be omitted.

[0126] like Figure 10 As shown, the third electrode layer 28C includes a plurality of intermediate electrodes (patterned electrodes) that are separated from each other. In the first embodiment, the third electrode layer 28C includes first intermediate electrodes 91A-91H, second intermediate electrodes 92A-92H, third intermediate electrodes 93A-93H, and fourth intermediate electrodes 94A-94D.

[0127] The first intermediate electrodes 91A-91H, the second intermediate electrodes 92A-92H, the third intermediate electrodes 93A-93H, and the fourth intermediate electrodes 94A-94D are arranged in a linearly symmetrical relationship with respect to the two imaginary center lines VC and HC. As described above, the peripheral region AP includes the first to fourth peripheral regions AP1-AP4, which are four wiring configuration areas divided based on the imaginary center lines VC and HC. The first peripheral region AP1, the second peripheral region AP2, the third peripheral region AP3, and the fourth peripheral region AP4 are respectively aligned with the two imaginary center lines VC and HC. Figure 10 The lower right, lower left, upper right, and upper left regions of the substrate 20 correspond to each other. The layout of the intermediate electrodes within the first to fourth peripheral regions AP1 to AP4 will be described below.

[0128] First surrounding area AP1 (in Figure 10 The middle area (lower right region) is used for the configuration of the first intermediate electrodes 91A, 91B, the second intermediate electrodes 92A, 92B, the third intermediate electrodes 93A, 93B and the fourth intermediate electrode 94A.

[0129] The first to fourth intermediate electrodes 91A, 92A, 93A, and 94A are provided for the electrical connection between the drive circuit 40A (switching element 411 and capacitor 421), a semiconductor light-emitting element 30 that is driven by the drive circuit 40A, and the protection diode 70A.

[0130] The first intermediate electrode 91A is formed into a strip along the Y-axis and is positioned alongside the first and fifth surface electrodes 61A and 65A (see reference 1) when viewed from above. Figure 3 ) overlaps with and is also associated with the first back electrode 81A (see reference) Figure 9 (The overlapping positions.)

[0131] The second intermediate electrode 92A is positioned relative to the second and sixth surface electrodes 62A and 66A (see reference) when viewed from above. Figure 3 It overlaps with and is also associated with the second and fifth back electrodes 82A and 85A (see reference). Figure 9 The overlapping position. The second intermediate electrode 92A is formed as a bent strip with a shorter dimension in the Y-axis direction than the first intermediate electrode 91A, and is disposed adjacent to or close to the first intermediate electrode 91A in the X-axis direction.

[0132] The third intermediate electrode 93A is positioned above the third surface electrode 63A (see reference). Figure 3 ) and the third back electrode 83A (refer to Figure 9 The third intermediate electrode 93A is formed, for example, in a circular shape. The fourth intermediate electrode 94A is disposed at a position overlapping with a portion of the fourth surface electrode 64 within the first peripheral region AP1 when viewed from above (see reference). Figure 3 ) overlaps with and is also associated with the fourth back electrode 84A (refer to Figure 9 The overlapping positions. The fourth intermediate electrode 94A is formed, for example, in a rectangular shape.

[0133] The first to fourth intermediate electrodes 91B, 92B, 93B, and 94A are provided for the electrical connection between the drive circuit 40B (switching element 412 and capacitor 422), a semiconductor light-emitting element 30 that is driven by the drive circuit 40B, and the protection diode 70B.

[0134] The first intermediate electrode 91B is formed into a strip along the X-axis and is positioned alongside the first and fifth surface electrodes 61B and 65B (see reference 1) when viewed from above. Figure 3 ) overlaps with and is also associated with the first back electrode 81B (see reference) Figure 9 (The overlapping positions.)

[0135] The second intermediate electrode 92B is positioned relative to the second and sixth surface electrodes 62B and 66B (see reference) when viewed from above. Figure 3 It overlaps with and is also associated with the second and fifth back electrodes 82B and 85B (see reference). Figure 9 The overlapping position. The second intermediate electrode 92B is formed as a bent strip with a shorter dimension in the X-axis direction than the first intermediate electrode 91B, and is disposed adjacent to or close to the second intermediate electrode 91B in the Y-axis direction.

[0136] The third intermediate electrode 93B is positioned above the third surface electrode 63B (see reference). Figure 3) and the third back electrode 83B (refer to Figure 9 The overlapping positions. The third intermediate electrode 93B is formed, for example, in a circular shape.

[0137] Second surrounding area AP2 (in Figure 10 The lower left area (in the middle) is used for the configuration of the first intermediate electrode 91C, 91D, the second intermediate electrode 92C, 92D, the third intermediate electrode 93C, 93D and the fourth intermediate electrode 94B.

[0138] The first to fourth intermediate electrodes 91C, 92C, 93C, and 94B are provided for electrical connection between the drive circuit 40C (switching element 413 and capacitor 423), a semiconductor light-emitting element 30 driven by the drive circuit 40C, and a protection diode 70C. The first intermediate electrodes 91D, 92D, 93D, and 94B are provided for electrical connection between the drive circuit 40D (switching element 414 and capacitor 424), a semiconductor light-emitting element 30 driven by the drive circuit 40D, and a protection diode 70D.

[0139] The intermediate electrodes disposed in the second peripheral region AP2 and the intermediate electrodes disposed in the first peripheral region AP1 are arranged in a linearly symmetrical relationship with respect to the imaginary center line VC. Therefore, detailed descriptions of the configurations of the first intermediate electrodes 91C, 91D, the second intermediate electrodes 92C, 92D, the third intermediate electrodes 93C, 93D, and the fourth intermediate electrode 94B are omitted.

[0140] The third surrounding area AP3 (in Figure 10 The upper right area (in the middle) is used for the configuration of the first intermediate electrode 91E, 91F, the second intermediate electrode 92E, 92F, the third intermediate electrode 93E, 93F and the fourth intermediate electrode 94C.

[0141] The first to fourth intermediate electrodes 91E, 92E, 93E, and 94C are provided for electrical connection between the drive circuit 40E (switching element 415 and capacitor 425), a semiconductor light-emitting element 30 driven by the drive circuit 40E, and a protection diode 70E. The first to fourth intermediate electrodes 91F, 92F, 93F, and 94C are provided for electrical connection between the drive circuit 40F (switching element 416 and capacitor 426), a semiconductor light-emitting element 30 driven by the drive circuit 40F, and a protection diode 70F.

[0142] The intermediate electrode disposed in the third peripheral region AP3 and the intermediate electrode disposed in the first peripheral region AP1 are arranged in a linearly symmetrical relationship with respect to the imaginary center line HC. Therefore, detailed descriptions of the arrangement of the first intermediate electrode 91E, 91F, the second intermediate electrode 92E, 92F, the third intermediate electrode 93E, 93F and the fourth intermediate electrode 94C are omitted.

[0143] The fourth surrounding area AP4 (in Figure 10 The middle area (upper left region) is used for the configuration of the first intermediate electrodes 91G, 91H, the second intermediate electrodes 92G, 92H, the third intermediate electrodes 93G, 93H and the fourth intermediate electrode 94D.

[0144] The first to fourth intermediate electrodes 91G, 92G, 93G, and 94D are provided for electrical connection between the drive circuit 40G (switching element 417 and capacitor 427), a semiconductor light-emitting element 30 driven by the drive circuit 40G, and a protection diode 70G. The first to fourth intermediate electrodes 91H, 92H, 93H, and 94D are provided for electrical connection between the drive circuit 40H (switching element 418 and capacitor 428), a semiconductor light-emitting element 30 driven by the drive circuit 40H, and a protection diode 70H.

[0145] The intermediate electrode disposed in the fourth peripheral region AP4 and the intermediate electrode disposed in the second peripheral region AP2 are arranged in a linearly symmetrical relationship with respect to the imaginary center line HC. Furthermore, the intermediate electrode disposed in the fourth peripheral region AP4 and the intermediate electrode disposed in the third peripheral region AP3 are arranged in a linearly symmetrical relationship with respect to the imaginary center line VC. Therefore, detailed descriptions of the arrangements of the first intermediate electrodes 91G, 91H, the second intermediate electrodes 92G, 92H, the third intermediate electrodes 93G, 93H, and the fourth intermediate electrode 94D are omitted.

[0146] (1-6. Connection structure between electrode layers)

[0147] The substrate 20 includes multiple vias (connecting conductors) electrically connecting the first electrode layer 28A (surface electrode layer), the second electrode layer 28B (back electrode layer), and the third and fourth electrode layers 28C and 28D (intermediate electrode layers, respectively). For example, as Figures 3 to 10As shown, the substrate 20 includes first through-holes 101A-101H, second through-holes 102A-102H, third through-holes 103A-103H, fourth through-holes 104A-104D, fifth through-holes 105A-105H, and sixth through-holes 106A-106H that respectively penetrate the first to third substrates 27A-27C and the third and fourth electrode layers 28C, 28D along the thickness direction of the substrate 20. Additionally, these through-holes may also penetrate the first and second electrode layers 28A, 28B. These through-holes are formed, for example, from one or more materials selected from the group consisting of Ti, TiN, Au, Ag, Cu, Al, and W.

[0148] like Figures 3-6 , Figure 9 and Figure 10 As shown, the first through holes 101A to 101H are located in the central region AC of the substrate 20. The second through holes 102A to 102H, the third through holes 103A to 103H, the fourth through holes 104A to 104D, the fifth through holes 105A to 105H, and the sixth through holes 106A to 106H are located in the peripheral region AP of the substrate 20, and are arranged in a linearly symmetrical relationship with respect to the two imaginary center lines VC and HC. As described above, the peripheral region AP includes the first to fourth peripheral regions AP1 to AP4, which are divided based on the imaginary center lines VC and HC. The layout of the multiple through holes in the first to fourth peripheral regions AP1 to AP4 will be described below.

[0149] The first peripheral area AP1 includes first through holes 101A and 101B, second through holes 102A and 102B, third through holes 103A and 103B, fourth through holes 104A, fifth through holes 105A and 105B, and sixth through holes 106A and 106B.

[0150] The first via 101A electrically connects the first surface electrode 61A of the first electrode layer 28A, the first back electrode 81A of the second electrode layer 28B, and the first intermediate electrode 91A of the third and fourth electrode layers 28C and 28D. The number of first vias 101A is not particularly limited; for example, more than one may be provided for each semiconductor light-emitting element 30. In a first embodiment, for example, a plurality of first vias 101A may be configured in a matrix (e.g., 3×3) using approximately the entire area of ​​the electrode overlap portion available in the configuration of the first vias 101A.

[0151] The second through-hole 102A electrically connects the second surface electrode 62A of the first electrode layer 28A, the second back electrode 82A of the second electrode layer 28B, and the second intermediate electrode 92A of the third and fourth electrode layers 28C and 28D. The number of second through-holes 102A is not particularly limited; for example, one or more may be provided at the overlapping position of the second surface electrode 62A, the second back electrode 82A, and the two second intermediate electrodes 92A.

[0152] The third through-hole 103A electrically connects the third surface electrode 63A of the first electrode layer 28A, the third back electrode 83A of the second electrode layer 28B, and the third intermediate electrode 93A of the third and fourth electrode layers 28C and 28D. The number of third through-holes 103A is not particularly limited; for example, one or more can be provided at the overlapping position of the third surface electrode 63A, the third back electrode 83A, and the two third intermediate electrodes 93A.

[0153] The fourth via 104A electrically connects the fourth surface electrode 64 of the first electrode layer 28A, the fourth back electrode 84A of the second electrode layer 28B, and the fourth intermediate electrode 94A of the third and fourth electrode layers 28C and 28D. The number of fourth vias 104A is not particularly limited; for example, one or more may be provided at the overlapping positions of the fourth surface electrode 64, the fourth back electrode 84A, and the two fourth intermediate electrodes 94A. In the first embodiment, for example, a plurality of fourth vias 104A may be arranged in a matrix (e.g., 4×8) using approximately the entire area of ​​the electrode overlap portion available in the configuration of the fourth vias 104A.

[0154] The fifth via 105A electrically connects the fifth surface electrode 65A of the first electrode layer 28A, the first back electrode 81A of the second electrode layer 28B, and the first intermediate electrodes 91A of the third and fourth electrode layers 28C and 28D. The number of fifth vias 105A is not particularly limited; for example, one or more may be provided at the overlapping position of the fifth surface electrode 65A, the first back electrode 81A, and the two first intermediate electrodes 91A. In the first embodiment, for example, a plurality of fifth vias 105A may be arranged in a matrix (e.g., 2×5) using the area of ​​the electrode overlap portion available in the arrangement of the fifth vias 105A.

[0155] The sixth through-hole 106A electrically connects the sixth surface electrode 66A of the first electrode layer 28A, the fifth back electrode 85A of the second electrode layer 28B, and the second intermediate electrodes 92A of the third and fourth electrode layers 28C and 28D. The number of sixth through-holes 106A is not particularly limited; for example, more than one can be provided at the overlapping position of the sixth surface electrode 66A, the fifth back electrode 85A, and the two second intermediate electrodes 92A.

[0156] In the first peripheral area AP1, the first, second, third, fifth, and sixth through holes 101B, 102B, 103B, 105B, and 106B are configured in the same manner as the first, second, third, fifth, and sixth through holes 101A, 102A, 103A, 105A, and 106A described above. Therefore, detailed descriptions of the first, second, third, fifth, and sixth through holes 101B, 102B, 103B, 105B, and 106B are omitted.

[0157] The second peripheral area AP2 includes first through holes 101C and 101D, second through holes 102C and 102D, third through holes 103C and 103D, fourth through holes 104B, fifth through holes 105C and 105D, and sixth through holes 106C and 106D. The third peripheral area AP3 includes first through holes 101E and 101F, second through holes 102E and 102F, third through holes 103E and 103F, fourth through holes 104C, fifth through holes 105E and 105F, and sixth through holes 106E and 106F. The fourth peripheral area AP4 includes first through holes 101G and 101H, second through holes 102G and 102H, third through holes 103G and 103H, fourth through holes 104D, fifth through holes 105G and 105H, and sixth through holes 106G and 106H. The configuration of the through holes in the second to fourth peripheral regions AP2 to AP4 is the same as that in the first peripheral region AP1, so detailed descriptions are omitted.

[0158] (1-7. Current path of semiconductor light-emitting device)

[0159] The semiconductor light-emitting device 10 is specifically embodied as a multi-channel driving type light-emitting module in which multiple driving circuits 40 drive one or more (one in the first embodiment) semiconductor light-emitting elements 30. As described above, in the semiconductor light-emitting device 10, the driving circuits 40 and the semiconductor light-emitting elements 30 are mounted together on the substrate 20. Therefore, a current path is formed within the substrate 20 between each driving circuit 40 and the semiconductor light-emitting element 30 that it drives.

[0160] Figure 11 The current path CP (indicated by the arrow) of the current flowing in the drive circuit 40A (switching element 411 and capacitor 421) and the semiconductor light-emitting element 30 that is driven by the drive circuit 40A is shown.

[0161] The current path CP is configured as a loop that allows current to flow in the following order: the second electrode 42B of capacitor 421, the fifth surface electrode 65A of the first electrode layer 28A (surface electrode layer), the fifth through-hole 105A, the first intermediate electrode 91A of the third electrode layer 28C (surface-side intermediate electrode layer), the first through-hole 101A, the first surface electrode 61A of the first electrode layer 28A, the back electrode 35 (anode electrode) of semiconductor light-emitting element 30, the surface electrode 34 (cathode electrode) of semiconductor light-emitting element 30, the wire W1, the second surface electrode 62A of the first electrode layer 28A, the drain electrode 41D of switching element 411, the source electrode 41S of switching element 411, the wire W2, the fourth surface electrode 64 of the first electrode layer 28A, and the first electrode 42A of capacitor 421. Furthermore, as described above, a protection diode 70A is connected in anti-parallel to the semiconductor light-emitting element 30, which is the target of the driving circuit 40A.

[0162] Furthermore, although detailed explanations are omitted here, each of the other drive circuits 40B to 40H is electrically connected in the same way as drive circuit 40A, and independently forms a loop-shaped current path similar to the current path CP described above. Additionally, each of the other protection diodes 70B to 70H is electrically connected in the same way as protection diode 70A.

[0163] (1-8. Circuit structure of semiconductor light-emitting devices)

[0164] like Figure 12 As shown, the light-emitting system 200, including the semiconductor light-emitting device 10, includes a DC power supply 201, a capacitor 202 connected in parallel with the DC power supply 201, a current-limiting resistor 203, anti-reverse current diodes 204A-204H, gate drivers 205A-205H, pulse generators 206A-206H, and control power supplies 207A-207H. Furthermore, for clarity, in... Figure 12 The diagrams of drive circuits 40C-40F, semiconductor light-emitting elements 30 driven by drive circuits 40C-40F, protection diodes 70C-70F, anti-reverse current diodes 204C-204F, gate drivers 205C-205F, pulse generators 206C-206F, and control power supplies 207C-207F are omitted. Anti-reverse current diodes 204A-204H, gate drivers 205A-205H, pulse generators 206A-206H, and control power supplies 207A-207H are arranged to correspond to drive circuits 40A-40H respectively.

[0165] The DC power supply 201, capacitor 202, and current-limiting resistor 203 are configured to supply current to multiple semiconductor light-emitting elements 30 and driving circuits 40A to 40H. The DC power supply 201, capacitor 202, and current-limiting resistor 203 are an example of a power input section. The first terminal of the current-limiting resistor 203 is electrically connected to the positive terminal of the DC power supply 201.

[0166] The anodes of the anti-reverse current diodes 204A to 204H are electrically connected to the second terminal of the current-limiting resistor 203. The cathodes of the anti-reverse current diodes 204A to 204H are electrically connected to the back electrode 35 (anode electrode) of each semiconductor light-emitting element 30 and the second electrode 42B of capacitors 421 to 428 via the second back electrode 82A to 82H.

[0167] Gate drivers 205A to 205H are electrically connected to the gate electrodes 41G of the switching elements 411 to 418 of the drive circuits 40A to 40H, respectively. In the first embodiment, gate drivers 205A to 205H are electrically connected to third back electrodes 83A to 83H, which are electrically connected to the gate electrodes 41G of the switching elements 411 to 418, respectively. Gate drivers 205A to 205H are configured to independently drive the switching elements 411 to 418 by applying gate voltage signals to the gate electrodes 41G of the switching elements 411 to 418, respectively.

[0168] Pulse generators 206A-206H and control power supplies 207A-207H are electrically connected to gate drivers 205A-205H. Pulse generators 206A-206H are configured to output pulse signals to gate drivers 205A-205H for controlling switching elements 411-418. Control power supplies 207A-207H are configured to apply operating voltages to gate drivers 205A-205H.

[0169] The negative terminal of DC power supply 201, capacitor 202, pulse generators 206A to 206H, the first electrode 42A of capacitors 421 to 428, the negative terminal of control power supply 207A to 207H, and the source electrode 41S of switching elements 411 to 418 are electrically connected to the grounding terminal (the fourth surface electrode 64 of the first electrode layer 28A, and the fourth intermediate electrodes 94A to 94D of the third and fourth electrode layers 28C and 28D) via grounding wiring (the fourth back electrode 84A to 84D of the second electrode layer 28B).

[0170] The drain electrode 41D of the switching elements 411 to 418 is electrically connected to the surface electrode 34 (cathode electrode) of the corresponding semiconductor light-emitting element 30 and the anode electrode 71 of the protection diodes 70A to 70H, respectively. The cathode electrode 72 of the protection diodes 70A to 70H is electrically connected to the back electrode 35 (anode electrode) of the corresponding semiconductor light-emitting element 30, respectively.

[0171] In the semiconductor light-emitting device 10 configured as described above, when the switching elements 411-418 of the drive circuits 40A-40H are in the off state, the capacitors 421-428 are charged by the DC power supply 201. Furthermore, when the switching elements 411-418 switch from the off state to the on state, current flows from the capacitors 421-428 through the switching elements 411-418 to each semiconductor light-emitting element 30 that is being controlled. As a result, pulsed laser light is emitted from the semiconductor light-emitting element 30. Thus, each drive circuit 40A-40H is configured to drive the semiconductor light-emitting element 30 independently.

[0172] As an example, driving circuits 40A to 40H sequentially drive the semiconductor light-emitting elements 30 that are being driven. In this case, compared to a semiconductor light-emitting device that has only one semiconductor light-emitting element, the pulse emission of each semiconductor light-emitting element 30 can be adjusted by shortening the pulse interval of the laser emitted from the semiconductor light-emitting device 10. Therefore, the number of pulses per unit time can be increased. In addition, by driving the semiconductor light-emitting elements 30 that are being driven sequentially by driving circuits 40A to 40H, the heat generation of each semiconductor light-emitting element 30 can be suppressed compared to a semiconductor light-emitting device that has only one semiconductor light-emitting element.

[0173] (1-9. The function of semiconductor light-emitting devices)

[0174] In recent years, there has been an increasing demand for high-output semiconductor light-emitting devices. For example, when applying semiconductor light-emitting devices to laser systems such as LiDAR, there is a need for expanded field of view and improved resolution. To meet such demands, the semiconductor light-emitting device 10 of the first embodiment is specifically embodied as a multi-channel (eight-channel in the first embodiment) driving type light-emitting module that uses multiple (eight in the first embodiment) driving circuits 40A to 40H to drive multiple semiconductor light-emitting elements 30.

[0175] In the first embodiment, a plurality (e.g., eight) semiconductor light-emitting elements 30, each consisting of a light-emitting element (e.g., a PCSEL element) that emits light in a direction intersecting with the main surface 21 of the substrate 20, are concentrated in the central region AC of the substrate 20. In this structure, compared to arranging a plurality of semiconductor light-emitting elements consisting of end-face light-emitting elements at the ends of the substrate 20, more semiconductor light-emitting elements 30 can be mounted on the semiconductor light-emitting device 10 with a high degree of layout freedom, without being constrained by design limitations such as wiring layout. This increases the number of channels, thereby achieving, for example, an expanded field of view and improved resolution as required by LiDAR.

[0176] (1-10. Advantages of semiconductor light-emitting devices)

[0177] The semiconductor light-emitting device 10 of the first embodiment has the following advantages.

[0178] (1-1) The semiconductor light-emitting device 10 includes: a plurality of semiconductor light-emitting elements 30; and a plurality of driving circuits 40A to 40H for driving one or more of the plurality of semiconductor light-emitting elements 30 (one in the first embodiment) respectively. That is, the semiconductor light-emitting device 10 is specifically embodied as a multi-channel type (in Figure 1 In this example, an eight-channel driven light-emitting module is used. Furthermore, each semiconductor light-emitting element 30 is a light-emitting element that emits light in a direction intersecting with the main surface 21 of the substrate 20. In this structure, compared to the case where the semiconductor light-emitting elements 30 are disposed at the ends of the substrate 20, more semiconductor light-emitting elements 30 can be mounted on the semiconductor light-emitting device 10 with a high degree of layout freedom, without being constrained by design limitations such as wiring layout.

[0179] (1-2) Each semiconductor light-emitting element 30 is a PCSEL element. PCSEL elements are capable of high-output operation (high-brightness operation) based on beam emission with high beam quality and narrow divergence angle. In particular, since the beam divergence angle can be set to be extremely small (e.g., less than 1°) compared to end-face light-emitting elements, elements such as collimating lenses, which are necessary when using end-face light-emitting elements, can be omitted. As a result, the number of components can be reduced, the size of each semiconductor light-emitting element 30 can be reduced, and consequently, the semiconductor light-emitting device 10 (light-emitting module) can be miniaturized and its cost reduced.

[0180] (1-3) PCSEL elements have the characteristics of narrow spectral width and low temperature dependence of operating wavelength, which can reduce, for example, optical noise, thereby improving the optical characteristics of the semiconductor light-emitting device 10 (light-emitting module). This is advantageous, for example, when the semiconductor light-emitting device 10 is applied to laser systems such as LiDAR.

[0181] (1-4) Since multiple semiconductor light-emitting elements 30 are concentrated in the central region AC of the substrate 20, the degree of freedom in the wiring design of the driving circuits 40A-40H that drive the multiple semiconductor light-emitting elements 30 and the associated circuit elements can be increased. As a result, the number of channels can be further increased.

[0182] (1-5) Multiple semiconductor light-emitting elements 30 are arranged in a matrix in a way that they are adjacent to each other in the central region AC of the substrate 20. As a result, more semiconductor light-emitting elements 30 can be mounted on the semiconductor light-emitting device 10.

[0183] (1-6) Multiple driving circuits 40A to 40H are disposed in the peripheral region AP of the substrate 20, which surrounds the central region AC. This allows for the concentrated placement of multiple semiconductor light-emitting elements 30 in the central region AC of the substrate 20 and the mounting of multiple driving circuits 40A to 40H in the peripheral region AP of the substrate 20 with a high degree of design freedom. This further promotes multi-channel operation.

[0184] (1-7) The peripheral region AP of the substrate 20 includes first to fourth peripheral regions AP1 to AP4, divided by two imaginary center lines VC and HC. Multiple driving circuits 40A to 40H are respectively arranged in one of these first to fourth peripheral regions AP1 to AP4. In this structure, multiple driving circuits 40A to 40H can be arranged in a linearly symmetrical relationship within the first to fourth peripheral regions AP1 to AP4, divided by the two imaginary center lines VC and HC, i.e., around the multiple semiconductor light-emitting elements 30 mounted in the central region AC. This simplifies the wiring design and enables multi-channel operation.

[0185] (1-8) Two or more of the multiple driving circuits 40A to 40H are arranged in each of the first to fourth peripheral regions AP1 to AP4. Accordingly, when eight or more semiconductor light-emitting elements 30 are mounted in the semiconductor light-emitting device 10, the driving circuits 40A to 40H can be arranged efficiently.

[0186] (1-9) The semiconductor light-emitting device 10 includes a plurality of semiconductor light-emitting elements 30 and driving circuits 40A to 40H for driving the plurality of semiconductor light-emitting elements 30. In this structure, since the current path CP of the current flowing in each driving circuit 40 and the semiconductor light-emitting element 30 that it drives is formed on the substrate 20, the current path CP is shorter compared to the case where the driving circuits 40A to 40H are disposed outside the semiconductor light-emitting device 10. As a result, the inductance caused by the length of the current path CP can be reduced, and the deviation of the inductance of each current path CP can be reduced. As a result, the pulse width of the laser emitted by each semiconductor light-emitting element 30 can be shortened, and the deviation of the pulse width can be reduced. In one example, the pulse width of the laser emitted by each semiconductor light-emitting element 30 is 4 ns or less. In another example, the absolute value of the deviation of the pulse width of the laser emitted by each semiconductor light-emitting element 30 is 10% or less.

[0187] (1-10) Each drive circuit 40 includes multiple capacitors connected in parallel. For example, drive circuit 40A includes four capacitors 421 connected in parallel, and the same number of capacitors are also provided in the other drive circuits 40B to 40H. In this structure, the inductance can be reduced compared to the case where each drive circuit 40 includes a single capacitor.

[0188] (1-11) The semiconductor light-emitting device 10 includes protection diodes 70A to 70H, which are respectively connected in anti-parallel to one or more (two in the first embodiment) semiconductor light-emitting elements 30 disposed in each channel. In this structure, it is possible to suppress the application of excessive reverse bias voltage to the semiconductor light-emitting elements 30, thereby improving the peak light output of each semiconductor light-emitting element 30.

[0189] (1-12) The number of wires W1 and W2 on the current path CP between the switching element (e.g., the switching element 411 of the driving circuit 40) and the semiconductor light-emitting element 30 that it controls is set to be multiple (for example, four or more in the first embodiment). In this structure, the overall inductance of the semiconductor light-emitting device 10 can be reduced.

[0190] (Second Implementation)

[0191] Next, refer to Figures 13-21 The semiconductor light-emitting device 10 according to the second embodiment will be described. The main difference between the semiconductor light-emitting device 10 of the second embodiment and the semiconductor light-emitting device 10 of the first embodiment is that the capacitors 421 to 428 in the driving circuits 40A to 40H are silicon capacitors. Hereinafter, the second embodiment will be described focusing on the differences from the semiconductor light-emitting device 10 of the first embodiment. The same reference numerals will be used to refer to the components common to the first embodiment, and detailed descriptions of these components will be omitted.

[0192] Figure 13 A simplified top view of the semiconductor light-emitting device 10 according to the second embodiment is shown. Figure 14 Show Figure 13 A simplified top view of the central portion of the semiconductor light-emitting device 10. Figures 15-18 Show Figure 13 A simplified top view of the four different parts of the peripheral region of the semiconductor light-emitting device 10. Figure 19 Show Figure 13 A simplified back electrode structure of the semiconductor light-emitting device 10. Figure 20 Show Figure 13 A simplified surface-side intermediate electrode structure of the semiconductor light-emitting device 10. Figure 21 Show Figure 13 The semiconductor light-emitting device 10 has a simplified back-side intermediate electrode structure. Additionally, in Figures 13-18 In the diagram, a double-dotted line represents the opening of the main surface anti-corrosion layer 29A. Figure 19 In the diagram, the opening of the back anti-corrosion layer 29B is indicated by a double-dotted line.

[0193] (2-1. Overall structure of the semiconductor light-emitting device according to the second embodiment)

[0194] like Figure 13 As shown, the semiconductor light-emitting device 10 includes a plurality of (in) Figure 13 For example, eight) semiconductor light-emitting elements 30 and multiple (in Figure 13 (For example, there are eight) drive circuits 40A to 40D. In the following description, without distinguishing between drive circuits 40A to 40H, drive circuits 40A to 40H will be referred to as drive circuit 40 (or each drive circuit 40).

[0195] Multiple semiconductor light-emitting elements 30 and multiple driving circuits 40 are disposed on the substrate 20. The semiconductor light-emitting device 10 is specifically configured to utilize multiple driving circuits 40 to drive multiple semiconductor light-emitting elements 30 in a multi-channel configuration. Figure 13 The example shown is an eight-channel driven light-emitting module. Furthermore, the number of semiconductor light-emitting elements 30 and the number of driving circuits 40 can be appropriately changed according to the number of channels.

[0196] In the second embodiment, unlike the first embodiment, the capacitors 421-428 of the driving circuits 40A-40H are silicon capacitors. Silicon capacitors are smaller than ceramic capacitors, and therefore have the advantage of easily increasing the electrostatic capacitance per unit area of ​​the substrate. This reduces the mounting area occupied by capacitors 421-428 in the area of ​​the substrate 20, thereby enabling miniaturization of the substrate 20 and, consequently, a reduction in the module size of the semiconductor light-emitting device 10. In the second embodiment, the driving circuits 40A-40H each include multiple capacitors connected in parallel (in... Figure 13 For example, there are two silicon capacitors. However, each drive circuit 40A to 40H may also include one silicon capacitor. The silicon capacitor has a longitudinal structure, which includes two electrodes facing each other in the Z-axis direction relative to the main surface 21 of the substrate 20. With the change of such capacitor type, the structure of the substrate 20 also changes from the first embodiment.

[0197] (2-2. Electrode layer of substrate)

[0198] Next, the first to fourth electrode layers 28A to 28D of the substrate 20 in the second embodiment will be described. In the second embodiment, the structures of the first to fourth electrode layers 28A to 28D are different from each other.

[0199] (2-2A. First electrode layer (surface electrode layer))

[0200] like Figures 13-18As shown, the first electrode layer 28A (surface electrode layer) of the second embodiment includes first surface electrodes 61A-61H, second surface electrodes 62A-62H, third surface electrodes 63A-63H, fourth surface electrodes 64A-64D, fifth surface electrodes 65A-65H, and sixth surface electrodes 66A-66H. Similar to the first embodiment, these surface electrodes are arranged in a linearly symmetrical relationship with respect to each imaginary center line VC, HC.

[0201] Here, the first electrode layer 28A of the second embodiment is mainly the fourth surface electrode 64 of the first embodiment (see reference). Figures 3-6 It is divided into fourth surface electrodes 64A to 64D (refer to...) Figures 15-18 Furthermore, the installation of capacitors 421-428 uses only the fifth surface electrodes 65A-65H, which differs from the first embodiment. The shapes and arrangements of the other surface electrodes are the same as or substantially the same as in the first embodiment. Therefore, the following description focuses on the structure of the surface electrodes that differ from the first embodiment; the structures of the surface electrodes corresponding to those in the first embodiment are labeled with the same reference numerals, and detailed descriptions of them are omitted.

[0202] like Figure 15 As shown, in the first peripheral region AP1, the fourth surface electrode 64A includes a first branch 64AA and a second branch 64AB. The first branch 64AA includes a top portion located adjacent to or close to the switching element 411 of the drive circuit 40A, and the source electrode 41S of the switching element 411 is connected to the top portion of the first branch 64AA via a wire W2. Similarly, the second branch 64AB includes a top portion located adjacent to or close to the switching element 412 of the drive circuit 40B, and the source electrode 41S of the switching element 412 is connected to the top portion of the first branch 64AB via a wire W2.

[0203] The fifth surface electrode 65A includes the mounting area for one or more (two in the second embodiment) capacitors 421 in the drive circuit 40A. As described above, each capacitor 421 in the second embodiment is a silicon capacitor with a longitudinal structure, including a surface electrode 42S and a back electrode (not shown) facing each other in the Z-axis direction. The same applies to capacitors 422 to 428. The back electrode of each capacitor 421 is bonded to the fifth surface electrode 65A by a conductive bonding material (not shown), and the surface electrode 42S of each capacitor 421 is connected to the source electrode 41S of the switching element 411 by a wire W4. Similarly, in the drive circuit 40B, the back electrode of each capacitor 422 is bonded to the fifth surface electrode 65B, and the surface electrode 42S of each capacitor 422 is connected to the source electrode 41S of the switching element 412 by a wire W4.

[0204] The wire W4 can be made of the same material as the wires W1 to W3. Furthermore, the number of wires W4 is not particularly limited, as long as there is one or more. In the second embodiment, from the viewpoint of reducing the overall wiring inductance of the circuit, for example, the number of wires W1 and W4 located in the current path between the switching element 411 and the semiconductor light-emitting element 30 is set to multiple (for example, four or more).

[0205] Similarly, as Figure 16 As shown, in the second peripheral region AP2, the fourth surface electrode 64B includes a first branch 64BC and a second branch 64BD. Furthermore, the source electrode 41S of the switching element 413 is connected to the top end of the first branch 64BC via a wire W2, and the source electrode 41S of the switching element 414 is connected to the top end of the second branch 64BD via a wire W2. A capacitor 423 is mounted on the fifth surface electrode 65C, and the surface electrode 42S of each capacitor 423 is connected to the source electrode 41S of the switching element 413 via a wire W4. Similarly, two capacitors 424 are mounted on the fifth surface electrode 65D, and the surface electrode 42S of each capacitor 424 is connected to the source electrode 41S of the switching element 414 via a wire W4.

[0206] Similarly, as Figure 17 As shown, in the third peripheral region AP3, the fourth surface electrode 64C includes a first branch 64CE and a second branch 64CF. Furthermore, the source electrode 41S of the switching element 415 is connected to the top end of the first branch 64CE via a wire W2, and the source electrode 41S of the switching element 416 is connected to the top end of the second branch 64CF via a wire W2. A capacitor 425 is mounted on the fifth surface electrode 65E, and the surface electrode 42S of each capacitor 425 is connected to the source electrode 41S of the switching element 415 via a wire W4. Similarly, two capacitors 426 are mounted on the fifth surface electrode 65F, and the surface electrode 42S of each capacitor 426 is connected to the source electrode 41S of the switching element 416 via a wire W4.

[0207] Similarly, as Figure 18As shown, in the fourth peripheral region AP4, the fourth surface electrode 64D includes a first branch 64DG and a second branch 64DH. Furthermore, the source electrode 41S of the switching element 417 is connected to the top end of the first branch 64DG via a wire W2, and the source electrode 41S of the switching element 418 is connected to the top end of the second branch 64DH via a wire W2. A capacitor 427 is mounted on the fifth surface electrode 65G, and the surface electrode 42S of each capacitor 427 is connected to the source electrode 41S of the switching element 417 via a wire W4. Similarly, two capacitors 428 are mounted on the fifth surface electrode 65H, and the surface electrode 42S of each capacitor 428 is connected to the source electrode 41S of the switching element 418 via a wire W4.

[0208] (2-2B. Second electrode layer (back electrode layer))

[0209] like Figure 19 As shown, the second electrode layer 28B (back electrode layer) of the second embodiment includes first back electrodes 81A-81H, second back electrodes 82A-82H, third back electrodes 83A-83H, fourth back electrodes 84A-84D, fifth back electrodes 85A-85H, and sixth back electrodes 86A-86H. Similar to the first embodiment, these back electrodes are arranged in a linearly symmetrical relationship with respect to each imaginary center line VC, HC.

[0210] Here, the second electrode layer 28B of the second embodiment differs from that of the first embodiment mainly in the following aspects: the second electrode layer 28B of the first embodiment (refer to...) Figure 9 The first embodiment further includes six back electrodes 86A-86H, which are the first back electrodes 81A-81H, the second back electrodes 82A-82H, the third back electrodes 83A-83H, the fourth back electrodes 84A-84D, and the fifth back electrodes 85A-85H. The shapes and arrangements of the other back electrodes are the same as or substantially the same as those in the first embodiment. Therefore, the following description focuses on the structure of the back electrodes that differ from the first embodiment; the same reference numerals are used for the back electrodes corresponding to those in the first embodiment, and detailed descriptions of them are omitted.

[0211] like Figure 19 As shown, in the first peripheral area AP1 (in Figure 19 In the lower left region (center), the sixth back electrode 86A and 86B are used in conjunction with the fourth surface electrode 64A (see reference). Figure 15The electrodes are configured for connection. For example, the sixth back electrode 86A is positioned to overlap with the top end of the first branch 64AA of the fourth surface electrode 64A when viewed from above, and the sixth back electrode 86B is positioned to overlap with the top end of the second branch 64AB of the fourth surface electrode 64A when viewed from above.

[0212] Similarly, in the second peripheral area AP2 (in Figure 19 In the lower right region (center), the sixth back electrode 86C and 86D are used in conjunction with the fourth surface electrode 64B (see reference). Figure 16 The electrodes used for connection are configured. For example, the sixth back electrode 86C is positioned to overlap with the top end of the first branch 64BC of the fourth surface electrode 64B when viewed from above, and the sixth back electrode 86D is positioned to overlap with the top end of the second branch 64BD of the fourth surface electrode 64B when viewed from above.

[0213] Similarly, in the third surrounding area AP3 (in Figure 19 In the upper left region (center), the sixth back electrode 86E and 86F are used in conjunction with the fourth surface electrode 64C (see reference). Figure 17 The electrodes used for connection are configured. For example, the sixth back electrode 86E is positioned to overlap with the top end of the first branch 64CE of the fourth surface electrode 64C when viewed from above, and the sixth back electrode 86F is positioned to overlap with the top end of the second branch 64CF of the fourth surface electrode 64C when viewed from above.

[0214] Similarly, in the fourth peripheral area AP4 (in Figure 19 In the upper right region (center), the sixth back electrode 86G and 86H are used in conjunction with the fourth surface electrode 64D (see reference). Figure 18 The electrodes used for connection are configured. For example, the sixth back electrode 86G is positioned to overlap with the top end of the first branch 64DG of the fourth surface electrode 64D when viewed from above, and the sixth back electrode 86H is positioned to overlap with the top end of the second branch 64DH of the fourth surface electrode 64D when viewed from above.

[0215] exist Figure 19 In this example, the sixth back electrodes 86A-86H are formed in a circular shape, but they can also be other shapes. Furthermore, the sixth back electrodes 86A-86H can be positioned in other locations as long as they overlap with the fourth surface electrodes 64A-64D.

[0216] (2-2C. Third electrode layer (surface-side intermediate electrode layer))

[0217] like Figure 20As shown, the third electrode layer 28C (surface-side intermediate electrode layer) of the second embodiment includes first intermediate electrodes 91A-91H, second intermediate electrodes 92A-92H, third intermediate electrodes 93A-93H, fourth intermediate electrodes 94A-94D, and fifth intermediate electrodes 95A-95H. Similar to the first embodiment, these intermediate electrodes are arranged in a linearly symmetrical relationship with respect to each imaginary center line VC, HC.

[0218] Here, the third electrode layer 28C of the second embodiment differs from that of the first embodiment mainly in the following aspects: the third electrode layer 28C of the first embodiment (refer to...) Figure 10 A fifth intermediate electrode 95A-95H is added to the first intermediate electrode 91A-91H, the second intermediate electrode 92A-92H, the third intermediate electrode 93A-93H, and the fourth intermediate electrode 94A-94D. The shape and arrangement of the other surface-side intermediate electrodes are the same as those of the third electrode layer 28C in the first embodiment (see...). Figure 10 The structures are identical or substantially the same. Therefore, the following description will focus on the structure of the surface-side intermediate electrode, which differs from that of the first embodiment. The same reference numerals will be used to refer to the structures of the surface-side intermediate electrodes corresponding to the first embodiment, and detailed descriptions of them will be omitted.

[0219] like Figure 20 As shown, in the first peripheral area AP1 (in Figure 20 In the lower right region (center), the fifth intermediate electrodes 95A and 95B serve as the fourth surface electrode 64A (refer to...). Figure 15 ) and the sixth back electrode 86A, 86B (refer to Figure 19 The electrodes are configured for connection. For example, the fifth intermediate electrode 95A is positioned where, in top view, it overlaps with the top end of the first branch 64AA of the fourth surface electrode 64A and with the sixth back electrode 86A. The fifth intermediate electrode 95B is positioned where, in top view, it overlaps with the top end of the second branch 64AB of the fourth surface electrode 64A and with the sixth back electrode 86B.

[0220] Similarly, in the second peripheral area AP2 (in Figure 20 In the lower left region (center), the fifth intermediate electrodes 95C and 95D serve as the fourth surface electrode 64B (refer to...). Figure 16 ) and the sixth back electrode 86C, 86D (refer to Figure 19The electrodes are configured for connection. For example, the fifth intermediate electrode 95C is positioned to overlap with the top end of the first branch 64BC of the fourth surface electrode 64B and the sixth back electrode 86C when viewed from above. The fifth intermediate electrode 95D is positioned to overlap with the top end of the second branch 64BD of the fourth surface electrode 64B and the sixth back electrode 86D when viewed from above.

[0221] Similarly, in the third surrounding area AP3 (in Figure 20 In the upper right region (center), the fifth intermediate electrodes 95E and 95F are used in conjunction with the fourth surface electrode 64C (see reference). Figure 17 ) and the sixth back electrode 86E, 86F (refer to Figure 19 The electrodes are configured for connection. For example, the fifth intermediate electrode 95E is positioned to overlap with the top end of the first branch 64CE of the fourth surface electrode 64C and the sixth back electrode 86E when viewed from above. The fifth intermediate electrode 95F is positioned to overlap with the top end of the second branch 64CF of the fourth surface electrode 64C and the sixth back electrode 86F when viewed from above.

[0222] Similarly, in the fourth peripheral area AP4 (in Figure 20 In the upper left region (center), the fifth intermediate electrodes 95G and 95H serve as the fourth surface electrode 64D (refer to...). Figure 18 ) and the sixth back electrode 86G, 86H (refer to Figure 19 The electrodes are configured for connection. For example, the fifth intermediate electrode 95G is positioned where, in top view, it overlaps with the top end of the first branch 64DG of the fourth surface electrode 64D and with the sixth back electrode 86G. The fifth intermediate electrode 95H is positioned where, in top view, it overlaps with the top end of the second branch 64DH of the fourth surface electrode 64D and with the sixth back electrode 86H.

[0223] exist Figure 20 In the example, the fifth intermediate electrodes 95A to 95H are formed in a circular shape, but they can also be other shapes. Furthermore, the fifth intermediate electrodes 95A to 95H can be positioned at locations overlapping with the fourth surface electrodes 64A to 64D and the sixth back electrode 86A to 86H, or at other locations.

[0224] (2-2D. Fourth electrode layer (back side middle electrode layer))

[0225] like Figure 21As shown, the fourth electrode layer 28D (back side intermediate electrode layer) of the second embodiment includes first intermediate electrodes 91A-91H, second intermediate electrodes 92A-92H, third intermediate electrodes 93A-93H, fourth intermediate electrodes 94A-94D, and fifth intermediate electrodes 95A-95H. Similar to the first embodiment, these intermediate electrodes are arranged in a linearly symmetrical relationship with respect to each imaginary center line VC, HC.

[0226] Here, the fourth electrode layer 28D in the second embodiment is mainly modified from the fourth electrode layer 28D in the first embodiment (see reference). Figure 10 The shapes of the second intermediate electrodes 92A-92H and the fourth intermediate electrodes 94A-94D, and the addition of a fifth intermediate electrode 95A-95H, differ from the first embodiment. Regarding the shapes and arrangements of the other back-side intermediate electrodes, they differ from the fourth electrode layer 28D of the first embodiment (see...). Figure 10 The structures are identical or substantially the same. Therefore, the following description will focus on the structure of the back-side intermediate electrode, which differs from that of the first embodiment. The structures of the back-side intermediate electrodes corresponding to the first embodiment will be labeled with the same reference numerals, and detailed descriptions of them will be omitted.

[0227] like Figure 21 As shown, in the first peripheral area AP1 (in Figure 21 In the lower right region (center), the second intermediate electrode 92A (back side intermediate electrode) of the second embodiment can be equivalent to the second intermediate electrode 92A of the first embodiment (refer to...) Figure 10 The first intermediate electrode 95A is divided into two independent electrodes, and the second intermediate electrode 92B (back side intermediate electrode) is equivalent to the second intermediate electrode 92B of the first embodiment (refer to...). Figure 10 The first electrode is divided into two independent electrodes, and the second electrode is the fifth intermediate electrode 95B, which can be equivalent to the other of the two independent electrodes.

[0228] The second intermediate electrode 92A (rear side intermediate electrode) is positioned relative to the second surface electrode 62A (see reference) when viewed from above. Figure 15 ), second back electrode 82A (refer to) Figure 19 ) and the second intermediate electrode 92A as the surface-side intermediate electrode (refer to Figure 20 The fifth intermediate electrode 95A (rear-side intermediate electrode) is positioned at the location where it overlaps with the sixth surface electrode 66A (see reference 66A) when viewed from above. Figure 15 ), fifth back electrode 85A (refer to) Figure 19 ) and the second intermediate electrode 92A as the surface-side intermediate electrode (refer to Figure 20The overlapping positions are as follows. In addition, since the second and fifth intermediate electrodes 92B and 95B (back side intermediate electrodes) are constructed in the same way as the second and fifth intermediate electrodes 92A and 95A (back side intermediate electrodes), detailed descriptions are omitted.

[0229] Additionally, in the first peripheral region AP1, the fourth intermediate electrode 94A (back-side intermediate electrode) includes a first branch 94AA and a second branch 94AB. The first branch 94AA is positioned relative to the second surface electrode 64A (see reference 94AB) when viewed from above. Figure 15 The first branch 64AA and the sixth back electrode 86A () Figure 19 ) and the fifth intermediate electrode 95A (refer to) which serves as the surface-side intermediate electrode. Figure 20 The second branch 94AB is positioned at the location overlapping the second surface electrode 64A (see reference 64A) when viewed from above. Figure 15 The second branch 64AB and the sixth back electrode 86B () Figure 19 ) and the fifth intermediate electrode 95B as the surface-side intermediate electrode (refer to Figure 20 The fourth intermediate electrode 94A (rear-side intermediate electrode) is positioned at the location overlapping the second surface electrode 64A (see reference 64A) when viewed from above. Figure 15 ), fourth back electrode 84A ( Figure 19 ) and the fourth intermediate electrode 94A (refer to) which serves as the surface-side intermediate electrode. Figure 20 (The overlapping positions.)

[0230] Second surrounding area AP2 (in Figure 21 The second intermediate electrode 92C, 92D and the fifth intermediate electrode 95C, 95D, and the third peripheral region AP3 (in the lower left region) are located within the middle region. Figure 21 The second intermediate electrode 92E, 92F and the fifth intermediate electrode 95E, 95F within the upper right region (in the middle), and the fourth peripheral region AP4 (in Figure 21 The second intermediate electrodes 92G, 92H and the fifth intermediate electrodes 95G, 95H in the upper left region (center) are constructed in the same manner as the second intermediate electrodes 92A, 92B and the fifth intermediate electrodes 95A, 95B in the first peripheral region AP1. Furthermore, the fourth intermediate electrodes 94B, 94C, and 94D are constructed in the same manner as the fourth intermediate electrode 94A. The fourth intermediate electrode 94B includes first and second branches 94BC and 94BD, the fourth intermediate electrode 94C includes first and second branches 94CE and 94CF, and the fourth intermediate electrode 94D includes first and second branches 94DG and 94DH. Therefore, a detailed description of the back-side intermediate electrodes in the second to fourth peripheral regions AP2 to AP3 is omitted.

[0231] In addition, Figure 21In the example, the second intermediate electrodes 92A-92H are formed into an elongated oval shape, and the fifth intermediate electrodes 95A-95H are formed into a rectangular shape, but other shapes are also possible. Furthermore, the second intermediate electrodes 92A-92H and the fifth intermediate electrodes 95A-95H in the fourth electrode layer 28D can be positioned at locations overlapping with the fourth surface electrodes 64A-64D, the sixth back electrode 86A-86H, and the second intermediate electrodes 82A-82H in the third electrode layer 28C, or at other locations.

[0232] (2-3. Connection structure between electrode layers)

[0233] The substrate 20 includes multiple through-holes (connecting conductors) that electrically connect the first electrode layer 28A (surface electrode layer), the second electrode layer 28B (back electrode layer), the third electrode layer 28C (surface-side intermediate electrode layer), and the fourth electrode layer 28D (back-side intermediate electrode layer). For example, as... Figures 15-21 As shown, the substrate 20 includes first through-holes 101A-101H, second through-holes 102A-102H, third through-holes 103A-103H, fourth through-holes 104A-104D, fifth through-holes 105A-105H, sixth through-holes 106A-106H, and seventh through-holes 107A-107H that respectively penetrate the first to third substrates 27A-27C and the third and fourth electrode layers 28C, 28D along the thickness direction of the substrate 20. Additionally, these through-holes may also penetrate the first and second electrode layers 28A, 28B. These through-holes are formed, for example, from one or more materials selected from the group consisting of Ti, TiN, Au, Ag, Cu, Al, and W. Hereinafter, the description will focus on the differences in the structure of the through-holes compared to the first embodiment; the same reference numerals will be used for the same through-hole structures, and detailed descriptions will be omitted.

[0234] like Figures 15-21 As shown, in the first peripheral region AP1, the sixth through-hole 106A connects the sixth surface electrode 66A of the first electrode layer 28A (refer to...). Figure 15 The fifth back electrode 85A of the second electrode layer 28B (refer to) Figure 19 ), the second intermediate electrode 92A of the third electrode layer 28C (refer to) Figure 20 ) and the fifth intermediate electrode 95A of the fourth electrode layer 28D (refer to Figure 21 Electrical connection. Here, the second intermediate electrode 92A of the third electrode layer 28C (refer to...) Figure 20 The sixth surface electrode 66A is connected to the second through hole 102A (i.e., the second surface electrode 62A). Therefore, the sixth surface electrode 66A is electrically connected to the second surface electrode 62A. The same applies to the sixth through hole 106B.

[0235] Additionally, in the first peripheral region AP1, the seventh via 107A connects the fourth surface electrode 64A of the first electrode layer 28A (refer to...). Figure 15 The first branch 64AA and the sixth back electrode 86A of the second electrode layer 28B (refer to) Figure 19 ), the fifth intermediate electrode 95A of the third electrode layer 28C (refer to) Figure 20 ) and the fourth intermediate electrode 94A of the fourth electrode layer 28D (refer to Figure 21 The first branch 94AA of the fourth electrode layer 28D is electrically connected. Here, the fourth intermediate electrode 94A of the fourth electrode layer 28D (refer to...) Figure 21 The first branch 94AA is connected to the fourth through hole 104A (i.e., the fourth surface electrode 64A). Therefore, similarly to the fourth through hole 104A, the seventh through hole 107A serves to connect the fourth surface electrode 64A to the ground terminal (the fourth back electrode 84A).

[0236] Second surrounding area AP2 (for example, refer to) Figure 16 Multiple through-holes within ) and the third peripheral area AP3 (e.g., refer to Figure 17 Multiple through holes within ) and the fourth peripheral area AP4 (e.g., refer to Figure 18 Multiple through holes within the first peripheral region AP1 (e.g., refer to...) Figure 15 The multiple through holes within the same area are similarly constructed and configured. Therefore, a detailed description of the structure and configuration of these through holes within the second to fourth peripheral regions AP2 to AP4 is omitted.

[0237] (2-4. Current path of semiconductor light-emitting device)

[0238] In the second embodiment, the current path of the current flowing in the driving circuit 40A and the semiconductor light-emitting element 30, which is driven by the driving circuit 40A, is configured as a loop such that the current flows in the following order: the back electrode of the capacitor 421 (not shown), the fifth surface electrode 65A of the first electrode layer 28A (surface electrode layer), the fifth via 105A, the first intermediate electrode 91A of the third electrode layer 28C (surface-side intermediate electrode layer), the first via 101A, the first surface electrode 61A of the first electrode layer 28A, the back electrode 35 (anode electrode) of the semiconductor light-emitting element 30, the surface electrode 34 (cathode electrode) of the semiconductor light-emitting element 30, the wire W1, the second surface electrode 62A of the first electrode layer 28A, the drain electrode 41D of the switching element 411, the source electrode 41S of the switching element 411, the wire W4, and the surface electrode 42S of the capacitor 421. Furthermore, similar to the first embodiment, a protection diode 70A is connected in anti-parallel to the semiconductor light-emitting element 30, which is driven by the driving circuit 40A.

[0239] Furthermore, although detailed explanations are omitted here, each of the other drive circuits 40B to 40H is electrically connected in the same way as drive circuit 40A, and independently forms a loop-shaped current path similar to the current path described above. Similarly, each of the other protection diodes 70B to 70H is electrically connected in the same way as protection diode 70A.

[0240] (2-5. Circuit structure of semiconductor light-emitting devices)

[0241] The light-emitting system 200, including the semiconductor light-emitting device 10 of the second embodiment, can, for example, be compatible with the referenced system in the first embodiment. Figure 12 The circuit structure described above is constructed in the same way. Therefore, the omitted description is omitted here.

[0242] (2-6. Advantages of semiconductor light-emitting devices)

[0243] In addition to the advantages obtained by the semiconductor light-emitting device 10 according to the second embodiment described above, the semiconductor light-emitting device 10 according to the first embodiment described above also has the following advantages.

[0244] (2-1) The capacitors 421-428 in the drive circuits 40A-40H are silicon capacitors. Silicon capacitors are smaller than ceramic capacitors, and therefore have the advantage of easily increasing the electrostatic capacitance per unit area of ​​the substrate. As a result, the mounting area occupied by capacitors 421-428 in the area of ​​the substrate 20 can be reduced, and compared with the case of using, for example, ceramic capacitors, the substrate 20 can be miniaturized, and thus the semiconductor light-emitting device 10 (light-emitting module) can be miniaturized.

[0245] (Third implementation method)

[0246] Next, refer to Figures 22-30 The semiconductor light-emitting device 10 according to the third embodiment will be described. The main difference between the semiconductor light-emitting device 10 of the third embodiment and the semiconductor light-emitting device 10 of the first embodiment is that the switching elements 411-418 in the drive circuits 40A-40H are nitride semiconductor transistors, an example of lateral transistors. Hereinafter, the third embodiment will be described focusing on the differences from the semiconductor light-emitting device 10 of the first embodiment; common components to the first or second embodiments will be labeled with the same reference numerals, and detailed descriptions will be omitted.

[0247] Figure 22 A simplified top view of the semiconductor light-emitting device 10 according to the second embodiment is shown. Figure 23 Show Figure 23 A simplified top view of the central portion of the semiconductor light-emitting device 10. Figures 24-27Show Figure 23 A simplified top view of the four different parts of the peripheral region of the semiconductor light-emitting device 10. Figure 28 Show Figure 23 A simplified back electrode structure of the semiconductor light-emitting device 10. Figure 29 Show Figure 23 A simplified surface-side intermediate electrode structure of the semiconductor light-emitting device 10. Figure 30 Show Figure 23 The semiconductor light-emitting device 10 has a simplified back-side intermediate electrode structure. Additionally, in Figures 22-27 In the diagram, a double-dotted line represents the opening of the main surface anti-corrosion layer 29A. Figure 28 In the diagram, the opening of the back anti-corrosion layer 29B is indicated by a double-dotted line.

[0248] (3-1. Overall structure of the semiconductor light-emitting device according to the third embodiment)

[0249] like Figure 22 As shown, the semiconductor light-emitting device 10 includes a plurality of (in) Figure 22 For example, eight) semiconductor light-emitting elements 30 and multiple (in Figure 22 (For example, there are eight) drive circuits 40A to 40D. In the following description, without distinguishing between drive circuits 40A to 40H, drive circuits 40A to 40H will be referred to as drive circuit 40 (or each drive circuit 40).

[0250] Multiple semiconductor light-emitting elements 30 and multiple driving circuits 40 are disposed on the substrate 20. The semiconductor light-emitting device 10 is specifically configured to utilize multiple driving circuits 40 to drive multiple semiconductor light-emitting elements 30 in a multi-channel configuration. Figure 22 The example shown is an eight-channel driven light-emitting module. Furthermore, the number of semiconductor light-emitting elements 30 and the number of driving circuits 40 can be appropriately changed according to the number of channels.

[0251] In the third embodiment, unlike the first embodiment, the switching elements 411-418 of the drive circuits 40A-40H are lateral transistors. An example of such a lateral transistor is a nitride semiconductor transistor using a nitride semiconductor (e.g., gallium nitride (GaN)). In the third embodiment, for example, a high electron mobility transistor (HEMT) using a nitride semiconductor is used. Alternatively, MOSFETs can be used for the switching elements 411-418, as long as they are lateral transistors. With this change in the type of switching element, the structure of the substrate 20 also changes from the first embodiment.

[0252] (3-2. Electrode layer of substrate)

[0253] Next, the first to fourth electrode layers 28A to 28D of the substrate 20 in the third embodiment will be described. In the third embodiment, the structures of the first to fourth electrode layers 28A to 28D are different from each other.

[0254] (3-2A. First electrode layer (surface electrode layer))

[0255] like Figures 22-27 As shown, the first electrode layer 28A (surface electrode layer) of the third embodiment includes first surface electrodes 61A-61H, second surface electrodes 62A-62H, third surface electrodes 63A-63H, fourth surface electrode 64, fifth surface electrodes 65A-65H, and sixth surface electrodes 66A-66H. Furthermore, in the third embodiment, the arrangement of the plurality of surface electrodes (and the elements mounted on these surface electrodes) located in the second to fourth peripheral regions AP2-AP4 is equivalent to the arrangement obtained by sequentially rotating the arrangement of the plurality of corresponding surface electrodes (and the elements mounted on these surface electrodes) located in the first peripheral region AP1 clockwise by 90° in a top-view perspective.

[0256] Here, the first electrode layer 28A in the third embodiment is mainly modified from the first electrode layer 28A in the first embodiment (see reference). Figures 3-6 The shapes of the second surface electrodes 62A to 62H and the fourth surface electrode 64 differ from those in the first embodiment. The shapes and arrangements of the other surface electrodes are the same as or substantially the same as those in the first embodiment. Therefore, the following description will focus on the structures of the surface electrodes that differ from those in the first embodiment; the same reference numerals will be used to denote the structures of the surface electrodes corresponding to those in the first embodiment, and detailed descriptions of these structures will be omitted.

[0257] like Figure 24 As shown, in the first peripheral region AP1, the second surface electrode 62A is disposed at a position adjacent to or close to the first surface electrode 61A in the Y-axis direction. Figure 15 In this example, the second surface electrode 62A is formed in a T-shape when viewed from above, but it is not necessarily limited to a T-shape. The second surface electrode 62A is connected to the surface electrode 34 (cathode electrode) of the semiconductor light-emitting element 30 mounted on the first surface electrode 61A via a wire W1. The drain electrode 41D of the switching element 411 is bonded to the second surface electrode 62A via a conductive bonding material (not shown).

[0258] Similarly, the second surface electrode 62B is disposed at a position adjacent to or close to the first surface electrode 61B in the X-axis direction. Figure 15In this example, the second surface electrode 62B is formed in a T-shape when viewed from above, but it is not necessarily limited to a T-shape. The second surface electrode 62B is connected to the surface electrode 34 (cathode electrode) of the semiconductor light-emitting element 30 mounted on the first surface electrode 61B via a wire W1. The drain electrode 41D of the switching element 412 is bonded to the second surface electrode 62B via a conductive bonding material (not shown).

[0259] The fourth surface electrode 64 includes a cutout recess for arranging a portion of the second surface electrodes 62A and 62B (the portion for engaging the drain electrode 41D of the switching elements 411 and 412) and the third surface regions 63A and 63B. Furthermore, similarly to the first embodiment, the fourth surface electrode 64 is formed, when viewed from above, into a ring shape surrounding the first surface electrodes 61A-61H, the second surface electrodes 62A-62H, and the third surface electrodes 63A-63H (see reference). Figure 22 ).

[0260] The source electrode 41S of the switching element 411 is bonded to the fourth surface electrode 64 at a position opposite to the second surface electrode 62A (drain electrode 41D) within the aforementioned cutout recess in the X-axis direction via a conductive bonding material (not shown). Furthermore, the gate electrode 41G of the switching element 411 is bonded to the third surface electrode 63A at a position opposite to the second surface electrode 62A (drain electrode 41D) within the aforementioned cutout recess in the X-axis direction via a conductive bonding material (not shown).

[0261] Additionally, the areas located in the second to fourth surrounding regions, AP2 to AP4 (see reference) Figures 25-27 The first surface electrodes 61C-61H, the second surface electrodes 62C-62H, the third surface electrodes 63C-63H, the fourth surface electrode 64, the fifth surface electrodes 65C-65H, and the sixth surface electrodes 66C-66H within the first peripheral region AP1 are configured similarly to the first surface electrodes 61A, 61B, the second surface electrodes 62A, 62B, the third surface electrodes 63A, 63B, the fourth surface electrode 64, the fifth surface electrodes 65A, 65B, and the sixth surface electrodes 66A, 66B located within the first peripheral region AP1. As described above, the arrangement of the surface electrodes in the second to fourth peripheral regions AP2 to AP4 is equivalent to the arrangement of the surface electrodes in the first peripheral region AP1, which is obtained by rotating them sequentially 90° clockwise when viewed from above. Therefore, a detailed description of the surface electrodes in the second to fourth peripheral regions AP2 to AP4 is omitted.

[0262] (3-2B. Second electrode layer (back electrode layer))

[0263] like Figure 28As shown, the second electrode layer 28B (back electrode layer) in the third embodiment includes first back electrodes 81A-81H, second back electrodes 82A-82H, third back electrodes 83A-83H, fourth back electrodes 84A-84D, fifth back electrodes 85A-85H, and sixth back electrodes 86A-86H. Furthermore, in the third embodiment, the arrangement of the back electrodes located in the second to fourth peripheral regions AP2-AP4 is equivalent to the arrangement obtained by sequentially rotating the arrangement of the back electrodes located in the first peripheral region AP1 clockwise by 90° when viewed from above.

[0264] Here, the second electrode layer 28B in the third embodiment is mainly modified from the second electrode layer 28B in the first embodiment (see reference). Figure 9 The shape of the third back electrode 83A-83H and the second electrode layer 28B in the first embodiment (refer to) Figure 9 This differs from the first embodiment in that a sixth back electrode 86A-86H is added to the existing back electrode. The shape and arrangement of the other back electrodes are the same as or substantially the same as those in the first embodiment. Therefore, the following description will focus on the structure of the back electrodes that differ from the first embodiment; the same reference numerals will be used for the back electrodes corresponding to those in the first embodiment, and detailed descriptions of them will be omitted.

[0265] like Figure 28 As shown, in the first peripheral area AP1 (in Figure 28 In the lower left area (center), the third back electrode 83A is positioned relative to the third surface electrode 63A (see reference) when viewed from above. Figure 24 Similarly, the third rear electrode 83B is positioned at the location overlapping the third surface electrode 63B (see reference 63B) when viewed from above. Figure 24 The overlapping positions. Figure 28 In the example, the third back electrodes 83A and 83B are circular in shape, but are not necessarily limited to circular shape.

[0266] Additionally, in the first peripheral region AP1, the sixth back electrodes 86A and 86B are respectively positioned relative to the fourth surface electrode 64 when viewed from above (see reference). Figure 24 The overlapping positions. The sixth back electrode 86A is formed as a bent strip, for example, with a shorter dimension in the Y-axis direction compared to the first back electrode 81A, and its top end is disposed adjacent to or close to the first back electrode 81A. Similarly, the sixth back electrode 86B is formed as a bent strip, for example, with a shorter dimension in the X-axis direction compared to the first back electrode 81B, and its top end is disposed adjacent to or close to the first back electrode 81B. However, the shapes of the sixth back electrodes 86A and 86B are not limited to... Figure 28 The shape shown.

[0267] Additionally, AP2 to AP4, located in the second to fourth surrounding areas (in Figure 28 The first back electrodes 81C-81H, second back electrodes 82C-82H, third back electrodes 83C-83H, fourth back electrodes 84B-84D, fifth back electrodes 85C-85H, and sixth back electrodes 86C-86H in the lower right, upper left, and upper right regions (respectively, respectively) are configured similarly to the first back electrodes 81A, 81B, second back electrodes 82A, 82B, third back electrodes 83A, 83B, fourth back electrodes 84A, fifth back electrodes 85A, 85B, and sixth back electrodes 86A, 86B located in the first peripheral region AP1. As described above, the arrangement of the back electrodes in the second to fourth peripheral regions AP2-AP4 is equivalent to the arrangement of the back electrodes in the first peripheral region AP1, which is rotated 90° clockwise in a top-view perspective. Therefore, a detailed description of the back electrodes in the second to fourth peripheral regions AP2-AP4 is omitted.

[0268] (3-2C. Third electrode layer (surface-side intermediate electrode layer))

[0269] like Figure 29 As shown, the third electrode layer 28C (surface-side intermediate electrode layer) of the third embodiment includes first intermediate electrodes 91A-91H, second intermediate electrodes 92A-92H, third intermediate electrodes 93A-93H, fourth intermediate electrodes 94A-94D, and fifth intermediate electrodes 95A-95H. Furthermore, in the third embodiment, the arrangement of the surface-side intermediate electrodes located in the second to fourth peripheral regions AP2-AP4 is equivalent to the arrangement of the surface-side intermediate electrodes located in the first peripheral region AP1, which is obtained by rotating each electrode 90° clockwise in a top-view perspective.

[0270] Here, the third electrode layer 28C of the third embodiment differs from that of the first embodiment mainly in the following aspects: the third electrode layer 28C of the first embodiment (refer to...) Figure 10 A fifth intermediate electrode 95A-95H is added to the first intermediate electrode 91A-91H, the second intermediate electrode 92A-92H, the third intermediate electrode 93A-93H, and the fourth intermediate electrode 94A-94D. The shape and arrangement of the other surface-side intermediate electrodes are the same as those of the third electrode layer 28C in the first embodiment (see...). Figure 10 The structures are identical or substantially the same. Therefore, the following description will focus on the structure of the surface-side intermediate electrode, which differs from that of the first embodiment. The same reference numerals will be used to refer to the structures of the surface-side intermediate electrodes corresponding to the first embodiment, and detailed descriptions of them will be omitted.

[0271] like Figure 29As shown, in the first peripheral area AP1 (in Figure 29 In the lower right region (center), the fifth intermediate electrode 95A is disposed with respect to the fourth surface electrode 64 (see reference). Figure 24 ) and the sixth back electrode 86A (refer to Figure 28 The two overlap at this position. Similarly, the fifth intermediate electrode 95B is positioned, when viewed from above, adjacent to the fourth surface electrode 64 (see reference). Figure 24 ) and the sixth back electrode 86B (refer to Figure 28 The overlapping positions of these two sides.

[0272] Additionally, regarding the third electrode layer 28C, it is located in the second to fourth peripheral regions AP2 to AP4 (in... Figure 29 The first intermediate electrodes 91C-91H, second intermediate electrodes 92C-92H, third intermediate electrodes 93C-93H, fourth intermediate electrodes 94B-94D, and fifth intermediate electrodes 95C-95H in the lower left, upper right, and upper left regions (respectively, respectively) are configured similarly to the first intermediate electrodes 91A, 91B, second intermediate electrodes 92A, 92B, third intermediate electrodes 93A, 93B, fourth intermediate electrodes 94A, and fifth intermediate electrodes 95A, 95B located in the first peripheral region AP1. As described above, the layout of the surface-side intermediate electrodes in the second to fourth peripheral regions AP2-AP4 is equivalent to the layout of the surface-side intermediate electrodes in the first peripheral region AP1, which is obtained by rotating them 90° clockwise sequentially when viewed from above. Therefore, a detailed description of the surface-side intermediate electrodes in the second to fourth peripheral regions AP2-AP4 is omitted.

[0273] (3-2D. Fourth electrode layer (back side middle electrode layer))

[0274] like Figure 30 As shown, the fourth electrode layer 28D (back-side intermediate electrode layer) of the third embodiment includes first intermediate electrodes 91A-91H, second intermediate electrodes 92A-92H, third intermediate electrodes 93A-93H, fourth intermediate electrodes 94A-94D, and fifth intermediate electrodes 95A-95H. Furthermore, in the third embodiment, the arrangement of the back-side intermediate electrodes located in the second to fourth peripheral regions AP2-AP4 is equivalent to the arrangement of the back-side intermediate electrodes located in the first peripheral region AP1, which is obtained by rotating each electrode 90° clockwise in a top-view perspective.

[0275] Here, the fourth electrode layer 28D in the third embodiment is mainly modified from the fourth electrode layer 28D in the first embodiment (see reference). Figure 10The shapes of the second intermediate electrodes 92A-92H and the fourth intermediate electrodes 94A-94D, and the addition of a fifth intermediate electrode 95A-95H, differ from the first embodiment. Regarding the shapes and arrangements of the other back-side intermediate electrodes, they differ from the fourth electrode layer 28D of the first embodiment (see...). Figure 10 The structures are identical or substantially the same. Therefore, the following description will focus on the structure of the back-side intermediate electrode, which differs from that of the first embodiment. The structures of the back-side intermediate electrodes corresponding to the first embodiment will be labeled with the same reference numerals, and detailed descriptions of them will be omitted.

[0276] like Figure 30 As shown, in the first peripheral area AP1 (in Figure 30 In the lower right region (center), the second intermediate electrode 92A (back side intermediate electrode) of the third embodiment can be equivalent to the second intermediate electrode 92A of the first embodiment (refer to...) Figure 10 The fifth intermediate electrode 95A can be equivalent to one of the two independent electrodes obtained by dividing the first intermediate electrode 95A into two. Similarly, the second intermediate electrode 92B (back side intermediate electrode) can be equivalent to the second intermediate electrode 92B of the first embodiment (refer to...). Figure 10 The fifth intermediate electrode 95B can be equivalent to the other of the two independent electrodes obtained by dividing the electrode into two.

[0277] The second intermediate electrode 92A (rear side intermediate electrode) is positioned relative to the second surface electrode 62A (see reference) when viewed from above. Figure 24 ), second back electrode 82A (refer to) Figure 28 ) and the second intermediate electrode 92A as the surface-side intermediate electrode (refer to Figure 29 The fifth intermediate electrode 95A (rear-side intermediate electrode) is positioned at the location where it overlaps with the sixth surface electrode 66A (see reference 66A) when viewed from above. Figure 24 ), fifth back electrode 85A (refer to) Figure 28 ) and the second intermediate electrode 92A as the surface-side intermediate electrode (refer to Figure 29 The overlapping positions are as follows. In addition, since the second and fifth intermediate electrodes 92B and 95B (back side intermediate electrodes) are constructed in the same way as the second and fifth intermediate electrodes 92A and 95A (back side intermediate electrodes), detailed descriptions are omitted.

[0278] Additionally, in the first peripheral region AP1, the fourth intermediate electrode 94A (back-side intermediate electrode) includes a circular hole for arranging the third intermediate electrode 93A (back-side intermediate electrode) and a notched recess for arranging the third intermediate electrode 93B (back-side intermediate electrode). The fourth intermediate electrode 94A (back-side intermediate electrode) is positioned relative to the fourth surface electrode 64 (see reference numeral) when viewed from above. Figure 24 ), fourth back electrode 84A (refer to) Figure 28 ) and the fourth and fifth intermediate electrodes 94A, 95A, and 95B as surface-side intermediate electrodes (refer to Figure 29 (The overlapping positions.)

[0279] Additionally, regarding the fourth electrode layer 28D, located in the second to fourth peripheral regions AP2 to AP4 (in... Figure 30 The first intermediate electrodes 91C-91H, second intermediate electrodes 92C-92H, third intermediate electrodes 93C-93H, fourth intermediate electrodes 94B-94D, and fifth intermediate electrodes 95C-95H in the lower left, upper right, and upper left regions (respectively, respectively) are configured similarly to the first intermediate electrodes 91A, 91B, second intermediate electrodes 92A, 92B, third intermediate electrodes 93A, 93B, fourth intermediate electrodes 94A, and fifth intermediate electrodes 95A, 95B located in the first peripheral region AP1. As described above, the arrangement of the back-side intermediate electrodes in the second to fourth peripheral regions AP2-AP4 is equivalent to the arrangement of the back-side intermediate electrodes in the first peripheral region AP1, which is obtained by rotating them 90° clockwise in a top-view perspective. Therefore, a detailed description of the back-side intermediate electrodes in the second to fourth peripheral regions AP2-AP4 is omitted.

[0280] (3-3. Connection structure between electrode layers)

[0281] The substrate 20 includes multiple through-holes (connecting conductors) that electrically connect the first electrode layer 28A (surface electrode layer), the second electrode layer 28B (back electrode layer), the third electrode layer 28C (surface-side intermediate electrode layer), and the fourth electrode layer 28D (back-side intermediate electrode layer). For example, as... Figures 24-30As shown, the substrate 20 includes first through-holes 101A-101H, second through-holes 102A-102H, third through-holes 103A-103H, fourth through-holes 104A-104D, fifth through-holes 105A-105H, sixth through-holes 106A-106H, and seventh through-holes 107A-107H that respectively penetrate the first to third substrates 27A-27C and the third and fourth electrode layers 28C, 28D along the thickness direction of the substrate 20. Additionally, these through-holes may also penetrate the first and second electrode layers 28A, 28B. These through-holes are formed, for example, from one or more materials selected from the group consisting of Ti, TiN, Au, Ag, Cu, Al, and W. Hereinafter, the description will focus on the differences in the structure of the through-holes compared to the first embodiment; the same reference numerals will be used for the same through-hole structures, and detailed descriptions will be omitted.

[0282] like Figures 24-30 As shown, in the first peripheral region AP1, the sixth through-hole 106A connects the sixth surface electrode 66A of the first electrode layer 28A (refer to...). Figure 24 The fifth back electrode 85A of the second electrode layer 28B (refer to) Figure 28 ), the second intermediate electrode 92A of the third electrode layer 28C (refer to) Figure 29 ) and the fifth intermediate electrode 95A of the fourth electrode layer 28D (refer to Figure 30 Electrical connection. Here, the second intermediate electrode 92A of the third electrode layer 28C (refer to...) Figure 29 The sixth surface electrode 66A is connected to the second through hole 102A (i.e., the second surface electrode 62A). Therefore, the sixth surface electrode 66A is electrically connected to the second surface electrode 62A. The same applies to the sixth through hole 106B.

[0283] Additionally, in the first peripheral region AP1, the seventh via 107A connects the fourth surface electrode 64 of the first electrode layer 28A (see reference). Figure 24 The sixth back electrode 86A of the second electrode layer 28B (refer to) Figure 28 ), the fifth intermediate electrode 95A of the third electrode layer 28C (refer to) Figure 29 ) and the fourth intermediate electrode 94A of the fourth electrode layer 28D (refer to Figure 30 Electrical connection. Here, the fourth intermediate electrode 94A of the fourth electrode layer 28D (refer to...) Figure 30 The fourth surface electrode 64 is connected to the fourth through hole 104A (i.e., the fourth surface electrode 64). Therefore, similarly to the fourth through hole 104A, the seventh through hole 107A serves to connect the fourth surface electrode 64 to the ground terminal (the fourth back electrode 84A).

[0284] Second surrounding area AP2 (for example, refer to) Figure 25 Multiple through-holes within ) and the third peripheral area AP3 (e.g., refer to Figure 26 Multiple through holes within ) and the fourth peripheral area AP4 (e.g., refer to Figure 27 Multiple through holes within the first peripheral region AP1 (e.g., refer to...) Figure 24 The multiple through holes within the second to fourth peripheral regions AP2 to AP4 are similarly constructed and arranged. Therefore, a detailed description of the structure and arrangement of these through holes within the second to fourth peripheral regions AP2 to AP4 is omitted.

[0285] (3-4. Current path of semiconductor light-emitting device)

[0286] In the third embodiment, the current path of the current flowing in the driving circuit 40A and the semiconductor light-emitting element 30, which is the driving object of the driving circuit 40A, is configured to form a loop in which the current flows in the following order: the second electrode 42B of the capacitor 421, the fifth surface electrode 65A of the first electrode layer 28A (surface electrode layer), the fifth through hole 105A, the first intermediate electrode 91A of the third electrode layer 28C (surface side intermediate electrode layer), the first through hole 101A, the first surface electrode 61A of the first electrode layer 28A, the back electrode 35 (anode electrode) of the semiconductor light-emitting element 30, the surface electrode 34 (cathode electrode) of the semiconductor light-emitting element 30, the wire W1, the second surface electrode 62A of the first electrode layer 28A, the drain electrode 41D of the switching element 411, the source electrode 41S of the switching element 411, the fourth surface electrode 64 of the first electrode layer 28A, and the first electrode 42A of the capacitor 421. In addition, similar to the first embodiment, a protection diode 70A is connected in anti-parallel to the semiconductor light-emitting element 30, which is the target of the driving circuit 40A.

[0287] Furthermore, although detailed explanations are omitted here, each of the other drive circuits 40B to 40H is electrically connected in the same way as drive circuit 40A, and independently forms a loop-shaped current path similar to the current path described above. Similarly, each of the other protection diodes 70B to 70H is electrically connected in the same way as protection diode 70A.

[0288] (3-5. Circuit structure of semiconductor light-emitting devices)

[0289] The light-emitting system 200, including the semiconductor light-emitting device 10 of the third embodiment, and, for example, the reference in the first embodiment... Figure 12 The circuit structure described above is constructed in the same way. Therefore, the omitted description is omitted here.

[0290] (3-6. Advantages of semiconductor light-emitting devices)

[0291] In addition to the advantages obtained by the semiconductor light-emitting device 10 according to the third embodiment described above, the semiconductor light-emitting device 10 according to the first embodiment described above also has the following advantages.

[0292] (3-1) The switching elements 411-418 of the drive circuits 40A-40H are nitride semiconductor transistors, an example of lateral transistors. For example, in the first embodiment, GaN-HEMT is used as the nitride semiconductor transistor. In this structure, the number of wires required for the light-emitting module can be reduced. In one example, wires W1-W3 are used in the first embodiment, wires W1-W4 are used in the second embodiment, and in contrast, only wire W1 is used in the third embodiment. As a result, the effects that may occur due to the increase in the number of wires, such as the increase in mutual inductance between wires, can be reduced.

[0293] (Example of the change)

[0294] The above-described embodiments can be implemented with modifications as follows. Furthermore, the above-described embodiments and the following modifications can be combined with each other to implement them without technical inconsistencies.

[0295] In the above embodiments, the semiconductor light-emitting element 30 uses a PCSEL element, but is not limited to a PCSEL element. For example, a vertical cavity surface-emitting laser (VCSEL) element may also be used as a light-emitting element that emits light in a direction intersecting with the main surface 21 of the substrate 20.

[0296] In the above embodiments, multiple drive circuits 40A to 40H are arranged in a linearly symmetrical or rotationally symmetrical relationship in the peripheral region AP, but are not limited to such a layout. Multiple drive circuits 40A to 40H can also be arranged in any layout in the peripheral region AP.

[0297] In each of the above embodiments, the number of capacitors provided in each drive circuit 40 may also be one.

[0298] In the above embodiments, the number of intermediate electrode layers disposed inside the substrate 20 is not limited to two layers, but may be one layer or three or more layers. Furthermore, the material of the substrate 20 is not limited to glass epoxy resin or ceramic, but may be silicon.

[0299] Gate drivers 205A to 205H may also be mounted on the substrate 20 of the first embodiment. That is, the semiconductor light-emitting device 10 may also include gate drivers 205A to 205H.

[0300] Alternatively, the protection diodes 70A to 70H may not be mounted on the substrate 20 in the second embodiment. That is, the semiconductor light-emitting device 10 may not include the protection diodes 70A to 70H.

[0301] As used in this disclosure, the term "on" means "on" and "above". Therefore, expressions such as "the first element is mounted on the second element" are intended to mean that in one embodiment the first element can contact the second element and be directly disposed on the second element, but in other embodiments the first element can be disposed above the second element without contacting it. That is, the term "on" does not preclude a configuration where other elements are formed between the first and second elements.

[0302] The Z-axis direction used in this disclosure does not necessarily need to be vertical, nor does it need to be completely consistent with the vertical direction. Therefore, various constructions of this disclosure (e.g.) Figure 1 The configuration shown is not limited to the case where "up" and "down" in the Z-axis direction are vertical, as described in this specification. For example, the X-axis direction can be vertical, or the Y-axis direction can also be vertical.

[0303] (Postscript)

[0304] Hereinafter, the technical concepts that can be grasped based on the above-described embodiments and modifications will be described. Furthermore, the reference numerals for the constituent elements of the embodiments corresponding to the constituent elements described in each appendix are indicated by brackets. The reference numerals are shown as examples to aid understanding, and the constituent elements described in each appendix should not be limited to those indicated by the reference numerals.

[0305] (Note 1)

[0306] A semiconductor light-emitting device (10) comprises:

[0307] substrate(20);

[0308] Multiple semiconductor light-emitting elements (30) are disposed on the substrate (20); and

[0309] Multiple driving circuits (40A~40H) are disposed on the substrate (20) and drive one or more of the multiple semiconductor light-emitting elements (30).

[0310] The plurality of semiconductor light-emitting elements (30) are each composed of a light-emitting element (30) located on the main surface (21) of the substrate (20) and emitting light in a direction intersecting with the main surface (21).

[0311] The plurality of driving circuits (40A~40H) respectively include:

[0312] Switching elements (411-418) control one or more of the plurality of semiconductor light-emitting elements (30); and

[0313] The capacitors (421-428) supply current to one or more of the plurality of semiconductor light-emitting elements (30).

[0314] (Note 2)

[0315] According to the semiconductor light-emitting device (10) described in Appendix 1, wherein,

[0316] The plurality of semiconductor light-emitting elements (30) are centrally arranged in the central region (AC) of the substrate (20).

[0317] (Note 3)

[0318] According to the semiconductor light-emitting device (10) described in Appendix 2, wherein,

[0319] The plurality of semiconductor light-emitting elements (30) are arranged in a matrix adjacent to each other in the central region (AC) of the substrate (20).

[0320] (Note 4)

[0321] According to Appendix 2 or 3, the semiconductor light-emitting device (10) wherein,

[0322] The plurality of driving circuits (40A to 40H) are arranged in the peripheral region (AP) of the substrate (20) that surrounds the central region (AC) of the substrate (20) when viewed from above.

[0323] (Note 5)

[0324] The semiconductor light-emitting device (10) according to claim 4, wherein,

[0325] The peripheral region (AP) includes first to fourth peripheral regions (AP1 to AP4) defined by two imaginary center lines (VC, HC) that are orthogonal to each other through the center of the substrate (20) when viewed from above.

[0326] The plurality of driving circuits (40A to 40H) are respectively configured in one of the first to fourth peripheral regions (AP1 to AP4).

[0327] (Note 6)

[0328] According to the semiconductor light-emitting device (10) described in Appendix 5, wherein,

[0329] The plurality of semiconductor light-emitting elements (30) are eight or more.

[0330] Two or more of the plurality of driving circuits (40A to 40H) are configured in each of the first to fourth peripheral regions (AP1 to AP4).

[0331] (Note 7)

[0332] According to any one of the appendices 1 to 6, the semiconductor light-emitting device (10) wherein,

[0333] The light emitting element (30) is a photonic crystal surface-emitting laser element or a vertical cavity surface-emitting laser element.

[0334] (Postscript 8)

[0335] According to any one of the appendices 1 to 7, the semiconductor light-emitting device (10) wherein,

[0336] The capacitor is one of a plurality of capacitors (421 to 428) disposed in each of the plurality of drive circuits (40A to 40H).

[0337] (Note 9)

[0338] According to any one of the appendices 1 to 8, the semiconductor light-emitting device (10) wherein,

[0339] The capacitors (421-428) are ceramic capacitors or silicon capacitors.

[0340] (Postscript 10)

[0341] According to any one of the appendices 1 to 9, the semiconductor light-emitting device (10) wherein,

[0342] The switching elements (411-418) are MOSFETs or nitride semiconductor transistors.

[0343] (Postscript 11)

[0344] According to any one of the appendices 1 to 10, the semiconductor light-emitting device (10) wherein,

[0345] The switching element (411-418) is connected to one or more of the plurality of semiconductor light-emitting elements (30) via multiple wires (W1).

[0346] (Postscript 12)

[0347] According to any one of the appendices 1 to 11, the semiconductor light-emitting device (10) wherein,

[0348] The semiconductor light-emitting device (10) also includes a plurality of gate drivers (205A to 205H), which drive the switching element (411 to 418) of one of the plurality of driving circuits (40A to 40H).

[0349] (Postscript 13)

[0350] According to any one of the appendices 1 to 12, the semiconductor light-emitting device (10) wherein,

[0351] The semiconductor light-emitting device (10) also includes a plurality of protection diodes (70A to 70H), which are connected in anti-parallel to one or more of the plurality of semiconductor light-emitting elements (30).

[0352] (Postscript 14)

[0353] According to any one of the appendices 1 to 13, the semiconductor light-emitting device (10) wherein,

[0354] The semiconductor light-emitting device (10) also includes a plurality of anti-reverse current diodes (204A to 204H), which are respectively disposed between the power input section (201, 202, 203) that supplies current to the plurality of semiconductor light-emitting elements (30) and the plurality of driving circuits (40A to 40H) and one of the driving circuits (40A to 40H).

[0355] (Postscript 15)

[0356] According to any one of the appendices 1 to 14, the semiconductor light-emitting device (10) wherein,

[0357] The substrate (20) is formed of any one of glass epoxy resin, ceramic and silicon.

[0358] (Postscript 16)

[0359] According to any one of the appendices 1 to 15, the semiconductor light-emitting device (10) wherein,

[0360] have:

[0361] A surface electrode layer (28A) is located on the main surface (21) of the substrate (20);

[0362] The back electrode layer (28B) is located on the back side (22) of the substrate (20);

[0363] Intermediate electrode layers (28C, 28D) are located between the surface electrode layer (28A) and the back electrode layer (28B) in the thickness direction of the substrate (20); and

[0364] Multiple through holes are disposed within the substrate (20) to electrically connect the surface electrode layer (28A), the back electrode layer (28B), and the intermediate electrode layers (28C, 28D).

[0365] The plurality of semiconductor light-emitting elements (30) and the plurality of driving circuits (40A~40H) are mounted on the surface electrode layer (28A).

[0366] The current path (CP) of the current flowing in one or more of the plurality of semiconductor light-emitting elements (30) that are the driving objects of the plurality of driving circuits (40A to 40H) is formed by the surface electrode layer (28A), the intermediate electrode layer (28C, 28D) and a plurality of vias (101A to 101H, 105A to 105H) among the plurality of vias.

[0367] Explanation of reference numerals in the attached figures

[0368] 10: Semiconductor light-emitting devices

[0369] 20: Substrate

[0370] 21: Main side

[0371] 22: Back

[0372] 23-26: First to fourth side views

[0373] 27A~27C: First to third substrates

[0374] 28A: First electrode layer (surface electrode layer)

[0375] 28B: Second electrode layer (back electrode layer)

[0376] 28C: Third electrode layer (intermediate electrode layer; surface-side intermediate electrode layer)

[0377] 28D: Fourth electrode layer (intermediate electrode layer; back side intermediate electrode layer)

[0378] 29A: Main surface anti-corrosion layer

[0379] 29B: Backside anti-corrosion layer

[0380] 30: Semiconductor light-emitting element

[0381] 31: Component surface

[0382] 32: Back of component

[0383] 33: Emitting area

[0384] 34: Surface Electrode

[0385] 35: Back electrode

[0386] 40, 40A~40H: Drive circuit

[0387] 411~418: Switching elements

[0388] 41A: Component surface

[0389] 41B: Back side of component

[0390] 41S: Source electrode

[0391] 41G: Gate electrode

[0392] 41D: Drain electrode

[0393] 421~428: Capacitors

[0394] 42A: First electrode

[0395] 42B: Second electrode

[0396] 42S: Surface electrode

[0397] 70A~70H: Protection diodes

[0398] 71: Anode electrode

[0399] 72: Cathode electrode

[0400] 200: Light-emitting system

[0401] 201: DC Power Supply

[0402] 202: Capacitor

[0403] 203: DC limiting resistor

[0404] 204A~204H: Diodes for reverse current protection

[0405] 205A~205H: Gate drivers

[0406] 206A~206H: Pulse generator

[0407] 207A~207H: Control power supply

[0408] 101A~101H: First through hole

[0409] 102A~102H: Second through hole

[0410] 103A~103H: Third through hole

[0411] 104A~104D: Fourth through hole

[0412] 105A~105H: Fifth through hole

[0413] 106A~106H: Sixth through hole

[0414] 107A~107H: Seventh through hole

[0415] AC: Central Area

[0416] AP: Surrounding Area

[0417] AP1: First Surrounding Area

[0418] AP2: Second Surrounding Area

[0419] AP3: Third Surrounding Area

[0420] AP4: Fourth Surrounding Area

[0421] CP: Current path

[0422] VC, HC: Imaginary center lines

[0423] W1~W4: Wires

Claims

1. A semiconductor light-emitting device, comprising: substrate; Multiple semiconductor light-emitting elements are disposed on the substrate; as well as Multiple driving circuits are disposed on the substrate, each driving one or more of the multiple semiconductor light-emitting elements. The plurality of semiconductor light-emitting elements are each composed of a light-emitting element located on the main surface of the substrate and emitting light in a direction intersecting with the main surface. The plurality of driving circuits respectively include: A switching element controls one or more of the plurality of semiconductor light-emitting elements; as well as A capacitor supplies current to one or more of the plurality of semiconductor light-emitting elements.

2. The semiconductor light-emitting device according to claim 1, wherein, The plurality of semiconductor light-emitting elements are centrally arranged in the central region of the substrate.

3. The semiconductor light-emitting device according to claim 2, wherein, The plurality of semiconductor light-emitting elements are arranged in a matrix adjacent to each other in the central region of the substrate.

4. The semiconductor light-emitting device according to claim 2 or 3, wherein, The plurality of driving circuits are configured in the peripheral region of the substrate, which surrounds the central region of the substrate when viewed from above.

5. The semiconductor light-emitting device according to claim 4, wherein, The peripheral area includes first to fourth peripheral areas defined by two imaginary center lines that are orthogonal to each other and pass through the center of the substrate when viewed from above. The plurality of driving circuits are respectively configured in one of the first to fourth peripheral regions.

6. The semiconductor light-emitting device according to claim 5, wherein, The plurality of semiconductor light-emitting elements comprises eight or more. Two or more of the plurality of driving circuits are configured in each of the first to fourth peripheral regions.

7. The semiconductor light-emitting device according to any one of claims 1 to 6, wherein, The light emitting element is a photonic crystal surface-emitting laser element or a vertical-cavity surface-emitting laser element.

8. The semiconductor light-emitting device according to any one of claims 1 to 7, wherein, The capacitor is one of a plurality of capacitors disposed in each of the plurality of drive circuits.

9. The semiconductor light-emitting device according to any one of claims 1 to 8, wherein, The capacitor is a ceramic capacitor or a silicon capacitor.

10. The semiconductor light-emitting device according to any one of claims 1 to 9, wherein, The switching element is a MOSFET or a nitride semiconductor transistor.

11. The semiconductor light-emitting device according to any one of claims 1 to 10, wherein, The switching element is connected to each of the plurality of semiconductor light-emitting elements via multiple wires.

12. The semiconductor light-emitting device according to any one of claims 1 to 11, wherein, The semiconductor light-emitting device also includes multiple gate drivers, each of which drives the switching element of one of the multiple driving circuits.

13. The semiconductor light-emitting device according to any one of claims 1 to 12, wherein, The semiconductor light-emitting device also includes a plurality of protection diodes, which are connected in anti-parallel to one or more of the plurality of semiconductor light-emitting elements.

14. The semiconductor light-emitting device according to any one of claims 1 to 13, wherein, The semiconductor light-emitting device also includes a plurality of anti-reverse current diodes, which are respectively disposed between the power input section that supplies current to the plurality of semiconductor light-emitting elements and the plurality of driving circuits and one of the plurality of driving circuits.

15. The semiconductor light-emitting device according to any one of claims 1 to 14, wherein, The substrate is formed of any one of glass epoxy resin, ceramic and silicon.

16. The semiconductor light-emitting device according to any one of claims 1 to 15, wherein, The semiconductor light-emitting device comprises: The surface electrode layer is located on the main surface of the substrate; A back electrode layer is located on the back side of the substrate; An intermediate electrode layer is located between the surface electrode layer and the back electrode layer in the thickness direction of the substrate; as well as Multiple through-holes are disposed within the substrate to electrically connect the surface electrode layer, the back electrode layer, and the intermediate electrode layer. The plurality of semiconductor light-emitting elements and the plurality of driving circuits are mounted on the surface electrode layer. The current path of the current flowing in each of the plurality of driving circuits and in one or more of the plurality of semiconductor light-emitting elements that are driven by each of the driving circuits is formed through the surface electrode layer, the intermediate electrode layer and a plurality of through holes of the plurality of through holes.

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