A glass substrate suitable for three-dimensional integrated electronic packaging

Abstract

The application discloses a glass substrate suitable for three-dimensional integrated electronic packaging and belongs to the technical field of electronic glass. The glass substrate is composed of the following components in terms of mole percentage: 67-71% of SiO2, 11-14% of Al2O3, 1-1.5% of B2O3, 0.15-0.25% of Y2O3 and 16.85-17.25% of alkaline earth metal oxide. The application forms a highly polymerized and compact glass network structure by optimizing the ratio of network formers and network modifiers, especially introducing high field strength Mg 2+ and Y 3+ ions, so that the coefficient of thermal expansion is well matched with a silicon chip, the dielectric loss (less than 0.003 at 0.8 GHz) is significantly reduced, and the key requirements of low thermal expansion, low loss and high insulation of the substrate material for three-dimensional integrated electronic packaging are met.

Description

Technical Field

[0001] This invention belongs to the field of electronic glass technology, specifically, it relates to a glass substrate suitable for three-dimensional integrated electronic packaging. Background Technology

[0002] In the field of microelectronic packaging, with the rapid development of 5G / 6G communication and 3D integration technology, the performance requirements for packaging substrate materials are becoming increasingly stringent. Currently, 3D packaging mainly uses organic substrates, but in large-size packages larger than 12 inches, organic materials have shown significant bottlenecks: their coefficient of thermal expansion (CTE) is severely mismatched with silicon chips, leading to thermal stress accumulation, package warping, and thus increasing the risk of interface delamination, significantly reducing device reliability. In contrast, glass substrates, with their tunable coefficient of thermal expansion and low dielectric loss, are becoming a cutting-edge direction for breaking through the bottlenecks of 3D integration technology. As the core basic material for through-glass via (TGV) 3D advanced packaging, the key properties of the substrate glass, such as dielectric loss and coefficient of thermal expansion, directly determine the quality of through-holes / filled vias and the stability and long-term reliability of high-density stacked wiring, thus becoming a hot topic in global research on advanced packaging glass materials. For example, the CTE of borosilicate glass is typically below 1 ppm / °C, while the CTE of silicon is approximately 2.6 ppm / °C; their similarity can improve packaging reliability. Secondly, the glass should possess excellent electrical properties, with its dielectric constant controlled within a certain range to reduce signal loss and latency in high-frequency signal transmission. Furthermore, high dimensional stability supports multi-layer stacking and micron-level alignment, making it suitable for 3D packaging applications. Additionally, the glass substrate needs a low dielectric constant to reduce signal transmission loss, especially for high-frequency applications such as AI chips and RF devices. Simultaneously, the glass substrate should have high insulation to reduce leakage current and ensure high-frequency signal integrity. Therefore, the requirements for glass substrates in TGV technology are mainly reflected in: low coefficient of thermal expansion, high insulation performance, low dielectric constant, and low dielectric loss. Currently, while commercially available low-expansion borosilicate glass may meet the requirements in terms of coefficient of thermal expansion, its dielectric loss is typically higher than 0.005, making it unsuitable for higher-frequency applications; while some glasses with excellent dielectric properties often have a high coefficient of thermal expansion, making them difficult to match with silicon. Summary of the Invention

[0003] The purpose of this invention is to overcome the shortcomings of the prior art and provide a glass substrate suitable for three-dimensional integrated electronic packaging.

[0004] The objective of this invention can be achieved through the following technical solutions: A glass substrate suitable for three-dimensional integrated electronic packaging comprises, by molar percentage: 67% to 71% SiO2, 11% to 14% Al2O3, 1% to 1.5% B2O3, 0.15% to 0.25% Y2O3, and 16.85% to 17.25% alkaline earth metal oxides.

[0005] Furthermore, the alkaline earth metal oxides include MgO, CaO, SrO, and BaO.

[0006] Furthermore, the glass substrate contains 6.8% to 7% MgO.

[0007] Furthermore, in terms of molar percentage ratios, B2O3 / (Al2O3+SiO2) ranges from 0.012 to 0.020, and MgO / (MgO+CaO+SrO+BaO) ranges from 0.40 to 0.41.

[0008] Furthermore, the glass substrate has a dielectric constant of less than 5 and a dielectric loss of less than 0.003 at a frequency of 0.8 GHz.

[0009] The beneficial effects of this invention are: This invention, through a unique component ratio, successfully achieves a suitable coefficient of thermal expansion of (3.0-3.5) × 10⁻⁶. -6 The invention perfectly combines two crucial properties for TGV applications: extremely low temperature and extremely low dielectric loss (tanδ < 0.003), solving the problem that existing glass materials struggle to achieve both. The glass network constructed in this invention is based on a high-alumina, low-borosilicate glass system. By controlling the ratio of silica to alumina in the main network formation and the content of added network-modifying oxides, particularly high-field-strength ions (Mg²⁺), the invention achieves this. 2+ And high field strength rare earth ions Y 3+ This process achieves an accumulation effect on the glass network structure, increasing the density of the glass network and obtaining a highly polymerized and compact network structure. This effectively controls ion migration within the network structure, giving the glass excellent electrical insulation properties and reducing dielectric loss. Simultaneously, the compact network structure can control the glass's coefficient of thermal expansion. Between these parameters, the key performance indicators of the glass substrate are met by the three-dimensional integrated electronic packaging technology. Detailed Implementation

[0010] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0011] A glass substrate suitable for three-dimensional integrated electronic packaging, the specific implementation steps are as follows: (1) Mix the components according to Table 1 below to form the glass substrate mixture; (2) Increase the temperature from room temperature to 1200℃ at a rate of 3℃ / min, then increase it from 1200℃ to 1750℃ at a rate of 2℃ / min, and keep it warm for 6 hours; (3) Pour the fully melted glass onto a copper plate for shaping, and place it in an annealing furnace for annealing at a temperature of 780°C for 1 hour. Finally, the sample is cooled to room temperature with the furnace to obtain a glass substrate suitable for three-dimensional integrated electronic packaging.

[0012] The component ratios and test data for each embodiment and comparative example are shown in Table 1 below.

[0013] Table 1 In a preferred embodiment, the glass substrate for three-dimensional integrated electronic packaging provided by the present invention has a coefficient of thermal expansion of [value missing]. , Log resistivity is The dielectric constant is 4.80-4.95, and the dielectric loss is 0.0017-0.0028.

[0014] The glass in all embodiments 1-5 of this invention has a coefficient of thermal expansion successfully controlled within the range of 3.1-3.4×10-6 / ℃, matching the coefficient of thermal expansion of silicon chips. Simultaneously, their dielectric loss tangent at 0.8GHz is all below 0.003, reaching as low as 0.0020, achieving a combination of low expansion and low dielectric loss.

[0015] In contrast, the performance of the comparative model showed a significant decline, which strongly demonstrates the critical importance of the specific component ratio of the present invention. It successfully solves the technical problem of balancing low thermal expansion coefficient and low dielectric loss in the prior art, and obtains a glass substrate suitable for three-dimensional integrated electronic packaging.

[0016] The above description is merely an example and illustration of the present invention. Those skilled in the art can make various modifications or additions to the specific embodiments described, or use similar methods to replace them, as long as they do not deviate from the invention or exceed the scope defined in the claims, all of which should fall within the protection scope of the present invention.

Claims

1. A glass substrate suitable for three-dimensional integrated electronic packaging, characterized in that, Its components, in molar percentage, include: SiO2: 67%~71% Al2O3: 11%~14% B2O3: 1%~1.5% Y₂O₃: 0.15%~0.25% Alkaline earth metal oxides: 16.85%~17.25%.

2. The glass substrate suitable for three-dimensional integrated electronic packaging according to claim 1, characterized in that, The alkaline earth metal oxides include MgO, CaO, SrO, and BaO.

3. A glass substrate suitable for three-dimensional integrated electronic packaging according to claim 2, characterized in that, The glass substrate contains 6.8% to 7% MgO by molar percentage.

4. A glass substrate suitable for three-dimensional integrated electronic packaging according to claim 1, characterized in that, In terms of molar percentage ratios, B2O3 / (Al2O3+SiO2) ranges from 0.012 to 0.020, and MgO / (MgO+CaO+SrO+BaO) ranges from 0.40 to 0.

41.

5. A glass substrate suitable for three-dimensional integrated electronic packaging according to claim 1, characterized in that, The glass substrate has a dielectric constant of less than 5 and a dielectric loss of less than 0.003 at a frequency of 0.8 GHz.

6. A glass substrate suitable for three-dimensional integrated electronic packaging according to any one of claims 1-5, characterized in that, The glass substrate is prepared by the following steps: (1) Weigh and mix each component to obtain the batch material; (2) The batch material is heated from room temperature to 1200℃ at a rate of 3℃ / min, and then heated from 1200℃ to 1750℃ at a rate of 2℃ / min, and kept at the temperature for 6 hours to obtain glass melt; (3) After the glass melt is formed, it is annealed and then cooled in the furnace.

7. A glass substrate suitable for three-dimensional integrated electronic packaging according to claim 6, characterized in that, The molding process involves casting copper plates.

8. A glass substrate suitable for three-dimensional integrated electronic packaging according to claim 6, characterized in that, The annealing is carried out in an annealing furnace at 780°C for 1 hour.

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