Field-induced modulation heterogeneous integrated photon display chip, method for manufacturing the same and laser display system

Abstract

The application relates to a field-induced modulation heterogeneous integrated photon display chip and a manufacturing method thereof, and a laser display system. The field-induced modulation heterogeneous integrated photon display chip comprises a first substrate, a monochromatic laser located on one side of the first substrate, a waveguide layer, a first modulator and a second modulator. The monochromatic laser is used for outputting light. The waveguide layer is located on the side of the monochromatic laser close to the first substrate and comprises a grating coupler, a beam splitter, an interferometer and an optical waveguide structure arranged in sequence along a first direction. The first modulator is used for performing primary frequency modulation on the light output by the monochromatic laser, and the first modulator is located on the side of the waveguide layer away from the first substrate. The second modulator is used for performing secondary frequency modulation on the light, and the second modulator is located on the side of the optical waveguide structure away from the first substrate. The application improves the color regulation and control capability of the field-induced modulation heterogeneous integrated photon display chip, optimizes the performance of the chip and reduces the size of the chip.

Description

Technical Field

[0001] This application relates to the fields of integrated photonics and display technology, and in particular to a field-modulated heterogeneous integrated photonic display chip and its fabrication method, and a laser display system. Background Technology

[0002] Laser projection display technology uses red, green, and blue primary color lasers as its light source. The system mainly consists of a three-primary-color laser light source, an optical engine, and a screen. It projects images by mixing the three primary color lasers. Generally, laser display systems typically employ free-space optical elements to achieve beam expansion, color mixing, and modulation.

[0003] However, free-space optical elements can lead to problems such as large size, complex structure, and high power consumption in laser display systems, making it difficult to meet the dual requirements of thinness and high performance for AR / VR devices. Meanwhile, the inherent speckle phenomenon in laser display technology severely affects image quality, and commonly used speckle suppression methods (such as adding mechanical vibration diffusers) suffer from poor reliability and large size, resulting in typical laser display systems exhibiting problems such as large size, severe speckle interference, and limited color control dimensions. Summary of the Invention

[0004] Therefore, it is necessary to provide a field-modulated heterogeneous integrated photonic display chip and its fabrication method, as well as a laser display system, to improve the color control capability of the field-modulated heterogeneous integrated photonic display chip and reduce the chip size while optimizing chip performance.

[0005] In a first aspect, this application provides a field-modulated heterogeneous integrated photonic display chip, comprising:

[0006] First base;

[0007] A monochromatic laser, located on one side of the first substrate, is used to output light;

[0008] A waveguide layer, located on the first substrate and on the side of the monochromatic laser closer to the first substrate, includes a grating coupler, a beam splitter, an interferometer, and an optical waveguide structure arranged sequentially along a first direction; wherein, the beam splitter is used to split the light entering the waveguide layer, and the interferometer is used to modulate the light intensity of the light output from the beam splitter;

[0009] A first modulator is used to perform preliminary frequency modulation on the light output by the monochromatic laser. The first modulator is located on the side of the waveguide layer away from the first substrate, and the orthographic projection of the first modulator toward the first substrate at least partially coincides with the orthographic projections of the beam splitter and the interferometer toward the first substrate.

[0010] A second modulator is used to perform secondary frequency modulation on the light, and the second modulator is located on the side of the optical waveguide structure away from the first substrate.

[0011] In one embodiment, the first modulator includes:

[0012] A piezoelectric layer is located on the side of the beam splitter away from the first substrate, and the piezoelectric layer at least covers the strip waveguide region of the beam splitter;

[0013] Interdigitated transducers are located on the side of the piezoelectric layer away from the waveguide layer;

[0014] A heating layer is located on the side of the interferometer away from the first substrate and covers a portion of the surface of the interferometer;

[0015] The heating electrode is located on the side of the heating layer away from the waveguide layer.

[0016] In one embodiment, the second modulator includes:

[0017] A conductive layer is located on the side of the optical waveguide structure away from the first substrate;

[0018] The liquid crystal layer is located on the side of the conductive layer away from the waveguide layer;

[0019] A polarization structure is located on the side of the liquid crystal layer away from the conductive layer;

[0020] A protective layer is located on the side of the polarization structure away from the liquid crystal layer, and a variety of gratings are provided within the protective layer;

[0021] A first dielectric layer is located on the side of the protective layer away from the polarization structure, and a microdisk resonator is disposed within the first dielectric layer;

[0022] The electrode structure is located on the side of the first dielectric layer away from the protective layer, and the orthogonal projection of the electrode structure toward the first dielectric layer is uniformly distributed on the periphery of the microdisk resonator.

[0023] In one embodiment, the field-modulated heterogeneous integrated photonic display chip further includes:

[0024] The metasurface structure is located on the side of the second modulator away from the waveguide layer:

[0025] A phase change layer is located on the side of the metasurface structure closer to the second modulator and covers a portion of the surface of the metasurface structure;

[0026] The metasurface structure includes:

[0027] The first nanopillar array comprises multiple rectangular pillars arranged in an array;

[0028] The second nanopillar array comprises multiple elliptical pillars arranged in an array;

[0029] A microcavity resonator is located between the first nanopillar array and the second nanopillar array, and the phase transition layer is covered on the microcavity sidewall of the microcavity resonator.

[0030] A C-shaped ring is located between the first nanopillar array and the second nanopillar array, and the arrangement direction of the C-shaped ring and the microcavity resonator is parallel to the first direction.

[0031] In one embodiment, the field-modulated heterogeneous integrated photonic display chip further includes:

[0032] An insulating dielectric layer at least covers the monochromatic laser, the waveguide layer, the first modulator, the second modulator, and the metasurface structure;

[0033] An interconnect structure, located within the insulating dielectric layer, is used to lead out the first modulator and the second modulator, respectively, and one end of the interconnect structure away from the first modulator and the second modulator is connected to a driving circuit structure of a driving wafer.

[0034] Secondly, this application also provides a method for manufacturing a field-modulated heterogeneous integrated photonic display chip, comprising:

[0035] A first substrate is provided, and a patterned waveguide layer is formed on the first substrate. A beam splitter, an interferometer, and an optical waveguide structure are formed in the waveguide layer in sequence along a first direction.

[0036] A first modulator is formed on the waveguide layer, and the orthographic projection of the first modulator toward the first substrate at least partially coincides with the orthographic projections of the beam splitter and the interferometer toward the first substrate.

[0037] A second modulator is formed on the waveguide layer, and the second modulator is located on the side of the optical waveguide structure away from the first substrate;

[0038] A grating coupler is formed within the waveguide layer, and the grating coupler is located on the side of the beam splitter away from the interferometer;

[0039] A monochromatic laser is formed on the side of the grating coupler away from the first substrate.

[0040] In one embodiment, the process of forming the first modulator on the waveguide layer includes:

[0041] A piezoelectric layer is formed on the waveguide layer, the piezoelectric layer at least covering the strip waveguide region of the beam splitter;

[0042] A first electrode material layer is formed on the piezoelectric layer, and the first electrode material layer is patterned to form an interdigital transducer.

[0043] Perform annealing treatment;

[0044] A heating layer is formed on the waveguide layer, and the heating layer covers a portion of the surface of the interferometer;

[0045] A heating electrode material layer is formed on the heating layer, and the heating electrode material layer is patterned to form a heating electrode, and a first modulator including the piezoelectric layer, the interdigital transducer, the heating layer and the heating electrode is formed.

[0046] In one embodiment, the process of forming the second modulator on the waveguide layer includes:

[0047] A conductive layer is formed on the waveguide layer, and the conductive layer covers the optical waveguide structure;

[0048] A liquid crystal polymer suspension doped with nanospheres is spin-coated onto the conductive layer and then cured to form a liquid crystal layer.

[0049] A conductive material layer with an electrode pattern is formed on the liquid crystal layer, and a birefringent material layer is formed to fill the electrode pattern, so as to form a polarization structure including the conductive material layer and the birefringent material layer;

[0050] A protective layer is formed on the polarization structure, and the protective layer is patterned to form a variety of gratings within the protective layer;

[0051] A first dielectric layer is formed on the protective layer, and the first dielectric layer is patterned to form a microdisk resonator within the first dielectric layer;

[0052] A patterned electrode structure is formed on the first dielectric layer, and the electrode structure is uniformly distributed around the periphery of the microdisk resonator with its orthogonal projection toward the first dielectric layer.

[0053] Perform annealing.

[0054] In one embodiment, after forming the second modulator, the method for manufacturing the field-modulated heterogeneous integrated photonic display chip further includes:

[0055] A second substrate is provided, and a surface material layer is formed on the second substrate;

[0056] The surface material layer is patterned to form a metasurface structure, which includes a first nanopillar array, a second nanopillar array, and a C-shaped ring and a microcavity resonator located between the first nanopillar array and the second nanopillar array, and the arrangement direction of the C-shaped ring and the microcavity resonator is parallel to the first direction.

[0057] A phase change layer is formed on the metasurface structure, and the phase change layer covers the microcavity sidewall of the microcavity resonator;

[0058] The metasurface structure is bonded to the side of the second modulator away from the waveguide layer;

[0059] An insulating dielectric layer is formed on the side of the waveguide layer away from the first substrate, and the insulating dielectric layer at least covers the first modulator, the second modulator, and the metasurface structure;

[0060] An interconnect structure is formed within the insulating dielectric layer, and the first modulator and the second modulator are respectively led out from the interconnect structure;

[0061] A driving wafer is provided, and a driving circuit structure is connected to the end of the interconnect structure away from the first modulator and the second modulator.

[0062] Thirdly, this application also provides a laser display system, including the field-modulated heterogeneous integrated photonic display chip as described above; or, including a field-modulated heterogeneous integrated photonic display chip manufactured by the manufacturing method of the field-modulated heterogeneous integrated photonic display chip as described above.

[0063] In summary, this application provides a field-modulated heterogeneous integrated photonic display chip and its fabrication method, as well as a laser display system. The field-modulated heterogeneous integrated photonic display chip includes a first substrate, a monochromatic laser located on one side of the first substrate, a waveguide layer, a first modulator, and a second modulator. The monochromatic laser is used to output light. The waveguide layer is located on the side of the monochromatic laser closer to the first substrate and includes a grating coupler, a beam splitter, an interferometer, and an optical waveguide structure arranged sequentially along a first direction. The first modulator is used to perform preliminary frequency modulation on the light output from the monochromatic laser and is located on the side of the waveguide layer away from the first substrate. The second modulator is used to perform secondary frequency modulation on the light and is located on the side of the optical waveguide structure away from the first substrate. This application improves the color control capability of the field-modulated heterogeneous integrated photonic display chip and reduces the chip size while optimizing chip performance. Attached Figure Description

[0064] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0065] Figure 1 This is a cross-sectional structural diagram of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0066] Figure 2 This is a top view of the waveguide layer in a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0067] Figure 3 This is a top view of the first dielectric layer on the side away from the protective layer in a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0068] Figure 4 This is a top view of the metasurface structure near the second modulator side of the field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0069] Figure 5 This is a schematic diagram of the control flow of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0070] Figure 6 A flowchart illustrating a method for manufacturing a field-modulated heterogeneous integrated photonic display chip according to one embodiment of this application.

[0071] Figure 7 This is a schematic diagram of the structure corresponding to the step of providing a first substrate in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip according to one embodiment of this application.

[0072] Figure 8 This is a schematic diagram of the structure corresponding to the step of forming a waveguide layer on a first substrate in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0073] Figure 9 This is a schematic diagram of the structure corresponding to the step of patterning the waveguide layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0074] Figure 10 This is a schematic diagram of the structure corresponding to the step of forming a piezoelectric layer on the waveguide layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0075] Figure 11 This is a schematic diagram of the structure corresponding to the step of forming an interdigital transducer on a piezoelectric layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0076] Figure 12 This is a schematic diagram of the structure corresponding to the step of forming a heating layer and heating electrodes on a waveguide layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0077] Figure 13 This is a schematic diagram of the structure corresponding to the step of forming a conductive layer on the waveguide layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0078] Figure 14 This is a schematic diagram of the structure corresponding to the step of forming a liquid crystal layer on a conductive layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0079] Figure 15 This is a schematic diagram of the structure corresponding to the step of forming a polarization structure on the liquid crystal layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0080] Figure 16 This is a schematic diagram of the structure corresponding to the step of forming a protective layer on the polarization structure in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0081] Figure 17 This is a schematic diagram of the structure corresponding to the step of forming a first dielectric layer and an electrode structure on a protective layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0082] Figure 18 This is a schematic diagram of the structure corresponding to the step of providing a second substrate in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip according to one embodiment of this application.

[0083] Figure 19 This is a schematic diagram of the structure corresponding to the step of forming a surface material layer and a mask layer on a second substrate in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0084] Figure 20 This is a schematic diagram of the structure corresponding to the step of forming a metasurface structure in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0085] Figure 21This is a schematic diagram of the structure corresponding to the step of forming a micropillar structure and a quartz cover plate on the first dielectric layer in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0086] Figure 22 This is a schematic diagram of the structure corresponding to the step of bonding the metasurface structure to the second modulator in the manufacturing method of the field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application.

[0087] The reference numerals in the figures include: 100-first substrate; 101-buffer layer; 110-waveguide layer; 111-optical waveguide structure; 112-interferometer; 112a-wall; 113-beam splitter; 114-grating coupler; 120-piezoelectric layer; 121-interdigital transducer; 130-heating layer; 131-heating electrode; 140-conductive layer; 141-liquid crystal layer; 142-polarization structure; 142a-conductive material layer; 142b-birefringent material layer; 150-protective layer; 151-multi-functional grating; 160-first dielectric layer; 161-first electrode layer; 1 62-Second electrode layer; 163-Micropillar structure; 164-Cover plate; 170-Monochromatic laser; 200-Second substrate; 201-Sacrificial layer; 210-Surface material layer; 210a-Metasurface structure; 211-Mask layer; 212-Nanopillar; 212a-Rectangular pillar; 212b-Elliptical pillar; 213-First nanopillar array; 214-C-ring; 215-Microcavity resonator; 216-Phase transition layer; 217-Second nanopillar array; 218-Microheating electrode; W1-First structure; W2-Second structure; P1-First modulator; P2-Second modulator. Detailed Implementation

[0088] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0089] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0090] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0091] Spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, an element or feature described as “below,” “below,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0092] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, in this specification, the term “and / or” includes any and all combinations of the associated listed items.

[0093] Generally, laser display systems employ free-space optical elements to achieve beam expansion, color mixing, and modulation. However, the use of these spatial optical elements leads to problems such as large size, complex structure, and high power consumption in laser display systems, making it difficult to meet the dual requirements of thinness and high performance for AR / VR devices. Meanwhile, liquid crystal display technology suffers from narrow color gamut, slow response speed, and low energy efficiency; emerging technologies such as micro-LEDs face challenges of high manufacturing difficulty and cost; the inherent speckle phenomenon in laser displays severely affects image quality, and commonly used speckle suppression methods, such as adding mechanically vibrating diffusers (DLP), suffer from poor reliability and increased system size; and the application of photonic integrated circuit technology in the visible light band still faces problems such as low efficiency, insufficient integration, and limited controllability.

[0094] Therefore, there is an urgent need to develop a high-performance integrated photonic display solution that can integrate multiple photonic control mechanisms and has dynamic reconfigurability, so as to simultaneously improve the problems of large size, severe speckle interference, and limited color control dimensions in laser display systems.

[0095] Figure 1 This is a schematic cross-sectional view of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application. (See also...) Figure 1 One embodiment of this application provides a field-modulated heterogeneous integrated photonic display chip including a first substrate 100, a monochromatic laser 170 located on one side of the first substrate 100, a waveguide layer 110, and a first modulator P1 (see [reference]). Figure 12 ) and second modulator P2 (see Figure 17 ); wherein, a monochromatic laser 170 is used to output light; a waveguide layer 110 is located on a first substrate 100 and on the side of the monochromatic laser 170 near the first substrate 100, including a grating coupler 114, a beam splitter 113, an interferometer 112, and an optical waveguide structure 111 arranged sequentially along a first direction (i.e., direction A); wherein, the beam splitter 113 is used to split the light entering the waveguide layer 110, and the interferometer 112 is used to modulate the light intensity output by the beam splitter 113; the first Modulator P1 is used to perform preliminary frequency modulation on the light output from monochromatic laser 170. The first modulator P1 is located on the side of waveguide layer 110 away from the first substrate 100, and the orthographic projection of the first modulator P1 toward the first substrate 100 at least partially coincides with the orthographic projection of beam splitter 113 and interferometer 112 toward the first substrate 100. The second modulator P2 is used to perform secondary frequency modulation on the light. The second modulator P2 is located on the side of optical waveguide structure 111 away from the first substrate 100.

[0096] As described above, the field-modulated heterogeneous integrated photonic display chip uses a first modulator to perform preliminary frequency modulation on the light output from a monochromatic laser, converting the monochromatic light into light with different frequencies (e.g., modulating monochromatic light into red, green, and blue light); and uses a second modulator to perform secondary frequency modulation on the light that has undergone preliminary frequency modulation, so as to enhance the color contrast between light with different frequencies, thereby improving the color control capability of the field-modulated heterogeneous integrated photonic display chip and reducing the chip size while optimizing chip performance.

[0097] Continue reading Figure 1 In one embodiment, a buffer layer 101 is further disposed between the first substrate 100 and the waveguide layer 110 to alleviate the stress caused by the difference in thermal expansion coefficients between the first substrate 100 and the subsequent film layer (i.e., the waveguide layer 110), and to adjust the refractive index difference between the first substrate 100 and the waveguide layer 110, thereby optimizing the light transmission characteristics in the waveguide layer 110. Optionally, the first substrate 100 is a silicon on insulator (SOI) substrate. Optionally, the material of the buffer layer 101 is silicon dioxide (SiO2); the thickness of the buffer layer 101 is in the range of 0.5 μm to 1 μm.

[0098] In one embodiment, the waveguide layer 110 is made of silicon nitride (SiN). Optionally, the refractive index of the waveguide layer 110 is in the range of 1.95 to 2.05. Optionally, the thickness of the waveguide layer 110 is, for example, 50 nm, and the sidewall perpendicularity of the waveguide layer 110 is greater than 89°. Optionally, the surface roughness of the waveguide layer 110 is less than 2 nm to reduce the transmission loss of the waveguide layer 110.

[0099] Figure 2 for Figure 1 A top-view structural diagram of the middle waveguide layer. Figure 1 The morphology of the middle waveguide layer 110 in regions X1~X5 is respectively compared with... Figure 2 The waveguide layer 110 shown corresponds to the structure in regions X1 to X5. It should be noted that, in order to clearly distinguish the different regions of the waveguide layer 110, Figure 1 The waveguide layer 110 shown uses different filling patterns for any two adjacent regions.

[0100] See Figure 1 and Figure 2In one embodiment, the interferometer 112 is, for example, a Mach-Zehnder interferometer (MZI); the beam splitter 113 is, for example, a Y-type beam splitter. Optionally, the grating coupler 114 includes a tilted grating structure, with a period of, for example, 420 nm, a grating etching depth of, for example, 70 nm, and a fill factor of, for example, 0.55. It should be noted that the grating parameters can be optimized through rigorous coupling wave analysis, enabling the grating coupler 114 to achieve a coupling efficiency of over 45% at a wavelength of 580 nm.

[0101] contrast Figure 1 and Figure 2 The projection of the monochromatic laser 170 toward the waveguide layer 110 at least partially coincides with the grating coupler 114. In one embodiment, the monochromatic laser 170 is, for example, a 580 nm distributed feedback single-mode laser. Optionally, the monochromatic laser 170 uses a gallium arsenide aluminum material system, and the laser size is, for example, 300 μm × 200 μm × 100 μm. Optionally, the output power of the monochromatic laser 170 is 80 mW, and the spectral linewidth is less than 0.1 nm.

[0102] It should be noted that the driving aspect of the monochromatic laser 170 integrates a thermoelectric cooler and a thermistor. Through a proportional, integral, and differential control algorithm (i.e., PID control algorithm), the junction temperature of the monochromatic laser 170 is stabilized within the range of 24.9℃~25.1℃ to ensure that the output wavelength drift is less than 0.01nm. This results in a coupling loss of less than 2.5 dB between the monochromatic laser 170 and the waveguide layer 110, and enables the overall electro-optical conversion efficiency (Wall-plug Efficiency) of the field-modulated heterogeneous integrated photonic display chip to reach more than 18%.

[0103] See Figure 1 and Figure 2 In one embodiment, the first modulator P1 (see...) Figure 12 The beam splitter 113 includes a piezoelectric layer 120, an interdigital transducer 121, a heating layer 130, and a heating electrode 131; wherein, the piezoelectric layer 120 is located on the side of the beam splitter 113 away from the first substrate 100, and the piezoelectric layer 120 at least covers the strip waveguide region of the beam splitter 113 (i.e., Figure 2 The beam splitter 113 is located in the strip region of region X3; the interdigital transducer 121 is located on the side of the piezoelectric layer 120 away from the waveguide layer 110; the heating layer 130 is located on the side of the interferometer 112 away from the first substrate 100 and covers part of the surface of the interferometer 112 (i.e., Figure 2One of the walls 112a of the interferometer 112); the heating electrode 131 is located on the side of the heating layer 130 away from the waveguide layer 110.

[0104] In one embodiment, the piezoelectric layer 120 includes a preferred-oriented wurtzite structure, and the piezoelectric coefficient d of the piezoelectric layer 120 is... 33 Achieving a polarization of 5.5 pC / N or higher; the interdigital transducer 121 includes an aluminum electrode structure with a periodic interdigital structure, and an ohmic contact is achieved between the piezoelectric layer 120 and the interdigital transducer 121. Optionally, the thickness of the piezoelectric layer 120 is, for example, 300 nm, and the thickness of the interdigital transducer 121 is, for example, 200 nm. Optionally, the width of the interdigital transducer 121 fingers is, for example, 800 nm, and the distance between adjacent fingers is 400 nm.

[0105] In one embodiment, the heating layer 130 is made of titanium nitride (TiN); the thickness of the heating layer 130 is, for example, 100 nm. Optionally, the heating electrode 131 is, for example, a serpentine heating electrode, and the width of the serpentine heating electrode is 2 μm. Optionally, a temperature sensor is also disposed on the heating layer 130, the temperature sensor being spaced apart from the heating electrode 131, and the temperature sensor is, for example, an integrated platinum resistance temperature sensor.

[0106] See Figure 1 and Figure 2 In one embodiment, the side of the optical waveguide structure 111 away from the interferometer 112 includes a coupling grating (i.e., a square array structure in region X1 away from region X2).

[0107] See Figure 1 and Figure 17 In one embodiment, the second modulator P2 includes a conductive layer 140, a liquid crystal layer 141, a polarization structure 142, a protective layer 150, a first dielectric layer 160, and an electrode structure. The conductive layer 140 is located on the side of the optical waveguide structure 111 away from the first substrate 100; the liquid crystal layer 141 is located on the side of the conductive layer 140 away from the waveguide layer 110; the polarization structure 142 is located on the side of the liquid crystal layer 141 away from the conductive layer 140; the protective layer 150 is located on the side of the polarization structure 142 away from the liquid crystal layer 141, and a multi-functional grating 151 is disposed within the protective layer 150; the first dielectric layer 160 is located on the side of the protective layer 150 away from the polarization structure 142, and a microdisk resonator (not shown in the figure) is disposed within the first dielectric layer 160; the electrode structure is located on the side of the first dielectric layer 160 away from the protective layer 150, and the orthographic projection of the electrode structure toward the first dielectric layer 160 is uniformly distributed around the periphery of the microdisk resonator.

[0108] In one embodiment, the conductive layer 140 is made of a transparent conductive material, such as indium tin oxide (ITO). Optionally, the thickness of the conductive layer 140 is, for example, 150 nm. Optionally, the thin film resistivity of the conductive layer 140 is 5 × 10⁻⁶. -4 Ω·cm, to ensure that the transmittance of the conductive layer 140 in the visible light band is higher than 90%.

[0109] In one embodiment, the liquid crystal layer 141 is a composite film formed by curing a liquid crystal polymer suspension doped with nanospheres, and the nanospheres are arranged in an ordered monolayer within the composite film. Optionally, the nanospheres are made of silicon dioxide, and the diameter of the nanospheres is, for example, 165 nm.

[0110] In one embodiment, the polarization structure 142 includes a conductive material layer 142a having an electrode pattern and a birefringent material layer 142b filled with the electrode pattern. Optionally, the polarization extinction ratio of the polarization structure 142 is greater than 1000:1. Optionally, the material of the conductive material layer 142a includes a transparent conductive material, such as indium tin oxide; the material of the birefringent material layer 142b includes zinc sulfide (ZnS); the thickness of the birefringent material layer 142b is, for example, 300 nm.

[0111] In one embodiment, the protective layer 150 is made of silicon dioxide; the thickness of the protective layer 150 is, for example, 300 nm. Optionally, the grating period of the diverse grating structure includes 380 nm to 420 nm; the grating orientation includes 0°, 45°, and 90°; the depth of the diverse grating 151 is, for example, 70 nm. Preferably, the diverse grating 151 is a Bragg grating.

[0112] In one embodiment, the first dielectric layer 160 is made of lithium niobate, and its thickness is, for example, 300 nm. Optionally, the electrode structure includes a first electrode layer 161 on the first dielectric layer 160 and a second electrode layer 162 on the first electrode layer 161; wherein the first electrode layer 161 is made of metallic silver (Ag), the second electrode layer 162 is made of metallic aluminum (Al), and the second electrode layer 162 forms an interdigitated transducer structure on the first electrode layer 161. Optionally, the thickness of the first electrode layer 161 is, for example, 200 nm.

[0113] In one embodiment, the number of electrode structures formed by the combination of the first electrode layer 161 and the second electrode layer 162 is four, and the four electrode structures are evenly distributed around the microdisk resonator with their orthogonal projections toward the first dielectric layer 160.

[0114] See Figure 1 and Figure 3In one embodiment, the second modulator P2 further includes a micropillar structure 163 and a cover plate 164; wherein the micropillar structure 163 is located on the side of the first dielectric layer 160 away from the protective layer 150, and the micropillar structure 163 is located in the portion of the first dielectric layer 160 exposed after the micropillar structure 163 is patterned with the first electrode layer 161 and the second electrode layer 162, and the height of the micropillar structure 163 is at least greater than the thickness of the electrode structure formed by the combination of the first electrode layer 161 and the second electrode layer 162, to ensure that the cover plate 164 is located on the side of the second electrode layer 162 away from the first electrode layer 161; at the same time, the orthographic projection of the micropillar structure 163 toward the first dielectric layer 160 is located in the microdisk resonator (e.g., Figure 3 The periphery of region Z1 in the first dielectric layer 160 is covered by the orthogonal projection of the cover plate 164 toward the first dielectric layer 160, and the region in the first dielectric layer 160 in which the microdisk resonator is disposed is at least covered (e.g., the area of ​​the first dielectric layer 160 where the microdisk resonator is disposed). Figure 3 (Region Z1 in the text). Optionally, the material of the micropillar structure 163 includes silicon and silicon dioxide; the height of the micropillar structure 163 is, for example, 100 nm, and the diameter of the micropillar structure 163 is, for example, 1 μm. Optionally, the cover plate 164 is a quartz cover plate.

[0115] See Figure 1 and Figure 4 In one embodiment, the field-modulated heterogeneous integrated photonic display chip further includes a metasurface structure 210a and a phase transition layer 216 to achieve dynamic phase modulation in the visible light band; wherein, the metasurface structure 210a is located in the second modulator (i.e., Figure 17 On the side of P2 away from the waveguide layer 110: the phase change layer 216 is located on the side of the metasurface structure 210a close to the second modulator P2 and covers part of the surface of the metasurface structure 210a; wherein, the metasurface structure 210a includes a first nanopillar array 213, a second nanopillar array 217, a microcavity resonator 215 and a C-ring 214: the first nanopillar array 213 includes a plurality of rectangular pillars 212a arranged in an array; the second nanopillar array 217 includes a plurality of elliptical pillars 212b arranged in an array; the microcavity resonator 215 is located between the first nanopillar array 213 and the second nanopillar array 217, and the microcavity sidewall of the microcavity resonator 215 is covered with the phase change layer 216; the C-ring 214 is located between the first nanopillar array 213 and the second nanopillar array 217, and the arrangement direction of the C-ring 214 and the microcavity resonator 215 is parallel to the first direction (i.e., direction A).

[0116] In one embodiment, the metasurface structure 210a is made of amorphous silicon; the thickness of the metasurface structure 210a is, for example, 80 nm. In other embodiments of this application, the metasurface structure 210a may also be a bilayer composite structure composed of an amorphous silicon layer and a titanium dioxide layer, wherein the thickness of the amorphous silicon layer is, for example, 80 nm, and the thickness of the titanium dioxide layer is, for example, 50 nm. Optionally, the phase change layer 216 is made of vanadium oxide (VO2), and the thickness of the phase change layer 216 is, for example, 10 nm.

[0117] In one embodiment, the different nanopillars 212 in the metasurface structure 210a have a uniform height, for example, 80 nm. Optionally, the major axis of the elliptical cylinder 212b has a gradient distribution of, for example, 150 nm to 300 nm. Optionally, the opening angle of the C-ring 214 is, for example, 60°. Optionally, the metasurface structure 210a also includes a microheating electrode 218, which is located on the periphery of all the nanopillars and faces the orthographic projection of the second modulator P2 (e.g., ...). Figure 3 Region Z2) is located on the periphery of cover plate 164. In one embodiment, the field-modulated heterogeneous integrated photonic display chip further includes an insulating dielectric layer and an interconnect structure; wherein, the insulating dielectric layer at least covers a monochromatic laser, a waveguide layer, a first modulator, a second modulator, and a metasurface structure; the interconnect structure is located within the insulating dielectric layer and is used to lead out the first modulator and the second modulator respectively, and one end of the interconnect structure away from the first modulator and the second modulator is connected to a driving circuit structure of a driving wafer to realize the electrical interconnection between the photonic devices such as the first modulator and the second modulator and the driving circuit structure, thereby completing the three-dimensional integration of the field-modulated heterogeneous integrated photonic display chip. Optionally, the material of the insulating dielectric layer includes styrene-cyclobutene (BCB).

[0118] See Figure 1 and Figure 5 In one embodiment, the functions of each part during the operation of the field-modulated heterogeneous integrated photonic display chip are as follows.

[0119] First, a monochromatic laser 170 is used to provide a light source, and the light emitted by the light source is monochromatic.

[0120] Next, the first modulator (i.e., the thermo-optical and acousto-optic modulator, see...) Figure 12 P1 in the middle is used to perform preliminary frequency modulation on the light emitted by the monochromatic laser 170, so that the light entering the waveguide layer 110 presents three colors: red, blue and green.

[0121] In waveguide layer 110, beam splitter 113 is used to split the light entering waveguide layer 110 into pixel units. Interferometer 112 is used to control the system to read image signals and, according to the interferometer control signal issued by the system control unit, control the light intensity of light of different wavelengths entering a single pixel, thereby achieving image modulation.

[0122] The second modulator (i.e., the pixel-level acousto-optic modulator, see [reference]) Figure 17 P2 in the first modulator is used to fine-tune the frequency of the light entering a single pixel and work with the first modulator to control the color of the light emitted by the pixel to improve color contrast. At the same time, the second modulator can fine-tune the wavelength to make a slight change in the direction of light emitted from the diversity grating, disrupting the wavefront coherence of the emitted light, thereby initially suppressing the laser speckle of the field-modulated heterogeneous integrated photonic display chip.

[0123] The conductive layer 140 provides an adjustable electric field for the liquid crystal layer 141. The electric field strength at the liquid crystal layer 141 can be modulated by applying a voltage to the conductive layer 140. The liquid crystal layer 141 adjusts the liquid crystal orientation and refractive index according to the change of electric field strength, thereby changing the optical path of light of different wavelengths in the liquid crystal layer 141. The coupling mode of the diverse grating 151 with light of different wavelengths is adjusted in real time, thereby ensuring that the coupling mode of the field-induced modulation heterogeneous integrated photonic display chip is optimal and maximizing the light utilization rate.

[0124] The multi-dimensional grating 151 in the field-modulated heterogeneous integrated photonic display chip has three functions: beam orientation, speckle suppression and uniform illumination. By setting up a multi-dimensional grating with multiple periods and orientations, the beam can be emitted upwards while destroying the spatiotemporal coherence of the laser, suppressing speckle from the physical source, and coordinating with the liquid crystal layer 141 to optimize the coupling efficiency of different wavelengths of light, ensuring the uniformity of light output of the field-modulated heterogeneous integrated photonic display chip.

[0125] Meanwhile, by alternately supplying power to the four electrode structures above the first dielectric layer 160 (i.e., lithium niobate thin film), the lattice structure of the first dielectric layer 160 can be rapidly changed using a high-frequency power supply method, so that the first-order diffracted light incident at the Bragg angle is emitted in four directions, thereby achieving the 4K dithering effect and improving the resolution of the field-modulated heterogeneous integrated photonic display chip.

[0126] Furthermore, the microcavity resonator 215 modulates the metasurface structure 210a according to the metasurface modulation signal; the metasurface structure 210a performs wavefront shaping according to the needs of the system display to achieve any one of the following: a uniform light field for 2D display, a multi-view beam for 3D light field display, or a structured illumination pattern for eye tracking. This enables the field-modulated heterogeneous integrated photonic display chip and the laser projection system in which it is located to have dynamic and programmable illumination capabilities, which go beyond the scope of static illumination.

[0127] As can be seen, this application provides a heterogeneous integrated photonic display chip based on acousto-optic and thermo-optic modulation. By integrating acousto-optic modulation, thermo-optic modulation and metasurface technology into a single display chip, a full-function on-chip display system from monochromatic laser input to multi-dimensional programmable light field output is realized.

[0128] Figure 6 This is a flowchart illustrating a method for manufacturing a field-modulated heterogeneous integrated photonic display chip according to one embodiment of this application. (See also...) Figure 6 One embodiment of this application also provides a method for manufacturing a field-modulated heterogeneous integrated photonic display chip, including the following steps S01 to S05.

[0129] Step S01: Provide a first substrate and form a patterned waveguide layer on the first substrate. A beam splitter, an interferometer, and an optical waveguide structure arranged sequentially along a first direction are formed in the waveguide layer.

[0130] Step S02: A first modulator is formed on the waveguide layer, and the orthographic projection of the first modulator toward the first substrate at least partially coincides with the orthographic projections of the beam splitter and the interferometer toward the first substrate.

[0131] Step S03: A second modulator is formed on the waveguide layer, and the second modulator is located on the side of the optical waveguide structure away from the first substrate.

[0132] Step S04: A grating coupler is formed in the waveguide layer, and the grating coupler is located on the side of the beam splitter away from the interferometer.

[0133] Step S05: A monochromatic laser is formed on the side of the grating coupler away from the first substrate.

[0134] The manufacturing method of the field-modulated heterogeneous integrated photonic display chip described above involves forming a first modulator to perform preliminary frequency modulation on the light output from a monochromatic laser, converting the monochromatic light into light with different frequencies (e.g., modulating the monochromatic light into red, green, and blue light); and forming a second modulator on a first substrate to perform secondary frequency modulation on the light that has undergone preliminary frequency modulation, thereby enhancing the color contrast between light with different frequencies. This improves the color control capability of the field-modulated heterogeneous integrated photonic display chip and reduces the chip size while optimizing chip performance.

[0135] Figures 1 to 4 , Figures 7 to 22 This is a schematic diagram of some steps in the manufacturing method of a field-modulated heterogeneous integrated photonic display chip provided in one embodiment of this application. The following is in conjunction with... Figures 1 to 4 , Figures 7 to 22 This application provides a detailed description of a method for manufacturing a field-modulated heterogeneous integrated photonic display chip according to one embodiment.

[0136] See Figures 7 to 9 In one embodiment, step S01 includes: providing a first substrate 100, forming a patterned waveguide layer 110 on the first substrate 100, and forming a beam splitter 113, an interferometer 112, and an optical waveguide structure 111 arranged sequentially along a first direction (i.e., direction A) within the waveguide layer 110. Optionally, the first substrate 100 is a silicon on insulator (SOI) substrate.

[0137] See Figure 7 In one embodiment, after providing the first substrate 100 and before forming the waveguide layer 110 on the first substrate 100, the method for manufacturing the field-modulated heterogeneous integrated photonic display chip further includes: forming a buffer layer 101 on the first substrate 100 to alleviate stress caused by the difference in thermal expansion coefficients between the first substrate 100 and the subsequently formed film layer (i.e., the waveguide layer 110). Optionally, the buffer layer 101 is formed using a plasma-enhanced chemical vapor deposition (PECVD) process.

[0138] For example, the process of forming the buffer layer 101 using plasma-enhanced chemical vapor deposition includes: placing two electrodes (not shown in the figure) on the upper and lower surfaces of the first substrate 100, respectively, and connecting the two electrodes to the two ends of a dual-frequency radio frequency power supply to effectively reduce the ignition voltage and thus obtain a stable plasma source; injecting a mixed gas of silane (SiH4) and nitrous oxide (N2O) into the environment, and controlling the gas flow ratio of silane to nitrous oxide at approximately 1:10, to deposit the buffer layer 101 on the first substrate 100. Optionally, the material of the buffer layer 101 is silicon dioxide (SiO2); the thickness of the buffer layer 101 is in the range of 0.5 μm to 1 μm.

[0139] It should be noted that by forming a buffer layer on the surface of the first substrate, the stress caused by the difference in thermal expansion coefficient between the first substrate and the subsequently formed deposited film can be effectively relieved, and the refractive index difference between the first substrate and the waveguide layer can be adjusted, thereby optimizing the transmission characteristics of light in the waveguide layer.

[0140] Then refer to Figure 8 and Figure 9 In one embodiment, the process of forming a patterned waveguide layer 110 on the first substrate 100 includes: (Refer to...) Figure 8A waveguide layer 110 is formed on the first substrate 100; see reference Figure 9 The waveguide layer 110 is patterned to form a patterned waveguide layer 110, and a beam splitter 113, an interferometer 112 and an optical waveguide structure 111 are formed in the waveguide layer 110 in sequence along the first direction (i.e., direction A).

[0141] Continue reading Figure 8 In one embodiment, when a buffer layer 101 is formed on the first substrate 100, a waveguide layer 110 is formed on the side of the buffer layer 101 away from the first substrate 100. Optionally, the waveguide layer 110 is formed using a low-pressure chemical vapor deposition (LPCVD) process.

[0142] For example, the process of forming the waveguide layer 110 using a low-pressure chemical vapor deposition (LPCVD) process includes: introducing a mixed gas of dichlorosilane (SiH2Cl2) and ammonia (NH3) into the environment at a process temperature of 780°C, and precisely controlling the refractive index of the waveguide layer 110 within the range of 1.95 to 2.05 by adjusting the gas ratio. Optionally, after depositing the waveguide layer 110, a chemical mechanical polishing (CMP) process can be used to planarize the waveguide layer 110, reducing the surface roughness of the waveguide layer 110 to below 0.5 nm, thereby ensuring that the waveguide layer 110 has extremely low transmission loss. Optionally, the thickness of the waveguide layer 110 is, for example, 50 nm; the material of the waveguide layer 110 includes silicon nitride (SiN).

[0143] Continue reading Figure 9 In one embodiment, the patterning process of the waveguide layer 110 includes: first, spin-coating a deep ultraviolet photoresist layer (thickness, for example, 300 nm) onto the surface of the waveguide layer 110; then, using a 193 nm wavelength lithography machine, exposing the deep ultraviolet photoresist layer using phase mask technology to form exposure patterns corresponding to the beam splitter 113, interferometer 112, and optical waveguide structure 111; next, employing reactive ion etching (RIE) to selectively etch (i.e., patterning of the waveguide layer 110) using a mixture of trifluoromethane (CHF3) and oxygen (O2), and monitoring the etching morphology in real time to ensure that the sidewall perpendicularity of the patterned waveguide layer 110 reaches 89° or higher, and that the surface roughness of the patterned waveguide layer 110 is less than 2 nm. Optionally, the interferometer 112 is, for example, a Mach-Zehnder interferometer (MZI); the beam splitter 113 is, for example, a Y-type beam splitter.

[0144] Next, refer to Figures 10 to 12 In one embodiment, step S02 includes forming a first modulator P1 on the waveguide layer 110, wherein the orthographic projection of the first modulator P1 toward the first substrate 100 at least partially overlaps with the orthographic projections of the beam splitter 113 and the interferometer 112 toward the first substrate 100.

[0145] In one embodiment, the process of forming the first modulator P1 on the waveguide layer 110 includes: (See below) Figure 10 A piezoelectric layer 120 is formed on the waveguide layer 110, and the piezoelectric layer 120 at least covers the strip waveguide region of the beam splitter 113 (not shown in the figure); see reference Figure 11 A first electrode material layer (not shown in the figure) is formed on the piezoelectric layer 120, and the first electrode material layer is patterned to form an interdigital transducer 121; then, an annealing process is performed to optimize the ohmic contact between the interdigital transducer 121 and the piezoelectric layer 120; see reference Figure 12 A heating layer 130 is formed on the waveguide layer 110, and the heating layer 130 covers part of the surface of the interferometer 112; a heating electrode material layer (not shown in the figure) is formed on the heating layer 130, and the heating electrode material layer is patterned to form a heating electrode 131, thereby forming a first modulator P1 including a piezoelectric layer 120, an interdigital transducer 121, a heating layer 130 and a heating electrode 131.

[0146] Continue reading Figure 10 In one embodiment, the piezoelectric layer covers the strip waveguide region of the beam splitter 113 and the optical input end of the waveguide layer 110. Optionally, the piezoelectric layer 120 is formed on the waveguide layer 110 using a sputtering process.

[0147] Exemplarily, the process of forming a piezoelectric layer 120 on the waveguide layer 110 using a sputtering process includes: maintaining the temperature of the first substrate 100 at 400°C and introducing a mixture of argon and nitrogen gas into the environment to sputter aluminum nitride onto the surface of the waveguide layer 110; during the sputtering process, optimizing the radio frequency power density to obtain a wurtzite structure with a preferred orientation to form the piezoelectric layer 120. Optionally, the piezoelectric coefficient d of the piezoelectric layer 120 is... 33 Achieving a pC / N ratio of 5.5 or higher. Optionally, the thickness of the piezoelectric layer 120 can be, for example, 300 nm.

[0148] Continue reading Figure 11In one embodiment, photoresist (not shown) is spin-coated onto the surface of the piezoelectric layer 120, and an interdigital transducer pattern is defined by photolithography. Subsequently, a first electrode material layer (not shown) is deposited using electron beam evaporation, and the photoresist is removed by a lift-off process to form an interdigital transducer 121 with a periodic interdigital structure. Then, an annealing process is performed at 450°C in a nitrogen atmosphere for 30 minutes to optimize the ohmic contact between the interdigital transducer 121 and the piezoelectric layer 120. Optionally, the finger width of the interdigital transducer (IDT, also referred to as an IDT aluminum electrode structure) is, for example, 800 nm, and the distance between adjacent fingers is, for example, 400 nm. Optionally, the material of the first electrode material layer includes metallic aluminum (Al); the thickness of the first electrode material layer is, for example, 200 nm.

[0149] Continue reading Figure 12 In one embodiment, reactive sputtering (i.e., sputtering at 350°C using a titanium target and a mixture of nitrogen and argon) is employed on one arm of the interferometer 112 (e.g., Figure 2 A heating layer 130 is deposited on wall 112a) of the heating element. Subsequently, a heating electrode 131 and a temperature sensor (not shown) are formed on the heating layer 130 using an ion beam etching process to ensure a thermo-optical modulation efficiency of 1.4 mW / π. Optionally, the material of the heating layer 130 includes titanium nitride (TiN); the thickness of the heating layer 130 is, for example, 100 nm. Optionally, the heating electrode 131 is, for example, a serpentine heating electrode with a width of 2 μm; the temperature sensor is, for example, an integrated platinum resistance temperature sensor.

[0150] Then refer to Figures 13 to 17 In one embodiment, step S03 includes forming a second modulator P2 on the waveguide layer 110, wherein the second modulator P2 is located on the side of the optical waveguide structure 111 away from the first substrate 100.

[0151] In one embodiment, the process of forming the second modulator P2 on the waveguide layer 110 includes: (See below) Figure 13 A conductive layer 140 is formed on the waveguide layer 110, and the conductive layer 140 covers the optical waveguide structure 111; see reference. Figure 14 A liquid crystal polymer suspension doped with nanospheres is spin-coated onto the conductive layer 140 and then cured to form the liquid crystal layer 141; see reference. Figure 15 A conductive material layer 142a with electrode patterns is formed on the liquid crystal layer 141, and a birefringent material layer 142b filled with the electrode patterns is formed to form a polarization structure 142 including the conductive material layer 142a and the birefringent material layer 142b; see reference. Figure 16A protective layer 150 is formed on the polarization structure 142, and the protective layer 150 is patterned to form a variety of gratings 151 within the protective layer 150; see reference. Figure 17 A first dielectric layer 160 is formed on the protective layer 150, and the first dielectric layer 160 is patterned to form a microdisk resonator (not shown in the figure) within the first dielectric layer 160; a patterned electrode structure is formed on the first dielectric layer 160, and the orthogonal projection of the electrode structure toward the first dielectric layer 160 is uniformly distributed on the periphery of the microdisk resonator; and an annealing process is performed.

[0152] Continue reading Figure 13 In one embodiment, a conductive layer 140 is formed on the waveguide layer 110 using a magnetron sputtering process. It should be noted that during the magnetron sputtering process, the temperature of the first substrate 100 is maintained at 250°C, and the thin film resistivity of the conductive layer 140 is reduced to 5 × 10⁻⁶ by precisely controlling the oxygen flow rate. -4 The transmittance of the conductive layer 140 is measured in Ω·cm to ensure that the transmittance in the visible light band is higher than 90%. Optionally, the material of the conductive layer 140 is indium tin oxide (ITO); the thickness of the conductive layer 140 is, for example, 150 nm.

[0153] See Figure 14 In one embodiment, the process of spin-coating a liquid crystal polymer suspension doped with nanospheres onto the conductive layer 140 and then curing it to form the liquid crystal layer 141 includes: dispersing nanospheres at a volume ratio of 5% in a photoalignment liquid crystal polymer; coating the liquid crystal polymer suspension doped with nanospheres onto the conductive layer 140 using a spin-coating process to form a monolayer ordered composite film; subsequently, performing a preheating treatment, for example, at a preheating temperature of 80°C; and then irradiating the composite film with 365nm ultraviolet light at an intensity of 20mW / cm² (irradiation time for example, 300 seconds) to crosslink and cure the composite film, forming a smart spacer layer with electric field responsive characteristics, i.e., the liquid crystal layer 141. Optionally, the nanospheres are made of silicon dioxide, and the diameter of the nanospheres is, for example, 165nm.

[0154] See Figure 15In one embodiment, a conductive material layer 142a (the material of the conductive material layer 142a is, for example, indium tin oxide) is deposited on the surface of the liquid crystal layer 141. A pixelated electrode pattern is formed in the conductive material layer 142a using photolithography and etching processes. A birefringent material layer 142b is deposited in the etched area (i.e., where the electrode pattern is located) using vacuum evaporation technology. By controlling the evaporation angle, the molecules in the birefringent material layer 142b are oriented to form linear polarization characteristics, thereby obtaining a polarization structure 142 with a polarization extinction ratio greater than 1000:1. Optionally, the material of the birefringent material layer 142b includes zinc sulfide (ZnS); the thickness of the birefringent material layer 142b is, for example, 300 nm.

[0155] See Figure 16 In one embodiment, a protective layer 150 is deposited over the polarization structure 142. Subsequently, a photoresist layer (not shown) is formed on the protective layer 150, and a composite grating pattern with multiple periods (periods including 380nm~420nm) and multiple orientations (orientations including 0°, 45°, 90°) is defined on the photoresist layer using electron beam lithography. Next, the composite grating pattern is transferred to the protective layer 150 using reactive ion etching to form a multi-faceted grating 151 within the protective layer 150, thereby achieving multi-angle beam control. Optionally, the material of the protective layer 150 includes silicon dioxide; the thickness of the protective layer 150 is, for example, 300nm. Optionally, the depth of the multi-faceted grating 151 is, for example, 70nm. Preferably, the multi-faceted grating 151 is a Bragg grating.

[0156] See Figure 17 In one embodiment, a single-crystal lithium niobate thin film is transferred using ion slicing technology to form a first dielectric layer 160 on a protective layer 150. The first dielectric layer 160 is patterned using reactive ion etching to form a microdisk resonator (not shown in the figure). Next, a first electrode layer 161 is formed on the first dielectric layer 160 using electron beam evaporation deposition, and the first electrode layer 161 is patterned so that the orthographic projection of the first electrode layer 161 toward the first dielectric layer 160 is located on the periphery of the microdisk resonator. A patterned second electrode layer 162 is formed on the interdigital transducer region of the first electrode layer 161 to form an electrode structure including the first electrode layer 161 and the second electrode layer 162. Subsequently, a rapid thermal annealing process is performed to optimize the electrode contact and enable the second modulator P2 to achieve electro-optic modulation function based on the Pockels effect.

[0157] In one embodiment, the first dielectric layer 160 is made of lithium niobate, and its thickness is, for example, 300 nm. Optionally, the first electrode layer 161 is made of metallic silver (Ag), and its thickness is, for example, 200 nm. Optionally, the second electrode layer 162 is made of metallic aluminum (Al), and an interdigitated transducer structure is formed on the first electrode layer 161.

[0158] In one embodiment, after forming the second modulator P2, the method for manufacturing a field-modulated heterogeneous integrated photonic display chip further includes: (See below) Figure 18 and Figure 19 A second substrate 200 is provided, and a surface material layer 210 is formed on the second substrate 200; see reference Figure 20 and Figure 4 The surface material layer 210 is patterned to form a metasurface structure 210a. The metasurface structure 210a includes a first nanopillar array 213, a second nanopillar array 217, a C-shaped ring 214, and a microcavity resonator 215 located between the first nanopillar array 213 and the second nanopillar array 217. The arrangement direction of the C-shaped ring 214 and the microcavity resonator 215 is parallel to a first direction (i.e., direction A). A phase change layer 216 is formed on the metasurface structure 210a, covering the microcavity sidewalls of the microcavity resonator 215. (See also...) Figure 20 The metasurface structure 210a is bonded to the side of the second modulator away from the waveguide layer 110.

[0159] Continue reading Figure 18 In one embodiment, the second substrate 200 is, for example, a quartz wafer, and a sacrificial layer 201 is formed on the second substrate 200 to facilitate the smooth progress of subsequent process steps.

[0160] Exemplarily, the process of forming a sacrificial layer 201 on a second substrate 200 includes: selecting a quartz wafer as a temporary substrate for the metasurface structure, i.e., the second substrate 200; spin-coating a layer of polymethyl methacrylate (PMMA) onto the surface of the second substrate 200; and pre-baking the PMMA at 180°C for 90 seconds using a hot plate to form a smooth sacrificial layer 201. Optionally, the thickness of the sacrificial layer 201 is, for example, 500 nm. Optionally, after forming the sacrificial layer 201, alignment marks are defined on the sacrificial layer 201 using an electron beam lithography process to assist in subsequent metasurface structure related processes.

[0161] See Figure 19 and Figure 20In one embodiment, when a sacrificial layer 201 is formed on the second substrate 200, a surface material layer 210 is formed on the surface of the sacrificial layer 201 away from the second substrate 200, and a mask layer 211 is formed on the surface material layer 210. Next, a nanoantenna pattern is formed on the mask layer 211 using electron beam lithography. Subsequently, the surface material layer 210 is etched based on the mask layer 211 to form a metasurface structure 210a including multiple nanopillars 212. Optionally, the material of the surface material layer 210 includes amorphous silicon; the thickness of the surface material layer 210 is, for example, 80 nm.

[0162] For example, during the formation of the surface material layer 210 using a plasma-enhanced chemical vapor deposition process, the film stress of the formed surface material layer 210 can be adjusted to a neutral state by controlling the deposition temperature at 250°C and by controlling the flow ratio of silane to argon in the reaction gas.

[0163] For example, the process of forming a nanoantenna pattern on a mask layer 211 using electron beam lithography and etching a surface material layer 210 based on the mask layer 211 includes: exposing the nanoantenna pattern on the mask layer 211 under process conditions of 100 keV accelerating voltage and 10 pA beam current, and achieving a linewidth accuracy of ±3 nm for the nanoantenna pattern by optimizing the exposure dose and proximity effect correction; then, performing an inductively coupled plasma etching process based on carbon tetrafluoride (CF4) and chlorine (CL2), and accurately transferring the nanoantenna pattern to the surface material layer 210 under the condition that the etching selectivity ratio of the mask layer 211 to the surface material layer 210 is greater than 20:1, and monitoring the etching endpoint by real-time optical emission spectroscopy to ensure a high degree of uniformity (e.g., 80 nm) of different structures in the metasurface structure 210a.

[0164] For example, see Figure 4 After forming a ring-shaped microcavity resonator 215 (with a diameter of, for example, 300 nm) in a specific functional region (e.g., between the first nanopillar array 213 and the second nanopillar array 217) using selective etching, a phase change layer 216 is formed on the sidewall of the microcavity using atomic layer deposition. Subsequently, micro-heating electrodes 218 are fabricated around the nanostructure using electron beam evaporation and lift-off processes to complete the fabrication of the entire metasurface structure 210a, achieving dynamic phase modulation functionality in the visible light band. Optionally, the material of the phase change layer 216 includes vanadium oxide (VO2), and the thickness of the phase change layer 216 is, for example, 10 nm.

[0165] In another embodiment of this application, after forming the surface material layer 210 and before forming the mask layer on the surface material layer 210, a surface dielectric layer (not shown in the figure) can be grown on the surface material layer 210 by an atomic layer deposition process to form a bilayer composite structure including the surface material layer 210 and the surface dielectric layer. Optionally, the material of the surface dielectric layer includes titanium dioxide (TiO2); the thickness of the surface dielectric layer is, for example, 50 nm.

[0166] Furthermore, in the case of forming a double-layer composite structure, the nano-antenna pattern can be precisely transferred to the surface dielectric layer and the surface material layer 210 in two steps based on the mask layer 211, and the etching endpoint can be monitored by real-time optical emission spectrum to ensure that the structure in the final metasurface structure 210a is highly uniform (e.g., 130 nm).

[0167] See Figure 20 and Figure 4 ( Figure 20 for Figure 4 (Schematic diagram of cross-sectional structure along the MN direction). In one embodiment, the final metasurface structure 210a includes various nano-antenna structures such as rectangular pillars 212a, elliptical pillars 212b (the major axis of the elliptical pillars 212b is, for example, a gradient distribution of 150nm~300nm), and C-shaped rings 214 (the opening angle is, for example, 60°). The anisotropic nano-pillar array is arranged in a period of 400nm. The optimal working height of 220nm is obtained through rigorous electromagnetic simulation optimization. A ring microcavity resonator 215 is integrated in a specific functional region (for example, between the first nano-pillar array 213 and the second nano-pillar array 217). A phase transition layer 216 is formed on the microcavity sidewall of the microcavity resonator 215 to realize the continuous modulation of the 2π phase and dynamic beam control function in the visible light band.

[0168] See Figure 17 and Figure 21 In one embodiment, after forming the second modulator P2 and the metasurface structure 210a, the method for manufacturing the field-modulated heterogeneous integrated photonic display chip further includes: forming micropillar structures in the blank areas (not shown) of the non-functional region of the first dielectric layer 160, and pre-coating the two ends of the micropillar structures with hot melt adhesive (or UV-curable adhesive); using a high-precision flip-chip mounter, picking up and placing the micropillar structures 163 one by one into the area where the microdisk resonator is located in the first dielectric layer 160 (e.g., Figure 3The micropillar structure 163 is then fixed to the surface of the first dielectric layer 160 away from the protective layer 150 by heat treatment (or UV irradiation treatment) to cure the hot melt adhesive (or UV-curable adhesive) at the bottom of the micropillar structure 163 (i.e., the side near the first dielectric layer 160). Optionally, the material of the micropillar structure 163 includes silicon and silicon dioxide; the height of the micropillar structure 163 is, for example, 100 nm, and the diameter of the micropillar structure 163 is, for example, 1 μm.

[0169] See Figure 21 and Figure 3 In one embodiment, after forming the micropillar structure 163 on the first dielectric layer 160, the method for manufacturing the field-modulated heterogeneous integrated photonic display chip further includes: providing a cover plate 164, inverting the cover plate 164 and placing it on the top of the micropillar structure 163 (i.e., the end of the micropillar structure 163 away from the first dielectric layer 160); subsequently, curing the hot melt adhesive (or UV-curable adhesive) on the top of the micropillar structure 163 by heat treatment (or UV irradiation treatment), thereby fixing the cover plate 164 to the side of the micropillar structure 163 away from the first dielectric layer 160, and ensuring that the orthogonal projection of the cover plate 164 toward the first dielectric layer 160 at least covers the area in the first dielectric layer 160 where the microdisk resonator is disposed (e.g., Figure 3 (Region Z1 in the text). Optionally, after placing the cover plate 164 on the micropillar structure 163, sealant can be applied around the cover plate 164 to further secure it. Optionally, the cover plate 164 is a quartz cover plate.

[0170] It should be emphasized that, see reference Figure 21 The micropillar structure 163 is located in a portion of the exposed first dielectric layer 160 formed after the first electrode layer 161 and the second electrode layer 162 are patterned, and the height of the micropillar structure 163 is at least greater than the thickness of the electrode structure formed by the combination of the first electrode layer 161 and the second electrode layer 162, so as to ensure that the cover plate 164 is located on the side of the second electrode layer 162 away from the first electrode layer 161.

[0171] Then refer to Figure 3 , Figure 4 , Figure 21 and Figure 22In one embodiment, the process of bonding the metasurface structure 210a to the side of the second modulator away from the waveguide layer 110 includes: spin-coating a temporary bonding adhesive onto the surface of the first structure W1 away from the first substrate 100 (e.g., the surface of the cover plate 164 away from the first dielectric layer 160), and temporarily bonding the metasurface structure 210a of the second structure W2 to the surface of the first structure W1 on which the temporary bonding adhesive is spin-coated; subsequently, dissolving the sacrificial layer 201 to transfer the metasurface structure 210a to the second modulator P2 of the first structure W1; and then, using a bonding process to bond the metasurface structure 210a to the side of the second modulator P2 away from the waveguide layer 110. Optionally, Figure 21 The first structure W1 shown is a photonic integrated circuit (PIC). Optionally, the thickness of the temporary bonding adhesive is, for example, 1 μm.

[0172] For example, after spin-coating temporary bonding adhesive, the process of bonding the metasurface structure 210a to the first structure W1 includes: using an ultra-high precision alignment machine to align the second structure W2 with the first structure W1, aligning the metasurface structure 210a with the cover plate 164 coated with temporary bonding adhesive in a direction perpendicular to the surface of the first substrate 100, and aligning the orthographic projection of the micro-heating electrode 218 toward the first structure W1 around the periphery of the cover plate 164 (e.g., located at...). Figure 3 In region Z2), the metasurface structure 210a is temporarily bonded to the cover plate 164 in the second modulator P2 under a bonding pressure of 0.5 MPa and a temperature of 80°C. Subsequently, the combined structure formed by the bonding of the first structure W1 and the second structure W2 is immersed in an acetone solution to dissolve the sacrificial layer 201. Then, a pressure of 5 MPa is applied to the combined structure of the first structure W1 and the second structure W2 at room temperature (i.e., 20°C to 28°C) to achieve permanent bonding of the metasurface structure 210a and the second modulator P2 by activating the surface with oxygen plasma.

[0173] In one embodiment, after bonding the metasurface structure to the side of the second modulator away from the waveguide layer, the method for manufacturing a field-modulated heterogeneous integrated photonic display chip further includes: forming an insulating dielectric layer on the side of the waveguide layer away from the first substrate, the insulating dielectric layer at least covering the first modulator, the second modulator and the metasurface structure; forming an interconnect structure in the insulating dielectric layer, the interconnect structure leading out the first modulator and the second modulator respectively; providing a driving wafer, and connecting the end of the interconnect structure away from the first modulator and the second modulator to a driving circuit structure of the driving wafer.

[0174] In one embodiment, the insulating dielectric layer is made of styrene-cyclobutene (BCB). Exemplarily, the process of forming the insulating dielectric layer and the interconnect structure includes: spin-coating BCB adhesive onto the side of the waveguide layer away from the first substrate to form an insulating dielectric layer that at least covers the first modulator, the second modulator, and the metasurface structure; then, performing photolithography and etching on the insulating dielectric layer to form a plurality of vias within the insulating dielectric layer, the vias at least exposing the electrode portions of the first modulator and the second modulator; subsequently, filling the vias with a metallic material to form an interconnect structure leading out the first modulator and the second modulator. Optionally, the metallic material includes silver-tin solder.

[0175] In one embodiment, the driving wafer includes a third substrate and a driving circuit structure located on one side of the third substrate. Optionally, the third substrate is a silicon substrate, and the driving circuit structure includes CMOS circuitry. Exemplarily, the process of connecting one end of the interconnect structure away from the first modulator and the second modulator to the driving circuit structure of the driving wafer includes: forming a metal-filled via in the third substrate using a through-silicon via (TSV) process; forming a copper interconnect structure in the metal-filled via using an electroplating process; and then... Figure 20 The field-modulated heterogeneous integrated photonic display chip structure shown is stacked with the driver wafer, so that the interconnect structure in the field-modulated heterogeneous integrated photonic display chip is compared with the copper interconnect structure in the driver wafer. Then, using an ultra-high precision alignment machine, a thermo-press bonding process is performed at 300°C and 10 kN to complete the three-dimensional integration of the field-modulated heterogeneous integrated photonic display chip, realize the electrical interconnection between the first modulator, the second modulator and other photonic devices and the driver circuit structure, and thus complete the packaging of the field-modulated heterogeneous integrated photonic display chip.

[0176] See Figure 1 In one embodiment, step S04 includes forming a grating coupler 114 within the waveguide layer 110, the grating coupler 114 being located on the side of the beam splitter 113 away from the interferometer 112 (see [reference]). Figure 2 Optionally, the waveguide layer 110 is etched using an electron beam lithography process to form a grating coupler 114.

[0177] In one embodiment, the grating coupler 114 includes a tilted grating structure with a period of, for example, 420 nm, a grating etching depth of, for example, 70 nm, and a fill factor of, for example, 0.55. It should be noted that the grating parameters can be optimized through rigorous coupling wave analysis, enabling the grating coupler 114 to achieve a coupling efficiency of over 45% at a wavelength of 580 nm.

[0178] Continue reading Figure 1In one embodiment, step S05 includes forming a monochromatic laser 170 on the side of the grating coupler 114 away from the first substrate 100. Optionally, the monochromatic laser 170 is coupled into the optical waveguide using a high-precision flip-chip bonding process. Optionally, the monochromatic laser 170 is, for example, a 580nm distributed feedback single-mode laser.

[0179] For example, after forming a grating coupler 114 in the waveguide layer 110, the process of coupling a monochromatic laser 170 into the waveguide layer 110 using a high-precision flip-chip bonding process includes: providing a laser chip, wherein the laser chip is made of gallium arsenide aluminum material, the chip size is 300μm×200μm×100μm, and an active region structure containing 5 quantum wells is grown on the n-type gallium arsenide (GaAs) substrate of the laser chip using molecular beam epitaxy, the laser output power is 80mW, and the spectral linewidth is less than 0.1nm; subsequently, coupling the monochromatic laser 170... The monochromatic laser 170 is bonded to the waveguide layer 110. During the coupling alignment process, a six-axis precision adjustment stage (with an adjustment accuracy of 50 nm) is used to optimize the coupling position by real-time monitoring of the optical power feedback at the waveguide output end, so that the alignment error between the monochromatic laser 170 and the waveguide layer 110 is controlled within ±0.5 μm. Then, after the alignment is completed, a hot-press bonding process (with a solder layer thickness of, for example, 5 μm) is performed at 300°C using gold-tin eutectic solder to bond the monochromatic laser 170 to the waveguide layer 110. At the same time, silver epoxy resin is used to reinforce the bonding edges to enhance mechanical stability.

[0180] It should be noted that the driving aspect of the monochromatic laser 170 integrates a thermoelectric cooler and a thermistor. Through a proportional, integral, and differential control algorithm (i.e., PID control algorithm), the junction temperature of the monochromatic laser 170 is stabilized within the range of 24.9℃~25.1℃ to ensure that the output wavelength drift is less than 0.01nm. This results in a coupling loss of less than 2.5 dB between the monochromatic laser 170 and the waveguide layer 110, and enables the overall electro-optical conversion efficiency (Wall-plug Efficiency) of the field-modulated heterogeneous integrated photonic display chip to reach more than 18%.

[0181] It should be emphasized that, in the above-described method for manufacturing field-modulated heterogeneous integrated photonic display chips, the process methods and process parameters corresponding to each step can be modulated according to actual needs, and the preparation sequence between each step can also be adjusted according to actual process conditions. This is well known to those skilled in the art, and this application does not impose any restrictions on it.

[0182] Thirdly, this application also provides a laser display system, including the field-modulated heterogeneous integrated photonic display chip as described above; or, including a field-modulated heterogeneous integrated photonic display chip manufactured by the manufacturing method of the field-modulated heterogeneous integrated photonic display chip as described above.

[0183] In summary, this application provides a field-modulated heterogeneous integrated photonic display chip and its manufacturing method, as well as a laser display system. The field-modulated heterogeneous integrated photonic display chip includes a first substrate, a monochromatic laser located on one side of the first substrate, a waveguide layer, a first modulator, and a second modulator. The monochromatic laser is used to output light. The waveguide layer is located on the side of the monochromatic laser closer to the first substrate and includes a grating coupler, a beam splitter, an interferometer, and an optical waveguide structure arranged sequentially along a first direction. The first modulator is used to perform preliminary frequency modulation on the light output from the monochromatic laser, and the first modulator is located on the side of the waveguide layer away from the first substrate. The second modulator is used to perform secondary frequency modulation on the light, and the second modulator is located on the side of the optical waveguide structure away from the first substrate. This application improves the color control capability of the field-modulated heterogeneous integrated photonic display chip and reduces the chip size while optimizing chip performance.

[0184] In the description of this specification, the references to terms such as "some embodiments," "other embodiments," "ideal embodiments," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0185] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0186] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A field-modulated heterogeneous integrated photonic display chip, characterized in that, include: First base; A monochromatic laser, located on one side of the first substrate, is used to output light; A waveguide layer, located on the first substrate and on the side of the monochromatic laser closer to the first substrate, includes a grating coupler, a beam splitter, an interferometer, and an optical waveguide structure arranged sequentially along a first direction; wherein, the beam splitter is used to split the light entering the waveguide layer, and the interferometer is used to modulate the light intensity of the light output from the beam splitter; A first modulator is used to perform preliminary frequency modulation on the light output by the monochromatic laser. The first modulator is located on the side of the waveguide layer away from the first substrate, and the orthographic projection of the first modulator toward the first substrate at least partially coincides with the orthographic projections of the beam splitter and the interferometer toward the first substrate. A second modulator is used to perform secondary frequency modulation on the light, and the second modulator is located on the side of the optical waveguide structure away from the first substrate; The first modulator includes: A piezoelectric layer is located on the side of the beam splitter away from the first substrate, and the piezoelectric layer at least covers the strip waveguide region of the beam splitter; Interdigitated transducers are located on the side of the piezoelectric layer away from the waveguide layer; A heating layer is located on the side of the interferometer away from the first substrate and covers a portion of the surface of the interferometer; The heating electrode is located on the side of the heating layer away from the waveguide layer; The second modulator includes: A conductive layer is located on the side of the optical waveguide structure away from the first substrate; The liquid crystal layer is located on the side of the conductive layer away from the waveguide layer; A polarization structure is located on the side of the liquid crystal layer away from the conductive layer; A protective layer is located on the side of the polarization structure away from the liquid crystal layer, and a variety of gratings are provided within the protective layer; A first dielectric layer is located on the side of the protective layer away from the polarization structure, and a microdisk resonator is disposed within the first dielectric layer; The electrode structure is located on the side of the first dielectric layer away from the protective layer, and the orthogonal projection of the electrode structure toward the first dielectric layer is uniformly distributed on the periphery of the microdisk resonator.

2. The field-modulated heterogeneous integrated photonic display chip according to claim 1, characterized in that, Also includes: The metasurface structure is located on the side of the second modulator away from the waveguide layer: A phase change layer is located on the side of the metasurface structure closer to the second modulator and covers a portion of the surface of the metasurface structure; The metasurface structure includes: The first nanopillar array comprises multiple rectangular pillars arranged in an array; The second nanopillar array comprises multiple elliptical pillars arranged in an array; A microcavity resonator is located between the first nanopillar array and the second nanopillar array, and the phase transition layer is covered on the microcavity sidewall of the microcavity resonator. A C-shaped ring is located between the first nanopillar array and the second nanopillar array, and the arrangement direction of the C-shaped ring and the microcavity resonator is parallel to the first direction.

3. The field-modulated heterogeneous integrated photonic display chip according to claim 2, characterized in that, Also includes: An insulating dielectric layer at least covers the monochromatic laser, the waveguide layer, the first modulator, the second modulator, and the metasurface structure; An interconnect structure, located within the insulating dielectric layer, is used to lead out the first modulator and the second modulator, respectively, and one end of the interconnect structure away from the first modulator and the second modulator is connected to a driving circuit structure of a driving wafer.

4. A method for manufacturing a field-modulated heterogeneous integrated photonic display chip, characterized in that, include: A first substrate is provided, and a patterned waveguide layer is formed on the first substrate. A beam splitter, an interferometer, and an optical waveguide structure are formed in the waveguide layer in sequence along a first direction. A first modulator is formed on the waveguide layer, and the orthographic projection of the first modulator toward the first substrate at least partially coincides with the orthographic projections of the beam splitter and the interferometer toward the first substrate. A second modulator is formed on the waveguide layer, and the second modulator is located on the side of the optical waveguide structure away from the first substrate; A grating coupler is formed within the waveguide layer, and the grating coupler is located on the side of the beam splitter away from the interferometer; A monochromatic laser is formed on the side of the grating coupler away from the first substrate; The process of forming the first modulator on the waveguide layer includes: A piezoelectric layer is formed on the waveguide layer, the piezoelectric layer at least covering the strip waveguide region of the beam splitter; A first electrode material layer is formed on the piezoelectric layer, and the first electrode material layer is patterned to form an interdigital transducer. Perform annealing treatment; A heating layer is formed on the waveguide layer, and the heating layer covers a portion of the surface of the interferometer; A heating electrode material layer is formed on the heating layer, and the heating electrode material layer is patterned to form a heating electrode, and a first modulator including the piezoelectric layer, the interdigital transducer, the heating layer and the heating electrode is formed; The process of forming the second modulator on the waveguide layer includes: A conductive layer is formed on the waveguide layer, and the conductive layer covers the optical waveguide structure; A liquid crystal polymer suspension doped with nanospheres is spin-coated onto the conductive layer and then cured to form a liquid crystal layer. A conductive material layer with an electrode pattern is formed on the liquid crystal layer, and a birefringent material layer is formed to fill the electrode pattern, so as to form a polarization structure including the conductive material layer and the birefringent material layer; A protective layer is formed on the polarization structure, and the protective layer is patterned to form a variety of gratings within the protective layer; A first dielectric layer is formed on the protective layer, and the first dielectric layer is patterned to form a microdisk resonator within the first dielectric layer; A patterned electrode structure is formed on the first dielectric layer, and the electrode structure is uniformly distributed around the periphery of the microdisk resonator with its orthogonal projection toward the first dielectric layer. Perform annealing.

5. The method for manufacturing a field-modulated heterogeneous integrated photonic display chip according to claim 4, characterized in that, After forming the second modulator, the method for manufacturing the display chip further includes: A second substrate is provided, and a surface material layer is formed on the second substrate; The surface material layer is patterned to form a metasurface structure, which includes a first nanopillar array, a second nanopillar array, and a C-shaped ring and a microcavity resonator located between the first nanopillar array and the second nanopillar array, and the arrangement direction of the C-shaped ring and the microcavity resonator is parallel to the first direction. A phase change layer is formed on the metasurface structure, and the phase change layer covers the microcavity sidewall of the microcavity resonator; The metasurface structure is bonded to the side of the second modulator away from the waveguide layer; An insulating dielectric layer is formed on the side of the waveguide layer away from the first substrate, and the insulating dielectric layer at least covers the first modulator, the second modulator, and the metasurface structure; An interconnect structure is formed within the insulating dielectric layer, and the first modulator and the second modulator are respectively led out from the interconnect structure; A driving wafer is provided, and a driving circuit structure is connected to the end of the interconnect structure away from the first modulator and the second modulator.

6. A laser display system, characterized in that, It includes the field-modulated heterogeneous integrated photonic display chip as described in any one of claims 1 to 3; or, it includes the field-modulated heterogeneous integrated photonic display chip manufactured by the manufacturing method of the field-modulated heterogeneous integrated photonic display chip as described in any one of claims 4 to 5.

Images