An OPC modeling method, system and computer readable storage medium

CN122386578BActive Publication Date: 2026-09-15NEXCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202610822265.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-06-09
Publication Date
2026-09-15
Estimated Expiration
2046-06-09

AI Technical Summary

Technical Problem

[0004]然而,对于一些特殊形状的目标图形例如T型图形,由于CDSEM测量中电子束不能穿透光刻胶、以及光刻胶在曝光显影过程中所存在的顶部侵蚀/收缩缺陷,导致显影在光刻胶中的目标图形发生图形失真,进而导致CDSEM无法准确量测目标图形在不同维度下的关键尺寸

Benefits of technology

[0032] The OPC modeling method provided in this application includes: providing a test pattern and selecting multiple different height positions of the test pattern in the vertical direction; wherein the top width of the test pattern in the horizontal direction is greater than its bottom width; measuring a first actual measurement value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer, and calculating simulated values ​​of the critical dimensions corresponding to the remaining different height positions of the test pattern under optical simulation; based on the simulated values, calculating a second actual measurement value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer; setting a cost function set, and combining the first actual measurement value and the second actual measurement value to establish a target three-dimensional OPC model.

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Abstract

The application provides an OPC modeling method, system and computer readable storage medium, and is applied to the technical field of semiconductors. In the application, the first actual measurement value of the critical dimension corresponding to the height position of a test pattern after exposure on a wafer by CDSEM measurement is combined with the simulation value of the critical dimension corresponding to the remaining different height positions of the test pattern under optical simulation calculated by optical simulation software, so that the problem of actual data collection quantity in the OPC modeling process is simplified; and the mapping relationship between the actual measurement value of the critical dimension after development on photoresist after exposure on the wafer by the top position of the test pattern measured by CDSEM and the corresponding simulation value is used to correct the simulation value of the critical dimension, so that the accuracy of the OPC model is ensured. Finally, a cost function group is set, and the first actual measurement value and the second actual measurement value are combined to establish a target three-dimensional OPC model.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to an OPC modeling method, system, and computer-readable storage medium. Background Technology

[0002] To eliminate the effects of optical proximity, optical proximity correction (OPC) is commonly used. This method uses computer software to correct the original pattern on the semiconductor substrate to be exposed on the silicon wafer, resulting in a target pattern that differs from the original. A photomask is then fabricated based on this target pattern. During photolithography, the pattern projected onto the semiconductor substrate using this photomask is almost identical to the original pattern, thus compensating for the problems caused by optical proximity.

[0003] Model-based OPC correction is widely used in nodes below 90nm due to its accuracy and stability. Currently, 3D OPC models of photoresists are based on CDSEM (Critical Dimension Scanning Electron Microscope) to collect critical dimensions (CD) of the target pattern at different dimensions (height position) for modeling.

[0004] However, for some special-shaped target patterns, such as T-shaped patterns, the electron beam cannot penetrate the photoresist during CDSEM measurement, and the top erosion / shrinkage defects of the photoresist exist during the exposure and development process, which causes the target pattern developed in the photoresist to be distorted. As a result, CDSEM cannot accurately measure the key dimensions of the target pattern in different dimensions. Summary of the Invention

[0005] One objective of this application is to provide an OPC modeling method, system, and computer-readable storage medium to reduce the amount of actual data collected and the modeling cost during the OPC modeling process, while ensuring the accuracy of the OPC model and improving the efficiency of OPC modeling.

[0006] Firstly, to achieve the above objectives, one embodiment of this application provides an OPC modeling method, comprising:

[0007] A test pattern is provided, and multiple different height positions of the test pattern in the vertical direction are selected; the top width of the test pattern in the horizontal direction is greater than its bottom width.

[0008] The first actual measurement value of the critical dimension corresponding to a certain height position after the test pattern is exposed on the wafer is measured, and the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern under optical simulation is calculated.

[0009] Based on the simulated values, a second actual measurement of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer is calculated.

[0010] Set up a set of cost functions and, in conjunction with the first and second actual measurement values, establish a target three-dimensional OPC model.

[0011] Furthermore, the test pattern includes a T-shaped three-dimensional structure; the height position of the measured key dimension is between 80% and 100% of the total height position of the test pattern in the vertical direction from bottom to top.

[0012] Furthermore, the test pattern includes a T-shaped three-dimensional structure; at least one of the remaining different height positions of the test pattern is between 5% and 25% of the total height position of the test pattern in the vertical direction from bottom to top.

[0013] Furthermore, the step of calculating the second actual measurement value based on the simulated value includes: correcting the simulated values ​​of the remaining different height positions of the test pattern corresponding to the critical dimensions under optical simulation, and using the corrected simulated value as the second actual measurement value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer.

[0014] Furthermore, the step of correcting the simulated values ​​of the key dimensions corresponding to the remaining different height positions of the test pattern under optical simulation includes:

[0015] Determine the simulated value of the critical dimension corresponding to one height position of the test pattern under optical simulation; perform a difference calculation between the first actual measured value and the simulated value of the critical dimension corresponding to the height position, and use the result of the difference calculation as a correction offset; wherein, the correction offset characterizes the deviation between the simulated value of the critical dimension corresponding to the different height positions of the test pattern under optical simulation and the actual measured value of the critical dimension after exposure on the wafer; use the correction offset to correct the simulated values ​​of the remaining critical dimensions corresponding to the different height positions of the test pattern under optical simulation.

[0016] Furthermore, the step of correcting the simulated values ​​of the key dimensions corresponding to the remaining different height positions of the test pattern under optical simulation includes:

[0017] The simulated values ​​of the key dimensions corresponding to the remaining different height positions under optical simulation are corrected using a correction formula; wherein the correction formula is:

[0018] A i =a i+(Aa);

[0019] Among them, A i This refers to the second actual measurement value of the critical dimension corresponding to the remaining different height positions of the test pattern after exposure on the wafer; a i A is the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern after exposure on the wafer; A is the first actual measured value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer; a is the simulated value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer; i is the different height positions of the test pattern in the vertical direction, and the value of i is between 5% and 100% of the total height position of the test pattern in the vertical direction.

[0020] Furthermore, the cost function set includes a first cost function and a second cost function; the first cost function characterizes the degree of fit between the critical dimensions of the test pattern simulated using the OPC model and the actual measured values ​​of the critical dimensions after exposure on the wafer at height positions between 5% and 25% of the total height position of the test pattern in the vertical direction from bottom to top; the second cost function characterizes the offset or distortion of the critical dimensions of the test pattern simulated using the OPC model in the photoresist at the highest and lowest height positions in the vertical direction.

[0021] Furthermore, the formula for the second cost function is:

[0022] Cost function2 = [(Model CD)] max - (Model CD) min ] / 2;

[0023] Where Cost function2 is the second cost function; (Model CD) max The simulated value of the key dimension at the highest vertical position of the test pattern, obtained using the OPC model; (Model CD) min The simulated value of the key dimension at the lowest vertical height position of the test pattern is obtained by simulation using the OPC model.

[0024] Secondly, to achieve the above objectives, one embodiment of this application also provides an OPC modeling system, comprising:

[0025] The test pattern module is used to provide a test pattern and select multiple different height positions of the test pattern in the vertical direction; the top width of the test pattern in the horizontal direction is greater than its bottom width.

[0026] The measurement module is used to measure the first actual measurement value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer, and to calculate the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern under optical simulation.

[0027] The calculation module is used to calculate, based on the simulated values, a second actual measurement of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer.

[0028] The modeling module is used to set up a set of cost functions and, in combination with the first and second actual measurement values, to establish a target three-dimensional OPC model.

[0029] Thirdly, the present invention also provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other through the communication bus; the memory is used to store computer programs; and the processor is used to implement the OPC modeling method as described above when executing the program stored in the memory.

[0030] Fourthly, the present invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the OPC modeling method steps described above.

[0031] Compared with the prior art, the technical solution provided by the present invention has at least one of the following beneficial effects:

[0032] The OPC modeling method provided in this application includes: providing a test pattern and selecting multiple different height positions of the test pattern in the vertical direction; wherein the top width of the test pattern in the horizontal direction is greater than its bottom width; measuring a first actual measurement value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer, and calculating simulated values ​​of the critical dimensions corresponding to the remaining different height positions of the test pattern under optical simulation; based on the simulated values, calculating a second actual measurement value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer; setting a cost function set, and combining the first actual measurement value and the second actual measurement value to establish a target three-dimensional OPC model.

[0033] In this application, the problem of actual data collection during OPC modeling is simplified by combining CDSEM measurement and optical simulation software calculation. Then, the mapping relationship between the actual measured value and the corresponding simulated value of the critical dimension at the top position of the test pattern on the wafer after exposure and development on the photoresist is used to correct / correct the simulated value of the critical dimension calculated by the optical simulation software (used to replace the actual measured value of the critical dimension). The unexpected effect is that the accuracy of all data used in OPC modeling is guaranteed, as well as the accuracy of the OPC model itself.

[0034] Furthermore, this application constructs a second cost function, which, together with the first cost function used in the traditional process to ensure the good fit between the simulated and actual measured values ​​of the critical dimensions at the bottom of the test pattern in the modeling, forms a cost function group in the OPC modeling process. An unexpected effect is achieved: by combining the second cost function to monitor / evaluate the changes in the photoresist at different heights of the test pattern (e.g., top and bottom), and the first cost function to monitor / evaluate the changing trend of the critical dimensions at the bottom of the test pattern on the photoresist, the OPC model is optimized towards minimizing both the first and second cost functions during the modeling process. This also ensures that the best-fitting OPC model can be obtained after N iterations. Attached Figure Description

[0035] The accompanying drawings provide a more in-depth understanding of embodiments of this application and are incorporated herein by reference as a whole. These drawings and descriptions are used to illustrate the principles of some embodiments. It should be noted that all drawings are schematic diagrams and are for illustrative and drawing convenience, and relative sizes and proportions have been adjusted. The same symbols represent corresponding or similar features in different embodiments.

[0036] Figure 1 The diagram illustrates a flowchart of the OPC modeling method in an embodiment of this application.

[0037] Figure 2 The diagram illustrates a structural example of the test pattern in this embodiment.

[0038] In the accompanying drawings, the same parts are referred to by the same reference numerals, and the drawings are not drawn to scale. Detailed Implementation

[0039] To make the technical solutions and advantages of the embodiments of this application clearer, the technical solutions of this application will be further described in detail below with reference to the accompanying drawings and embodiments. Although exemplary implementation methods of this application are shown in the accompanying drawings, it should be understood that this application can be implemented in various forms and should not be limited to the implementation methods described herein. Rather, these implementation methods are provided to enable a more thorough understanding of this application and to fully convey the scope of this application to those skilled in the art.

[0040] The present application is described in more detail below by way of example with reference to the accompanying drawings. The advantages and features of the present application will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, intended only to facilitate and clarify the illustration of the embodiments of the present application. It is understood that the terms "on," "above," and "over" in this application should be interpreted in the broadest sense, such that "on" means not only "on" something without any intervening feature or layer (i.e., directly on something), but also includes "on" something with an intervening feature or layer.

[0041] Furthermore, for ease of description, regional relative terms such as “on,” “above,” “above,” “upper,” “above,” “upper,” etc., may be used herein to describe the relationship between one element or feature and another element or feature as shown in the figures. In addition to the orientations depicted in the figures, regional relative terms are intended to cover different orientations of the device in use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations) and the regional relative descriptive terms used herein may be interpreted accordingly.

[0042] In the embodiments of this application, the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be noted that the technical solutions described in the embodiments of this application can be arbitrarily combined without conflict.

[0043] In the process of manufacturing semiconductor chips, photomasks are used to form patterns on semiconductors using photolithography. To replicate these patterns onto the wafer, an integrated circuit photolithography machine is used to photoetch the projected circuitry. The manufacturing process generally includes exposure, development, removal of photoresist, and photolithography. The general process of photolithography is as follows: first, a specific pattern structure is obtained on the photomask; then, the pattern is replicated onto the silicon wafer using photolithography equipment. However, the process of generating patterns through photolithography introduces some distortion, especially as linewidths decrease, the distortion becomes increasingly severe. This is due to the Optical Proximity Effect (OPE), caused by nonlinear filtering in the optical imaging system. The industry addresses this problem using Optical Proximity Correction (OPC) technology. The core of OPC lies in using an accurate OPC model to predict the shape of the photoresist pattern on the wafer corresponding to different patterns on the photomask. Therefore, an accurate OPC model is a crucial factor in determining the quality of wafer pattern correction / correction.

[0044] Currently, traditional 3D OPC models of photoresist are based on CDSEM (Color, Color, and Size) measurements of critical dimensions (CDs) at different heights along the vertical direction of the target pattern / design on the wafer after exposure. However, collecting such a large number of actual measurements of critical dimensions inevitably increases the modeling time and cost of the 3D OPC model. Furthermore, for some special-shaped patterns on the mask, such as T-shaped 3D structures, the electron beam cannot penetrate the photoresist on the wafer during CDSEM measurement, the top of the T-shaped 3D structure blocks the electron beam, and there are top erosion / shrinkage defects in the photoresist during exposure and development. This will prevent CDSEM from measuring the critical dimensions at the bottom or inside of the photoresist sidewalls, and the top of the test pattern developed on the photoresist will be lost. This changes the position of the electron beam signal source during CDSEM measurement, and also distorts the target pattern developed in the photoresist, ultimately preventing CDSEM from accurately measuring the critical dimensions of the target pattern at different heights.

[0045] To address this issue, this application proposes an OPC modeling method, system, and computer-readable storage medium. First, it simplifies the problem of actual data collection volume during OPC modeling by combining CDSEM measurements and optical simulation software calculations. Then, it utilizes the mapping relationship between the actual measured value (also referred to as the actual CD value) of the critical dimension at the top position of the test pattern on the wafer after exposure and development on the photoresist, and its corresponding simulated value (also referred to as the simulated / simulated CD value), to correct / adjust the simulated CD value (used to replace the actual CD value) calculated by the optical simulation software. This ensures the accuracy of all data used in OPC modeling and also guarantees the accuracy of the OPC model itself. Subsequently, this application also constructs a second cost function, which, together with the first cost function used in the traditional process to ensure the good fit between the simulated CD value and the actual CD value at the bottom position of the test pattern in the modeling, forms a cost function group in the OPC modeling process. Then, by combining the second cost function to monitor / evaluate the changes in the photoresist at different height positions (e.g., top and bottom) of the test pattern, and the first cost function to monitor / evaluate the changing trend of the key dimensions at the bottom position of the test pattern on the photoresist, this application ensures that the OPC model optimizes towards minimizing both the first and second cost functions during the modeling process. This ensures that the best-fitting OPC model can be obtained after N iterations.

[0046] The OPC modeling method in the embodiments of this application will be further described below with reference to the accompanying drawings.

[0047] Please refer to Figure 1 The illustration shown is a flowchart of an OPC modeling method according to an embodiment of the present invention. Figure 1 As shown, the OPC modeling method may include at least the following steps:

[0048] Step S101: Provide a test pattern and select multiple different height positions of the test pattern in the vertical direction; the top width of the test pattern in the horizontal direction is greater than its bottom width.

[0049] Step S102: Measure the first actual measurement value of the critical dimension corresponding to one of the height positions of the test pattern after exposure on the wafer, and calculate the simulated values ​​of the critical dimensions corresponding to the remaining different height positions of the test pattern under optical simulation.

[0050] Step S103: Based on the simulated values, calculate the second actual measured values ​​of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer.

[0051] Step S104: Set up a cost function group and, in combination with the first actual measurement value and the second actual measurement value, establish a target three-dimensional OPC model.

[0052] In step S101 above, a test mask can be provided first. The test mask may contain multiple test patterns, and the shape of the test patterns is not limited; for example, it can be an L-shaped three-dimensional structure, a line-type three-dimensional pattern, a square, etc. However, the test mask in this embodiment includes at least one type of test pattern in which the top surface width of the pattern in the parallel direction (X direction) is greater than the bottom surface width of the pattern, for example... Figure 2 The cross-sectional view shown along the vertical direction (perpendicular to the parallel direction, Y direction) is an inverted trapezoidal structure; however, in other embodiments, the test pattern in which the top surface width of the pattern in the parallel direction (X direction) is greater than the bottom surface width of the pattern can also be a T-shaped three-dimensional structure (the cross-sectional view in the vertical direction is T-shaped), etc., and is not limited thereto.

[0053] Next, for each test pattern in the test mask, multiple different height positions are selected in the vertical direction, for example... Figure 2 The top of the structure shown (hereinafter referred to as the first height position; corresponding to) Figure 2 The T-80% section, the middle section (hereinafter referred to as the second altitude position; corresponding to) Figure 2 The T-50% (in the middle) and the bottom (hereinafter referred to as the third height position; corresponding to Figure 2 (T-20%). It should be understood that more height positions may be set in other embodiments. Furthermore, T-80% represents that the first height position is between 80% and 100% of the total height position of the test pattern in the vertical direction from bottom to top; T-50% represents that the height position is between 40% and 60% of the total height position of the test pattern in the vertical direction from bottom to top; and T-20% represents that the height position is between 5% and 25% of the total height position of the test pattern in the vertical direction from bottom to top.

[0054] In step S102 above, the first actual measured value (also called the first actual CD value) of the critical dimension corresponding to the cross-section (two-dimensional planar pattern) at a certain height position (the first height position; the top) of each test pattern in the test mask after exposure on the wafer can be measured using CDSEM. Furthermore, the simulated values ​​of the critical dimensions corresponding to the cross-section (two-dimensional planar pattern) at the remaining different height positions selected in step S101 for each test pattern in the test mask are calculated using optical simulation software, for example... Figure 2 The second simulated CD value (simulated value of the key dimension of the middle section pattern) of the cross section at the second height position of the structure shown, and the third simulated CD value (simulated value of the key dimension of the bottom section pattern) of the key dimension of the cross section at the third height position (bottom).

[0055] It should be noted that due to model bias in optical simulation software (any model will inevitably have bias or error), the calculated simulated CD values ​​corresponding to the remaining different height positions of the test pattern will inevitably be too large or too small overall. If the first actual measurement value and simulated value determined in step S102 (replacing the actual measurement values ​​of the key dimensions at the remaining height positions) are directly used for 3D OPC modeling, it will inevitably lead to the final target 3D OPC model being too large or too small as well. Here, the 3D OPC model can be an OPC model used to predict the shape of the photoresist pattern on the wafer corresponding to the three-dimensional (3D) mask pattern. To this end, this application embodiment proposes a modeling strategy of first correcting / modifying the simulated CD values ​​calculated by the optical simulation software in step S102 before using them for modeling, as detailed in the explanation of step S103 below.

[0056] In step S103 above, the simulated values ​​(e.g., second simulated CD value and third simulated CD value) of the critical dimensions corresponding to the remaining different height positions (e.g., the second height position and the third height position) of each test pattern calculated in step S102 under optical simulation can be corrected, and the corrected simulated values ​​are used as the second actual measured values ​​of the critical dimensions of the remaining different height positions of the corresponding test pattern after exposure on the wafer. This allows the present application to use CDSEM to collect the actual measured values ​​of only a very small portion of the critical dimensions corresponding to each three-dimensional test pattern in OPC modeling, while the actual measured values ​​of most of the remaining critical dimensions of each three-dimensional test pattern are replaced by corrected / modified simulated values. This achieves the goal of reducing the amount of data collected for OPC modeling and shortening the time required for OPC modeling while ensuring the accuracy of the collected data, thus improving the efficiency of OPC modeling.

[0057] In a preferred example, the step of correcting the simulated values ​​of the critical dimensions corresponding to the remaining different height positions of each test pattern under optical simulation may include:

[0058] First, the simulated value of the critical dimension corresponding to the two-dimensional cross-section at a certain height position (preferably the first height position; preferably the top) of each test pattern is determined under optical simulation. Then, the difference between the first actual measured value and the simulated value of the critical dimension corresponding to the two-dimensional cross-section at the first height position (top) of each test pattern is calculated, and the result of the difference calculation is used as the correction offset (Aa in the following formula). The correction offset represents the deviation between the simulated value of the critical dimension corresponding to the two-dimensional cross-section at different height positions of each test pattern under optical simulation and the actual measured value of the critical dimension after exposure on the wafer. The correction offset is used to correct the simulated values ​​of the critical dimensions corresponding to the remaining two-dimensional cross-sections at different height positions of the test pattern under optical simulation.

[0059] It should be noted that for the same optical simulation software, the relative changes between the critical dimensions corresponding to the two-dimensional cross-sections at different height positions of the same test pattern calculated by it are consistent; for example, they all increase or decrease, and the amount of increase or decrease is also consistent. Therefore, this application first determines the actual measured value (first actual measurement, obtained by CDSEM) and the simulated value (obtained by optical simulation software) of the critical dimension of the top two-dimensional cross-section of each test pattern. Then, the actual measured value and the simulated value of the critical dimension of the top two-dimensional cross-section of each test pattern are calculated by difference. The result of this difference calculation can characterize the deviation between the critical dimension determined by the optical simulation software and the actual lithography machine. In this way, CDSEM can be used to most accurately determine the critical dimension of the cross-section corresponding to a part (top) of the test pattern, calculate the offset of the critical dimension of the two-dimensional cross-section (also referred to as the cross-section) at other remaining height positions of the test pattern (i.e., the correction offset), and then use this offset to correct the simulated values ​​of the critical dimensions corresponding to the remaining different height positions of the test pattern under optical simulation, thereby offsetting the deviation / error of the simulated CD value calculated by the optical simulation software.

[0060] Specifically, in this embodiment, the process of correcting the simulated values ​​of the key dimensions corresponding to the remaining different height positions of the test pattern under optical simulation using the correction offset is summarized into a correction formula; wherein, the expression of the correction formula can be:

[0061] A i =a i +(Aa);

[0062] Among them, A i This is a second actual measurement of the critical dimension corresponding to the remaining different height positions (e.g., the second and third height positions) of a test pattern in a test mask after exposure on a wafer; a i A represents the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern after exposure on the wafer; A represents the first actual measured value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer; a represents the simulated value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer; i represents the different height positions of the test pattern in the vertical direction, and the value of i ranges from 5% to 100% of the total height position of the test pattern in the vertical direction from bottom to top; that is, the correction formula is used to correct the positions of the test pattern other than the top, and the top is directly measured using CDSEM.

[0063] In step S104 above, following step S103 above, after determining the corrected / corrected simulated values ​​using the above steps, the corrected / corrected simulated values ​​can be used as the actual measured values ​​of the key dimensions of the remaining different height positions of the corresponding test pattern after exposure on the wafer, i.e., the second actual measured values; then, the second cost function proposed in the embodiments of this application is constructed; then, the existing first cost function and the second cost function proposed in this application can be used to iterate N times on the actual database composed of the first and second actual measured values ​​corresponding to different test patterns, and finally obtain the target three-dimensional OPC model.

[0064] In this embodiment, multiple evaluation functions are used in the OPC modeling process, namely a cost function group. The cost function group includes a first cost function and a second cost function. The first cost function characterizes the fit between the critical dimensions simulated by the OPC model of the test pattern at a height position (third height position; bottom) between 5% and 25% of the total height position of the test pattern in the vertical direction, and the actual measured values ​​of the critical dimensions after exposure on the wafer. The second cost function characterizes the offset or distortion of the critical dimensions simulated by the OPC model in the photoresist at the highest height position (first height position; top) and the lowest height position (third height position; bottom) of the test pattern in the vertical direction.

[0065] The 3D OPC model includes multiple sub-OPC models, which are 2D OPC models established based on the key dimensions of 2D cross-sections at multiple height positions of the test pattern, for example, for... Figure 2 The three-dimensional structure shown can be used to establish two-dimensional OPC models for its top, middle, and bottom cross-sectional patterns. During the modeling process of each sub-OPC model, a corresponding cost function can be used as an evaluation function. For example, the two-dimensional OPC model (sub-OPC model) corresponding to the top and middle cross-sections of the test pattern can use the second cost function as an evaluation function to optimize N iterations towards the minimization of the second cost function. For the two-dimensional OPC model (sub-OPC model) corresponding to the bottom cross-section of the test pattern, the first cost function can be used as an evaluation function to optimize N iterations towards the minimization of the first cost function. That is, the final three-dimensional OPC model formed after N iterations is determined by optimizing towards the minimization of both the first and second cost functions.

[0066] In a preferred example, for each test pattern in the test mask, after determining the actual measured values ​​of the key dimensions at multiple height positions used for modeling, the application can first use a first cost function as an evaluation function to model and obtain an initial three-dimensional OPC model (containing multiple sub-OPC models). However, since the first cost function can only make the model iteratively optimize in the direction that the bottom key dimensions of the test pattern meet the design requirements, it cannot avoid the fact that due to the top erosion / shrinkage defects of the photoresist, the key dimensions of the two-dimensional cross-sections at other height positions have no evaluation function during the modeling process of the three-dimensional OPC model. As a result, the convergence of the two-dimensional OPC models corresponding to the top, middle and other non-bottom cross-sections of the mask pattern in the three-dimensional OPC model cannot be controlled.

[0067] Therefore, this application constructs a second cost function; wherein the formula of the second cost function can be expressed as:

[0068] Cost function2 = [(Model CD)] max - (Model CD) min ] / 2;

[0069] Where Cost function2 is the second cost function; (Model CD) max The simulated value of the key dimension at the highest vertical position of the test pattern, obtained using the OPC model; (Model CD) min The simulated value of the key dimension at the lowest vertical height position of the test pattern is obtained by simulation using the OPC model.

[0070] Thus, after determining the initial three-dimensional OPC model, the second cost function can be used to further modify / correct the initial three-dimensional OPC model, that is, to use the initial three-dimensional OPC model to determine the highest height position selected along the vertical direction for each test pattern (e.g. Figure 2 The top of the structure shown; the first height position), and the lowest position (e.g. Figure 2 The simulated values ​​of the key dimensions (bottom of the structure shown; third height position) are then input into the second cost function, and the initial three-dimensional OPC model is subjected to multiple iterative calculations to optimize the initial three-dimensional OPC model towards the minimum trend of the second cost function until the minimum value set by the second cost function is met, thus obtaining the final target three-dimensional OPC model.

[0071] Furthermore, this application also provides an OPC modeling system, which includes at least:

[0072] The test pattern module is used to provide a test pattern and select multiple different height positions of the test pattern in the vertical direction; the top width of the test pattern in the horizontal direction is greater than its bottom width.

[0073] The measurement module is used to measure the first actual measurement value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer, and to calculate the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern under optical simulation.

[0074] The calculation module is used to calculate, based on the simulated values, a second actual measurement of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer.

[0075] The modeling module is used to set up a set of cost functions and, in combination with the first and second actual measurement values, to establish a target three-dimensional OPC model.

[0076] In summary, this application first simplifies the issue of actual data collection during OPC modeling by combining CDSEM measurement and optical simulation software calculation. Then, by utilizing the mapping relationship between the actual measured value and the corresponding simulated value of the critical dimension at the top position of the test pattern on the wafer after exposure and development on the photoresist, the simulated value of the critical dimension calculated by the optical simulation software (used to replace the actual measured value of the critical dimension) is corrected / corrected. The unexpected result is that the accuracy of all data used in OPC modeling is guaranteed, as well as the accuracy of the OPC model itself. Furthermore, this application constructs a second cost function, which, together with the first cost function used in the traditional process to ensure the good fit between the simulated and actual measured values ​​of the critical dimensions at the bottom of the test pattern in the modeling, forms a cost function group in the OPC modeling process. An unexpected effect is achieved: by combining the second cost function to monitor / evaluate the changes in the photoresist at different heights of the test pattern (e.g., top and bottom), and the first cost function to monitor / evaluate the changing trend of the critical dimensions at the bottom of the test pattern on the photoresist, the OPC model is optimized towards minimizing both the first and second cost functions during the modeling process. This also ensures that the best-fitting OPC model can be obtained after N iterations.

[0077] This invention also provides an electronic device, including a processor, a communication interface, a memory, and a communication bus. The processor, communication interface, and memory communicate with each other through the communication bus. The memory is used to store computer programs. When the processor executes the program stored in the memory, it implements an OPC modeling method provided by this invention.

[0078] In addition, other implementations of the OPC modeling method implemented by the processor executing the program stored in the memory are the same as those mentioned in the aforementioned method embodiment section, and will not be repeated here.

[0079] The communication bus mentioned in the control terminal above can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used to represent it in the diagram, but this does not mean that there is only one bus or one type of bus.

[0080] The communication interface is used for communication between the aforementioned electronic devices and other devices.

[0081] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0082] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0083] In another embodiment of the present invention, a computer-readable storage medium is also provided, which stores instructions that, when executed on a computer, cause the computer to perform any of the OPC modeling methods described in the above embodiments.

[0084] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state disk (SSD)).

[0085] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0086] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the embodiments of apparatus, electronic devices, and computer-readable storage media are basically similar to the method embodiments, and therefore the descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0087] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. An OPC modeling method, characterized in that, include: Provide a test pattern and select multiple different height positions of the test pattern in the vertical direction; The test pattern has a top surface width that is greater than its bottom surface width in the horizontal direction; The first actual measurement value of the critical dimension corresponding to a certain height position after the test pattern is exposed on the wafer is measured, and the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern under optical simulation is calculated. Based on the simulated values, a second actual measured value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer is calculated; wherein, the step of calculating the second actual measured value based on the simulated values ​​includes: determining the simulated value of the critical dimension corresponding to one of the height positions of the test pattern under optical simulation; performing a difference operation between the first actual measured value and the simulated value of the critical dimension corresponding to the height position, and using the result of the difference operation as a correction offset; wherein, the correction offset characterizes the deviation between the simulated value of the critical dimension corresponding to the different height positions of the test pattern under optical simulation and the actual measured value of the critical dimension after exposure on the wafer; using the correction offset, correcting the simulated value of the remaining different height positions of the test pattern corresponding to the critical dimensions under optical simulation, and using the corrected simulated value as the second actual measured value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer; A set of cost functions is set up, and a target three-dimensional OPC model is established by combining the first actual measurement value and the second actual measurement value. The set of cost functions includes a first cost function and a second cost function. The first cost function characterizes the degree of fit between the critical dimensions of the test pattern simulated by the OPC model and the actual measured values ​​of the critical dimensions after exposure on the wafer at height positions between 5% and 25% of the total height position of the test pattern in the vertical direction from bottom to top. The second cost function characterizes the offset or distortion of the critical dimensions of the test pattern simulated by the OPC model in the photoresist at the highest and lowest height positions in the vertical direction.

2. The OPC modeling method as described in claim 1, characterized in that, The test pattern includes a T-shaped three-dimensional structure; the height position of the measured key dimension is between 80% and 100% of the total height position of the test pattern in the vertical direction from bottom to top.

3. The OPC modeling method as described in claim 1, characterized in that, The test pattern includes a T-shaped three-dimensional structure; at least one of the remaining different height positions of the test pattern is between 5% and 25% of the total height position of the test pattern in the vertical direction from bottom to top.

4. The OPC modeling method as described in claim 1, characterized in that, The step of correcting the simulated values ​​of the key dimensions corresponding to the remaining different height positions of the test pattern under optical simulation includes: The simulated values ​​of the key dimensions corresponding to the remaining different height positions under optical simulation are corrected using a correction formula; wherein the correction formula is: Ai = ai + (Aa); Wherein, Ai is the second actual measured value of the critical dimension corresponding to the remaining different height positions of the test pattern after exposure on the wafer; ai is the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern after exposure on the wafer; A is the first actual measured value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer; a is the simulated value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer; and i is the different height positions of the test pattern in the vertical direction, with the value of i ranging from 5% to 100% of the total height position of the test pattern in the vertical direction.

5. The OPC modeling method as described in claim 1, characterized in that, The formula for the second cost function is: Cost function2=[(Model CD)max - (Model CD)min] / 2; Wherein, Cost function2 is the second cost function; (Model CD)max is the simulated value of the critical dimension of the test pattern at its highest vertical position using the OPC model; and (Model CD)min is the simulated value of the critical dimension of the test pattern at its lowest vertical position using the OPC model.

6. An OPC modeling system, characterized in that, include: The test pattern module is used to provide a test pattern and select multiple different height positions of the test pattern in the vertical direction; The test pattern has a top surface width that is greater than its bottom surface width in the horizontal direction; The measurement module is used to measure the first actual measurement value of the critical dimension corresponding to a certain height position of the test pattern after exposure on the wafer, and to calculate the simulated value of the critical dimension corresponding to the remaining different height positions of the test pattern under optical simulation. A calculation module is used to calculate, based on the simulated values, a second actual measured value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer; wherein, the step of calculating the second actual measured value based on the simulated values ​​includes: determining the simulated value of the critical dimension corresponding to one of the height positions of the test pattern under optical simulation; performing a difference operation between the first actual measured value and the simulated value of the critical dimension corresponding to the height position, and using the result of the difference operation as a correction offset; wherein, the correction offset characterizes the deviation between the simulated value of the critical dimension corresponding to the different height positions of the test pattern under optical simulation and the actual measured value of the critical dimension after exposure on the wafer; using the correction offset to correct the simulated value of the remaining different height positions of the test pattern under optical simulation, and using the corrected simulated value as the second actual measured value of the critical dimensions of the remaining different height positions of the test pattern after exposure on the wafer; A modeling module is used to set a set of cost functions and, in conjunction with the first and second actual measurement values, establish a target 3D OPC model. The set of cost functions includes a first cost function and a second cost function. The first cost function characterizes the degree of fit between the critical dimensions of the test pattern simulated using the OPC model and the actual measured values ​​of the critical dimensions after exposure on the wafer at height positions between 5% and 25% of the total height position of the test pattern in the vertical direction. The second cost function characterizes the offset or distortion of the critical dimensions of the test pattern simulated using the OPC model in the photoresist at the highest and lowest height positions in the vertical direction.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the OPC modeling method as described in any one of claims 1 to 5.

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