Clock-triggered distributed simulation method, system, device and product

Abstract

The application discloses a clock trigger-based distributed simulation method, system, device and product, and belongs to the technical field of distributed simulation. According to the application, exclusive data transmission time slots are allocated to each simulation node, so that each simulation node interacts with simulation data according to the allocated exclusive data transmission time slots, the possibility of bus competition blocking is eliminated, the transmission delay of all simulation data can be determined, the transmission delay is constant, the local clock of the simulation node is uniformly corrected in the interaction process, the node movement is compensated, the synchronization error is reduced, the time reference of the simulation node is aligned with the global navigation satellite system, the deviation can be effectively inhibited, and the application and promotion are facilitated.

Description

Technical Field

[0001] This invention belongs to the field of distributed simulation technology, specifically relating to a clock-triggered distributed simulation method, system, device, and product. Background Technology

[0002] With the rapid development of aerospace technology, collaborative combat of aircraft swarms and unmanned combat systems have become important development directions in the field of defense science and technology. In these application scenarios, distributed simulation technology, as a core means of system design verification, performance evaluation, and fault reproduction, directly affects the development cycle and combat effectiveness of aerospace equipment due to its accuracy and reliability. In fire control-level collaborative tasks, the clock synchronization accuracy between simulation nodes needs to reach the nanosecond level to ensure the authenticity and reliability of simulation results. Traditional distributed simulation methods mostly adopt event-triggered communication mechanisms, such as classic network time protocols and precision time protocols. Under the event-triggered mechanism, simulation nodes only perform data interaction and clock correction when specific events are detected, such as sensor data updates and external interruptions.

[0003] However, the above methods also have corresponding defects, such as (1) poor time determinism: the event triggering mechanism cannot guarantee the upper limit of message transmission delay in the worst case. When the simulation scale expands or network traffic increases suddenly, key control commands may be blocked due to bus contention, resulting in distortion of simulation results and failure to truly reflect the real-time response capability of the aircraft under extreme maneuvering conditions; (2) insufficient dynamic adaptability: when there is high-speed relative motion between simulation nodes, the phenomenon of asymmetrical transmission paths will occur. Traditional synchronization methods do not compensate for node motion and simplify relative motion to a prohibition assumption, resulting in a sharp increase in synchronization error as relative speed increases; (3) inability to correct global clock drift: the system global clock will drift continuously in one direction relative to the real time. After long-term operation, the simulation time axis is seriously distorted and cannot be aligned with absolute time references such as the Global Navigation Satellite System.

[0004] Therefore, how to provide an effective technical solution to address the technical problems of poor time determinism, insufficient dynamic adaptability, and inability to correct global clock drift in existing technologies has become an urgent problem to be solved in existing technologies. Summary of the Invention

[0005] The purpose of this invention is to provide a clock-triggered distributed simulation method, system, device, and product to solve the aforementioned problems in the prior art.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: In a first aspect, the present invention provides a clock-triggered distributed simulation method, comprising: Based on the interactive synchronization protocol frame, a fault-tolerant clock synchronization algorithm is executed among multiple simulation nodes to ensure that the local clock of each simulation node converges to a globally unified system synchronization time reference. The simulation nodes include global navigation satellite system simulation nodes. According to the preset simulation task scheduling table, each simulation node is allocated a dedicated data transmission time slot. Within the system synchronization time base, each simulation node interacts with simulation data according to the allocated dedicated data transmission time slot. During the interaction of simulation data, the local clocks of the simulation nodes are calibrated again to obtain a new system synchronization time base, so that each simulation node follows the new system synchronization time base and completes the distributed simulation.

[0007] In one possible design, based on an interactive synchronization protocol frame, a fault-tolerant clock synchronization algorithm is executed among multiple simulation nodes to ensure that the local clock of each simulation node converges to a globally unified system synchronization time base, including: Initialize the local clock for each simulation node; At a preset time within each synchronization cycle, multiple simulation nodes configured as synchronization controllers send protocol control frames to the simulation node configured as a central controller. Within a predetermined receiving window, the simulation node configured as a central controller receives protocol control frames sent by multiple simulation nodes configured as synchronization controllers, and compresses the received protocol control frames using a compression algorithm to ensure that the receiving order of each frame is consistent with the sending order, thereby obtaining a compression result. The simulation node configured as the central controller generates a new protocol control frame based on the compression result, and sends the new protocol control frame to all simulation nodes configured as the synchronization controller and simulation nodes configured as the client at the beginning of the next synchronization cycle. Upon receiving a new protocol control frame, each simulation node configured as a synchronization controller and each simulation node configured as a client adjusts its local clock according to the synchronization information carried in the new protocol control frame, so that the local clock of each simulation node converges to a globally unified system synchronization time reference.

[0008] In one possible design, a dedicated data transmission time slot is allocated to each simulation node according to a preset simulation task scheduling table. Within the system synchronization time base, each simulation node interacts with simulation data according to the allocated dedicated data transmission time slot, including: A simulation network is constructed based on the time-triggered Ethernet protocol, and a simulation task scheduling table is generated using the simulation network according to the preset simulation scenario data. The simulation task scheduling table includes the exclusive data transmission time slot, transmission duration and message type of each simulation node in each communication cycle. During the simulation, based on the simulation task scheduling table, each simulation node, driven by the system synchronization time base, only sends data to the network when its assigned exclusive data transmission time slot arrives. It also uses the time-triggered Ethernet protocol to give priority to the key control flow of time-triggered data in order to exchange simulation data.

[0009] In one possible design, during the interaction of simulation data, the local clocks of the simulation nodes are uniformly calibrated again to obtain a new system synchronization time base, including: When there is high-speed relative motion between the simulated nodes, the Doppler frequency shift in the received signal is obtained, the relative radial velocity between each simulated node is calculated based on the Doppler frequency shift, and the clock deviation is compensated according to the relative radial velocity to obtain the clock deviation after motion compensation. Historical clock deviation data within multiple synchronization cycles is acquired. A batch estimation algorithm is used to extract features from the historical clock deviation data within multiple synchronization cycles to obtain unequal response delay feature values. The clock deviation is then compensated based on the unequal response delay feature values ​​to obtain the clock deviation after unequal response delay compensation. The clock deviation after motion compensation and the clock deviation after unequal response delay compensation are input into the Kalman filter to denoise the clock deviation after motion compensation and the clock deviation after unequal response delay compensation, and the first prediction residual is obtained. The first prediction residual, the current signal-to-noise ratio, and the non-equal response delay feature value are input into the pre-trained clock correction model to obtain the final clock correction amount. Based on the final clock correction, the local clocks of the simulation nodes are uniformly calibrated to obtain a new system synchronization time reference.

[0010] In one possible design, the local clock of the simulation node is uniformly clocked based on the final clock correction amount, including: Obtain the current absolute time value of the simulated nodes of the Global Navigation Satellite System. At the beginning of each correction cycle, encapsulate the current absolute time value into a time synchronization frame, use the time synchronization frame as the absolute time reference, and send the absolute time reference to all simulation nodes. After receiving the absolute time reference, each simulation node calculates the difference between the local system synchronization time reference and the absolute time reference, and uses the difference as the global drift amount. Each simulation node inputs the global drift into a Kalman filter to perform overall correction of the local system's synchronization time base.

[0011] In one possible design, historical clock skew data over multiple synchronization cycles is acquired. A batch estimation algorithm is then used to extract features from the historical clock skew data over the multiple synchronization cycles to obtain non-uniform response delay feature values, including: When the simulation node is in a relatively stable operating state, the preliminary historical clock deviation data within multiple synchronization cycles is obtained, and the historical data sequence is obtained based on the preliminary historical clock deviation data. The average value of the historical data sequence is calculated, and the average value is back-calculated based on the sensitivity coefficient of the non-equal response delay according to the preset clock deviation to obtain the non-equal response delay characteristic value.

[0012] In one possible design, the clock correction model is constructed based on a backpropagation neural network; the step of inputting the first prediction residual, the current signal-to-noise ratio, and the non-equivalent response delay feature value into the pre-trained clock correction model to obtain the final clock correction amount includes: inputting the previous signal-to-noise ratio and the non-equivalent response delay feature value into the pre-trained clock correction model to obtain the second prediction residual; and fusing the first prediction residual and the second prediction residual to obtain the final clock correction amount.

[0013] Secondly, the present invention provides a clock-triggered distributed simulation system, comprising: The clock convergence module is used to execute a fault-tolerant clock synchronization algorithm among multiple simulation nodes based on the interactive synchronization protocol frame, so that the local clock of each simulation node converges to a globally unified system synchronization time reference. The simulation nodes include global navigation satellite system simulation nodes. The data interaction module is used to allocate exclusive data transmission time slots to each simulation node according to the preset simulation task scheduling table. Each simulation node interacts with simulation data according to the allocated exclusive data transmission time slots within the system synchronization time base. The clock correction module is used to perform unified clock correction on the local clocks of the simulation nodes again during the interaction of simulation data, so as to obtain a new system synchronization time base, so that each simulation node follows the new system synchronization time base and completes the distributed simulation.

[0014] Thirdly, the present invention provides a computer device comprising a memory, a processor, and a transceiver connected in sequence and communication, wherein the memory is used to store a computer program, the transceiver is used to send and receive messages, and the processor is used to read the computer program and execute the clock-triggered distributed simulation method as described in the first aspect above.

[0015] Fourthly, the present invention provides a computer-readable storage medium storing instructions that, when executed on a computer, perform the clock-triggered distributed simulation method as described in the first aspect above.

[0016] Fifthly, the present invention provides a computer program product containing instructions that, when executed on a computer, cause the computer to perform the clock-triggered distributed simulation method as described in the first aspect above.

[0017] The beneficial effects of this invention are as follows: This invention discloses a clock-triggered distributed simulation method, system, product, and device. Based on an interactive synchronization control protocol frame, it executes a fault-tolerant clock synchronization algorithm among multiple simulation nodes, causing the local clocks of each simulation node to converge to a globally unified system synchronization time reference. The simulation nodes include Global Navigation Satellite System (GNSS) simulation nodes. According to a preset simulation task scheduling table, each simulation node is allocated a dedicated data transmission time slot. Within the system synchronization time reference, each simulation node interacts with simulation data according to its allocated dedicated data transmission time slot. During the interaction of simulation data, the local clocks of the simulation nodes are unified again. By performing clock correction to obtain a new system synchronization time reference, the present invention enables each simulation node to follow the new system synchronization time reference and complete distributed simulation. This invention eliminates the possibility of bus contention and blocking by allocating exclusive data transmission time slots to each simulation node, allowing each simulation node to interact with simulation data according to the allocated exclusive data transmission time slots. It can determine the transmission delay of all simulation data, making the transmission delay constant, and reduce synchronization errors by uniformly correcting the local clock of the simulation nodes during the interaction process and compensating for node movement. This ensures alignment with the time reference of the global navigation satellite system simulation nodes, effectively suppresses deviations, and is easy to apply and promote. Attached Figure Description

[0018] Figure 1 A flowchart illustrating a clock-triggered distributed simulation method provided in an embodiment of the present invention; Figure 2 This is a block diagram of a clock-triggered distributed simulation system provided in an embodiment of the present invention. Detailed Implementation

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the present invention will be briefly introduced below in conjunction with the accompanying drawings and descriptions of the embodiments or the prior art. Obviously, the following description of the structure of the accompanying drawings is only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the description of these embodiments is for the purpose of helping to understand the present invention, but does not constitute a limitation of the present invention.

[0020] It should be understood that although the terms first, second, etc., may be used herein to describe various units, these units should not be limited by these terms. These terms are only used to distinguish one unit from another. For example, a first unit may be referred to as a second unit, and similarly, a second unit may be referred to as a first unit, without departing from the scope of the exemplary embodiments of the invention.

[0021] It should be understood that the term "and / or" that may appear in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, B exists alone, and A and B exist simultaneously. The term " / and" that may appear in this document describes another relationship between related objects, indicating that two relationships can exist. For example, A / and B can mean: A exists alone, and A and B exist alone. In addition, the character " / " that may appear in this document generally indicates that the related objects before and after it are in an "or" relationship.

[0022] Example: like Figure 1 As shown, the first aspect of this embodiment provides a clock-triggered distributed simulation method, which can be executed, but is not limited to, by a computer device or virtual machine with certain computing resources, such as a personal computer or smartphone, or by a virtual machine; the smart elderly care service method includes, but is not limited to, the following steps: S1. Based on the interactive synchronization protocol frame, a fault-tolerant clock synchronization algorithm is executed among multiple simulation nodes to make the local clock of each simulation node converge to a globally unified system synchronization time reference. The simulation nodes include global navigation satellite system simulation nodes. The simulation nodes also include flight control computer nodes and inertial navigation nodes.

[0023] Specifically, in step S1, based on the interactive synchronization protocol frame, a fault-tolerant clock synchronization algorithm is executed among multiple simulation nodes to ensure that the local clock of each simulation node converges to a globally unified system synchronization time base, including: S11. Initialize the local clock for each simulation node; S12. At a preset time within each synchronization cycle, multiple simulation nodes configured as synchronization controllers send protocol control frames to the simulation node configured as a central controller. S13. Within a predetermined receiving window, the simulation node configured as a central controller receives protocol control frames sent by multiple simulation nodes configured as synchronous controllers, and compresses the received protocol control frames using a compression algorithm to ensure that the receiving order of each frame is consistent with the sending order, thereby obtaining a compression result. S14. The simulation node configured as the central controller generates a new protocol control frame based on the compression result, and sends the new protocol control frame to all simulation nodes configured as the synchronization controller and simulation nodes configured as the client at the beginning of the next synchronization cycle. S15. After receiving a new protocol control frame, each simulation node configured as a synchronization controller and each simulation node configured as a client adjust their local clock according to the synchronization information carried in the new protocol control frame, so that the local clock of each simulation node converges to a globally unified system synchronization time reference.

[0024] It should be noted that the compression algorithm in this embodiment is based on the AS6802 protocol. Its principle is to change the structure of the link layer on the basis of the Ethernet protocol, thereby enhancing the time determinism of Ethernet data transmission.

[0025] In practice, the local clock of each simulation node is first initialized. At a preset time in each synchronization cycle, the simulation node configured as the synchronization controller sends a protocol control frame to the simulation node configured as the central controller. When the simulation node configured as the central controller sends a protocol control frame to the simulation node configured as the central controller, a compression algorithm is used to compress the received protocol control frame to ensure that the receiving order of each frame is consistent with the sending order, thereby eliminating the phase uncertainty introduced by network transmission jitter and obtaining the compression result. Then, a new protocol control frame is generated based on the compression result, and after the start of the next synchronization cycle, the new protocol control frame is sent to all simulation nodes configured as the synchronization controller and simulation nodes configured as the client. After receiving the new protocol control frame, each node adjusts the phase and frequency of its local clock according to the synchronization information carried in it, thereby achieving nanosecond-level synchronization of all simulation nodes. Even if a failure occurs at some simulation nodes, the compression algorithm can automatically eliminate abnormal clock stragglers, ensuring that the remaining healthy nodes can maintain synchronization and improving fault tolerance.

[0026] S2. According to the preset simulation task scheduling table, each simulation node is allocated a dedicated data transmission time slot. Within the system synchronization time base, each simulation node interacts with simulation data according to the allocated dedicated data transmission time slot. Specifically, in step S2, according to the preset simulation task scheduling table, a dedicated data transmission time slot is allocated to each simulation node. Within the system synchronization time base, each simulation node interacts with simulation data according to the allocated dedicated data transmission time slot, including: S21. Construct a simulation network based on the time-triggered Ethernet protocol, and generate a simulation task scheduling table using the simulation network according to the preset simulation scenario data. The simulation task scheduling table includes the exclusive data transmission time slot, transmission duration and message type of each simulation node in each communication cycle. S22. During the simulation operation, based on the simulation task scheduling table, each simulation node, driven by the system synchronization time base, only sends data to the network when its allocated exclusive data transmission time slot arrives, and uses the time-triggered Ethernet protocol to give priority to the key control flow of time triggering in order to exchange simulation data.

[0027] It should be noted that a static scheduling table is generated based on preset simulation scenario data. Preset simulation scenario data refers to data used to simulate certain events or situations in a specific real-world environment in order to predict, evaluate, or control them. A simulation task scheduling table is generated based on the preset simulation scenario data. This simulation task scheduling table clearly specifies the exclusive data transmission time slot, transmission duration, and message type for each simulation node in each communication cycle.

[0028] In practice, during the simulation, each simulation node can only send data to the network when its allocated exclusive time slot arrives, thus avoiding bus contention. Furthermore, the time-triggered Ethernet protocol carries both time-triggered critical control flows and event-triggered non-critical monitoring flows on the same physical link, giving priority to time-triggered critical control flows. When non-critical monitoring flows conflict with critical control flows, critical control flows can preempt link resources, ensuring that the transmission delay of simulation data remains constant and has real-time performance.

[0029] S3. During the interaction of simulation data, the local clocks of the simulation nodes are calibrated again to obtain a new system synchronization time base, so that each simulation node follows the new system synchronization time base and completes the distributed simulation.

[0030] Specifically, in step S3, during the interaction of simulation data, the local clocks of the simulation nodes are uniformly calibrated again to obtain a new system synchronization time base, including: S31. When there is high-speed relative motion between the simulated nodes, the Doppler frequency shift in the received signal is obtained, the relative radial velocity between each simulated node is calculated based on the Doppler frequency shift, and the clock deviation is compensated according to the relative radial velocity to obtain the clock deviation after motion compensation. S32. Obtain historical clock deviation data within multiple synchronization cycles, use a batch estimation algorithm to extract features from the historical clock deviation data within multiple synchronization cycles, obtain unequal response delay feature values, and compensate for the clock deviation based on the unequal response delay feature values ​​to obtain the clock deviation after unequal response delay compensation. S33. Input the clock deviation after motion compensation and the clock deviation after unequal response delay compensation into the Kalman filter to denoise the clock deviation after motion compensation and the clock deviation after unequal response delay compensation, and obtain the first prediction residual. S34. Input the first prediction residual, the current signal-to-noise ratio, and the non-equal response delay feature value into the pre-trained clock correction model to obtain the final clock correction amount; S35. Based on the final clock correction, perform unified clock correction on the local clock of the simulation node to obtain a new system synchronization time reference.

[0031] It should be noted that obtaining the Doppler frequency shift in the received signal specifically includes obtaining the clock frequency offset, framing the clock frequency offset according to frame format requirements to obtain the RTT response signal, processing the RTT response signal using segmentation and frequency domain processing methods to obtain a clock frequency offset estimate, calculating the Doppler frequency shift based on the clock frequency offset and the estimated clock frequency offset, and then calculating the relative radial velocity between each simulation node based on the Doppler frequency shift. The expression for the Doppler frequency shift is as follows: In the formula, For Doppler frequency shift, For clock frequency offset, This is the estimated clock frequency offset. To preset the first noise error, To predetermine the second noise error, the expression for the relative radial velocity is: In the formula, The relative radial velocity, At the speed of light, The signal's radio frequency.

[0032] In specific implementation, when there is high-speed relative motion between simulation nodes, the relative radial velocity is calculated. Based on the relative radial velocity, the clock deviation caused by the asymmetry of the transmission path is compensated to obtain the motion-compensated clock deviation. At the same time, historical clock deviation data of multiple synchronization cycles are acquired, and a batch estimation algorithm is used to extract features from the historical clock deviation data within multiple synchronization cycles to obtain the non-equivalent response delay feature value. The non-equivalent response delay feature value is used to compensate for the clock deviation to obtain the non-equivalent response delay compensated clock deviation, thereby eliminating the systematic deviation introduced by the simulation nodes. Subsequently, the motion-compensated and non-equivalent response delay compensated clock deviations are input into a Kalman filter for real-time recursive estimation to suppress observation noise. Then, the prediction residual of the Kalman filter, the current signal-to-noise ratio, and the non-equivalent response experimental feature value are input into a pre-trained clock correction model to obtain the final clock modification amount. The pre-trained clock correction model is used to compensate for nonlinear slow time-varying deviations caused by crystal oscillator drift and environmental changes, and outputs the final clock correction amount. Based on the final clock correction amount, the local clock is clocked to ensure that the task execution and data transmission of each node strictly follow the new system synchronization time reference, thus completing the distributed simulation.

[0033] Furthermore, the clock correction model described in this embodiment is constructed based on a backpropagation neural network. The step of inputting the first prediction residual, the current signal-to-noise ratio, and the non-equivalent response delay feature value into the pre-trained clock correction model to obtain the final clock correction amount specifically includes: inputting the current signal-to-noise ratio and the non-equivalent response delay feature value into the pre-trained clock correction model to obtain a second prediction residual; fusing the first prediction residual and the second prediction residual to obtain the final clock correction amount. The pre-trained clock correction model in this embodiment adopts a three-layer topology design, including an input layer, a single hidden layer, and an output layer, and the number of neurons in the hidden layer is optimized according to the balance between input dimension and output accuracy. The training process of the clock correction model includes acquiring a large amount of historical data and inputting this historical data into the clock correction model for training, so that the clock correction model learns the complex mapping relationship between crystal oscillator nonlinear drift, temperature change, and clock error. During simulation, real-time data is input into the trained clock correction model to obtain the prediction residual value.

[0034] In a preferred embodiment, step S32 involves acquiring historical clock deviation data within multiple synchronization cycles, and using a batch estimation algorithm to extract features from the historical clock deviation data within the multiple synchronization cycles to obtain non-uniform response delay feature values, including: S32.1. When the simulation node is in a relatively stable operating state, acquire preliminary historical clock deviation data within multiple synchronization cycles, and obtain historical data sequence based on the preliminary historical clock deviation data; S32.2. Calculate the average value of the historical data sequence, and back-calculate the average value based on the sensitivity coefficient of the non-equal response delay according to the preset clock deviation to obtain the non-equal response delay characteristic value.

[0035] In practice, during periods when the simulation node is in a relatively stable operating state, preliminary historical clock deviation data for multiple synchronization cycles are continuously acquired for a preset number of time periods. Based on these preliminary historical clock deviation data, a historical data sequence is constructed. The average or median of this sequence is calculated, and the average or median is used to suppress the influence of random noise on the estimation results. Based on the sensitivity coefficient of clock deviation to unequal response delay in the system model, the average value is back-calculated as the equivalent unequal response delay value. In each subsequent synchronization cycle, the preliminary clock deviation is first calculated, and the equivalent unequal response delay value is used to perform a secondary correction on the preliminary clock deviation, thereby eliminating the systematic error introduced by the internal processing delay asymmetry. Furthermore, the batch estimation algorithm is re-executed every preset time period to adapt to the characteristics of unequal response delay following changes in environmental factors such as temperature and load, ensuring the compensation effect for long-term operation.

[0036] Furthermore, in step S35, a unified clock correction is performed on the local clock of the simulation node based on the final clock correction amount, including: S35.1. Obtain the current absolute time value of the global navigation satellite system simulation node. At the beginning of each correction cycle, encapsulate the current absolute time value into a time synchronization frame, use the time synchronization frame as the absolute time reference, and send the absolute time reference to all simulation nodes. S35.2. After receiving the absolute time reference, each simulation node calculates the difference between the local system synchronization time reference and the absolute time reference, and uses the difference as the global drift amount; S35.3. Each simulation node inputs the global drift amount into the Kalman filter to perform overall correction of the local system's synchronization time reference.

[0037] Specifically, the global navigation satellite system simulation nodes maintain an absolute clock locally synchronized with real time. At the beginning of each calibration cycle, the current absolute time value is encapsulated into a time synchronization frame, which is then used as the absolute time reference and sent to all simulation nodes. When a simulation node receives the time synchronization frame, it uses the difference between its local system synchronization time reference and the absolute time reference as a global drift. At the next synchronization cycle, each simulation node inputs this global drift into a Kalman filter to keep the time axis consistent with real time and avoid simulation time distortion.

[0038] The first aspect of this embodiment provides a clock-triggered distributed simulation method. First, during the simulation system startup phase, a fault-tolerant clock synchronization algorithm is executed among the simulation nodes through an interactive synchronization protocol frame, causing the local clocks of all simulation nodes to converge to a globally unified system synchronization time base, thus obtaining the time basis for distributed simulation. Subsequently, according to a preset simulation task scheduling table, a dedicated data transmission time slot is allocated to each simulation node. Driven by the unified system synchronization time base, each node interacts with simulation data according to the allocated dedicated data transmission time slot, which can directly avoid bus conflicts. Furthermore, during the interaction of simulation data, the local clocks of the simulation nodes are uniformly calibrated again to obtain a new system synchronization time base, enabling each simulation node to follow the new system synchronization time base and complete the distributed simulation. This embodiment fundamentally eliminates bus contention and message collisions by enabling each simulation node to interact with data according to a predetermined transmission time slot under the drive of a unified time base. Furthermore, for high-speed relative motion between nodes, the relative radial velocity is calculated using Doppler frequency shift, effectively eliminating errors caused by asymmetric transmission paths. An absolute time base is generated by simulating nodes of the Global Navigation Satellite System, and the global drift is input into a Kalman filter for overall correction, ensuring that the time axis of the distributed simulation system remains consistent with real time over a long period, meeting the requirements for high-precision, high-reliability, and long-term stable simulation verification in high-dynamic aerospace scenarios.

[0039] like Figure 2 As shown, the second aspect of this embodiment provides a clock-triggered distributed simulation system, including: The clock convergence module is used to execute a fault-tolerant clock synchronization algorithm among multiple simulation nodes based on the interactive synchronization protocol frame, so that the local clock of each simulation node converges to a globally unified system synchronization time reference. The simulation nodes include global navigation satellite system simulation nodes. The data interaction module is used to allocate exclusive data transmission time slots to each simulation node according to the preset simulation task scheduling table. Each simulation node interacts with simulation data according to the allocated exclusive data transmission time slots within the system synchronization time base. The clock correction module is used to perform unified clock correction on the local clocks of the simulation nodes again during the interaction of simulation data, so as to obtain a new system synchronization time base, so that each simulation node follows the new system synchronization time base and completes the distributed simulation.

[0040] The working process, working details and technical effects of the clock-triggered distributed simulation system provided in the second aspect of this embodiment can be found in the clock-triggered distributed simulation method described in the first aspect, and will not be repeated here.

[0041] This embodiment provides a computer device including a memory, a processor, and a transceiver connected in sequence. The memory stores a computer program, the transceiver sends and receives messages, and the processor reads the computer program and executes the clock-triggered distributed simulation method as described in the first aspect. Specifically, the memory may include, but is not limited to, random access memory (RAM), read-only memory (ROM), flash memory, first-in-first-out (FIFO) memory, and / or first-in-last-out (FILO) memory, etc.; the processor may include, but is not limited to, an STM32F105 series microprocessor. Furthermore, the computer device may also include, but is not limited to, a power supply module, a display screen, and other necessary components.

[0042] The working process, working details and technical effects of the aforementioned computer device provided in the third aspect of this embodiment can be found in the clock-triggered distributed simulation method described in the first aspect, and will not be repeated here.

[0043] The fourth aspect of this embodiment provides a computer-readable storage medium, wherein the computer-readable storage medium stores instructions that, when executed on a computer, perform the clock-triggered distributed simulation method as described in the first aspect. The computer-readable storage medium refers to a data storage medium, which may include, but is not limited to, floppy disks, optical disks, hard disks, flash memory, USB flash drives, and / or Memory Sticks. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.

[0044] The working process, working details and technical effects of the aforementioned computer-readable storage medium provided in the fourth aspect of this embodiment can be found in the clock-triggered distributed simulation method described in the first aspect, and will not be repeated here.

[0045] The fifth aspect of this embodiment provides a computer program product, including a computer program or instructions, which, when executed by a computer, are used to implement the clock-triggered distributed simulation method as described in the first aspect.

[0046] The working process, working details, and technical effects of the aforementioned computer program product provided in this embodiment can be found in the clock-triggered distributed simulation method described in the first aspect, and will not be repeated here.

[0047] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A clock-triggered distributed simulation method, characterized in that, include: Based on the interactive synchronization protocol frame, a fault-tolerant clock synchronization algorithm is executed among multiple simulation nodes to ensure that the local clock of each simulation node converges to a globally unified system synchronization time reference. The simulation nodes include global navigation satellite system simulation nodes. According to the preset simulation task scheduling table, each simulation node is allocated a dedicated data transmission time slot. Within the system synchronization time base, each simulation node interacts with simulation data according to the allocated dedicated data transmission time slot. During the interaction of simulation data, the local clocks of the simulation nodes are calibrated again to obtain a new system synchronization time base, so that each simulation node follows the new system synchronization time base and completes the distributed simulation.

2. The clock-triggered distributed simulation method according to claim 1, characterized in that, Based on the interactive synchronization protocol frame, a fault-tolerant clock synchronization algorithm is executed among multiple simulation nodes to ensure that the local clock of each simulation node converges to a globally unified system synchronization time base, including: Initialize the local clock for each simulation node; At a preset time within each synchronization cycle, multiple simulation nodes configured as synchronization controllers send protocol control frames to the simulation node configured as a central controller. Within a predetermined receiving window, the simulation node configured as a central controller receives protocol control frames sent by multiple simulation nodes configured as synchronization controllers, and compresses the received protocol control frames using a compression algorithm to ensure that the receiving order of each frame is consistent with the sending order, thereby obtaining a compression result. The simulation node configured as the central controller generates a new protocol control frame based on the compression result, and sends the new protocol control frame to all simulation nodes configured as the synchronization controller and simulation nodes configured as the client at the beginning of the next synchronization cycle. Upon receiving a new protocol control frame, each simulation node configured as a synchronization controller and each simulation node configured as a client adjusts its local clock according to the synchronization information carried in the new protocol control frame, so that the local clock of each simulation node converges to a globally unified system synchronization time reference.

3. The clock-triggered distributed simulation method according to claim 1, characterized in that, According to the preset simulation task scheduling table, a dedicated data transmission time slot is allocated to each simulation node. Within the system synchronization time base, each simulation node interacts with simulation data according to the allocated dedicated data transmission time slot, including: A simulation network is constructed based on the time-triggered Ethernet protocol, and a simulation task scheduling table is generated using the simulation network according to the preset simulation scenario data. The simulation task scheduling table includes the exclusive data transmission time slot, transmission duration and message type of each simulation node in each communication cycle. During the simulation, based on the simulation task scheduling table, each simulation node, driven by the system synchronization time base, only sends data to the network when its assigned exclusive data transmission time slot arrives. It also uses the time-triggered Ethernet protocol to give priority to the key control flow of time-triggered data in order to exchange simulation data.

4. The clock-triggered distributed simulation method according to claim 1, characterized in that, During the interaction of simulation data, the local clocks of the simulation nodes are calibrated again to obtain a new system synchronization time base, including: When there is high-speed relative motion between the simulated nodes, the Doppler frequency shift in the received signal is obtained, the relative radial velocity between each simulated node is calculated based on the Doppler frequency shift, and the clock deviation is compensated according to the relative radial velocity to obtain the clock deviation after motion compensation. Historical clock deviation data within multiple synchronization cycles is acquired. A batch estimation algorithm is used to extract features from the historical clock deviation data within multiple synchronization cycles to obtain unequal response delay feature values. The clock deviation is then compensated based on the unequal response delay feature values ​​to obtain the clock deviation after unequal response delay compensation. The clock deviation after motion compensation and the clock deviation after unequal response delay compensation are input into the Kalman filter to denoise the clock deviation after motion compensation and the clock deviation after unequal response delay compensation, and the first prediction residual is obtained. The first prediction residual, the current signal-to-noise ratio, and the non-equal response delay feature value are input into the pre-trained clock correction model to obtain the final clock correction amount. Based on the final clock correction, the local clocks of the simulation nodes are uniformly calibrated to obtain a new system synchronization time reference.

5. The clock-triggered distributed simulation method according to claim 4, characterized in that, A unified clock correction is performed on the local clocks of the simulation nodes based on the final clock correction amount, including: Obtain the current absolute time value of the simulated nodes of the Global Navigation Satellite System. At the beginning of each correction cycle, encapsulate the current absolute time value into a time synchronization frame, use the time synchronization frame as the absolute time reference, and send the absolute time reference to all simulation nodes. After receiving the absolute time reference, each simulation node calculates the difference between the local system synchronization time reference and the absolute time reference, and uses the difference as the global drift amount. Each simulation node inputs the global drift into a Kalman filter to perform overall correction of the local system's synchronization time base.

6. The clock-triggered distributed simulation method according to claim 4, characterized in that, Historical clock deviation data within multiple synchronization cycles is acquired. A batch estimation algorithm is used to extract features from this historical clock deviation data to obtain unequal response delay feature values, including: When the simulation node is in a relatively stable operating state, the preliminary historical clock deviation data within multiple synchronization cycles is obtained, and the historical data sequence is obtained based on the preliminary historical clock deviation data. The average value of the historical data sequence is calculated, and the average value is back-calculated based on the sensitivity coefficient of the non-equal response delay according to the preset clock deviation to obtain the non-equal response delay characteristic value.

7. The clock-triggered distributed simulation method according to claim 4, characterized in that, The clock correction model is built based on a backpropagation neural network; The step of inputting the first prediction residual, the current signal-to-noise ratio, and the non-equal response delay feature value into the pre-trained clock correction model to obtain the final clock correction amount includes: inputting the previous signal-to-noise ratio and the non-equal response delay feature value into the pre-trained clock correction model to obtain the second prediction residual; The first and second prediction residuals are fused to obtain the final clock correction.

8. A clock-triggered distributed simulation system for implementing the method according to any one of claims 1 to 7, characterized in that, include: The clock convergence module is used to execute a fault-tolerant clock synchronization algorithm among multiple simulation nodes based on the interactive synchronization protocol frame, so that the local clock of each simulation node converges to a globally unified system synchronization time reference. The simulation nodes include global navigation satellite system simulation nodes. The data interaction module is used to allocate exclusive data transmission time slots to each simulation node according to the preset simulation task scheduling table. Each simulation node interacts with simulation data according to the allocated exclusive data transmission time slots within the system synchronization time base. The clock correction module is used to perform unified clock correction on the local clocks of the simulation nodes again during the interaction of simulation data, so as to obtain a new system synchronization time base, so that each simulation node follows the new system synchronization time base and completes the distributed simulation.

9. A computer device, characterized in that, The device includes a memory, a processor, and a transceiver that are sequentially and communicatively connected. The memory is used to store a computer program, the transceiver is used to send and receive messages, and the processor is used to read the computer program and execute the clock-triggered distributed simulation method as described in any one of claims 1 to 7.

10. A computer program product, comprising a computer program or instructions, characterized in that, When the computer program or the instructions are executed by the computer, they implement the clock-triggered distributed simulation method as described in any one of claims 1 to 7.

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