Memory testing method, memory testing device and memory testing system

Abstract

The application provides a memory test method, a memory test device and a memory test system, and relates to the technical field of memories. The memory test method comprises the following steps: performing eye diagram test on a target memory in a memory module according to a preset first influence parameter, and determining a first target influence parameter in the first influence parameter, wherein the first influence parameter is used for representing a write driving capability; performing eye diagram test on the target memory according to the first target influence parameter and at least one type of influence parameter, and determining a plurality of eye diagrams, wherein the at least one type of influence parameter is used for representing a write parameter of a memory column in the target memory; performing stress test on the eye diagrams, and determining a target eye diagram from the plurality of eye diagrams; and generating an eye diagram template according to the target eye diagram, wherein the eye diagram template is used for performing evaluation test on any memory in the memory module. Based on the eye diagram template, any memory under a new influence parameter can be evaluated, the test amount is reduced, and the requirement for an instrument device and the cost are low.

Description

Technical Field

[0001] This application relates to the field of memory technology, and more specifically, to a memory testing method, a memory testing device, and a memory testing system. Background Technology

[0002] With the continuous advancement of technology, various digital products are being used more and more widely in all aspects of daily life, and the requirements for memory stability are also getting higher and higher. OEMs often need to ensure memory design and stability as much as possible during the R&D stage to avoid unsolvable memory after-sales problems during mass production and delivery, which would require hardware design changes, affect the product image, and increase costs.

[0003] In related technologies, extensive signal quality testing and stress testing are used as the criteria for determining whether memory passes. However, these extensive tests have high requirements for equipment and are costly, presenting significant limitations. Summary of the Invention

[0004] The purpose of this application is to provide a memory testing method, a memory testing device, and a memory testing system to address the shortcomings of the prior art and solve the aforementioned technical problems.

[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of this application are as follows: In a first aspect, embodiments of this application provide a memory testing method applied to a central processing unit (CPU) in a memory testing system. The memory testing system further includes a memory module, the CPU and the memory module being connected. The method includes: Based on the preset first influence parameter, an eye diagram test is performed on the target memory in the memory module to determine the first target influence parameter in the first influence parameter, wherein the first influence parameter is used to characterize the write drive capability; Based on the first target influence parameter and at least one preset type of influence parameter, an eye diagram test is performed on the target memory to determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; The eye diagrams are subjected to stress testing to determine the target eye diagram from among the multiple eye diagrams; Based on the target eye diagram, an eye diagram template is generated, wherein the eye diagram template is used to evaluate and test any memory in the memory module.

[0006] Optionally, the at least one type of influence parameter includes: a second influence parameter and a third influence parameter; the step of performing eye diagram testing on the target memory based on the first target influence parameter and the preset at least one type of influence parameter to determine multiple eye diagrams includes: Based on the combination of the first target influence parameter and the second influence parameter, an eye diagram test is performed on the target memory to determine the first influence parameter set; the first influence parameter set is a partial combination of the first target influence parameter and the second influence parameter, and the second influence parameter is used to characterize the write parameters of the target memory column in the target memory, or the parameters of the central processing unit; Based on the first set of influencing parameters and the third set of influencing parameters, an eye diagram test is performed on the target memory to determine a second set of influencing parameters and a plurality of corresponding eye diagrams. The second set of influencing parameters is a partial combination of the first set of influencing parameters and the third set of influencing parameters. The third set of influencing parameters is used to characterize the parameters of the remaining memory columns in the target memory other than the target memory column.

[0007] Optionally, the step of performing eye diagram testing on the target memory based on the first set of influence parameters and the third set of influence parameters to determine multiple eye diagrams includes: Iterate through the combination of each influence parameter in the first set of influence parameters and the third set of influence parameters, and perform eye diagram testing on the target memory until a preset termination condition is met, to obtain the second set of influence parameters and the corresponding multiple eye diagrams; The second set of influence parameters includes a combination of the first set of influence parameters and the third set of influence parameters before the preset termination condition is met.

[0008] Optionally, the step of performing an eye diagram test on the target memory based on the combination of the first target influence parameter and the second influence parameter to determine the first influence parameter set includes: Iterate through the combinations of each influence parameter in the first target influence parameter and the second influence parameter, perform eye diagram testing on the target memory until a preset termination condition is met, and obtain the first influence parameter set. The first set of influence parameters includes a combination of the first target influence parameter and the second influence parameter before the preset termination condition is met.

[0009] Optionally, the step of stress testing the eye diagrams to determine the target eye diagram from among the multiple eye diagrams includes: From the multiple eye charts, the first eye chart with the smallest eye height and eye width is determined for stress testing, and the stress test results are obtained. If the stress test result indicates that the stress test has failed, then the second eye diagram with the smallest eye height and eye width is determined from the remaining eye diagrams and subjected to stress test until the stress test is passed, and the target eye diagram is obtained. The remaining eye diagrams are eye diagrams other than the first eye diagram among the multiple eye diagrams.

[0010] Optionally, generating an eye diagram template based on the target eye diagram includes: The eye diagram template is generated based on the target eye diagram and the preset unit margin.

[0011] Optionally, after generating an eye diagram template based on the target eye diagram, the method further includes: Based on the new influence parameters, an eye diagram test is performed on any memory in the memory module to obtain a new eye diagram; If the new eye diagram is larger than the eye diagram template, then the test evaluation for any memory under the new influence parameters is deemed to have passed; If the new eye diagram is smaller than the eye diagram template, then the new influence parameters are optimized according to the second set of influence parameters and the changing trends of the corresponding multiple eye diagrams.

[0012] Optionally, before performing an eye diagram test on the target memory in the memory module according to the preset first influence parameter to determine the first target influence parameter, the method further includes: Based on preset influence parameters, multiple initial eye diagrams are generated for the target memory; Based on the pass rate, eye height, and eye width of multiple initial eye diagrams, determine whether the memory testing system has any anomalies; If no anomalies are found, an eye diagram test is performed on the target memory based on the first impact parameter to determine the first target impact parameter.

[0013] Secondly, embodiments of this application also provide a memory testing apparatus, applied to a central processing unit in a memory testing system, the memory testing system further comprising: a memory module, the central processing unit and the memory module being connected, the apparatus comprising: The determination module is configured to perform eye diagram testing on target memory in the memory module according to preset first influence parameters, and determine a first target influence parameter in the first influence parameters, wherein the first influence parameter is used to characterize write drive capability; perform eye diagram testing on the target memory according to the first target influence parameter and at least one preset type of influence parameter, and determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; perform stress testing on the eye diagrams, and determine a target eye diagram from the multiple eye diagrams; A generation module is used to generate an eye diagram template based on the target eye diagram, wherein the eye diagram template is used to evaluate and test the remaining memory in the memory module.

[0014] Optionally, the at least one type of influencing parameter includes: a second influencing parameter and a third influencing parameter; the determining module is specifically used to perform an eye diagram test on the target memory based on a combination of the first target influencing parameter and the second influencing parameter to determine a first set of influencing parameters; the first set of influencing parameters is a partial combination of the first target influencing parameter and the second influencing parameter, the second influencing parameter being used to characterize the write parameters of the target memory column in the target memory, or the parameters of the central processing unit; based on the first set of influencing parameters and the third influencing parameter, an eye diagram test is performed on the target memory to determine a second set of influencing parameters and a plurality of corresponding eye diagrams, wherein the second set of influencing parameters is a partial combination of the first set of influencing parameters and the third influencing parameter, the third influencing parameter being used to characterize the parameters of the remaining memory columns in the target memory other than the target memory column.

[0015] Optionally, the determining module is specifically used to traverse the combination of each influence parameter in the first influence parameter set and the third influence parameter, perform eye diagram testing on the target memory until a preset termination condition is met, and obtain the second influence parameter set and the corresponding multiple eye diagrams; wherein, the second influence parameter set includes: the combination of the first influence parameter set and the third influence parameter before the preset termination condition is met.

[0016] Optionally, the determining module is specifically used to traverse the combinations of each influence parameter in the first target influence parameter and the second influence parameter, perform eye diagram testing on the target memory until a preset termination condition is met, and obtain the first influence parameter set; wherein, the first influence parameter set includes: the combination of the first target influence parameter and the second influence parameter before the preset termination condition is met.

[0017] Optionally, the determining module is specifically used to determine the first eye diagram with the smallest eye height and eye width from the plurality of eye diagrams and perform a stress test to obtain a stress test result; if the stress test result indicates that the stress test has failed, then determine the second eye diagram with the smallest eye height and eye width from the remaining eye diagrams and perform a stress test until the stress test is passed to obtain the target eye diagram; wherein, the remaining eye diagrams are eye diagrams other than the first eye diagram from the plurality of eye diagrams.

[0018] Optionally, the generation module is specifically used to generate the eye diagram template based on the target eye diagram and a preset unit margin.

[0019] Optionally, the device further includes: The testing module is used to perform eye diagram testing on any memory in the memory module based on the new influence parameters, and obtain a new eye diagram; An evaluation module is used to determine that the test evaluation for any memory under the new influence parameters passes if the new eye diagram is larger than the eye diagram template. The optimization module is used to optimize the new influence parameters based on the second set of influence parameters and the changing trends of the corresponding multiple eye diagrams if the new eye diagram is smaller than the eye diagram template.

[0020] Optionally, the generation module is further configured to generate multiple initial eye diagrams for the target memory based on preset influence parameters; The determining module is further configured to determine whether there is an anomaly in the memory testing system based on the pass rate, eye height, and eye width of the multiple initial eye diagrams; if there is no anomaly, then perform an eye diagram test on the target memory based on the first influence parameter to determine the first target influence parameter.

[0021] Thirdly, embodiments of this application also provide a memory testing system, including a central processing unit and a memory module, wherein the central processing unit and the memory module are connected, and the central processing unit is used to execute the memory testing method described in any of the first aspects above.

[0022] The beneficial effects of this application are as follows: This application provides a memory testing method, a memory testing apparatus, and a memory testing system. The memory testing method may include: performing eye diagram testing on a target memory in a memory module according to preset first influence parameters to determine a first target influence parameter, wherein the first influence parameter is used to characterize write drive capability; performing eye diagram testing on the target memory according to the first target influence parameter and at least one preset type of influence parameter to determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; performing stress testing on the eye diagrams to determine a target eye diagram from the multiple eye diagrams; and generating an eye diagram template based on the target eye diagram, wherein the eye diagram template is used to evaluate and test any memory in the memory module. By performing eye diagram testing on the target memory based on influence parameters to obtain multiple eye diagrams, and then performing stress testing on the eye diagrams to determine the target eye diagram, an eye diagram template is obtained. Based on this eye diagram template, any memory in the memory module under any influence parameter can be evaluated and tested, reducing the testing workload, lowering the requirements and cost of instruments and equipment, and facilitating efficient and reliable memory testing. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the structure of a memory testing system provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of a memory module provided in an embodiment of this application; Figure 3 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 1 ; Figure 4 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 2 ; Figure 5 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 3 ; Figure 6 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 4 ; Figure 7 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 5 ; Figure 8 A schematic diagram of a memory architecture provided for an embodiment of this application; Figure 9 This is a complete flowchart illustrating a memory testing method provided in an embodiment of this application. Figure 10 This is a schematic diagram of the structure of a memory testing device provided in an embodiment of this application. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of this application, but not all embodiments.

[0026] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0027] In the description of this application, it should be noted that if the terms "upper" or "lower" appear to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product is usually placed in during use, it is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0028] Furthermore, the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Additionally, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0029] It should be noted that, where there is no conflict, the features in the embodiments of this application can be combined with each other.

[0030] Figure 1 This is a schematic diagram of the structure of a memory testing system provided in an embodiment of this application, as shown below. Figure 1 As shown, the memory testing system may include a central processing unit (CPU) and a memory module, with the CPU and memory module communicating with each other. Figure 1 As shown, the memory testing system may also include a storage module and other modules, with the central processing unit communicatively connected to the storage module, other modules, and management module. In practical applications, the memory testing system can be a complete machine.

[0031] Figure 2 This is a schematic diagram of the structure of a memory module provided in an embodiment of this application, such as... Figure 2 As shown, the memory module may include a memory controller and DRAM (Dynamic Random Access Memory) chips. The memory controller and DRAM chips are communicatively connected. Of course, the memory controller may also be a component of the central processing unit; this embodiment does not impose specific limitations on this.

[0032] This application provides a memory testing method applied to the central processing unit in a memory testing system. The following is an explanation of the memory testing method provided in this application.

[0033] Figure 3 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 1 ,like Figure 3 As shown, the method may include: S101. Based on the preset first influence parameter, perform an eye diagram test on the target memory in the memory module to determine the first target influence parameter in the first influence parameter.

[0034] The first influencing parameter is used to characterize the write-driven capability. The first influencing parameter includes multiple parameters.

[0035] In some implementations, each parameter in the first influence parameter is iterated over, and an eye diagram test is performed on the target memory in the memory module according to each parameter until a preset termination condition is met, thus obtaining the first target influence parameter in the first influence parameter. Meeting the preset termination condition means that no eye diagram appears or training fails. No eye diagram means that the pass rate of the eye diagram is 0, or the eye height and eye width of the eye diagram are 0.

[0036] It should be noted that parameters already traversed in the first influencing parameters when the preset termination condition is met can be used as the first target influencing parameters. Parameters not traversed in the first influencing parameters when the preset termination condition is met are discarded. For example, the first influencing parameters may include multiple parameters such as a1, a2, a3, a4, and a5. If the preset termination condition is met when traversing to a4, then a1, a2, a3, and a4 can be used as the first target influencing parameters.

[0037] In this embodiment, if the write direction of the memory module is tested, the first influencing parameter is used to characterize the write drive capability of the central processing unit; if the read direction of the memory module is tested, the first influencing parameter is used to characterize the write drive capability of the memory module. Tests can be performed on the write direction and / or the read direction of the memory module.

[0038] S102. Based on the first target influence parameter and at least one preset type of influence parameter, perform eye diagram testing on the target memory to determine multiple eye diagrams.

[0039] Among them, at least one type of influencing parameter is used to characterize the write parameters of the memory column in the target memory. The memory column can also be called a Rank, which is a set of DRAM chips on the target memory.

[0040] In some implementations, the system iterates through combinations of the first target influence parameter and at least one preset type of influence parameter, and sequentially performs eye diagram tests on the target memory based on the iterated combinations until a preset termination condition is met, resulting in multiple generated eye diagrams. Meeting the preset termination condition means that the eye height or eye width of an eye diagram is 0, there is no eye diagram, or training has failed; the absence of an eye diagram refers to an eye diagram pass rate of 0.

[0041] It is worth noting that the target memory can be the worst memory at the farthest end of the memory module. The worst memory at the farthest end refers to the memory in the memory module that is physically furthest from the central processing unit.

[0042] S103. Perform stress testing on the eye diagrams to determine the target eye diagram from multiple eye diagrams.

[0043] In this embodiment of the application, a preset stress test rule is adopted, and a stress test is performed based on multiple eye diagrams. The smallest eye diagram that can pass the stress test is determined from the multiple eye diagrams, and the smallest eye diagram that passes the stress test is used as the target eye diagram.

[0044] S104. Generate an eye diagram template based on the target eye diagram.

[0045] The eye diagram template is used to evaluate and test any memory in the memory module.

[0046] In practical applications, during evaluation testing, a new eye diagram is generated for any memory in the memory module based on the new influence parameters. By comparing this new eye diagram with the eye diagram template, it can be determined whether the evaluation test for any memory in the memory module passes under the new influence parameters.

[0047] It should be noted that the new impact parameters can be set based on actual design requirements. Based on this eye diagram template, any memory in the memory module can be tested and evaluated under the new impact parameters of any design.

[0048] In this embodiment, the eye diagram can be used to evaluate digital signal quality. The wider the eye is open, the better the signal quality; conversely, a narrowed eye (either horizontally or vertically) indicates poor signal quality. The eye diagram template represents the smallest eye diagram that can pass the stress test, i.e., the case with the worst signal quality that still passes the stress test. During the evaluation test, if a new eye diagram is larger than the template, it indicates that the new eye diagram can also pass the stress test.

[0049] In summary, this application provides a memory testing method, which may include: performing eye diagram testing on target memory in a memory module according to preset first influence parameters to determine a first target influence parameter, wherein the first influence parameter is used to characterize write drive capability; performing eye diagram testing on target memory according to the first target influence parameter and at least one preset type of influence parameter to determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; performing stress testing on the eye diagrams to determine a target eye diagram from the multiple eye diagrams; and generating an eye diagram template based on the target eye diagram, wherein the eye diagram template is used to evaluate and test any memory in the memory module. By performing eye diagram testing on target memory based on influence parameters to obtain multiple eye diagrams, and then performing stress testing on the eye diagrams to determine the target eye diagram, an eye diagram template is obtained. Based on this eye diagram template, any memory in the memory module under any influence parameter can be evaluated and tested, reducing the testing workload, lowering the requirements for equipment and cost, and facilitating efficient and reliable memory testing.

[0050] Optionally, at least one type of influencing parameter includes: a second influencing parameter and a third influencing parameter. Figure 4 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 2 ,like Figure 4 As shown, the process of performing eye diagram testing on the target memory based on the first target influence parameter and at least one preset type of influence parameter in S102 to determine multiple eye diagrams may include: S201. Based on the combination of the first target influence parameter and the second influence parameter, perform an eye diagram test on the target memory to determine the first influence parameter set.

[0051] The first set of influencing parameters is a partial combination of the first target influencing parameters and the second influencing parameters. The second influencing parameters are used to characterize the write parameters of the target memory column in the target memory, or the parameters of the central processing unit.

[0052] In this embodiment of the application, if the write direction of the memory module is tested, the second influencing parameter is used to characterize the write parameters of the target memory column in the target memory; if the read direction of the memory module is tested, the second influencing parameter is used to characterize the parameters of the central processing unit.

[0053] S202. Based on the first set of influencing parameters and the third set of influencing parameters, perform eye diagram testing on the target memory to determine the second set of influencing parameters and the corresponding multiple eye diagrams.

[0054] The second set of influencing parameters is a partial combination of the first set of influencing parameters and the third set of influencing parameters. The third set of influencing parameters is used to characterize the parameters of the remaining memory columns in the target memory, excluding the target memory column.

[0055] It should be noted that if the write direction of the memory module is being tested, the third influencing parameter is used to characterize the write parameters of the memory columns other than the target memory column in the target memory; if the read direction of the memory module is being tested, the third influencing parameter is used to characterize the read parameters of the memory columns other than the target memory column in the target memory.

[0056] Among them, the target memory column can be called the target Rank, and the other memory columns in the target memory besides the target memory column can be called the non-target Rank.

[0057] In practical applications, if testing the write direction of a memory module, the CPU's write drive capability should be configured before executing the memory test method. A resistor should be connected to the write termination of the target memory column, and resistors should be connected to the write termination of the remaining memory columns. Similarly, if testing the read direction of a memory module, the target memory's write drive capability should be configured before executing the memory test method. A resistor should be connected to the CPU, and resistors should be connected to the read termination of the remaining memory columns.

[0058] Optionally, the process in S201 above of performing an eye diagram test on the target memory based on the combination of the first target influence parameter and the second influence parameter to determine the first influence parameter set may include: Iterate through the combinations of each influencing parameter in the first and second target influencing parameters, perform eye diagram testing on the target memory, until the preset termination condition is met, and obtain the first influencing parameter set; The first set of influencing parameters includes a combination of the first target influencing parameters and the second influencing parameters before the preset termination conditions are met.

[0059] In some implementations, the parameters in the first target influence parameters and the parameters in the second influence parameters are combined to obtain multiple first combinations. These first combinations are traversed until a preset termination condition is met, that is, until an eyeless diagram or training failure occurs, to obtain the first influence parameter set.

[0060] It should be noted that the first combination that has been traversed before the preset termination condition is met can be used as the first set of influencing parameters. The first combination that has been traversed when the preset termination condition is met, as well as the first combination that has not been traversed, are discarded.

[0061] For example, the first target influence parameters may include: a1, a2, a3, a4, and the second influence parameters may include: b1, b2. Multiple first combinations include: a1, b1; a2, b1; a3, b1; a4, b1; a1, b2; a2, b2; a3, b2; a4, b2. If a combination satisfying a preset termination condition is encountered, the untraced combinations of the first target influence parameters and the second influence parameters are discarded. For example, if a3, b1 and a2, b2 satisfy the preset termination condition, then the first influence parameter set includes: a1, b1; a2, b1; a1, b2, and a3, b1; a4, b1; a2, b2; a3, b2; a4, b2 are discarded.

[0062] The process of determining multiple eye diagrams by performing eye diagram testing on the target memory based on the first set of influence parameters and the third set of influence parameters in S202 above may include: Iterate through the combination of each influencing parameter in the first and third influencing parameter sets, perform eye diagram tests on the target memory until the preset termination condition is met, and obtain the second influencing parameter set and the corresponding multiple eye diagrams.

[0063] The second set of influence parameters includes a combination of the first set of influence parameters and the third set of influence parameters before the preset termination conditions are met.

[0064] In some implementations, the parameters in the first set of influencing parameters and the parameters in the third set of influencing parameters are combined to obtain multiple second combinations. These second combinations are iterated until a preset termination condition is met, that is, until no eye diagram appears or training fails, to obtain the second set of influencing parameters and the corresponding multiple eye diagrams.

[0065] It should be noted that the second combination that has been traversed before the preset termination condition is met can be used as the first set of influencing parameters. The second combination that has been traversed when the preset termination condition is met, as well as the second combination that has not been traversed, are discarded.

[0066] For example, the first set of influencing parameters may include: a1, b1; a2, b1; a1, b2; a2, b2, and the third set of influencing parameters may include: c1, c2. Multiple second combinations include: a1, b1, c1; a2, b1, c1; a1, b2, c1; a2, b2, c1; a1, b1, c2; a2, b1, c2; a1, b2, c2; a2, b2, c2. If a combination that satisfies a preset termination condition is encountered during traversal, the first set of target influence parameters and the third set of influence parameters that were not traversed are discarded. For example, if a1, b2, c1 and a2, b1, c2 satisfy the preset termination condition, then the second set of influence parameters includes: a1, b1, c1; a2, b1, c1; a1, b1, c2, and the following combinations are discarded: a1, b2, c1; a2, b2, c1; a2, b1, c2; a1, b2, c2; a2, b2, c2.

[0067] Figure 5 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 3 ,like Figure 5 As shown, stress testing is performed on the eye diagrams to determine the target eye diagram from multiple eye diagrams, including: S301. Determine the first eye diagram with the smallest eye height and eye width from multiple eye diagrams, perform a stress test, and obtain the stress test results.

[0068] In some implementations, a stress test is performed on the first eye diagram with the lowest pass rates for eye height and eye width from multiple eye diagrams to obtain the stress test result. This stress test result is used to characterize whether the stress test was successful or failed.

[0069] Among them, the first eye map with the lowest pass rate for eye height and eye width among multiple eye maps is used to characterize the poor performance of the target in the second set of influence parameters corresponding to the first eye map.

[0070] S302. If the stress test result indicates that the stress test has failed, then determine the second eye diagram with the smallest eye height and eye width from the remaining eye diagrams and perform the stress test until the stress test is passed and the target eye diagram is obtained.

[0071] The remaining eye diagrams are the eye diagrams other than the first eye diagram among the multiple eye diagrams.

[0072] In this embodiment of the application, if the stress test result indicates that the stress test has failed, an eye diagram slightly larger than the first eye diagram is selected from among the multiple eye diagrams and used as the second eye diagram for testing. That is, the second eye diagram with the smallest pass rate of eye height and eye width is selected from the remaining eye diagrams and subjected to stress test. This process is repeated until the smallest eye diagram that passes the stress test among the multiple eye diagrams is found, and the target eye diagram is obtained.

[0073] Optionally, the process of generating an eye diagram template based on the target eye diagram in S104 above may include: generating an eye diagram template based on the target eye diagram and a preset unit margin.

[0074] It should be noted that, in order to reduce the impact of errors, a preset unit margin is reserved for the eye height and eye width of the target eye diagram to obtain the eye diagram template.

[0075] In practical applications, eye diagram templates can provide signal quality references for subsequent new hardware designs or memory module replacements.

[0076] Optionally, Figure 6 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 4 ,like Figure 6 As shown, after the process of generating an eye diagram template based on the target eye diagram in S104 above, the method may further include: S401. Based on the new influence parameters, perform an eye diagram test on any memory in the memory module to obtain a new eye diagram.

[0077] In this context, any memory within a memory module can be either the target memory within the memory module or other memory other than the target memory.

[0078] In addition, the new influencing parameters may include: multiple new types of influencing parameters. If testing the write direction of the memory module, these include: new write drive capabilities at the CPU level, new write parameters for the target memory column, and new write parameters for the remaining memory columns in the target memory. If testing the read direction of the memory module, these include: new write drive capabilities at the memory module level, new parameters for the target CPU, and new read parameters for the remaining memory columns in the target memory.

[0079] S402. If the new eye diagram is larger than the eye diagram template, then the test evaluation for any memory under the new influence parameters is deemed to have passed.

[0080] The eye diagram template represents the smallest eye diagram that can pass the stress test, i.e., the case with the worst signal quality that still passes the stress test. If the new eye diagram is larger than the eye diagram template, it means that the new eye diagram can also pass the stress test and pass the test evaluation for any memory under the new influence parameters.

[0081] S403. If the new eye diagram is smaller than the eye diagram template, then the new influence parameters are optimized according to the second set of influence parameters and the changing trends of the corresponding multiple eye diagrams.

[0082] It should be noted that if the new eye diagram is smaller than the eye diagram template, it means the new eye diagram fails the stress test, and the test evaluation for any memory location under the new influence parameters fails. Therefore, the new influence parameters need to be optimized. The new influence parameters are adjusted based on the combinations in the second set of influence parameters and the changing trends of the corresponding generated eye diagrams.

[0083] In summary, eye diagram templates can quickly and accurately determine whether the test evaluation of any memory in a memory module passes under new influencing parameters. They have low requirements for equipment and cost, few limitations, and can be widely used.

[0084] Optionally, Figure 7 A flowchart illustrating a memory testing method provided in this application embodiment. Figure 5 ,like Figure 7 As shown, before the process of performing an eye diagram test on the target memory in the memory module according to the preset first influence parameter in S101 above, and determining the first target influence parameter in the first influence parameter, the method may further include: S501. Generate multiple initial eye diagrams for the target memory based on preset influence parameters.

[0085] First, the memory module is trained, and then multiple initial eye diagrams are generated for the target memory based on preset influence parameters.

[0086] In this embodiment, if the write direction of the memory module is tested, the preset influencing parameters include: the preset write drive capability of the central processing unit, the preset write parameters of the target memory column in the target memory, and the preset write parameters of the remaining memory columns in the target memory other than the target memory column. If the read direction of the memory module is tested, the new influencing parameters include: the preset write drive capability of the memory module, the preset parameters of the target central processing unit, and the preset read parameters of the remaining memory columns in the target memory other than the target memory column.

[0087] S502. Based on the pass rate, eye height, and eye width of multiple initial eye diagrams, determine whether there are any anomalies in the memory testing system.

[0088] Specifically, based on the pass rate, eye height, and eye width of multiple initial eye diagrams, it is determined whether there are any abnormalities in the software and hardware of the memory testing system.

[0089] S503. If no abnormality is found, perform an eye diagram test on the target memory based on the first influencing parameter to determine the first target influencing parameter.

[0090] It should be noted that the process of S503 is similar to that of S101 above, and will not be repeated here.

[0091] Figure 8This application provides a schematic diagram of a memory architecture, as shown in the embodiment. Figure 8 As shown, the memory includes multiple Ranks ( Figure 8 Taking two Ranks as an example, each Rank corresponds to multiple Slices (Slice0 to Slice7 in the figure), and each Slice corresponds to multiple Dqs (Dq0 to Dq7 in the figure).

[0092] Here, Rank refers to a set of DRAM chips, Slice refers to a slice within the memory controller, DQ refers to the physical pins / channels for data transmission between the DRAM chips and the memory controller, and Slice is a set of DQs.

[0093] In some implementations, at least one level can be selected from Rank, Slice, and Dq according to actual time and accuracy requirements, and the memory testing method provided in the embodiments of this application can be executed respectively, thereby obtaining an eye diagram template of at least one level selected from Rank, Slice, and Dq.

[0094] In other implementations, a memory testing method can be performed at the Rank level to determine the worst Rank level from multiple Rank levels, i.e., the Rank level with the smallest target eye diagram among the multiple Rank levels. Then, among the multiple Slice levels corresponding to the worst Rank level, the worst Slice level is found, i.e., the Slice level with the smallest target eye diagram among the multiple Slice levels. Subsequently, among the multiple Dq levels corresponding to the worst Slice level, the worst Dq level is determined, i.e., the Dq level with the smallest target eye diagram among the multiple Dq levels. The final eye diagram template is determined based on the target eye diagram of the worst Dq level.

[0095] In practical applications, based on the new influencing parameters, an eye diagram test is performed on any memory module to obtain a new eye diagram. If the new eye diagram is smaller than the eye diagram template, the new influencing parameters of the current motherboard are optimized based on the combination of influencing parameters recorded when different levels of eye diagram templates are formulated and the corresponding eye diagram change trends.

[0096] Figure 9 This is a complete flowchart illustrating a memory testing method provided in an embodiment of this application, as shown below. Figure 9As shown, multiple initial eye diagrams are generated. Based on these initial eye diagrams, it is determined whether there are any anomalies in the memory testing system. If an anomaly is found, the process ends. If no anomaly is found, the first target influencing parameter is determined, followed by the first influencing parameter set, and then the second influencing parameter set and the corresponding multiple eye diagrams are determined. The multiple eye diagrams are compared to find the smallest first eye diagram. A stress test is performed on the first eye diagram to obtain the stress test result. If the stress test result indicates that the stress test has failed, the current combination of influencing parameters and the eye diagram are excluded until the smallest eye diagram that passes the stress test is determined, and then the eye diagram template can be determined.

[0097] In summary, the embodiments of this application provide a memory testing method that uses an eye diagram template to replace signal quality testing as the basis for judging memory stability. If the new eye diagram is smaller than the eye diagram template, the new influence parameters are optimized according to the second set of influence parameters and the changing trends of the corresponding multiple eye diagrams. This can solve some situations where there are no conditions to conduct signal quality testing in a professional laboratory, while reducing the testing and R&D costs, eliminating the need to add peripheral hardware, and making the software highly operable.

[0098] The memory testing apparatus and storage medium used to execute the memory testing method provided in this application will be described below. For the specific implementation process and technical effects, please refer to the relevant content of the memory testing method above, which will not be repeated below.

[0099] Figure 10 This is a schematic diagram of the structure of a memory testing device provided in an embodiment of this application, as shown below. Figure 10 As shown, this memory testing device is applied to the central processing unit (CPU) of a memory testing system. The memory testing system also includes a memory module, and the CPU and the memory module are connected. The device includes: The determination module 101 is configured to perform eye diagram testing on the target memory in the memory module according to a preset first influence parameter, and determine a first target influence parameter in the first influence parameter, wherein the first influence parameter is used to characterize write drive capability; perform eye diagram testing on the target memory according to the first target influence parameter and at least one preset type of influence parameter, and determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; perform stress testing on the eye diagrams, and determine a target eye diagram from the multiple eye diagrams; The generation module 102 is used to generate an eye diagram template based on the target eye diagram, wherein the eye diagram template is used to evaluate and test the remaining memory in the memory module.

[0100] Optionally, the at least one type of influencing parameter includes: a second influencing parameter and a third influencing parameter; the determining module 101 is specifically used to perform an eye diagram test on the target memory based on the combination of the first target influencing parameter and the second influencing parameter to determine a first set of influencing parameters; the first set of influencing parameters is a partial combination of the first target influencing parameter and the second influencing parameter, the second influencing parameter being used to characterize the write parameters of the target memory column in the target memory, or the parameters of the central processing unit; based on the first set of influencing parameters and the third influencing parameter, an eye diagram test is performed on the target memory to determine a second set of influencing parameters and a plurality of corresponding eye diagrams, wherein the second set of influencing parameters is a partial combination of the first set of influencing parameters and the third influencing parameter, the third influencing parameter being used to characterize the parameters of the remaining memory columns in the target memory other than the target memory column.

[0101] Optionally, the determining module 101 is specifically used to traverse the combination of each influence parameter in the first influence parameter set and the third influence parameter, perform eye diagram testing on the target memory until a preset termination condition is met, and obtain the second influence parameter set and the corresponding multiple eye diagrams; wherein, the second influence parameter set includes: the combination of the first influence parameter set and the third influence parameter before the preset termination condition is met.

[0102] Optionally, the determining module 101 is specifically used to traverse the combinations of each influence parameter in the first target influence parameter and the second influence parameter, perform eye diagram testing on the target memory until a preset termination condition is met, and obtain the first influence parameter set; wherein, the first influence parameter set includes: the combination of the first target influence parameter and the second influence parameter before the preset termination condition is met.

[0103] Optionally, the determining module 101 is specifically used to determine the first eye diagram with the smallest eye height and eye width from the plurality of eye diagrams and perform a stress test to obtain a stress test result; if the stress test result indicates that the stress test has failed, then determine the second eye diagram with the smallest eye height and eye width from the remaining eye diagrams and perform a stress test until the stress test is passed to obtain the target eye diagram; wherein, the remaining eye diagrams are eye diagrams other than the first eye diagram from the plurality of eye diagrams.

[0104] Optionally, the generation module is specifically used to generate the eye diagram template based on the target eye diagram and a preset unit margin.

[0105] Optionally, the device further includes: The testing module is used to perform eye diagram testing on any memory in the memory module based on the new influence parameters, and obtain a new eye diagram; An evaluation module is used to determine that the test evaluation for any memory under the new influence parameters passes if the new eye diagram is larger than the eye diagram template. The optimization module is used to optimize the new influence parameters based on the second set of influence parameters and the changing trends of the corresponding multiple eye diagrams if the new eye diagram is smaller than the eye diagram template.

[0106] Optionally, the generation module 102 is further configured to generate multiple initial eye diagrams for the target memory according to preset influence parameters; The determining module 101 is further configured to determine whether there is an anomaly in the memory testing system based on the pass rate, eye height, and eye width of the multiple initial eye diagrams; if there is no anomaly, then perform an eye diagram test on the target memory based on the first influence parameter to determine the first target influence parameter.

[0107] The above-described device is used to execute the method provided in the foregoing embodiments, and its implementation principle and technical effect are similar, so they will not be described again here.

[0108] These modules can be one or more integrated circuits configured to implement the above methods, such as one or more Application Specific Integrated Circuits (ASICs), one or more digital signal processors (DSPs), or one or more Field Programmable Gate Arrays (FPGAs). Alternatively, when a module is implemented using processing element scheduler code, the processing element can be a general-purpose processor, such as a Central Processing Unit (CPU) or other processor capable of calling program code. Furthermore, these modules can be integrated together as a system-on-a-chip (SOC).

[0109] Optionally, this application also provides a program product, such as a computer-readable storage medium, including a program that, when executed by a processor, performs the above-described method embodiments.

[0110] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0111] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0112] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or in a combination of hardware and software functional units.

[0113] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute some steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0114] The above are merely preferred embodiments of this application and are not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A memory testing method, characterized in that, A central processing unit (CPU) is used in a memory testing system, the memory testing system further comprising: a memory module, the CPU and the memory module being connected, the method comprising: Based on the preset first influence parameter, an eye diagram test is performed on the target memory in the memory module to determine the first target influence parameter in the first influence parameter, wherein the first influence parameter is used to characterize the write drive capability; Based on the first target influence parameter and at least one preset type of influence parameter, an eye diagram test is performed on the target memory to determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; The eye diagrams are subjected to stress testing to determine the target eye diagram from among the multiple eye diagrams; Based on the target eye diagram, an eye diagram template is generated, wherein the eye diagram template is used to evaluate and test any memory in the memory module.

2. The method according to claim 1, characterized in that, The at least one type of influence parameter includes: a second influence parameter and a third influence parameter; the step of performing eye diagram testing on the target memory based on the first target influence parameter and the preset at least one type of influence parameter to determine multiple eye diagrams includes: Based on the combination of the first target influence parameter and the second influence parameter, an eye diagram test is performed on the target memory to determine the first influence parameter set; the first influence parameter set is a partial combination of the first target influence parameter and the second influence parameter, and the second influence parameter is used to characterize the write parameters of the target memory column in the target memory, or the parameters of the central processing unit; Based on the first set of influencing parameters and the third set of influencing parameters, an eye diagram test is performed on the target memory to determine a second set of influencing parameters and a plurality of corresponding eye diagrams. The second set of influencing parameters is a partial combination of the first set of influencing parameters and the third set of influencing parameters. The third set of influencing parameters is used to characterize the parameters of the remaining memory columns in the target memory other than the target memory column.

3. The method according to claim 2, characterized in that, The step of performing eye diagram testing on the target memory based on the first set of influence parameters and the third set of influence parameters to determine multiple eye diagrams includes: Iterate through the combination of each influence parameter in the first set of influence parameters and the third set of influence parameters, and perform eye diagram testing on the target memory until a preset termination condition is met, to obtain the second set of influence parameters and the corresponding multiple eye diagrams; The second set of influence parameters includes a combination of the first set of influence parameters and the third set of influence parameters before the preset termination condition is met.

4. The method according to claim 2, characterized in that, The step of performing an eye diagram test on the target memory based on the combination of the first target influence parameter and the second influence parameter to determine the first influence parameter set includes: Iterate through the combinations of each influence parameter in the first target influence parameter and the second influence parameter, perform eye diagram testing on the target memory until a preset termination condition is met, and obtain the first influence parameter set. The first set of influence parameters includes a combination of the first target influence parameter and the second influence parameter before the preset termination condition is met.

5. The method according to claim 1, characterized in that, The stress test on the eye diagram, determining the target eye diagram from multiple eye diagrams, includes: From the multiple eye charts, the first eye chart with the smallest eye height and eye width is determined for stress testing, and the stress test results are obtained. If the stress test result indicates that the stress test has failed, then the second eye diagram with the smallest eye height and eye width is determined from the remaining eye diagrams and subjected to stress test until the stress test is passed, and the target eye diagram is obtained. The remaining eye diagrams are eye diagrams other than the first eye diagram among the multiple eye diagrams.

6. The method according to claim 1, characterized in that, The step of generating an eye diagram template based on the target eye diagram includes: The eye diagram template is generated based on the target eye diagram and the preset unit margin.

7. The method according to claim 3, characterized in that, After generating an eye diagram template based on the target eye diagram, the method further includes: Based on the new influence parameters, an eye diagram test is performed on any memory in the memory module to obtain a new eye diagram; If the new eye diagram is larger than the eye diagram template, then the test evaluation for any memory under the new influence parameters is deemed to have passed; If the new eye diagram is smaller than the eye diagram template, then the new influence parameters are optimized according to the second set of influence parameters and the changing trends of the corresponding multiple eye diagrams.

8. The method according to claim 1, characterized in that, Before performing an eye diagram test on the target memory in the memory module according to the preset first influence parameter to determine the first target influence parameter, the method further includes: Based on preset influence parameters, multiple initial eye diagrams are generated for the target memory; Based on the pass rate, eye height, and eye width of multiple initial eye diagrams, determine whether the memory testing system has any anomalies; If no anomalies are found, an eye diagram test is performed on the target memory based on the first impact parameter to determine the first target impact parameter.

9. A memory testing device, characterized in that, A central processing unit (CPU) is used in a memory testing system, the memory testing system further comprising: a memory module, the CPU and the memory module being connected, the device comprising: The determination module is configured to perform eye diagram testing on target memory in the memory module according to preset first influence parameters, and determine a first target influence parameter in the first influence parameters, wherein the first influence parameter is used to characterize write drive capability; perform eye diagram testing on the target memory according to the first target influence parameter and at least one preset type of influence parameter, and determine multiple eye diagrams, wherein the at least one type of influence parameter is used to characterize the write parameters of memory columns in the target memory; perform stress testing on the eye diagrams, and determine a target eye diagram from the multiple eye diagrams; A generation module is used to generate an eye diagram template based on the target eye diagram, wherein the eye diagram template is used to evaluate and test the remaining memory in the memory module.

10. A memory testing system, characterized in that, It includes a central processing unit and a memory module, the central processing unit and the memory module being connected, the central processing unit being used to execute the memory testing method according to any one of claims 1-8.

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