Method, apparatus, device, storage medium and program product for data processing

Abstract

Embodiments of the present disclosure relate to a method, apparatus, device, storage medium and program product for data processing. The method proposed herein comprises: generating a first random number in response to first data received in a first period being of a predetermined type; determining a comparison result based on a comparison of the first random number and a first threshold value, the first threshold value being determined based on a data type distribution in a plurality of historical periods; in response to the comparison result satisfying a preset condition, replacing the first data with placeholder data and generating a control flag corresponding to the placeholder data; performing a predetermined operation using the placeholder data to obtain a first operation result; and outputting a second operation result for the first data based on the control flag, the second operation result being irrelevant to the first operation result.

Description

Technical Field

[0001] The exemplary embodiments disclosed herein generally relate to the field of computers, and particularly to methods, apparatuses, devices, storage media, and program products for data processing. Background Technology

[0002] With the development of computer technology, the requirements for computing power and energy efficiency in various high-performance computing systems are constantly increasing. For example, power supply noise caused by current change rate is becoming increasingly prominent, and has become a key factor affecting system performance and reliability. Therefore, how to stabilize power consumption, reduce unnecessary energy waste, and ensure the correctness of calculation results is a problem worthy of attention. Summary of the Invention

[0003] In a first aspect of this disclosure, a data processing method is provided. The method includes: generating a first random number in response to receiving first data of a predetermined type within a first period; determining a comparison result based on a comparison between the first random number and a first threshold, the first threshold being determined based on the distribution of data types over multiple historical periods; replacing the first data with placeholder data in response to the comparison result satisfying a preset condition, and generating a control flag corresponding to the placeholder data; performing a predetermined operation using the placeholder data to obtain a first operation result; and outputting a second operation result for the first data based on the control flag, the second operation result being independent of the first operation result.

[0004] In a second aspect of this disclosure, an apparatus for data processing is provided. The apparatus includes: a generation module configured to generate a first random number in response to receiving first data of a predetermined type within a first period; a determination module configured to determine a comparison result based on a comparison of the first random number and a first threshold, wherein the first threshold is determined based on a data type distribution over multiple historical periods; a processing module configured to replace the first data with placeholder data and generate a control flag corresponding to the placeholder data in response to the comparison result satisfying a preset condition; an execution module configured to perform a predetermined operation using the placeholder data to obtain a first operation result; and an output module configured to output a second operation result for the first data based on the control flag, wherein the second operation result is independent of the first operation result.

[0005] In a third aspect of this disclosure, an electronic device is provided. The device includes at least one processor; and at least one memory coupled to the at least one processor and storing instructions for execution by the at least one processor. When executed by the at least one processor, the instructions cause the device to perform the method of the first aspect.

[0006] In a fourth aspect of this disclosure, a computer-readable storage medium is provided. The computer-readable storage medium stores computer-executable instructions that can be executed by a processor to implement the method of the first aspect.

[0007] In a fifth aspect of this disclosure, a computer program product is provided. The computer program product is tangibly stored in a computer storage medium and includes computer-executable instructions that, when executed by a device, cause the device to perform the method of the first aspect.

[0008] In this way, the embodiments of this disclosure can improve the accuracy and efficiency of power consumption control.

[0009] It should be understood that the content described in this content section is not intended to limit the key or essential features of the embodiments of this disclosure, nor is it intended to restrict the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0010] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein: Figure 1 A schematic diagram is shown of an example environment in which embodiments of the present disclosure may be implemented; Figure 2 A flowchart illustrating an example process of data processing according to some embodiments of this disclosure is shown; Figure 3 A structural block diagram of an example hardware device for data processing according to some embodiments of the present disclosure is shown; Figure 4 A schematic structural block diagram of an example apparatus for data processing according to some embodiments of the present disclosure is shown; Figure 5 A block diagram of an electronic device capable of implementing several embodiments of the present disclosure is shown. Detailed Implementation

[0011] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0012] It should be noted that the headings of any section / subsection provided herein are not limiting. Various embodiments are described throughout this document, and embodiments of any type may be included under any section / subsection. Furthermore, embodiments described in any section / subsection may be combined in any way with any other embodiments described in the same section / subsection and / or different sections / subsections.

[0013] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The term "some embodiments" should be understood as "at least some embodiments". Other explicit and implicit definitions may also be included below. The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0014] The embodiments of this disclosure may involve user data, data acquisition, and / or use. All of these aspects comply with applicable laws, regulations, and relevant provisions. In the embodiments of this disclosure, all data collection, acquisition, processing, manipulation, forwarding, and use are conducted with the user's knowledge and confirmation. Accordingly, in implementing the embodiments of this disclosure, the type, scope of use, and usage scenarios of any data or information that may be involved should be communicated to the user and their authorization obtained in accordance with relevant laws and regulations through appropriate means. The specific methods of notification and / or authorization may vary depending on the actual situation and application scenario, and the scope of this disclosure is not limited in this respect.

[0015] In this specification and the embodiments, any processing of personal information will be carried out only under the premise of legality (such as obtaining the consent of the personal information subject, or being necessary for the performance of a contract), and will only be carried out within the scope stipulated or agreed upon. A user's refusal to process personal information beyond what is necessary for basic functions will not affect the user's use of basic functions.

[0016] As discussed above, the demands for computing power and energy efficiency in various high-performance computing systems continue to increase. For example, power supply noise caused by current change rate is becoming increasingly prominent, and has become a key factor affecting system performance and reliability.

[0017] Embodiments of this disclosure propose a data processing scheme. The scheme includes: generating a first random number in response to receiving first data of a predetermined type within a first period; determining a comparison result based on a comparison between the first random number and a first threshold, wherein the first threshold is determined based on the data type distribution over multiple historical periods; replacing the first data with placeholder data in response to the comparison result satisfying a preset condition, and generating a control flag corresponding to the placeholder data; performing a predetermined operation using the placeholder data to obtain a first operation result; and outputting a second operation result for the first data based on the control flag, wherein the second operation result is independent of the first operation result.

[0018] In this way, the embodiments of this disclosure can reduce unnecessary replacement operations based on a probabilistic placeholder data injection strategy, while ensuring stable power consumption, thereby significantly reducing unnecessary power consumption and improving the accuracy and efficiency of power control.

[0019] The following section provides a detailed description of various example implementations of this scheme, with reference to the accompanying drawings.

[0020] Example environment: Figure 1 A schematic diagram of an example environment 100 in which embodiments of the present disclosure can be implemented is shown. For example... Figure 1 As shown, example environment 100 may include hardware device 110 and multiply-accumulator 120.

[0021] In this example environment 100, hardware device 110 can receive input data. Hardware device 110 is configured to determine whether the input data is of a predetermined type, and in response to the input data being of a predetermined type, to perform a placeholder data replacement operation and generate placeholder data and corresponding control flags.

[0022] The hardware device 110 can use the multiply-accumulator 120 to process the placeholder data and the corresponding control flags, and use the placeholder data to perform a predetermined operation to obtain a first operation result, and then output a second operation result for the original input data based on the control flags.

[0023] It should be understood that the structure and function of the various elements in the example environment 100 are described for illustrative purposes only and do not imply any limitation on the scope of this disclosure.

[0024] The following description will continue with reference to the accompanying drawings, which will provide some exemplary embodiments of this disclosure.

[0025] Figure 2 A flowchart of an example process 200 for data processing according to some embodiments of the present disclosure is shown. Process 200 can be implemented at hardware device 110. Reference will be made below. Figure 1Process 200 is described below. For ease of description, this disclosure will be described hereinafter with the example that process 200 is implemented at hardware device 110.

[0026] like Figure 2 As shown, in step 210, the hardware device 110 generates a first random number in response to the first data received in the first period being of a predetermined type.

[0027] In some embodiments, the hardware device 110 can acquire the input data of the multiply-accumulator in real time and determine the data type of the input data. Specifically, the hardware device 110 can acquire the input data of the multiply-accumulator in each clock cycle in real time based on the data detection module, and determine the data type of the input data in each clock cycle. In some embodiments, the input data can originate from an upstream data path.

[0028] In some embodiments, the data format of the input data may include, but is not limited to, floating-point data, fixed-point data, and integer data. It is understood that this disclosure is not intended to limit the data format of the input data.

[0029] In some embodiments, the input data may have a preset bit width, which may match the target operation bit width of the multiply-accumulator. As an example, the bit width of the input data may be determined by the data format of the upstream data path, and the multiply-accumulator may be configured with the corresponding bit width to receive the input data. For example, assuming the bit width of the input data is 8 bits, 16 bits, or 32 bits, the multiply-accumulator may be configured with a bit width of 8 bits, 16 bits, or 32 bits accordingly. It is understood that the above are merely exemplary examples of bit width, and this disclosure is not intended to limit the specific value of the bit width.

[0030] In some embodiments, such first data may be data collected in the current cycle (e.g., the first cycle) to be input to the multiply-accumulator. In response to determining that the data type of the first data is a first type, hardware device 110 may generate a first random number.

[0031] In some embodiments, such a predetermined type may include a first type, which may indicate that the value of the first data is zero. As an example, the hardware device 110 may perform bit-by-bit detection on the first data through a data detection module, and when all data bits are detected to be logic zero, it may determine that the first data belongs to the first type.

[0032] In some embodiments, such a predetermined type may include a second type, which may indicate that the first data is the same as the second data received in the second period (e.g., a constant data period), and the second period may be the period preceding the first period. As an example, the hardware device 110 may also compare the first data of the current period (e.g., the first period) with the second data of the previous period (e.g., the second period) through a data detection module. If the first data and the second data are detected to be consistent, it can be determined that the first data belongs to the second type.

[0033] Alternatively or concurrently, in response to the absence of input data within the first cycle, the hardware device 110 may use this situation as a trigger condition (e.g., a data intermittent period) alongside the first and second types to trigger the generation of a first random number. As an example, the hardware device 110 may detect transitions in the valid data signal using the data input intermittent detection function of the data detection module. When an invalid data signal is detected, it indicates that there is no valid data input in the current cycle. The hardware device 110 can then identify that the multiplier-accumulator is in a data intermittent state and trigger the generation of a first random number in response to this data intermittent state.

[0034] In this way, by classifying the data types of the input data, it is possible to effectively identify data belonging to a predetermined type, thereby providing an accurate triggering basis for subsequent probabilistic placeholder data replacement and avoiding unnecessary intervention in the normal data flow.

[0035] To improve the accuracy of data type detection, in some embodiments, the hardware device 110 can employ a hierarchical detection strategy to determine the data type of the input data. As an example, the data detection module can be configured to include two levels: a coarse detection level and a fine detection level. For instance, the coarse detection level can perform rapid batch detection on the input data of multiple multipliers at the multiplier group level to initially determine whether the input data belongs to a predetermined type. The fine detection level can perform secondary verification on the determination results of the coarse detection level at the individual multiplier level.

[0036] In some embodiments, hardware device 110 may generate a first random number in response to the first data belonging to a predetermined type (e.g., a first type and a second type). As an example, hardware device 110 may utilize a first generator to generate the first random number. In some embodiments, such a first generator may be used to generate data with random or pseudo-random characteristics.

[0037] In some embodiments, such a first generator may include, but is not limited to: a linear feedback shift register (LFSR), a hardware random number generator (HRNG), a pseudo random number generator (PRNG), and a chaotic sequence generator.

[0038] Taking a linear feedback shift register (LFSR) as an example, the first generator can be the low-order segment of the split LFSR structure. Hardware device 110 can generate a first random number based on the low-order segment of the split LFSR. For example, a 16-bit multiply-accumulator can use a combination of a 10-bit LFSR and a 6-bit LFSR, where the 6-bit LFSR serves as the low-order segment to generate a 6-bit first random number. The bit width of this first random number matches the dynamic threshold bit width (e.g., also configured as 6 bits) used for subsequent comparisons to ensure the validity of the comparison operation.

[0039] Taking a 16-bit multiply-accumulator as an example, when the data detection module detects that the input data in the current cycle is all zeros (type 1), or that the data is exactly the same as the 16-bit data in the previous cycle (type 2), the hardware device 110 can determine that the input data belongs to a predetermined type. In response to this determination, the 6-bit low-order segment in the split LFSR is triggered and a 6-bit random number (e.g., the first random number) is generated to be compared with the currently configured replacement probability threshold (e.g., an initial value of 32) to determine whether to perform placeholder data replacement.

[0040] It is understood that the above correspondence is only an illustrative example. In actual implementation, other splitting ratios may be used for the embodiments of this disclosure, as long as the bit width of the first random number is consistent with the bit width of the dynamic threshold.

[0041] In some embodiments, the data type of the first data can determine the subsequent processing flow. When the first data is determined to belong to a predetermined type (e.g., the first type or the second type) or is in a data interval period, the hardware device 110 can trigger a placeholder data replacement judgment process.

[0042] In step 220, the hardware device 110 determines the comparison result based on the comparison of a first random number and a first threshold, wherein the first threshold is determined based on the data type distribution over multiple historical periods.

[0043] In some embodiments, the hardware device 110 can determine whether the first data is replaced with placeholder data based on the comparison result of the first random number and the first threshold. In other words, the first data is only used as a judgment condition to trigger the placeholder data replacement process, and whether it ultimately enters the multiply-accumulator to participate in the operation can be determined based on the comparison result.

[0044] In this way, when the system recognizes that the input data is of a predetermined type, it does not directly perform the replacement, but first generates a random number to provide a basis for subsequent probabilistic judgment, thereby avoiding the power consumption waste caused by full replacement in traditional solutions.

[0045] In some embodiments, the hardware device 110 can determine at least one cycle within a plurality of historical cycles, wherein the input data received in such at least one cycle belongs to a predetermined type. Specifically, the hardware device 110 can detect whether the input data received in each cycle belongs to a predetermined type (including a first type or a second type) within a statistical window (e.g., 1000 clock cycles) and record the number of cycles belonging to the predetermined type.

[0046] In some embodiments, the hardware device 110 can determine the data type distribution based on the proportion of this at least one cycle among multiple historical cycles. Specifically, the hardware device 110 can determine the ratio of the number of cycles belonging to a predetermined type within a statistical window to the total number of cycles in the statistical window, which is used to characterize the distribution density of the predetermined type within the current statistical window. As an example, if the statistical window contains 1000 clock cycles, of which 150 cycles belong to the predetermined type, then the data type distribution proportion is 15%.

[0047] In this way, the hardware device 110 can obtain the distribution of the predetermined type in multiple historical periods, providing a data basis for the subsequent dynamic adjustment of the replacement probability threshold.

[0048] To adapt to the data flow characteristics in different application scenarios, the size of the statistical window can be flexibly set in some embodiments. For example, the hardware device 110 can dynamically adjust the size of the statistical window according to the rate of change of the data flow. When the data flow changes rapidly, the statistical window size is reduced, making the adjustment of the replacement probability more timely. When the data flow changes slowly, the statistical window size is increased, making the statistical results more representative.

[0049] In this way, through the adaptive window adjustment mechanism, the hardware device 110 can maintain a balance between statistical efficiency and response speed under different data flow dynamic characteristics, thereby improving the adaptability of power consumption stability control.

[0050] In some embodiments, such multiple historical periods can be a first statistical period. In some embodiments, in response to an increase in the percentage relative to a second statistical period, the hardware device 110 can raise a first threshold, whereby the second statistical period is the statistical period preceding the first statistical period. Specifically, the hardware device 110 compares the percentage of a predetermined type in the current statistical window (first statistical period) with the percentage in the previous statistical window (second statistical period): if the current percentage is higher than the previous percentage, it indicates that the density of idle states in the data stream has increased. At this time, the hardware device 110 correspondingly raises the first threshold (i.e., the replacement probability threshold) to increase the frequency of placeholder data replacement, thereby adapting to the trend of increasing idle states in the data stream.

[0051] In some embodiments, the hardware device 110 may lower a first threshold in response to a decrease in the percentage relative to the percentage in the second statistical period. Specifically, if the current percentage is lower than the previous percentage, the first threshold is lowered to reduce the frequency of placeholder data replacement.

[0052] As an example, taking the FP16 multiply-accumulator, the statistical window is set to 1000 clock cycles. Within the first statistical window, the hardware device 110 determines that the number of cycles of a predetermined type (e.g., type 1 and type 2) is 150, accounting for 15%, and the first threshold is initially set to 32. Within the second statistical window, the number of idle state cycles increases to 300, the proportion rises to 30%, and the hardware device 110 can correspondingly increase the first threshold to 54. Within the third statistical window, the number of idle state cycles decreases to 80, the proportion decreases to 8%, and the hardware device 110 correspondingly decreases the first threshold to approximately 25. Through this dynamic adjustment, the first threshold always follows the distribution proportion of the predetermined type within historical cycles, achieving an adaptive match between the replacement probability and the density of idle states in the data stream.

[0053] Through this dynamic adjustment mechanism, the first threshold can be updated in real time to follow the distribution changes of the predetermined type in the data stream, realizing dynamic matching between the replacement strategy and the data stream status.

[0054] To further improve the timeliness of power consumption stability, in some embodiments, in addition to determining the number of cycles of a predetermined type within the statistical window, the hardware device 110 can also add statistics on the number of cycles in which the predetermined type appears consecutively. When a consecutive predetermined type is detected to reach a preset threshold (e.g., 50 consecutive clock cycles of input data all zeros), the hardware device 110 directly increases the replacement probability of the statistical window to its maximum value (e.g., setting the first threshold to the maximum value of 63, corresponding to a 100% replacement probability), without having to wait for the statistical window to end before gradually adjusting. Through this multi-dimensional statistical mechanism, a rapid response to continuous idle scenarios is possible.

[0055] To further optimize the power consumption stability control, in some embodiments, the hardware device 110 can replace the original linear adjustment algorithm with a non-linear adjustment algorithm, such as exponential adjustment or step adjustment. For example, when the proportion of a predetermined type suddenly increases from 10% to 30%, linear adjustment may require multiple statistical windows to adjust the threshold to the desired level, while non-linear adjustment (such as exponential adjustment) can raise the threshold to near the target value within a single statistical window, achieving a rapid increase in the replacement probability. This non-linear adjustment algorithm enables a rapid response in replacement probability for extreme data flow scenarios where the proportion of a predetermined type suddenly increases.

[0056] In step 230, in response to the comparison result meeting the preset conditions, the hardware device 110 replaces the first data with placeholder data and generates a control flag corresponding to the placeholder data.

[0057] In some embodiments, the hardware device 110 can compare a first random number with a first threshold (i.e., a dynamic replacement probability threshold). When the first random number is less than or equal to the first threshold, the hardware device 110 can determine that the comparison result meets a preset condition and perform a first data replacement operation. As an example, when the first random number is less than or equal to the first threshold, the hardware device 110 replaces the first data with placeholder data through a multiplexer, and simultaneously generates a corresponding control flag (e.g., a first flag or a second flag) according to the predetermined type to which the first data belongs.

[0058] Alternatively or additionally, the judgment logic of the preset condition can be configured according to specific application requirements. For example, in an alternative embodiment, the hardware device 110 can be set to satisfy the preset condition when the first random number is greater than or equal to a first threshold, and not satisfy the preset condition when the first random number is less than the first threshold. By adjusting the sign direction of the comparison logic (less than or equal to or greater than or equal to), the hardware device 110 can flexibly adapt to the replacement decision mechanism under different design preferences. It is understood that this disclosure is not intended to limit the specific way in which the comparison result satisfies the preset condition.

[0059] Unlike existing technologies that employ a fixed strategy of performing a full replacement upon detecting idle data, the embodiments of this disclosure adopt a probabilistic replacement mechanism. Replacement is performed only when the comparison result between a first random number and a first threshold meets preset conditions; otherwise, the original data is retained. This mechanism effectively reduces the power consumption waste caused by excessive full replacement, achieving a balance between power stability and power saving.

[0060] In other embodiments, in response to the comparison result not meeting the preset conditions, the hardware device 110 may perform a predetermined operation based on the first data to obtain a fourth operation result and output the fourth operation result for the first data.

[0061] As an example, when the first random number is greater than the first threshold, the hardware device 110 can determine that the comparison result does not meet the preset conditions and may not perform the first data replacement operation. In this case, the hardware device 110 maintains the transmission path of the original first data through a multiplexer, sends the first data into the multiply-accumulator for operation, and does not generate a control flag (or generate a flag indicating normal operation). Through the above additional mechanism, the hardware device 110 only performs replacement when the random number comparison result falls within the preset range; otherwise, it maintains the original data path, thereby achieving selective placeholder data injection.

[0062] In some embodiments, the hardware device 110 may use a first generator and a second generator to generate placeholder data. Specifically, the hardware device 110 may use the first generator to generate a first random number, use the second generator to generate a second random number, and perform a concatenation operation between the first random number and the second random number to generate placeholder data. In some embodiments, the sum of the bit widths of the first generator and the second generator matches the target bit width of the placeholder data, thereby ensuring that the generated placeholder data accurately matches the input bit width of the multiply-accumulate unit.

[0063] In some embodiments, the hardware device 110 may employ a split linear feedback shift register structure. Additionally or alternatively, the first generator used to generate the first random number may correspond to the low-order segment in the split linear feedback shift register structure. The first random number generated by this first generator can simultaneously serve as the low-order segment of placeholder data, concatenated with the second random number generated from the high-order segment to form complete placeholder data.

[0064] Taking an 8-bit multiply-accumulator as an example, the second generator can be a 4-bit LFSR used to generate a 4-bit second random number; the first generator can be a 4-bit LFSR used to generate a 4-bit first random number. Further, the hardware device 110 concatenates the second random number with the first random number to form 8-bit placeholder data.

[0065] Taking a 16-bit multiply-accumulator as an example, the second generator can be a 10-bit LFSR to generate a 10-bit second random number; the first generator can be a 6-bit LFSR to generate a 6-bit first random number. Further, the hardware device 110 concatenates the second random number with the first random number to form a 16-bit placeholder data.

[0066] Taking a 32-bit multiply-accumulator as an example, the second generator can be a 20-bit LFSR to generate a 20-bit second random number; the first generator can be a 12-bit LFSR to generate a 12-bit first random number. Further, the hardware device 110 concatenates the second random number with the first random number to form a 32-bit placeholder data.

[0067] Through the above-mentioned split generation mechanism, the hardware device 110 can flexibly adapt to the placeholder data generation requirements of multiply-accumulators with different bit widths.

[0068] In some embodiments, the above two-segment splitting structure can be further extended to a multi-segment splitting structure. Specifically, for ultra-high bit-width multiply-accumulators (e.g., multiply-accumulators with a bit width of 64 bits), the hardware device 110 can adopt a multi-segment splitting structure of a-bit + b-bit + c-bit to decompose the task of generating placeholder data into multiple random number generation subtasks with smaller bit widths, and form the final placeholder data through multi-segment concatenation operations.

[0069] Taking a 64-bit multiply-accumulate unit as an example, the second generator can be a 24-bit LFSR, the third generator can be a 20-bit LFSR, and the first generator can be a 20-bit LFSR. The second generator is used to generate a second random number with a 24-bit width, the third generator is used to generate a third random number with a 20-bit width, and the first generator is used to generate a first random number with a 24-bit width. Furthermore, the hardware device 110 can perform a concatenation operation on the second, third, and first random numbers to form a 64-bit placeholder data.

[0070] Through the above-mentioned multi-segment splitting generation mechanism, the hardware device 110 can more easily achieve accurate bit width matching in high bit width scenarios, and facilitates modular design and debugging. Each segment generator can be configured and verified independently, thereby improving the engineering practicality and scalability of the technical solution.

[0071] It is understood that the above is merely an illustrative example, and this disclosure is not intended to limit the number of generators, the specific splitting style, or the bit width of a single generator.

[0072] To indicate that placeholder data is invalid, in some embodiments, hardware device 110 may generate a control flag corresponding to the placeholder data. This control flag indicates that the placeholder data serves to maintain power consumption, rather than being actual data used for processing operations. Understandably, this control flag allows hardware device 110 to distinguish between placeholder data and actual data, preventing the misuse of placeholder data in actual computation results.

[0073] Specifically, when the hardware device 110 performs a placeholder data replacement operation, it can generate a corresponding control flag based on the predetermined type to which the original input data (first data) belongs. For example, if the first data belongs to the first type (e.g., all zero data), the hardware device 110 can generate a first flag (e.g., zero Flag=1). If the first data belongs to the second type (e.g., data hold state), the hardware device 110 can generate a second flag (e.g., hold Flag=1). If the first data does not satisfy either the first or second type but is in another state that requires replacement (e.g., a data intermittent period), the hardware device 110 can generate a corresponding third flag according to a preset strategy.

[0074] In some embodiments, the control flag may be transmitted to the multiply-accumulator along with placeholder data. The placeholder data is used to input the multiply-accumulator to participate in the operation to maintain the circuit switching frequency, and the control flag is used to instruct the multiply-accumulator how to correct the output result to ensure that the final output result matches the original input data.

[0075] In this way, the hardware device 110 can ensure the correctness of the calculation results while maintaining power consumption by injecting placeholder data.

[0076] To improve control accuracy, in some embodiments, when the input data simultaneously meets the first type and the second type, the hardware device 110 can set the priority rules of the control flag.

[0077] As one example, hardware device 110 can be configured to have a higher priority for the first flag than the second flag. That is, when both states occur simultaneously, the current data is preferentially classified as the first type and the first flag is generated, without generating the second flag. As another example, hardware device 110 can be configured to have a higher priority for the second flag than the first flag. That is, when both states occur simultaneously, the current data is preferentially classified as the second type and the second flag is generated, without generating the first flag. This priority determination mechanism effectively avoids signal conflicts and improves control accuracy.

[0078] In other embodiments, the hardware device 110 can adjust the "integer-width data replacement" replacement strategy to a finer-grained bit-segment replacement. Specifically, for different bit segments of the multiply-accumulator input data (e.g., sign bit, exponent bit, mantissa bit), the hardware device 110 can determine whether each bit segment meets the replacement condition and perform the replacement operation independently. As an example, for fp16 format data, only the mantissa bit segment can be replaced while the sign bit and exponent bit segments remain unchanged. Through this bit-segment replacement mechanism, unnecessary power consumption waste can be further reduced, and the fineness of power consumption control can be improved.

[0079] In some embodiments, the first and second flags mentioned above can be implemented using a single-bit signal. For example, the first flag can be represented by 1 bit, indicating that the current input data is all zeros when its value is logic 1. The second flag can be represented by 1 bit, indicating that the current input data is in a data hold state when its value is logic 1. This single-bit implementation has the advantages of low hardware overhead and low signal transmission delay.

[0080] To add more status indicators, in some embodiments, the hardware device 110 may also replace the 1-bit first and second flags with multi-bit control flags. Specifically, the original 1-bit flag is expanded into a multi-bit flag signal, such as a "partial replacement" state, a "low-frequency toggle" state, etc. Through this multi-bit control flag, the hardware device 110 can provide richer control dimensions for the multiplier-accumulator, enabling the multiplier-accumulator to perform differentiated internal operations based on different Flag values, thereby achieving a more flexible power consumption control strategy.

[0081] In step 240, the hardware device 110 uses the placeholder data to perform a predetermined operation to obtain a first operation result.

[0082] Specifically, hardware device 110 can send the generated placeholder data to the input of the multiply-accumulator. The multiply-accumulator can receive the placeholder data as an operand and perform operations according to a predetermined operation logic. Such predetermined operations can include multiplication-accumulation operations performed by the multiply-accumulator on the placeholder data. As an example, the multiply-accumulator can perform a multiplication operation on the placeholder data and add the multiplication result to the current value in the accumulator to obtain a first operation result.

[0083] It should be noted that the first calculation result is an intermediate result calculated based on placeholder data. Its value itself has no practical meaning. However, the logic circuit inside the multiply-accumulator maintains the circuit toggle frequency during the execution of this operation, thereby maintaining the stability of dynamic power consumption and avoiding a sudden drop in power consumption due to idle input data.

[0084] In step 240, the hardware device 110 outputs a second calculation result for the first data based on the control flag. The second calculation result is independent of the first calculation result.

[0085] Specifically, in step 230, hardware device 110 generates a control flag (e.g., a first flag or a second flag) corresponding to the placeholder data, and in step 240, it performs a predetermined operation using the placeholder data to obtain a first operation result. In step 250, hardware device 110 can modify or replace the first operation result according to the type of the control flag to output a second operation result for the original first data.

[0086] As an example, when the control flag is the first flag corresponding to the first type (e.g., zero Flag=1), it indicates that the original first data is all zeros. In this case, the hardware device 110 outputs the value zero as the second operation result. When the control flag is the second flag corresponding to the second type (e.g., second flag=1), it indicates that the original first data is the same as the data of the previous cycle. In this case, the hardware device 110 obtains the third operation result output in the previous cycle and outputs the third operation result as the second operation result of the current cycle.

[0087] In some embodiments, when no valid control flag is received, the hardware device 110 may output the first calculation result obtained in step 240 as the second calculation result.

[0088] In this way, the hardware device 110 can maintain the circuit switching frequency and stabilize power consumption by using placeholder data, while ensuring that the final output calculation result matches the original input data, thus avoiding the problem of calculation result errors caused by placeholder data injection.

[0089] To improve the finer detail of power consumption control, in some embodiments, the hardware device 110 can perform hierarchical toggle control on the internal circuitry of the multiplier-accumulator based on the type of control flags (e.g., a first flag or a second flag). For example, when a first flag is received (indicating that the input data is all zeros), the hardware device 110 can control the core arithmetic module inside the multiplier-accumulator to maintain a high-frequency toggle, while the auxiliary module maintains a low-frequency toggle. When a second flag is received (indicating that the input data is in a data hold state), the hardware device 110 can execute the opposite control strategy, i.e., the auxiliary module maintains a high-frequency toggle, while the core arithmetic module maintains a low-frequency toggle. This hierarchical toggle control mechanism can further optimize the power distribution within the multiplier-accumulator while maintaining overall power consumption stability.

[0090] To enhance system flexibility and applicability, in some embodiments, the hardware device 110 can replace the original single-cycle hold mechanism ("holding the result of the previous cycle under the second flag") with a configurable multi-cycle result hold mechanism. The hardware device 110 can configure the number of cycles to be held (e.g., to hold 2, 3, or more cycles) via the CSR register. As an example, when configured to hold 3 cycles, the multiply-accumulator outputs the result of the same cycle (i.e., the initially held cycle) whenever the second flag is detected for 3 consecutive clock cycles. This multi-cycle result hold mechanism can adapt to data retention requirements in different computational scenarios.

[0091] To further improve the accuracy of power consumption stability, in some embodiments, the hardware device 110 may also add a power consumption monitoring and feedback module. Specifically, a power consumption monitoring unit is added to the output of the multiply-accumulator to collect the actual power consumption value of the multiply-accumulator in real time. The hardware device 110 compares the actual power consumption value with a preset target power consumption value. If it is determined that the actual power consumption deviates from the target value (e.g., the actual power consumption is lower than or higher than the target power consumption threshold), the replacement probability adjustment coefficient of the data statistics module is adjusted in reverse.

[0092] As an example, when the actual power consumption is lower than the target power consumption value, it indicates that the current placeholder data replacement strategy has failed to effectively maintain power consumption stability. In this case, the hardware device 110 can increase the replacement probability adjustment coefficient to increase the frequency of placeholder data replacement, thereby increasing the power consumption to near the target value. When the actual power consumption is higher than the target power consumption value, it indicates that the replacement is too frequent, resulting in excessive power consumption. In this case, the hardware device 110 can decrease the replacement probability adjustment coefficient to reduce the frequency of placeholder data replacement, thereby reducing power consumption.

[0093] Through this power consumption monitoring and feedback module, the hardware device 110 can form a closed-loop control chain of "detection-statistics-replacement-monitoring-feedback," enabling the placeholder data replacement strategy to be dynamically optimized not only based on the statistical characteristics of the input data but also based on real-time feedback of actual power consumption, thereby further improving the accuracy and adaptability of power consumption stability. It is understood that this disclosure is not intended to limit the specific implementation method and feedback algorithm of the power consumption monitoring unit.

[0094] Figure 3 A structural block diagram of an example hardware device for data processing according to some embodiments of the present disclosure is shown. Figure 3 As shown, the hardware device 110 may include a data pipeline 310, a placeholder data generation module 320, a data detection module 330, a data statistics module 340, a control signal generation and data replacement module 350, a multiplexer 360, and a multiply-accumulator 120.

[0095] Specifically, data pipe 310 is used to transmit input data, and its output is coupled to the first input of multiplexer 360. Placeholder data generation module 320 is used to generate placeholder data, and its output is coupled to the second input of multiplexer 360. The output of multiplexer 360 is coupled to the input of multiply-accumulator 120, and is used to select whether to send real data (i.e., input data) or placeholder data into multiply-accumulator 120 according to control signals.

[0096] The input of the data detection module 330 is coupled to the data pipeline 310 for real-time acquisition of input data and detection of its data type. The output of the data detection module 330 is coupled to the data statistics module 340.

[0097] The data statistics module 340 is used to statistically analyze the distribution of predetermined types within a statistical window and dynamically calculate the replacement probability. As an example, the data statistics module 340 can configure the statistical window size and the initial threshold for the replacement probability through a Control and Status Register (CSR), and save the dynamically adjusted replacement probability threshold to the CSR register each time. Within each statistical window, the data statistics module 340 can statistically analyze the number of periods N0 of the hold state (second type) and the number of periods N1 of the all-zero state (first type) in real time, calculating the total number of idle periods N = N0 + N1 and its proportion within the statistical window. Based on the changing trend of this proportion, the data statistics module 340 dynamically adjusts the replacement probability value; for example, it increases the replacement probability value to increase the replacement frequency of placeholder data when the proportion increases, and decreases the replacement probability value to reduce the replacement frequency of placeholder data when the proportion decreases, thereby achieving dynamic matching between the replacement strategy and the data flow state.

[0098] The output of the data statistics module 340 is coupled to the control signal generation and data replacement module 350 for transmitting the replacement probability value. The control signal generation and data replacement module 350 receives the flag signal from the data detection module 330 and the replacement probability value from the data statistics module 340, and generates a selection control signal for the multiplexer 360 accordingly. The multiplexer 360 can switch between real data and placeholder data based on the replacement judgment result and the control flag, and transmits the control flag to the multiplier-adder 120 to provide a basis for the calculation result control, and finally outputs the result.

[0099] The multiply-accumulator 120 may include an accumulator and multiple multipliers, such as a first multiplier, a second multiplier, a third multiplier, and a fourth multiplier. The output of each multiplier is coupled to the accumulator, which is used to accumulate the results of the multipliers.

[0100] The multiply-adder 120 can determine the final output result based on the received first or second flag. For example, when the first flag is received, the multiply-adder 120 continues to perform logic operations, keeps the circuit active, and outputs a value of zero. When the second flag is received, the multiply-adder 120 continues to maintain its operation state, sustains the circuit toggle frequency, and outputs the result of the previous cycle. When no flag signal is received, the multiply-adder 120 receives and performs operations normally, outputting a normal multiplication and addition result.

[0101] Through the above hardware structure, the embodiments of this disclosure can realize probability-based dynamic placeholder data replacement, which can stabilize the power consumption of the multiply-accumulator, suppress sudden changes in the rate of change of current, and ensure the correctness of the calculation results.

[0102] Furthermore, the embodiments of this disclosure also enable modular design. The aforementioned functional modules can be integrated into a single "power consumption stability control unit," which can be integrated into the multiplier or multiplier-accumulator module of various high-performance semiconductor chips, facilitating secondary development and use by chip designers.

[0103] The embodiments disclosed herein also support configurable parameters. Parameters such as the statistical time window, the initial configuration threshold of the CSR register, and the replacement probability threshold can be flexibly configured to adapt to the power control requirements of different customers and application scenarios.

[0104] The embodiments of this disclosure also support asynchronous design. In hardware implementation, asynchronous design can be used to decouple the data statistics module from the multiply-accumulate master clock, further reducing the hardware power consumption of the statistics module and minimizing its impact on the overall chip power consumption.

[0105] The embodiments of this disclosure also support extended applications. This disclosure can be extended to the overall design of the multiply-accumulator, linking the control flag with the accumulator section of the multiply-accumulator to achieve stable control of the overall power consumption of the multiply-accumulator.

[0106] In this way, the embodiments of this disclosure can reduce unnecessary replacement operations based on a probabilistic placeholder data injection strategy, while ensuring stable power consumption, thereby significantly reducing unnecessary power consumption and improving the accuracy and efficiency of power control.

[0107] Example devices and equipment: Embodiments of this disclosure also provide corresponding apparatus for implementing the above methods or processes. Figure 4 A schematic structural block diagram of an example apparatus 400 for data processing according to certain embodiments of the present disclosure is shown. Apparatus 400 may be implemented as or included in hardware device 110. Various modules / components in apparatus 400 may be implemented by hardware, software, firmware, or any combination thereof.

[0108] like Figure 4 As shown, the device 400 includes a generation module 410 configured to generate a first random number in response to the first data received in a first period being of a predetermined type; a determination module 420 configured to determine a comparison result based on a comparison between the first random number and a first threshold, wherein the first threshold is determined based on the data type distribution over multiple historical periods; a processing module 430 configured to replace the first data with placeholder data and generate a control flag corresponding to the placeholder data in response to the comparison result meeting a preset condition; an execution module 440 configured to perform a predetermined operation using the placeholder data to obtain a first operation result; and an output module 450 configured to output a second operation result for the first data based on the control flag, wherein the second operation result is independent of the first operation result.

[0109] In some embodiments, the predetermined type includes: a first type indicating that the value of the first data is zero.

[0110] In some embodiments, the output module 450 is further configured to use the value zero as the second operation result in response to a control flag being a first flag corresponding to a first type.

[0111] In some embodiments, the predetermined type includes: a second type indicating that the first data is the same as the second data received in the second period, the second period being the period preceding the first period.

[0112] In some embodiments, the output module 450 is further configured to, in response to a control flag being a second flag corresponding to a second type, obtain a third operation result corresponding to the second data; and use the third operation result as the second operation result.

[0113] In some embodiments, the apparatus 400 further includes a first processing module configured to determine at least one period within a plurality of historical periods, wherein the input data received in the at least one period belongs to a predetermined type; and to determine a data type distribution based on the proportion of the at least one period in the plurality of historical periods.

[0114] In some embodiments, multiple historical periods are first statistical periods, and the first threshold is determined based on the following process: in response to an increase in the percentage relative to a second statistical period, the first threshold is increased, where the second statistical period is the previous statistical period of the first statistical period; or in response to a decrease in the percentage relative to a second statistical period, the first threshold is decreased.

[0115] In some embodiments, the generation module 410 is further configured to generate a first random number using a first generator.

[0116] In some embodiments, the apparatus 400 further includes a second processing module configured to generate placeholder data using a first generator and a second generator.

[0117] In some embodiments, the second processing module is further configured to generate a second random number using a second generator; and to perform a concatenation operation between the second random number and the first random number to generate placeholder data.

[0118] In some embodiments, the sum of the bit widths of the first generator and the second generator matches the bit width of the placeholder data.

[0119] In some embodiments, the device 400 further includes a third processing module configured to, in response to a comparison result not meeting a preset condition, perform a predetermined operation based on the first data to obtain a fourth operation result; and output the fourth operation result for the first data.

[0120] In some embodiments, the predetermined operation includes a multiply-accumulate operation performed by the multiply-accumulate unit on the placeholder data.

[0121] The modules included in device 400 can be implemented in various ways, including software, hardware, firmware, or any combination thereof. In some embodiments, one or more units can be implemented using software and / or firmware, such as machine-executable instructions stored on a storage medium. In addition to or as an alternative to machine-executable instructions, some or all of the modules in device 400 can be implemented at least partially by one or more hardware logic components. By way of example, and not limitation, exemplary types of hardware logic components that can be used include field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-chips (SoCs), complex programmable logic devices (CPLDs), and so on.

[0122] like Figure 5 As shown, electronic device 500 is in the form of a general-purpose electronic device. Components of electronic device 500 may include, but are not limited to, one or more processing units or processors 510, memory 520, storage devices 530, one or more communication units 540, one or more input devices 550, and one or more output devices 560. Processor 510 may be a physical or virtual processor and is capable of performing various processes according to programs stored in memory 520. In a multiprocessor system, multiple processors execute computer-executable instructions in parallel to improve the parallel processing capability of electronic device 500. Figure 5 The electronic device 500 shown can be used to achieve Figure 1 Among the hardware devices 110.

[0123] Electronic device 500 typically includes multiple computer storage media. Such media can be any accessible media that is accessible to electronic device 500, including but not limited to volatile and non-volatile media, removable and non-removable media. Memory 520 can be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. Storage device 530 can be removable or non-removable media and can include machine-readable media, such as flash drives, disks, or any other media that can be used to store information and / or data and can be accessed within electronic device 500.

[0124] Electronic device 500 may further include additional removable / non-removable, volatile / non-volatile storage media. Although not explicitly stated... Figure 5As shown, disk drives for reading from or writing to removable, non-volatile disks (e.g., "floppy disks") and optical disk drives for reading from or writing to removable, non-volatile optical disks can be provided. In these cases, each drive can be connected to a bus (not shown) via one or more data media interfaces. Memory 520 may include computer program product 525 having one or more program modules configured to perform various methods or actions of various embodiments of this disclosure.

[0125] Communication unit 540 enables communication with other electronic devices via a communication medium. Additionally, the functionality of components of electronic device 500 can be implemented using a single computing cluster or multiple computing machines capable of communicating via communication connections. Therefore, electronic device 500 can operate in a networked environment using logical connections to one or more other servers, network personal computers (PCs), or another network node.

[0126] Input device 550 can be one or more input devices, such as a mouse, keyboard, trackball, etc. Output device 560 can be one or more output devices, such as a monitor, speaker, printer, etc. Electronic device 500 can also communicate with one or more external devices (not shown) via communication unit 540 as needed. These external devices include storage devices, display devices, etc., and can communicate with one or more devices that enable user interaction with electronic device 500, or with any device that enables electronic device 500 to communicate with one or more other electronic devices (e.g., network card, modem, etc.). Such communication can be performed via input / output (I / O) interface (not shown).

[0127] According to an exemplary implementation of this disclosure, a computer-readable storage medium is provided that stores computer-executable instructions thereon, wherein the computer-executable instructions are executed by a processor to implement the methods described above. According to an exemplary implementation of this disclosure, a computer program product is also provided, which is tangibly stored on a non-transitory computer-readable medium and includes computer-executable instructions, which are executed by a processor to implement the methods described above.

[0128] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatuses, devices, and computer program products implemented according to this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0129] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processing unit of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0130] Computer-readable program instructions can be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions that execute on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0131] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0132] Various implementations of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed implementations. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described implementations. The terminology used herein is chosen to best explain the principles, practical applications, or improvements to technology in the market, or to enable others skilled in the art to understand the various implementations disclosed herein.

Claims

1. A data processing method, characterized in that, The method is executed by a hardware device, and the method includes: In response to the first data received within the first period being of a predetermined type, a first random number is generated; The comparison result is determined based on the comparison between the first random number and the first threshold, wherein the first threshold is determined based on the data type distribution over multiple historical periods; In response to the comparison result satisfying a preset condition, the first data is replaced with placeholder data, and a control flag corresponding to the placeholder data is generated. The hardware device inputs the placeholder data into a multiplier-accumulator via a multiplexer and transmits the control flag to the multiplier-accumulator. Using the placeholder data, the multiply-accumulator performs a predetermined operation to obtain a first operation result; and Based on the control flag, a second calculation result for the first data is output, and the second calculation result is independent of the first calculation result.

2. The method according to claim 1, characterized in that, The pre-defined types include: The first type indicates that the value of the first data is zero.

3. The method according to claim 2, characterized in that, The step of outputting a second calculation result for the first data based on the control flag includes: In response to the control flag being a first flag corresponding to the first type, the value of zero is taken as the result of the second operation.

4. The method according to claim 1, characterized in that, The pre-defined types include: The second type indicates that the first data is the same as the second data received in the second period, where the second period is the period preceding the first period.

5. The method according to claim 4, characterized in that, The step of outputting a second calculation result for the first data based on the control flag includes: In response to the control flag being a second flag corresponding to the second type, a third calculation result corresponding to the second data is obtained; and The result of the third operation is used as the result of the second operation.

6. The method according to claim 1, characterized in that, The method further includes: Determine at least one period within the plurality of historical periods, wherein the input data received in the at least one period belongs to the predetermined type; and The data type distribution is determined based on the proportion of the at least one period in the plurality of historical periods.

7. The method according to claim 6, characterized in that, The plurality of historical periods constitute the first statistical period, and the first threshold is determined based on the following process: In response to an increase in the percentage relative to the second statistical period, the first threshold is increased, where the second statistical period is the statistical period preceding the first statistical period; or In response to a decrease in the percentage relative to the second statistical period, the first threshold is lowered.

8. The method according to claim 1, characterized in that, The generation of the first random number includes: The first random number is generated using the first generator.

9. The method according to claim 8, characterized in that, The method further includes: The placeholder data is generated using the first generator and the second generator.

10. The method according to claim 9, characterized in that, The step of generating the placeholder data using the first generator and the second generator includes: Using the second generator, generate a second random number; and The second random number and the first random number are concatenated to generate the placeholder data.

11. The method according to claim 10, characterized in that, The sum of the bit widths of the first generator and the second generator matches the bit width of the placeholder data.

12. The method according to claim 1, characterized in that, The method further includes: In response to the comparison result not meeting the preset condition, based on the first data, the predetermined operation is performed to obtain a fourth operation result; and Output the fourth operation result for the first data.

13. The method according to claim 1, characterized in that, The predetermined operation includes multiply-accumulate operations performed by the multiply-accumulate unit on the placeholder data.

14. An apparatus for data processing, characterized in that, The device is applied to a hardware device, and the device includes: The generation module is configured to generate a first random number in response to the first data received within the first period being of a predetermined type. The determination module is configured to determine a comparison result based on a comparison between the first random number and a first threshold, wherein the first threshold is determined based on the data type distribution over multiple historical periods; The processing module is configured to replace the first data with placeholder data in response to the comparison result meeting a preset condition, and generate a control flag corresponding to the placeholder data. The hardware device inputs the placeholder data into a multiplier-accumulator via a multiplexer and transmits the control flag to the multiplier-accumulator. The execution module is configured to use the placeholder data to perform a predetermined operation by the multiply-accumulator to obtain a first operation result; and The output module is configured to output a second calculation result for the first data based on the control flag, the second calculation result being independent of the first calculation result.

15. An electronic device comprising at least one processor; and at least one memory, characterized in that, The at least one memory is coupled to the at least one processor and stores instructions for execution by the at least one processor, which, when executed by the at least one processor, cause the electronic device to perform the method according to any one of claims 1 to 13.

16. A computer-readable storage medium having computer-executable instructions stored thereon, characterized in that, When the computer-executable instructions are executed by a processor, they implement the method according to any one of claims 1 to 13.

17. A computer program product, said computer program product being tangibly stored in a computer storage medium and comprising computer-executable instructions, characterized in that, The computer-executable instructions, when executed by the device, cause the device to perform the method according to any one of claims 1 to 13.

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