A single interface encryption trimming circuit applied to an analog chip

Abstract

The application relates to the technical field of analog chips, and discloses a single-interface encryption trimming circuit applied to an analog chip, which has simple circuit structure and can realize input of trimming code through one port. The power consumption is very low, and after trimming of the circuit is completed, the power consumption of the whole trimming circuit is close to zero. The scheme comprises a password protection circuit, the password is related to specific digital codes and transmission time, can prevent errors from entering the trimming mode and affecting normal work of the chip. The application occupies very small chip area, is very suitable for analog chips with less pins or small chip area, and can reduce chip cost. The application has a protection circuit, when internal trimming or password setting of the chip is completed, the chip trimming mode can be locked, even if the correct password, the chip cannot be trimmed and changed, which helps to protect the chip from entering an error state or being intentionally tampered.

Description

Technical Field

[0001] This invention relates to the field of analog chip technology, and in particular to a single-interface encryption and tuning circuit for analog chips. Background Technology

[0002] Currently, in analog chips or chips with few pins (such as sensor chips), due to the limited number of external pins, post-packaging trimming is not possible. Parameter trimming is generally performed at the wafer level, i.e., chip probing (CP). After CP trimming, the parameters are more accurate and meet product requirements. However, after packaging, due to factors such as packaging stress, the parameters will drift, and the drift direction is uncertain. This reduces chip yield, and the parameters become more dispersed, affecting chip performance.

[0003] In existing modification schemes, CN121193437A uses a modification barcode generation circuit to input the password into the chip, stores the modification barcode using the chip's internal storage and register modules, and then burns a specific fuse to achieve encryption or modification functions. CN117875258A uses an I2C interface to select the fuse that needs modification, and then sends a burn-out command via I2C to burn the selected fuse.

[0004] However, existing technologies have the following problems: The CN121193437A's trimming code generator requires multiple pins, making it unusable for chips with fewer pins; it requires an internal storage unit to store the trimming code, which occupies a large area; and it lacks a password protection circuit, making the trimming barcode easily cracked or causing it to enter an erroneous state during normal chip operation, leading to chip malfunction. The CN117875258A requires the I2C transmission protocol to enter the trimming circuit, and I2C requires at least two pins to complete the trimming task, which is insufficient for chips with fewer pins; I2C occupies a large chip area, and for circuits with relatively small chip areas, the I2C area accounts for a high proportion of the total chip area, significantly impacting cost. Summary of the Invention

[0005] The purpose of this invention is to provide a single-interface encrypted adjustment circuit for analog chips, which solves the problems in the prior art where chips with fewer pins cannot be adjusted after packaging, the adjustment circuit occupies a large area, lacks effective password protection, and is easily tampered with.

[0006] To achieve the above objectives, the present invention provides a single-interface encryption trimming circuit for analog chips, including a trimming code input circuit, a password protection circuit, a fuse selection and storage circuit, a fuse burning circuit, and an anti-tampering circuit. The adjustment code input circuit is used to receive input signals through a single multiplexed pin of the chip, and to shape the input signals to form digital signals that can be recognized by subsequent circuits. The password protection circuit is used to identify the shaped digital signal and output an enable signal to enter the tuning mode only when the input signal meets the preset password conditions. The fuse selection storage circuit is used to receive the enable signal, store the adjustment code in the register, and map it to different fuses to select the fuse that needs to be burned. The fuse-breaking circuit is used to burn out the selected fuse; The anti-tampering circuit is used to latch the adjustment prohibition signal after the chip adjustment is completed, so that the chip cannot enter the adjustment mode again.

[0007] The tuning code input circuit includes a Schmitt trigger, the single multiplexed pin is the chip's enable pin EN, the input signal is a pulse signal, which is shaped by the Schmitt trigger and then enters the subsequent circuit; the high-level time of the pulse signal must be greater than a preset fixed delay time tpass in order to be transmitted to the subsequent circuit.

[0008] The password for the password protection circuit is a fixed number of pulses password set at the factory when the chip is manufactured. When the number of input pulses matches the preset password and the high-level time of each pulse meets the tpass requirement, the output terminal TM of the password protection circuit becomes high and the chip enters the adjustment mode.

[0009] The fuse selection storage circuit includes a 4-to-16 line decoder, which is used to select and store the address of the fuse to be burned according to the adjustment code; the fuse burning circuit includes an NMOS transistor M1 with low on-resistance. When the gate signal becomes high, the NMOS transistor M1 is turned on, so that the voltage across the fuse is close to the power supply voltage VDD, and the fuse is burned through by a large current.

[0010] The anti-tampering circuit achieves its anti-tampering function by latching the Trim_Lock signal. When the chip is adjusted, the Trim_Lock signal is latched to a low level, and the signal of the multiplexed pin EN cannot be transmitted to subsequent circuits, thus preventing the adjustment mode from being entered.

[0011] The fuse-burning circuit also includes a comparator circuit composed of an NMOS transistor M2 and a PMOS transistor biased by Vbp. When the fuse is not burned, the gate of M2 is at a high potential, and the corresponding Trim signal is at a low level. When the fuse is burned, the corresponding Trim signal becomes high. When the tamper-proof fuse is burned, the Trim_Lock signal becomes low.

[0012] This invention discloses a single-interface encrypted tuning circuit for analog chips. The circuit structure is simple, allowing tuning code input through a single port. Power consumption is very low; after tuning, the entire tuning circuit consumes almost zero power. The solution includes a password protection circuit. The password is related not only to the specific numerical code but also to the transmission time, preventing erroneous entry into tuning mode and affecting normal chip operation. This invention occupies a very small chip area, making it ideal for analog chips with few pins or a small chip area, thus reducing chip costs. The invention also features a protection circuit that locks the chip's tuning mode after internal tuning or password setting. Even with the correct password, further tuning and modification of the chip are impossible, helping to protect the chip from entering an erroneous state or being deliberately tampered with. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0014] Figure 1 This is a circuit diagram of a single-interface encryption adjustment circuit for analog chips provided by the present invention.

[0015] Figure 2 This is a schematic diagram of signal input and action.

[0016] Figure 3 It includes a code input circuit, a time encryption circuit, and an anti-tampering circuit.

[0017] Figure 4 This is a diagram of the password protection circuit.

[0018] Figure 5 This is a circuit diagram of fuse selection and storage.

[0019] Figure 6 This is a circuit diagram showing the structure of a circuit where the fuse has burned out. Detailed Implementation

[0020] The embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, but should not be construed as limiting the present invention.

[0021] Please see Figures 1 to 6 The present invention provides a single-interface encryption trimming circuit for analog chips, including a trimming code input circuit, a password protection circuit, a fuse selection storage circuit, a fuse burning circuit, and an anti-tampering circuit; The adjustment code input circuit is used to receive input signals through a single multiplexed pin of the chip, and to shape the input signals to form digital signals that can be recognized by subsequent circuits. The password protection circuit is used to identify the shaped digital signal and output an enable signal to enter the tuning mode only when the input signal meets the preset password conditions. The fuse selection storage circuit is used to receive the enable signal, store the adjustment code in the register, and map it to different fuses to select the fuse that needs to be burned. The fuse-breaking circuit is used to burn out the selected fuse; The anti-tampering circuit is used to latch the adjustment prohibition signal after the chip adjustment is completed, so that the chip cannot enter the adjustment mode again.

[0022] Furthermore, the tuning code input circuit includes a Schmitt trigger, the single multiplexed pin is the chip's enable pin EN, the input signal is a pulse signal, which is shaped by the Schmitt trigger and then enters the subsequent circuit; the high-level time of the pulse signal must be greater than a preset fixed delay time tpass in order to be transmitted to the subsequent circuit.

[0023] Furthermore, the password of the password protection circuit is a fixed pulse count password when the chip is manufactured. When the input pulse count matches the preset password and the high-level time of each pulse meets the tpass requirement, the output terminal TM of the password protection circuit becomes high, and the chip enters the adjustment mode.

[0024] Furthermore, the fuse selection storage circuit includes a 4-to-16 line decoder, used to select and store the address of the fuse to be burned according to the trimming code; the fuse burning circuit includes an NMOS transistor M1 with low on-resistance. When the gate signal becomes high, the NMOS transistor M1 is turned on, making the voltage across the fuse close to the power supply voltage VDD, and burning the fuse through a large current.

[0025] Furthermore, the anti-tampering circuit achieves anti-tampering functionality by latching the Trim_Lock signal; when the chip adjustment is completed, the Trim_Lock signal is latched to a low level, the signal of the multiplexed pin EN cannot be transmitted to subsequent circuits, and the adjustment mode is prohibited from entering.

[0026] Furthermore, the fuse-burning circuit also includes a comparator circuit composed of an NMOS transistor M2 and a PMOS transistor biased by Vbp; when the fuse is not burned, the gate of M2 is at a high potential, and the corresponding Trim signal is at a low level; when the fuse is burned, the corresponding Trim signal becomes high; when the tamper-proof fuse is burned, the Trim_Lock signal becomes low.

[0027] In this embodiment, the entire scheme is divided into five parts. The tuning code input circuit detects the input signal and shapes it into a digital signal V1 that can be recognized by subsequent circuits. The chip enable circuit also reuses this pin and circuit to control the chip's switching. The password protection circuit identifies the V1 signal. Only signals meeting specific conditions can pass through the password protection circuit to the subsequent fuse selection storage circuit. This password is related not only to a specific code but also to the signal transmission time, protecting the chip from interference from erroneous signals. The fuse selection storage circuit receives the signal V2 passing through the password protection circuit, stores it in a register, and maps it to different fuses, selecting the fuse to be burned. The fuse burning circuit burns the selected fuse, thereby achieving the purpose of adjusting the chip parameters. After all chip parameters have been tuned, a series of anti-tampering signals are input to lock the tuning section of the chip, preventing it from entering tuning mode again. This protects the chip parameters from being tampered with or prevents the chip from mistakenly entering tuning mode during normal operation, which could cause malfunctions.

[0028] The working principle of this circuit is described in detail below: Step 1. During normal operation, the chip power supply and the EN pin of this circuit are powered on simultaneously. EN is a multiplexed pin of the chip, serving as both the enable pin and the entry pin for the tuning mode code. At this time, the chip enters normal operating mode and measures the parameter to be tuned, denoted as Vtest. Step 2. Based on the measured parameter Vtest, the fuse code to be tuned is calculated. A high level "1" indicates that the fuse is blown, and a low level "0" indicates that it is not programmed. Step 3. While maintaining the power supply voltage, the EN signal is powered off, sending a series of pulses. The high-level time of the pulses is encrypted, ensuring that they meet the requirements of the password protection circuit within a certain time tpass. The tuning code input circuit shapes the pulses before they enter the password protection circuit. If the encryption requirements of the password protection circuit are met, the circuit enters the tuning mode; otherwise, it cannot enter the tuning mode. Step 4. After entering the tuning mode, select the fuse to be burned according to the fuse code calculated in Step 2. For example, to burn the nth fuse, select the nth fuse by its code and store the code in the fuse selection memory circuit. At this time, the duration of the EN signal is thold, during which the fuse is burned. Step 5. After selecting the fuse, use the different potentials of the other pins of the chip (excluding the power supply) to burn the fuse. Taking pin PIN2 as an example, if PIN2 is set to a low level, the fuse will not burn; if PIN2 is set to a high level, the fuse will burn. In Steps 1 to 4, PIN2 is at a low level. After entering Step 5, within the thold time, PIN2 is raised to burn the fuse. Step 6. After burning the fuse, the EN signal goes low, and the duration meets the requirements of the password protection circuit. At the same time, PIN2 goes low, and EN continues to input pulses to select the next fuse to be burned. Step 7. After the fuse required by the fuse code is blown, test the chip parameters. If the requirements are met, enter the anti-tampering circuit and blow the fuse corresponding to the anti-tampering circuit. Then the chip will no longer be able to enter the adjustment mode, ensuring the safety of chip use.

[0029] Figure 3 This is a structural diagram of the tuning code input circuit, the tpass time encryption circuit, and the anti-tampering circuit. EN is the chip enable pin, which is multiplexed to serve as both the chip enable and tuning signal input. During chip tuning, this input signal is a pulse signal, shaped by a Schmitt trigger before entering the subsequent circuit. The high-level duration of this pulse signal must be greater than tpass to be transmitted to the subsequent circuit, where Delaytimetpass is a fixed value. After passing through this circuit, the signal is ANDed with the Trim_Lock signal to generate the subsequent pulse signal CLK_IN. When chip tuning is complete, the Trim_Lock signal is latched to 0, the EN signal cannot be transmitted to the subsequent circuit, and the CLK_IN signal remains 0. The tuning circuit is no longer allowed to enter, preventing the chip from mistakenly entering tuning mode during normal operation and affecting its normal operation.

[0030] Figure 4 This is a schematic diagram of the password protection circuit. The password is fixed inside the chip at the factory. The circuit can only enter adjustment mode when the number of input pulses matches the password protection circuit's value. EN1 is the enable control signal for this circuit. When EN1 is high, the circuit operates normally. Figure 4 The password can be set to 7 pulses, or any other number of pulses can be used, which can be achieved by modifying the internal combinational logic. When 7 pulses matching tpass are input into EN, the output terminal TM of the password protection circuit goes high, and the chip enters the adjustment mode.

[0031] Figure 5 This is a circuit diagram for fuse selection and storage. Taking 16 fuses as an example, this circuit selects the fuses to be turned based on pre-calculated fuse codes, stores the addresses of the fuses to be turned in a 4-to-16 line decoder, and then changes the state of the Burn_IN signal to turn the corresponding fuse. EN1 is the enable signal for this module. TM is the output signal of the password protection circuit. CLK_IN is the output signal after... Figure 3 The pulse signal following the circuit. Burn_IN is the burn-out enable signal, originating from... Figure 3 The PIN2 signal in the process description is the output signal after being shaped by an inverter from the PIN2 pin of the chip. When no fuse is burning, this signal is low; when the fuse needs to be burned, this signal is high. The high-level duration of this signal must meet the thold requirement to burn the fuse. Burn_EN<0:15> is the burn-off signal for all 16 fuses, Q<0:3> determines the address of the fuse to be burned, and Burn_IN determines whether the fuse needs to be burned. When a fuse needs to be burned, Burn_EN... <n>If the value increases, the fuse will blow. When the adjustment is complete, Burn_EN... <15> If the signal is high, the 16th fuse will burn out, the Trim_Lock signal will go low, and the trimming mode will be disabled.

[0032] Figure 6 This is a circuit diagram of a fuse-breaking circuit. Upon receiving the fuse-breaking signal Burn_EN<0:15>, this circuit breaks the corresponding fuse. M1 is a large NMOS with low on-resistance. When the gate signal of M1 goes high, the MOS turns on, and the voltage across the fuse approaches the power supply voltage VDD. Because the fuse's on-resistance is low, a large current flows through it, breaking the fuse. M2 is an NMOS, forming a comparator circuit with a PMOS biased at Vbp. When the fuse is not broken, the gate of M2 is at a high potential, the Trim<0:14> signal is low, and the Trim... <15> Signal is high, Trim <15> This is the Trim_Lock signal. When fuse N blows, Trim... <n>The signal is high; when fuse 16 blows, Trim... <15> If the signal is low, the chip will be unable to enter the tuning mode.

[0033] Beneficial effects: (1) The circuit structure is simple, and the modifier input can be realized through one port.

[0034] (2) The power consumption is very low. After the circuit is adjusted, the power consumption of the entire adjustment circuit is close to zero.

[0035] (3) The scheme includes a password protection circuit. The password is not only related to the specific digital code, but also to the transmission time, which can prevent errors from entering the adjustment mode and affecting the normal operation of the chip.

[0036] (4) The present invention occupies a very small chip area, which is very suitable for analog chips with fewer pins or smaller chip area, and can reduce chip cost.

[0037] This invention features a protection circuit that locks the chip's adjustment mode after the chip completes internal adjustments or password settings. Even with the correct password, the chip cannot be adjusted or modified, which helps protect the chip from entering an erroneous state or being deliberately tampered with.

[0038] The above-disclosed embodiments are merely one or more preferred embodiments of this application and should not be construed as limiting the scope of this application. Those skilled in the art will understand that all or part of the processes for implementing the above embodiments and equivalent variations made in accordance with the claims of this application are still within the scope of this application.< / n> < / n>

Claims

1. A single-interface encryption adjustment circuit for analog chips, characterized in that, It includes a code input circuit, a password protection circuit, a fuse selection and storage circuit, a fuse blowing circuit, and an anti-tampering circuit. The adjustment code input circuit is used to receive input signals through a single multiplexed pin of the chip, and to shape the input signals to form digital signals that can be recognized by subsequent circuits. The password protection circuit is used to identify the shaped digital signal and output an enable signal to enter the tuning mode only when the input signal meets the preset password conditions. The fuse selection storage circuit is used to receive the enable signal, store the adjustment code in the register, and map it to different fuses to select the fuse that needs to be burned. The fuse-breaking circuit is used to burn out the selected fuse; The anti-tampering circuit is used to latch the adjustment prohibition signal after the chip adjustment is completed, so that the chip cannot enter the adjustment mode again.

2. The single-interface encryption and tuning circuit for analog chips as described in claim 1, characterized in that, The tuning code input circuit includes a Schmitt trigger, the single multiplexed pin is the chip's enable pin EN, the input signal is a pulse signal, which is shaped by the Schmitt trigger and then enters the subsequent circuit; the high-level time of the pulse signal must be greater than a preset fixed delay time tpass in order to be transmitted to the subsequent circuit.

3. The single-interface encryption adjustment circuit for analog chips as described in claim 1, characterized in that, The password for the password protection circuit is a fixed number of pulses password when the chip is manufactured. When the number of input pulses matches the preset password and the high-level time of each pulse meets the tpass requirement, the output terminal TM of the password protection circuit becomes high and the chip enters the adjustment mode.

4. The single-interface encryption and tuning circuit for analog chips as described in claim 1, characterized in that, The fuse selection and storage circuit includes a 4-to-16 line decoder, which is used to select and store the address of the fuse to be burned according to the adjustment code; the fuse burning circuit includes an NMOS transistor M1 with low on-resistance. When the gate signal becomes high, the NMOS transistor M1 is turned on, so that the voltage across the fuse is close to the power supply voltage VDD, and the fuse is burned through by a large current.

5. The single-interface encryption and tuning circuit for analog chips as described in claim 1, characterized in that, The anti-tampering circuit achieves its anti-tampering function by latching the Trim_Lock signal. When the chip is adjusted, the Trim_Lock signal is latched to a low level, and the signal of the multiplexed pin EN cannot be transmitted to subsequent circuits, thus preventing the adjustment mode from being entered.

6. The single-interface encryption adjustment circuit for analog chips as described in claim 1, characterized in that, The fuse-burning circuit also includes a comparator circuit composed of an NMOS transistor M2 and a PMOS transistor biased by Vbp; when the fuse is not burned, the gate of M2 is at a high potential, and the corresponding Trim signal is at a low level; when the fuse is burned, the corresponding Trim signal becomes high; when the tamper-proof fuse is burned, the Trim_Lock signal becomes low.

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