A virtual-real combined development board and program verification system
By combining virtual and physical development boards and program verification systems, the problems of lack of early verification and insufficient virtual simulation tools in the traditional development process are solved, enabling full verification of code and improving debugging efficiency, while reducing testing costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ANHUI POLYTECHNIC UNIV MECHANICAL & ELECTRICAL COLLEGE
- Filing Date
- 2026-04-29
- Publication Date
- 2026-07-14
Smart Images
Figure CN122389348A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of embedded development technology, and in particular to a virtual-physical integrated development board and program verification system. Background Technology
[0002] In embedded system development, the development board is the core hardware verification platform. The traditional development process typically involves developers using an Integrated Development Environment (IDE) to write code, generating machine code files (such as Hex format), and then downloading them directly to a physical development board (such as an ARM, DSP, or FPGA-based board) via a debugger for functional verification. However, this process, which heavily relies on physical hardware, has significant drawbacks: Lack of prior verification leads to low debugging efficiency: After the code is written, it cannot be fully verified before being deployed to real hardware. Once the program has logical errors, peripheral configuration conflicts (such as GPIO pin multiplexing errors), or timing issues, developers can only perform "black box" or "semi-blind" debugging on the physical development board, which heavily relies on tools such as physical oscilloscopes and logic analyzers. The troubleshooting process is cumbersome and time-consuming, and repeated programming may affect the chip's lifespan.
[0003] Reproducing sensor scenarios is difficult and testing costs are extremely high: In applications involving multiple sensors such as temperature, humidity, and pressure, testing requires purchasing the corresponding physical sensors and building a complex test environment. Even more challenging is that many extreme scenarios (such as extremely high temperatures, sudden pressure changes, and abnormal combinations of multi-sensor data) are difficult to simulate safely, stably, and repeatably in the laboratory. This results in the inability to fully verify the program's handling logic for abnormal situations, raising questions about the software's robustness.
[0004] Existing virtual simulation tools are inadequate: Although some microcontroller simulators (such as QEMU) or circuit simulation software exist, they generally have the following limitations: (a) Insufficient simulation depth: Most can only simulate CPU core instructions, and the simulation accuracy for rich peripherals (especially complex sensors) is poor, resulting in a large difference from the behavior of real hardware; (b) Lack of visual interaction: The configuration process relies on text files or complex scripts, which is not intuitive and prone to errors; (c) Disconnect between virtual and real: The driver model used in the virtual environment is inconsistent with the real hardware driver. Code that passes the test in the virtual environment often cannot run on real hardware due to underlying driver, interrupt or timing problems, resulting in "virtual test invalid".
[0005] The above content is only used to help understand the technical solution of the present invention and does not represent an admission that the above content is prior art. Summary of the Invention
[0006] The main objective of this invention is to provide a development board and program verification system that combines virtual and physical elements, aiming to solve the technical problem that the traditional development process is relatively fragmented, ultimately leading to a waste of time and money.
[0007] To achieve the above objectives, this invention provides a virtual-physical integrated development board and program verification system. It includes: a virtual development module, a visual peripheral configuration module, an adjustable virtual sensor module, and a program export module; the visual peripheral configuration module is used to generate a development board model; the adjustable virtual sensor module is used to generate physical change parameters and load these parameters onto the development board model; the virtual development module is used to compile code files; the program export module includes a parameter adaptation module, a code compatibility module, a file generation module, and a timing calibration module; the parameter adaptation module is used to retrieve the development board model to obtain hardware parameters; the code compatibility module is used to identify the virtual driver of the virtual development module and, in conjunction with the hardware parameters, map the virtual driver to a real hardware driver to adapt the code file; the file generation module is used to segment the adapted code file according to the hardware parameters and embed address information, checksum, and file end marker into the segmented code file to generate a HEX file; the timing calibration module is used to retrieve the corresponding timing parameters according to the hardware parameters and embed the timing parameters into the HEX file.
[0008] Furthermore, the visual peripheral configuration module includes a graphics unit, a virtual peripheral component library, and an interactive unit; the virtual peripheral component library stores component information of electronic components; the component information includes graphical information and hardware parameters; the interactive unit is used to combine component information to obtain a development board model; and the graphics unit is used to display the development board model.
[0009] Furthermore, the adjustable virtual sensor module includes a virtual sensor model library, a sensor parameter adjuster, and a sensor behavior engine; the virtual sensor model library stores sensor models; the sensor parameter adjuster is used to input physical change parameters; and the sensor behavior engine is used to generate corresponding data streams based on the physical change parameters and load the data streams onto the development board model.
[0010] Furthermore, the code compatibility module includes a redundant code library, a hardware underlying code library, and a timing code library. The code compatibility module is used to compare the redundant code library with the code file to eliminate redundant code. The code compatibility module is used to retrieve the underlying code from the hardware underlying code library based on hardware parameters and embed the underlying code into the code file. The code compatibility module is used to retrieve the timing code library based on hardware parameters to adapt the code file.
[0011] Furthermore, the file generation module is used to segment the code file according to the hardware parameters to correspond to the flash partition; the file generation module is used to convert the segmented code file into hexadecimal and integrate the segmented code file to generate a HEX file.
[0012] Furthermore, the timing calibration module is equipped with a hardware timing database; the hardware timing database stores timing parameters; the timing calibration module is used to detect timing conflicts in HEX files; when a timing conflict exists, the timing calibration module outputs conflict information.
[0013] Furthermore, the verification system also includes a file verification module; the file verification module is used to detect the format integrity of the HEX file; when the format integrity is abnormal, the file verification module outputs abnormal information; the file verification module is used to verify the driver compatibility, timing compatibility, and address compatibility of the HEX file based on hardware parameters; when any one of the driver compatibility, timing compatibility, and address compatibility is abnormal, the file verification module outputs abnormal information.
[0014] Compared with the prior art, the present invention has the following advantages: Compared to existing virtual simulation tools, this invention converts code files from the virtual environment into a state compatible with the physical development board, thus achieving a combination of virtual and physical simulation. On the one hand, it minimizes the possibility of ineffective simulation. On the other hand, it maximizes the depth of simulation, enabling effective simulation of a wide range of peripherals.
[0015] This invention enables the development board model to be equipped with the necessary sensors through an adjustable virtual sensor module, and can build a virtual test environment, thereby effectively reducing the cost of reproducing the actual environment, and making the experimental process safe, stable and effective to repeat.
[0016] This invention enables the code to be fully verified in the early stages, thereby effectively improving debugging efficiency and avoiding the adverse effects of repeated burning on the chip life of the actual device. Attached Figure Description
[0017] Figure 1 System overall structure diagram.
[0018] The realization of the objective, functional features and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0019] It should be understood that the specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of the invention.
[0020] This invention provides a virtual-physical integrated development board and program verification system, referring to... Figure 1It includes: a virtual development module, a visual peripheral configuration module, an adjustable virtual sensor module, a program export module, and a file verification module. The visual peripheral configuration module generates a development board model. The adjustable virtual sensor module generates physical change parameters and loads them onto the development board model. The virtual development module compiles code files. The program export module includes a parameter adaptation module, a code compatibility module, a file generation module, and a timing calibration module. The parameter adaptation module retrieves the development board model to obtain hardware parameters. The code compatibility module identifies the virtual drivers of the virtual development module and maps them to real hardware drivers based on hardware parameters to adapt the code files. The file generation module segments the adapted code files according to hardware parameters and embeds address information, checksums, and file end markers into the segmented code files to generate HEX files. The timing calibration module retrieves the corresponding timing parameters based on the hardware parameters and embeds them into the HEX file.
[0021] Specifically, the visual peripheral configuration module includes a graphics unit, a virtual peripheral component library, and an interactive unit. The virtual peripheral component library stores component information for electronic components. This component information includes graphical information and hardware parameters. Examples include GPIO, UART, buttons, buzzers, LCD controllers, and network port models. The graphics unit displays this component information. Users can then view the graphics unit and drag and drop the required components through the interactive unit to assemble the desired development board model. The graphics unit can use a display device such as a computer monitor. The interactive unit can use an input device such as a mouse.
[0022] The adjustable virtual sensor module includes a virtual sensor model library, a sensor parameter adjuster, and a sensor behavior engine. The virtual sensor model library stores sensor models, such as temperature, humidity, pressure, light, and acceleration sensors. The sensor parameter adjuster is represented on the graphical unit as user-interactive windows such as manual input boxes, sliders, and curve editors. In practical applications, users can select the desired sensor from the virtual sensor model library and attach it to the corresponding interface of the development board model. Simultaneously, users can set the required physical change parameters through the sensor parameter adjuster. The sensor behavior engine then generates the corresponding data stream based on the physical change parameters and loads the data stream onto the development board model.
[0023] The Virtual Development Module (VDM) is an integrated software environment that runs on a general-purpose computer (such as a PC). Its internal modules collaborate through software interfaces and a data bus. Users can compile code files using the VDM.
[0024] The parameter adaptation module can extract the hardware parameters contained in the development board model. Simultaneously, through this module, users can save the configuration parameters of commonly used development boards, creating configuration templates that can be directly called upon later, reducing repetitive operations.
[0025] The code compatibility module identifies virtual drivers called in the code file, such as virtual GPIO drivers and virtual interrupt drivers. Simultaneously, the module maps virtual drivers to corresponding real hardware drivers based on hardware parameters. For example, it maps virtual GPIO ports to the PA0 port of a real development board, and virtual interrupt vectors to the interrupt vector table of a real chip. The code compatibility module also includes redundant code libraries, hardware-level code libraries, and timing code libraries. It detects redundant code in the code file caused by the characteristics of the virtual environment by comparing the redundant code libraries with the code file. Examples include debug logs and simulated driver code in the virtual environment. After detection, redundant code is removed. Furthermore, the module retrieves low-level code from the hardware-level code library based on hardware parameters, such as chip initialization code, clock configuration code, and driver initialization code, and embeds this low-level code into the code file to prevent runtime failure due to missing code. Finally, the module retrieves the timing code library based on hardware parameters to adapt the code file. This corrects timing logic flaws ignored in the virtual environment. For example, it supplements corresponding delay functions for I / O port level switching delays that are not considered in the virtual environment. At this point, the code compatibility module has completed the adaptation of the code files.
[0026] The file generation module segments the adapted code file according to the flash partitions specified in the hardware parameters. For example, it segments the code into boot, application, and data partitions, assigning corresponding physical addresses to ensure the code, after being burned, corresponds to the designated storage area on the actual hardware. Then, following the HEX file specification, the module converts the segmented code into hexadecimal format and embeds address information, checksums, and end-of-file markers. At this point, the code file is converted into segmented HEX data. Finally, the file generation module integrates the segmented HEX data to generate a complete HEX file.
[0027] The timing calibration module contains a hardware timing database that stores timing parameters. The module retrieves the corresponding timing parameters based on the hardware parameters, such as interrupt response time, I / O port switching timing, and communication timing. It then embeds these timing parameters into an initial HEX file, ensuring the HEX file contains the actual timing logic. Subsequently, the module detects potential timing conflicts within the HEX file. When a timing conflict exists, the module outputs conflict information.
[0028] The file verification module checks the format integrity of the HEX file. For example, it checks for the presence of a file end marker and the contiguousness of address allocations to prevent burning failures due to file corruption. When the format integrity is abnormal, the file verification module outputs an error message. Simultaneously, it verifies the driver compatibility, timing compatibility, and address compatibility of the HEX file in conjunction with hardware parameters to ensure full compatibility between the HEX file and the actual development board. If any of these three aspects is abnormal, the file verification module outputs an error message. After all verifications are complete, the HEX file can be loaded onto the development board model for simulation. Subsequently, the HEX file can be burned onto the physical development board for real-world testing.
[0029] In summary, compared to existing virtual simulation tools, this invention converts code files in the virtual environment into a state compatible with the physical development board, thereby achieving a combination of virtual and physical simulation. On the one hand, it minimizes the possibility of ineffective simulation. On the other hand, it maximizes the depth of simulation, enabling effective simulation of a wide range of peripherals.
[0030] Meanwhile, this invention enables the development board model to be equipped with the necessary sensors through an adjustable virtual sensor module, and can build a virtual test environment, thereby effectively reducing the cost of reproducing the actual environment, and making the experimental process safe, stable and effective to repeat.
[0031] On the other hand, this invention enables the code to be fully verified in the early stages, thereby effectively improving debugging efficiency and avoiding the adverse effects of repeated burning on the chip life of the actual device.
[0032] It is worth noting that, in a real-world environment, the technical solution of this invention is essentially a collection of code running on a computer. The term "module" used above does not necessarily refer to a physical hardware component, but rather to a functional collection of code. It is simply used as a euphemism for convenience.
[0033] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (SSD)).
[0034] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0035] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.
[0036] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
[0037] It should be understood that the above are merely illustrative examples and do not constitute any limitation on the technical solutions of the present invention. In specific applications, those skilled in the art can make settings as needed, and the present invention does not impose any restrictions on this.
[0038] It should be noted that the workflow described above is merely illustrative and does not limit the scope of protection of this invention. In practical applications, those skilled in the art can select some or all of the workflow to achieve the purpose of this embodiment according to actual needs, and no restrictions are imposed here.
[0039] Furthermore, it should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.
[0040] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.
[0041] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as read-only memory (ROM) / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.
[0042] The above are merely preferred embodiments of the present invention and do not limit the scope of the patent. Any equivalent structural or procedural transformations made based on the description and drawings of the present invention, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of the present invention.
[0043] It is understood that the system provided in the embodiments of the present invention corresponds to the method provided in the embodiments of the present invention, and the explanation, examples and beneficial effects of the relevant content can be referred to the corresponding parts of the above methods.
Claims
1. A virtual-physical integrated development board and program verification system, characterized in that, include: Virtual development module, visual peripheral configuration module, adjustable virtual sensor module, program export module; The visualization peripheral configuration module is used to generate the development board model; The adjustable virtual sensor module is used to generate physical change parameters and load the physical change parameters onto the development board model; The virtual development module is used to compile code files; The program export module includes a parameter adaptation module, a code compatibility module, a file generation module, and a timing calibration module. The parameter adaptation module is used to retrieve the development board model to obtain hardware parameters; The code compatibility module is used to identify the virtual driver of the virtual development module and map the virtual driver to a real hardware driver in combination with the hardware parameters to adapt to the code file; The file generation module is used to segment the adapted code file according to the hardware parameters, and to embed address information, checksum and file end marker into the segmented code file to generate a HEX file; The timing calibration module is used to retrieve the corresponding timing parameters based on the hardware parameters and embed the timing parameters into the HEX file.
2. The virtual-physical integrated development board and program verification system as described in claim 1, characterized in that, The visualization peripheral configuration module includes a graphics unit, a virtual peripheral component library, and an interaction unit; The virtual peripheral component library stores component information for electronic components; The component information includes graphic information and hardware parameters; The interaction unit is used to combine the component information to obtain the development board model; The graphics unit is used to display the development board model.
3. The virtual-physical integrated development board and program verification system as described in claim 1, characterized in that, The adjustable virtual sensor module includes a virtual sensor model library, a sensor parameter adjuster, and a sensor behavior engine. The virtual sensor model library stores sensor models; The sensor parameter adjuster is used to input the physical change parameters; The sensor behavior engine is used to generate a corresponding data stream based on the physical change parameters and load the data stream onto the development board model.
4. The virtual-physical integrated development board and program verification system as described in claim 1, characterized in that, The code compatibility module includes a redundant code library, a hardware underlying code library, and a timing code library. The code compatibility module is used to compare the redundant code library with the code file to eliminate redundant code; The code compatibility module is used to retrieve the underlying code in the hardware underlying code library according to the hardware parameters, and embed the underlying code into the code file; The code compatibility module is used to retrieve the timing code library based on the hardware parameters in order to adapt the code file.
5. The virtual-physical integrated development board and program verification system as described in claim 1, characterized in that, The file generation module is used to segment the code file according to the hardware parameters to correspond to the flash partition; The file generation module is used to convert the segmented code file into hexadecimal and integrate the segmented code file to generate a HEX file.
6. The virtual-physical integrated development board and program verification system as described in claim 1, characterized in that, The timing calibration module is equipped with a hardware timing database. The timing parameters are stored in the hardware timing database; The timing calibration module is used to detect timing conflicts in the HEX file; When the timing conflict exists, the timing calibration module outputs conflict information.
7. The virtual-physical integrated development board and program verification system as described in claim 1, characterized in that, The verification system also includes a file verification module; The file verification module is used to detect the format integrity of the HEX file; When the format integrity is abnormal, the file verification module outputs abnormal information; The file verification module is used to verify the driver compatibility, timing compatibility, and address compatibility of the HEX file based on the hardware parameters. When any one of the driver compatibility, timing compatibility, or address compatibility is abnormal, the file verification module outputs abnormal information.