A circuit component completion method based on type-aware heterogeneous graph

Abstract

The application provides a circuit component completion method based on a type-aware heterogeneous graph, comprising the following steps: S1, parsing an input incomplete circuit netlist, and constructing a circuit function heterogeneous graph capable of expressing circuit topology structure and component function semantics according to component types and connection relationships; S2, generating type-aware path distribution coding, and fusing the type-aware path distribution coding with structural features and type features of nodes; S3, inputting the structure of the circuit function heterogeneous graph and the enhanced node feature representation into a graph neural network to obtain updated node features; and S4, predicting a component type to be completed, and generating a complete circuit structure. The application constructs a heterogeneous graph model capable of expressing circuit topology structure and component function semantics, and designs a type-aware path distribution coding mechanism, so that the model can simultaneously depict circuit structure topology relationships, component function types and path semantic information.

Description

Technical Field

[0001] This invention relates to the field of circuit component technology, and more particularly to a method for circuit component completion based on type-aware heterogeneous graphs. Background Technology

[0002] A circuit netlist is a core document in electronic design automation (EDA) used to describe circuit connections, containing crucial information such as component types, pin definitions, and network connections. During integrated circuit design and analysis, incomplete netlists often occur due to design iterations, missing information, or data corruption, requiring the inference and completion of missing components and their connections. In recent years, graph neural network (GNN) technology has been widely applied in circuit structure analysis. By converting the circuit netlist into a graph structure and using the graph model to learn circuit topology features, it enables automatic inference and repair of circuit design information.

[0003] In existing technologies, circuit structure completion methods based on graph neural networks typically represent circuit netlists as graph structures, where components and network nodes are uniformly considered as nodes in the graph. Node representations are learned through neighborhood information aggregation, and then the missing connections or circuit structures are predicted. Some studies model the circuit completion task as a structure prediction problem, using homogeneous graph models such as Graph Convolutional Networks (GCNs) or Graph Attention Networks (GATs) to learn the circuit topology, recovering missing information through node classification or link prediction. Furthermore, heterogeneous graph learning methods have been applied in fields such as recommender systems, where features of multiple node types are aggregated through predefined node types and meta-path rules to enhance the model's ability to express type semantics.

[0004] However, existing technologies still have significant shortcomings in practical applications. Traditional homogeneous graph methods treat components with different functions, such as resistors, capacitors, and transistors, as the same type of node, making it difficult to distinguish the essential differences in electrical function and connection mode among different components. Existing methods mainly rely on local topological neighborhood information for feature learning, lacking the ability to model long-term path dependencies such as bias networks, feedback structures, and functional links in the circuit, and cannot effectively capture the configuration rules determined by the functional roles of components and electrical constraints. At the same time, existing technologies model the circuit completion problem as a whole as a structural restoration task, mainly inferring missing information indirectly by predicting connection relationships, lacking a modeling mechanism for specifically predicting the functional categories of components. This makes it difficult to accurately infer the appropriate component type when facing the absence of key functional components, affecting the functional correctness of the circuit completion results. Summary of the Invention

[0005] In view of this, the purpose of this invention is to propose a circuit component completion method based on type-aware heterogeneous graphs, so as to solve the technical problem that existing circuit structure completion techniques are unable to accurately infer reasonable component types when faced with circuits lacking functional components.

[0006] The technical means employed in this invention are as follows:

[0007] A circuit component completion method based on type-aware heterogeneous graphs includes the following steps: S1. Parse the incomplete circuit netlist input and construct a circuit functional heterogeneous graph that can express the circuit topology and component functional semantics based on the component types and connection relationships. The circuit functional heterogeneous graph contains various types of nodes and edges representing electrical connection relationships. S2. In the circuit functional heterogeneous diagram, extract the neighborhood path of each node, count the number distribution of different types of nodes in the neighborhood path, generate type-aware path distribution code, and fuse the type-aware path distribution code with the structural features and type features of the node to obtain an enhanced node feature representation. S3. Input the structure of the circuit functional heterogeneous graph and the enhanced node feature representation into the graph neural network, and learn the high-order structural representation of the nodes by aggregating neighborhood information to obtain the updated node features. S4. Input the updated node features of the candidate node corresponding to the position to be filled into the classifier, predict the type of component to be filled, and fill in the corresponding component node and its connection relationship with the network node at the position to be filled to generate a complete circuit structure.

[0008] Furthermore, the types of nodes include passive component nodes, active component nodes, power supply component nodes, and network nodes, which are classified according to their electrical functional attributes.

[0009] Furthermore, the initial feature vector of the node is as follows:

[0010] in, Represents a node The initial feature vector of the node; The one-hot encoding represents the component category, and the one-hot encoding has the same dimension as the node functional role embedding vector. Represents the embedding vector of a node's functional role; The first one in the circuit functional heterogeneous diagram 1 node Represents a node The type mapping result, which is used to characterize the node. It belongs to one of the following: passive component node, active component node, power component node, or network node.

[0011] Furthermore, generating type-aware path distribution codes includes the following steps: The number of different types of nodes in the path within the K-hop neighborhood of the count node is counted, and a path type statistical vector is constructed. The path type statistical vector includes the number of passive components, the number of active components, the number of power supply components, and the number of network nodes. Normalize the path type statistical vector; The normalized path type statistical vector is linearly transformed to obtain the path distribution embedding vector.

[0012] Furthermore, the path type statistical vector is normalized using the following formula:

[0013] The path distribution embedding formula is as follows:

[0014] in, Represents a node Normalized type-aware path distribution vector; Represents a node Path type statistical vector; Indicates the summation symbol; This represents the sum of the components of the path type statistical vector; The first one in the circuit functional heterogeneous diagram One node; This represents the learnable parameter matrix used to map the normalized path distribution vector to the path distribution embedding representation; Represents a node The path distribution embedding vector.

[0015] Furthermore, the node structure feature vector of the node is as follows:

[0016]

[0017] in, For nodes The structural feature vector, For node degree, For nodes To complete the target position node The shortest path distance, This indicates the location node of the component to be completed in the circuit. Representing the adjacency matrix The Middle Line 1 Column elements, The adjacency matrix represents the circuit functional heterogeneity graph. The first one in the circuit functional heterogeneous diagram 1 node The first one in the circuit functional heterogeneous diagram 1 node This represents the total number of nodes in a circuit functional heterogeneity diagram. Represents the adjacency matrix The Each element from arrive Perform summation; when node With nodes When a connection exists Otherwise, it is 0.

[0018] Furthermore, the graph neural network is a multi-layer graph convolutional network, and the calculation process is as follows:

[0019] in, , Represents the characteristics of node structure Component type characteristics Type-aware path distribution encoding features The node feature matrix obtained after fusion is used as the initial input feature of the graph neural network; Indicates the first Layer model parameters, Represents a non-linear activation function; Indicates the first Layer node feature representation matrix, Indicates the first Layer node feature representation matrix, The adjacency matrix represents the circuit functional heterogeneity graph. Represented by the adjacency matrix The calculated degree matrix has diagonal elements representing the degree of the corresponding nodes. This represents the propagation matrix after normalizing the adjacency matrix. This represents the layer index of a graph convolutional network.

[0020] Furthermore, the method for predicting the types of components that need to be supplemented is as follows: For the location node of the missing component in the circuit Representing nodes The input is processed by the classification prediction module for inference, and the calculation process is as follows:

[0021] in, This represents the probability distribution of a node belonging to different component categories. Indicates the location node of the missing component. The node representation vector obtained after propagation through the graph neural network, and These represent the weight parameter matrices of the first and second layers in the classification prediction module, respectively. and These represent the bias vectors of the corresponding layers. Represents the linear rectified activation function. This represents the normalization function, which is used to convert the output of the classification prediction module into probability values ​​corresponding to each component category. Based on the predicted probability, select the component category corresponding to the highest probability, add the corresponding component node to the circuit structure, and update the relevant connection relationships to obtain the completed circuit structure.

[0022] Furthermore, it also includes a pre-training step, which jointly trains the graph neural network and the classifier by minimizing the cross-entropy loss function between the predicted type and the true type.

[0023] Furthermore, the classification loss function for the joint training is as follows:

[0024] in, This represents the classification loss function value. Indicates the number of training samples. Indicates the first The actual component category labels corresponding to each training sample The model represents the first The probability distribution of component categories predicted from each training sample This indicates that a logarithmic operation is performed on the predicted probability distribution. This indicates that the classification loss term corresponding to all training samples is summed.

[0025] Compared with the prior art, the present invention has the following advantages: This invention can faithfully preserve circuit structure information and component functional semantics. Through circuit-aware heterogeneous graph modeling, passive components, active components, power supply components, and network nodes are represented by distinct types, enabling a unified expression of circuit topology and electrical functional relationships within the graph structure. This overcomes the problem that traditional homogeneous graph methods struggle to characterize the functional differences of various components. Since circuit structures inherently possess graph structure characteristics, using graph neural networks for representation learning can effectively capture the complex dependencies and topological semantics between nodes.

[0026] This invention proposes a type-aware path distribution coding mechanism. By statistically analyzing the distribution characteristics of different component types in circuit connection paths, it constructs a path semantic representation that reflects the functional structure of the circuit. This enables the model to identify typical circuit structure patterns, thereby improving the accuracy and stability of inferring missing component types. Compared to traditional methods that rely solely on local topology, this invention comprehensively utilizes path semantic information and component functional information, enhancing the ability to express complex circuit structures.

[0027] This invention constructs a graph neural network inference model for component completion tasks. Through neighborhood information propagation and node representation learning, it predicts the type of components missing in a circuit and automatically generates the completed structure. This method is applicable to large-scale circuit diagram analysis and completion tasks, effectively reducing the risk of circuit design errors, improving the efficiency of circuit structure analysis and automated design, and enhancing the reliability of electronic design automation toolchains. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the method flow of the present invention. Detailed Implementation

[0030] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0031] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0032] like Figure 1 As shown, this invention provides a circuit component completion method based on type-aware heterogeneous graphs, comprising the following steps: S1. Parse the incomplete circuit netlist input and construct a circuit functional heterogeneous graph that can express the circuit topology and component functional semantics based on the component types and connection relationships. The circuit functional heterogeneous graph contains various types of nodes and edges representing electrical connection relationships. S1 aims to parse the circuit netlist and construct a circuit functional heterogeneity diagram that can express the functional roles of components and their connection structures. Specifically: First, the input circuit netlist is parsed, and the circuit structure is converted into a heterogeneous graph structure that can express the functional semantics of the components. Let the input circuit netlist be represented as... ,in, Indicates the input circuit netlist, This represents the total number of components in the circuit netlist. Represents the first in the circuit netlist Each component. Includes component types Pin set and the connection relationship between pins and network nodes. .in Indicates components The One pin, This indicates the network node to which the pin is connected.

[0033] Based on the above information, the circuit netlist is converted into a graph structure, where components and network nodes are represented as graph nodes. To characterize the functional roles of different components in the circuit, this invention classifies nodes into four categories based on their electrical functional attributes: Passive, Active, Source, and Network nodes, and defines node type mapping functions. ,in Represents a set of nodes. This represents a type mapping function that maps nodes to their corresponding functional types. These represent passive component node types, active component node types, power supply component node types, and network node types, respectively. Through this mapping relationship, the components and network nodes in the circuit netlist are converted into heterogeneous graph nodes, and a node set is constructed. ,in, The first one in the circuit functional heterogeneous diagram 1 node This represents the total number of nodes in the circuit functional heterogeneity graph. Then, an edge set is constructed based on the connection relationships between pins and network nodes. This edge represents the electrical connection between component nodes and network nodes, where... Indicates with components The The corresponding nodes in the heterogeneous graph for each pin-connected network node.

[0034] Through the above steps, a circuit functional heterogeneity diagram can be obtained. To enable the model to learn the structural properties and functional information of components, an initial feature vector is constructed for each node:

[0035] in, Represents a node The initial feature vector of the node; One-hot encoding indicating component category Represents the embedding vector of a node's functional role; The first one in the circuit functional heterogeneous diagram 1 node Represents a node The type mapping result, which is used to characterize the node. It belongs to one of the following categories: passive component node, active component node, power component node, or network node. Ultimately, all node features are combined to form a node feature matrix. ,in, This represents the total number of nodes in a circuit functional heterogeneity diagram. The dimension of the node feature vector. Represents a set of real numbers OK The column matrix space enables a unified representation of heterogeneous circuit diagrams, providing a structural foundation for subsequent component completion and deduction.

[0036] S2. In the circuit functional heterogeneous diagram, extract the neighborhood path of each node, count the number distribution of different types of nodes in the neighborhood path, generate type-aware path distribution code, and fuse the type-aware path distribution code with the structural features and type features of the node to obtain an enhanced node feature representation. After obtaining the heterogeneous circuit diagram, S2 needs to further characterize the path semantic information in the circuit structure. Different components in the circuit structure often appear in specific combinations within the functional path, such as amplification structures, feedback structures, or bias networks. Therefore, this invention proposes a Type-aware Path Distribution Encoding (TPDE) method to characterize the distribution patterns of component types in the circuit structure. Specifically, it includes: For any node in the graph First, extract its representation in the circuit diagram from the graph structure. skip neighborhood path set ,in, Represents the first path in the set of paths. 1 path, each path This represents a circuit connection path composed of a sequence of nodes. Subsequently, the distribution of the number of different types of components in the path is statistically analyzed to construct a path type statistical vector. ,in , , and These represent the number of passive components, active components, power supply components, and network nodes in the path, respectively. To eliminate the influence of path length differences, this statistical vector is normalized.

[0037] Obtain the type-aware path distribution vector of the node. Further construct the path distribution embedding:

[0038] in, Represents a node Normalized type-aware path distribution vector; Represents a node Path type statistical vector; This represents the sum of the components of the path type statistical vector; The first one in the circuit functional heterogeneous diagram One node; This represents the learnable parameter matrix used to map the normalized path distribution vector to the path distribution embedding representation; Represents a node The path distribution embedding vector.

[0039] To characterize the differences in path semantics between different nodes, this invention further introduces a path semantic difference metric:

[0040] Jensen–Shannon Divergence is defined as:

[0041]

[0042] in, Represents a node With nodes Path semantic difference measurement between and These represent two nodes in a circuit functional heterogeneous diagram. and Representing nodes respectively With nodes Normalized type-aware path distribution vector; and Let these be two probability distribution vectors to be compared. Represents the probability distribution vector and The mean distribution vector, This represents the Kullback–Leibler divergence, used to measure the difference between two probability distributions.

[0043] In addition, to characterize the structural position of nodes in the circuit topology, node structural features are constructed:

[0044]

[0045] in, For nodes The structural feature vector, For node degree, For nodes To complete the target position node The shortest path distance, This indicates the location node of the component to be completed in the circuit. Representing the adjacency matrix The Middle Line 1 Column elements, The adjacency matrix represents the circuit functional heterogeneity graph. The first one in the circuit functional heterogeneous diagram 1 node The first one in the circuit functional heterogeneous diagram 1 node This represents the total number of nodes in a circuit functional heterogeneity diagram. Represents the adjacency matrix The Each element from arrive Perform summation; when node With nodes When a connection exists Otherwise, it is 0.

[0046] Meanwhile, the node type characteristic is defined as ,in, Represents a node One-hot encoding is used to correspond to the component category. Then, path distribution features are fused with node structure features and node type features to obtain the node... Final statement :

[0047] in, Represents the structural features of nodes. Indicates the characteristics of component type. This represents the type-aware path distribution encoding features. This represents concatenation. All nodes together form a new node feature matrix. This feature matrix simultaneously contains structural information, type information, and path semantic information, thus solving the problem that existing methods struggle to express the semantic structure of circuit paths.

[0048] S3. Input the structure of the circuit functional heterogeneous graph and the enhanced node feature representation into the graph neural network, and learn the high-order structural representation of the nodes by aggregating neighborhood information to obtain the updated node features. S4. Input the updated node features of the candidate node corresponding to the position to be filled into the classifier, predict the type of component to be filled, and fill in the corresponding component node and its connection relationship with the network node at the position to be filled to generate a complete circuit structure.

[0049] In obtaining node feature representations Subsequently, this invention utilizes graph neural networks to learn the representation of the circuit structure and predict the type of components at missing locations. The specific method includes: Let the input circuit diagram be as follows: ,in This represents the adjacency matrix of the graph. The node features are propagated and updated using a multi-layer graph neural network; the calculation process is as follows:

[0050] in, , Represents the characteristics of node structure Component type characteristics Type-aware path distribution encoding features The node feature matrix obtained after fusion is used as the initial input feature of the graph neural network; Indicates the first Layer model parameters, Represents a non-linear activation function; Indicates the first Layer node feature representation matrix, Indicates the first Layer node feature representation matrix, The adjacency matrix represents the circuit functional heterogeneity graph. Represented by the adjacency matrix The calculated degree matrix has diagonal elements representing the degree of the corresponding nodes. This represents the propagation matrix after normalizing the adjacency matrix. This represents the layer index of a graph convolutional network. After multiple layers of information propagation, a high-order structural representation of the nodes can be obtained. ,in, This represents a node representation matrix composed of the higher-order structure representations of all nodes. Indicates the first The high-order structural representation vector obtained after propagating through a graph neural network from each node. This represents the total number of nodes in the circuit functional heterogeneous diagram.

[0051] For the location node of the missing component in the circuit Represent its nodes The input is used for classification prediction module inference, and its calculation process is as follows:

[0052] in, This represents the probability distribution of a node belonging to different component categories. Indicates the location node of the missing component. The node representation vector obtained after propagation through the graph neural network, and These represent the weight parameter matrices of the first and second layers in the classification prediction module, respectively. and These represent the bias vectors of the corresponding layers. Represents the linear rectified activation function. This represents the normalization function, used to convert the output of the classification prediction module into probability values ​​corresponding to each component category. Based on the predicted probabilities, the component category with the highest probability is selected, and the corresponding component node is added to the circuit structure. Simultaneously, the relevant connection relationships are updated, resulting in the completed circuit structure.

[0053] To train the model, a classification loss function is introduced:

[0054] in, This represents the classification loss function value. Indicates the number of training samples. Indicates the first The actual component category labels corresponding to each training sample The model represents the first The probability distribution of component categories predicted from each training sample This indicates that a logarithmic operation is performed on the predicted probability distribution. This represents the summation of the classification loss terms corresponding to all training samples. After training the model by minimizing the loss function, it is possible to predict missing components and generate the completed circuit structure.

[0055] Through the above steps, the present invention can automatically infer the type of missing components under incomplete circuit netlist conditions, realize automatic circuit structure completion, and can be further applied to the automatic circuit design and structure repair tasks in EDA toolchain.

[0056] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A circuit component completion method based on type-aware heterogeneous graphs, characterized in that, Includes the following steps: S1. Parse the incomplete circuit netlist input and construct a circuit functional heterogeneous graph that can express the circuit topology and component functional semantics based on the component types and connection relationships. The circuit functional heterogeneous graph contains various types of nodes and edges representing electrical connection relationships. S2. In the circuit functional heterogeneous diagram, extract the neighborhood path of each node, count the number distribution of different types of nodes in the neighborhood path, generate type-aware path distribution code, and fuse the type-aware path distribution code with the structural features and type features of the node to obtain an enhanced node feature representation. S3. Input the structure of the circuit functional heterogeneous graph and the enhanced node feature representation into the graph neural network, and learn the high-order structural representation of the nodes by aggregating neighborhood information to obtain the updated node features. S4. Input the updated node features of the candidate node corresponding to the position to be filled into the classifier, predict the type of component to be filled, and fill in the corresponding component node and its connection relationship with the network node at the position to be filled to generate a complete circuit structure.

2. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, The types of nodes include passive component nodes, active component nodes, power supply component nodes, and network nodes, which are classified according to their electrical functional attributes.

3. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, The initial feature vector of the node is as follows: in, Represents a node The initial feature vector of the node; The one-hot encoding represents the component category, and the one-hot encoding has the same dimension as the node functional role embedding vector. Represents the embedding vector of a node's functional role; The first one in the circuit functional heterogeneous diagram 1 node Represents a node The type mapping result, which is used to characterize the node. It belongs to one of the following: passive component node, active component node, power component node, or network node.

4. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, Generating type-aware path distribution codes involves the following steps: The number of different types of nodes in the path within the K-hop neighborhood of the count node is counted, and a path type statistical vector is constructed. The path type statistical vector includes the number of passive components, the number of active components, the number of power supply components, and the number of network nodes. Normalize the path type statistical vector; The normalized path type statistical vector is linearly transformed to obtain the path distribution embedding vector.

5. The circuit component completion method based on type-aware heterogeneous graphs according to claim 4, characterized in that, The path type statistical vector is normalized using the following formula: The path distribution embedding formula is as follows: in, Represents a node Normalized type-aware path distribution vector; Represents a node Path type statistical vector; Indicates the summation symbol; This represents the sum of the components of the path type statistical vector; The first one in the circuit functional heterogeneous diagram One node; This represents the learnable parameter matrix used to map the normalized path distribution vector to the path distribution embedding representation; Represents a node The path distribution embedding vector.

6. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, The node structure feature vector of the node is as follows: in, For nodes The structural feature vector, For node degree, For nodes To complete the target position node The shortest path distance, This indicates the location node of the component to be completed in the circuit. Representing the adjacency matrix The Middle Line number Column elements, The adjacency matrix represents the circuit functional heterogeneity graph. The first one in the circuit functional heterogeneous diagram 1 node The first one in the circuit functional heterogeneous diagram 1 node This represents the total number of nodes in a circuit functional heterogeneity diagram. Represents the adjacency matrix The Each element from arrive Perform summation; when node With nodes When a connection exists Otherwise, it is 0.

7. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, The graph neural network is a multi-layer graph convolutional network, and the calculation process is as follows: in, , Represents the characteristics of node structure Component type characteristics Type-aware path distribution encoding features The node feature matrix obtained after fusion is used as the initial input feature of the graph neural network; Indicates the first Layer model parameters, Represents a nonlinear activation function; Indicates the first Layer node feature representation matrix, Indicates the first Layer node feature representation matrix, The adjacency matrix representing the circuit functional heterogeneity graph; Represented by the adjacency matrix The calculated degree matrix has diagonal elements representing the degree of the corresponding nodes. This represents the propagation matrix after normalizing the adjacency matrix. This represents the layer index of a graph convolutional network.

8. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, The method for predicting the types of components that need to be supplemented is as follows: For the location node of the missing component in the circuit Representing nodes The input is processed by the classification prediction module for inference, and the calculation process is as follows: in, This represents the probability distribution of a node belonging to different component categories. Indicates the location node of the missing component. The node representation vector obtained after propagation through the graph neural network, and These represent the weight parameter matrices of the first and second layers in the classification prediction module, respectively. and These represent the bias vectors of the corresponding layers. Represents the linear rectification activation function. This represents the normalization function, which is used to convert the output of the classification prediction module into probability values ​​corresponding to each component category. Based on the predicted probability, select the component category corresponding to the highest probability, add the corresponding component node to the circuit structure, and update the relevant connection relationships to obtain the completed circuit structure.

9. The circuit component completion method based on type-aware heterogeneous graphs according to claim 1, characterized in that, It also includes a pre-training step, which jointly trains the graph neural network and the classifier by minimizing the cross-entropy loss function between the predicted type and the true type.

10. The circuit component completion method based on type-aware heterogeneous graphs according to claim 9, characterized in that, The classification loss function for the joint training is as follows: in, This represents the classification loss function value. Indicates the number of training samples. Indicates the first The actual component category labels corresponding to each training sample The model represents the first The probability distribution of component categories predicted from each training sample This indicates that a logarithmic operation is performed on the predicted probability distribution. This indicates that the classification loss term corresponding to all training samples is summed.

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