Pixel driving circuit, display panel and display device

Abstract

Embodiments of the present application disclose a pixel driving circuit, a display panel and a display device. The pixel driving circuit comprises a driving transistor and a first transistor. The first transistor is connected in series between the driving transistor and a light emitting module. The gate of the first transistor is electrically connected with the gate of the driving transistor, or the gate of the first transistor is connected with a fixed voltage. The width of the channel region of the first transistor is less than or equal to the width of the channel region of the driving transistor, and the length of the channel region of the first transistor is less than the length of the channel region of the driving transistor. The present application can reduce the leakage of the driving transistor on the basis of improving display uniformity and improving display effect.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a pixel driving circuit, a display panel, and a display device. Background Technology

[0002] With the development of display technology, users have increasingly higher requirements for the display effect of display devices.

[0003] In related technologies, display devices include multiple pixel driving circuits, each containing a driving transistor. The driving transistor generates a driving current, which drives the light-emitting device to emit light. Problems such as leakage current in the driving transistor and threshold voltage drift can cause issues like unexplained light leakage and poor display uniformity, thus affecting the display effect. Summary of the Invention

[0004] This invention provides a pixel driving circuit, a display panel, and a display device to improve display uniformity while reducing leakage current of the driving transistor and improving display effect.

[0005] According to one aspect of the present invention, a pixel driving circuit is provided, comprising: a driving transistor and a first transistor, the first transistor being connected in series between the driving transistor and a light-emitting module, the gate of the first transistor being electrically connected to the gate of the driving transistor, or the gate of the first transistor being connected to a fixed voltage; the width of the channel region of the first transistor being less than or equal to the width of the channel region of the driving transistor, and the length of the channel region of the first transistor being less than the length of the channel region of the driving transistor.

[0006] Optionally, the pixel driving circuit further includes a data writing module, a light emission control module, and a storage module; the data writing module is electrically connected to the driving transistor and is used to write data voltage to the driving transistor during the data writing phase; the light emission control module is connected in series between the first power line and the first terminal of the driving transistor, the first transistor is connected in series between the second terminal of the driving transistor and the first terminal of the light emission module, and the second terminal of the light emission module is electrically connected to the second power line; the light emission control module is used to turn off during the data writing phase and turn on during the light emission phase; the storage module is electrically connected to the first power line and the gate of the driving transistor respectively.

[0007] Optionally, the storage module includes a first capacitor and a second capacitor. A first terminal of the first capacitor is electrically connected to a first power line, a second terminal of the first capacitor is electrically connected to the first terminal of the second capacitor, and a second terminal of the second capacitor is electrically connected to the gate of the driving transistor. The first terminal of the light-emitting control module is electrically connected to the first power line, and the second terminal of the light-emitting control module is electrically connected to the second terminal of the first capacitor; the light-emitting control module is also used to turn on during the initialization phase; the data writing module is also used to transmit an initialization voltage to the gate of the driving transistor during the initialization phase; the initialization phase is performed before the data writing phase; The pixel driving circuit also includes a reset module, which is electrically connected to the first terminal of the light-emitting module. The reset module is used to transmit a reset voltage to the first terminal of the light-emitting module during the initialization phase and the self-discharge phase. The self-discharge phase occurs between the initialization phase and the data writing phase. The data writing module and the light-emitting control module are also used to turn off during the self-discharge phase.

[0008] According to another aspect of the present invention, a display panel is provided, comprising a substrate; an active layer and at least two conductive layers stacked on one side of the substrate; and a plurality of pixel driving circuits of any embodiment of the present invention formed in the active layer and the at least two conductive layers.

[0009] Optionally, multiple pixel driving circuits are arranged in a row along a first direction and in a column along a second direction, with the first direction intersecting the second direction; The active layer includes a first active portion that extends along a second direction; the conductive layer is provided with a first conductive portion and a second conductive portion that are arranged along the second direction. The first active portion overlaps with the first conductive portion and the second conductive portion respectively. The portion where the first active portion overlaps with the first conductive portion forms the channel region of the driving transistor, and the portion where the first active portion overlaps with the second conductive portion forms the channel region of the first transistor.

[0010] Optionally, along the second direction, the size of the second conductive portion is smaller than the size of the first conductive portion.

[0011] Optionally, the first active part is rectangular.

[0012] Optionally, the display panel further includes a second active portion and a third active portion; along the second direction, in the same pixel driving circuit, the second active portion and the third active portion are located on the same side of the first active portion, the second active portion is not connected to the first active portion, and the third active portion is electrically connected to the first active portion. The display panel also includes a first scan line and a light emission control line. The first scan line overlaps with the second active part to form a data writing module, and the light emission control line overlaps with the third active part to form a light emission control module.

[0013] Optionally, the first scan line and the light emission control line extend along a first direction, and along a second direction, the first conductive part is located between the second conductive part and the light emission control line.

[0014] Optionally, along the first direction, the dimensions of both the second and third active portions are smaller than the dimensions of the first active portion.

[0015] Optionally, the display panel further includes a fourth active portion, which is not connected to the first active portion. Along the second direction, in the same pixel driving circuit, the fourth active portion and the second active portion are located on opposite sides of the first active portion. The display panel also includes a second scan line, which overlaps with the fourth active portion to form a reset module.

[0016] According to another aspect of the present invention, a display device is provided, including a display panel according to any embodiment of the present invention.

[0017] In the pixel driving circuit, display panel, and display device of this invention, by setting a first transistor connected in series between the driving transistor and the light-emitting module, it is equivalent to cutting off the driving transistor in the related technology. The resulting driving transistor and the first transistor can be rearranged in the column direction of the pixel driving circuit, thereby avoiding the devices on both sides of the driving transistor. This is beneficial for making the channel region width of the driving transistor larger than that in the related technology, allowing for a slightly larger aspect ratio of the driving transistor, and increasing the area of ​​the channel region of the driving transistor. Correspondingly, the sum of the area of ​​the channel region of the driving transistor and the area of ​​the channel region of the first transistor is larger than that of the channel region of the driving transistor in the related technology, thus helping to improve the threshold voltage drift problem of the driving transistor in the related technology and improving display uniformity. By using the first transistor to clamp the drain voltage of the driving transistor, the source-drain voltage difference of the driving transistor is limited, improving the threshold voltage drift problem caused by the drain voltage fluctuation of the driving transistor, thereby improving display uniformity. At the same time, the leakage current of the driving transistor is reduced, the leakage current level is guaranteed, the problem of the light-emitting module stealing light is improved, and the current generation capability of the driving transistor is guaranteed. Furthermore, by making the width of the channel region of the first transistor less than or equal to the width of the channel region of the driving transistor, and the length of the channel region of the first transistor less than the length of the channel region of the driving transistor, the area of ​​the channel region of the driving transistor can be larger within a limited area while ensuring the width of the channel region of the driving transistor. This is beneficial for improving display uniformity while ensuring the driving capability of the driving transistor.

[0018] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the driving transistor and the first transistor in the pixel driving circuit; Figure 4 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention; Figure 6 This is a driving timing diagram of a pixel driving circuit provided in an embodiment of the present invention; Figure 7 This is a schematic diagram showing the conduction status of each module in the pixel driving circuit during the initialization phase; Figure 8 This is a schematic diagram showing the conduction status of each module in the pixel driving circuit during the self-discharge stage. Figure 9 This is a schematic diagram showing the conduction status of each module in the pixel driver circuit during the data writing phase. Figure 10 This is a schematic diagram showing the conduction status of each module in the pixel driving circuit during the light-emitting stage; Figure 11 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention; Figure 12 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention; Figure 13 This is a topology diagram of a pixel driving circuit; Figure 14 A schematic diagram of another display panel structure provided in an embodiment of the present invention; Figure 15 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0021] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0022] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0023] This invention provides a pixel driving circuit. Figure 1 This is a schematic diagram of a pixel driving circuit provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, for reference. Figure 1 and Figure 2 The pixel driving circuit includes a driving transistor TD and a first transistor T1. The first transistor T1 is connected in series between the driving transistor TD and the light-emitting module 101. The gate of the first transistor T1 is electrically connected to the gate G of the driving transistor TD, or the gate of the first transistor T1 is connected to a fixed voltage V0. The width of the channel region of the first transistor T1 is less than or equal to the width of the channel region of the driving transistor TD, and the length of the channel region of the first transistor T1 is less than the length of the channel region of the driving transistor TD.

[0024] Specifically, the driving transistor TD is the core current control device in the pixel driving circuit, connected in series between the power supply and the light-emitting module 101. The driving transistor TD can generate a driving current based on the voltage difference between its gate and source, thereby driving the light-emitting module 101 to emit light. The luminous brightness of the light-emitting module 101 is positively correlated with the magnitude of the driving current. The light-emitting module 101 can be an organic light-emitting device, such as an organic light-emitting diode (OLED), specifically an active matrix organic light-emitting diode (AMOLED). The light-emitting module 101 can also be an inorganic light-emitting device, such as a micro light-emitting diode (Micro-LED).

[0025] The pixel driving circuit also includes a first transistor T1, which is connected in series with the driving transistor TD, such as... Figure 1As shown, in some embodiments, the gate of the first transistor T1 is electrically connected to the gate G of the driving transistor TD, and the first transistor T1 and the driving transistor TD form a common-source, common-gate structure. For example... Figure 2 As shown, in some embodiments, the gate of the first transistor T1 is connected to a fixed voltage V0. When the fixed voltage V0 satisfies the condition that the driving transistor TD is turned on, the first transistor T1 is turned on, ensuring that the normal light emission of the light-emitting module 101 is not affected. The number of first transistors T1 is at least one. When the number of first transistors T1 is at least two, both first transistors T1 are connected in series with the driving transistor TD. The first transistor T1 is connected in series between the driving transistor TD and the light-emitting module 101. In this way, the first transistor T1 can act as a leakage current limiting transistor. Compared to the case where the driving transistor TD is directly connected to the light-emitting module 101, it can reduce the source-drain voltage difference of the driving transistor TD, thereby reducing leakage current in the driving transistor TD, reducing the possibility of the light-emitting module 101 idling, and improving the display effect.

[0026] The active layer of the first transistor T1 has a channel region formed therein, and the active layer of the driving transistor TD has a channel region formed therein. Here, "channel region of the transistor" refers to the region where the active layer of the transistor and the gate of the transistor overlap in a direction perpendicular to the main surface of the substrate; that is, the region where the orthographic projection of the active layer of the transistor onto the main surface of the substrate overlaps with the orthographic projection of the gate onto the main surface of the substrate corresponds to the channel region of the transistor. The main surface of the substrate is the surface of the substrate where the pixel driving circuit is located. The active layer also includes the source region and drain region of the transistor. The length direction of the channel region is the direction of the line connecting the source and drain regions of the transistor, and the width direction of the channel region is perpendicular to the length direction.

[0027] Figure 3 This is a schematic diagram of the structure of the driving transistor and the first transistor in the pixel driving circuit. In this embodiment of the invention, the width of the channel region of the first transistor T1 ( Figure 3 The first dimension W1 is less than or equal to the width of the channel region of the driving transistor TD. Figure 3 The second dimension W2), that is, W1≤W2; the length of the channel region of the first transistor T1 ( Figure 3 The third dimension L1 is smaller than the length of the channel region of the driving transistor TD. Figure 2The fourth dimension L2), meaning L1 is smaller than L2. Thus, while ensuring the channel width of the driving transistor TD, the channel area of ​​the driving transistor TD can be larger within a limited area. A larger channel area leads to higher stability of the threshold voltage of the driving transistor TD, which is beneficial for improving display uniformity. In some embodiments, the channel length of the first transistor T1 can be equal to the minimum achievable length in the manufacturing process, allowing the channel area of ​​the driving transistor TD to have a larger area.

[0028] In related technologies, the driving transistor and the light-emitting module are usually directly connected, and no first transistor is placed between the driving transistor and the light-emitting module. In this invention, a first transistor T1 is placed between the driving transistor TD and the light-emitting module 101, and the length of the channel region of the driving transistor TD is greater than the length of the channel region of the first transistor T1, and the width of the channel region of the driving transistor TD is greater than or equal to the length of the channel region of the first transistor T1. Simulation results show that this application can effectively improve display uniformity compared to related technologies. As shown in Tables 1 and 2, Table 1 shows the brightness inconsistency data obtained from simulations of different grayscale images; Table 2 shows the current inconsistency data obtained from simulations of different grayscale images. Table 1 shows the brightness inconsistency data of related technologies and this invention at Gray16, Gray32, and Gray64 (i.e., 16 grayscale, 32 grayscale, and 64 grayscale), respectively. For example, at grayscale 0, the brightness inconsistency data in related technologies is 22.68%, while the brightness inconsistency data of this invention is 12.30%. Table 2 shows the current inconsistency data of related technologies and the present invention at Gray16, Gray32, and Gray64 (i.e., 16 gray levels, 32 gray levels, and 64 gray levels), respectively. For example, at 32 gray levels, the current inconsistency data in related technologies is 6.27%, while the current inconsistency data of the present invention is 3.24%. According to Tables 1 and 2, compared with related technologies, the present invention reduces brightness inconsistency and current inconsistency across multiple gray levels, thus improving the display uniformity of the display panel. Current panel designs are more concerned with the display uniformity of low and medium gray levels. According to Tables 1 and 2, the technical solution of the present invention can effectively improve the display uniformity of low and medium gray levels, nearly doubling it, and has a strong improvement effect on the display unevenness of low and medium gray levels.

[0029] Table 1 Brightness Inconsistency Table 2 Current Inconsistency For example, this can be understood as cutting the driving transistor in the related technology into two transistors. In some embodiments, the channel width of the driving transistor remains unchanged before and after cutting the driving transistor. One of them, with a larger channel length, is the driving transistor TD in this embodiment, and the other is the first transistor T1 in this embodiment. In other embodiments, after cutting the driving transistor in the related technology, the two transistors formed (i.e., driving transistor TD and first transistor T1) can be rearranged in the column direction of the pixel driving circuit, thereby avoiding the devices on both sides of the driving transistor TD. This is beneficial for making the channel width of the driving transistor TD larger than that in the related technology, so that the aspect ratio of the driving transistor TD can be slightly increased, and the area of ​​the channel region of the driving transistor TD can be increased. Correspondingly, the sum of the area of ​​the channel region of the driving transistor TD and the area of ​​the channel region of the first transistor T1 is larger than the area of ​​the channel region of the driving transistor TD in the related technology, thereby helping to improve the threshold voltage drift problem of the driving transistor TD in the related technology and improving display uniformity. In addition, due to the clamping effect of the drain voltage of the driving transistor TD of the first transistor T1, the leakage current of the driving transistor TD is reduced, the leakage current level is guaranteed, and the current generation capability of the driving transistor TD is guaranteed.

[0030] In some embodiments, the length of the channel region of the driving transistor TD may be reduced or remain unchanged relative to the length of the channel region of the driving transistor TD in the related art.

[0031] Figure 3 An example is shown showing the width of the channel region of the first transistor T1 ( Figure 3 The width of the channel region of the driving transistor TD (first dimension W1) and the width of the channel region ( Figure 3 When the second dimension (W2) is equal, the active layers of the first transistor T1 and the driving transistor TD can be shared, realizing a common-source, common-gate structure. Furthermore, the area of ​​the channel region of the driving transistor TD is a factor affecting its threshold voltage drift, especially the width of the channel region. By setting the channel region width of the first transistor T1 equal to the channel region width of the driving transistor TD, the channel region width of the driving transistor TD does not need to be changed when adding the first transistor T1. Alternatively, the channel region width of the driving transistor TD can be increased, and the gate of the first transistor T1, which does not overlap with the gate of the driving transistor TD, can be formed on one side of the active layer of the driving transistor TD. This helps improve the stability of the threshold voltage of the driving transistor TD, improving display uniformity while reducing leakage current of the driving transistor TD.

[0032] The pixel driving circuit of this invention, by setting a first transistor in series between the driving transistor and the light-emitting module, effectively cuts off the driving transistor in related technologies. The resulting driving transistor and the first transistor can be rearranged in the column direction of the pixel driving circuit, thus avoiding devices on either side of the driving transistor. This allows for a larger channel width for the driving transistor compared to related technologies, slightly increasing its aspect ratio and increasing the area of ​​its channel region. Consequently, the sum of the channel areas of the driving transistor and the first transistor is larger than the channel area of ​​the driving transistor in related technologies, thereby improving the threshold voltage drift problem of the driving transistor in related technologies and enhancing display uniformity. The first transistor clamps the drain voltage of the driving transistor, limiting the source-drain voltage difference and improving the threshold voltage drift problem caused by drain voltage fluctuations, thus enhancing display uniformity. Simultaneously, it reduces leakage current in the driving transistor, ensuring a stable leakage level, improving the problem of the light-emitting module's stealth lighting, and guaranteeing the current generation capability of the driving transistor. Furthermore, by making the width of the channel region of the first transistor less than or equal to the width of the channel region of the driving transistor, and the length of the channel region of the first transistor less than the length of the channel region of the driving transistor, the area of ​​the channel region of the driving transistor can be larger within a limited area while ensuring the width of the channel region of the driving transistor. This is beneficial for improving display uniformity while ensuring the driving capability of the driving transistor.

[0033] Figure 4 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, for reference. Figure 4 Optionally, the pixel driving circuit further includes a data writing module 110, a light emission control module 120, and a storage module 130; the data writing module 110 is electrically connected to the driving transistor TD and is used to write data voltage VDATA to the driving transistor TD during the data writing phase; the light emission control module 120 is connected in series between the first power supply line VDD and the first terminal S of the driving transistor TD, the first transistor T1 is connected in series between the second terminal D of the driving transistor TD and the first terminal of the light emission module 101, and the second terminal of the light emission module 101 is electrically connected to the second power supply line VSS; the light emission control module 120 is used to turn off during the data writing phase and turn on during the light emission phase; the storage module 130 is electrically connected to the first power supply line VDD and the gate G of the driving transistor TD, respectively.

[0034] The data writing module 110 may include a switching device. For example... Figure 4As shown, the data writing module 110 can be connected to the gate G of the driving transistor TD. In other embodiments, the data writing module 110 can be connected to the first terminal S of the driving transistor TD. The control terminal of the data writing module 110 is electrically connected to the first scan line WS, the first terminal of the data writing module 110 is connected to the data line DATA, and the second terminal of the data writing module 110 is connected to the driving transistor TD. The data line DATA transmits data voltage during the data writing phase. The first scan line WS is used to transmit a first scan signal. During the data writing phase, the data writing module 110 is turned on in response to the first scan signal, and the data writing module 110 writes data voltage to the driving transistor TD, for example, for... Figure 4 The pixel driving circuit shown has a data writing module 110 that writes a data voltage to the gate G of the driving transistor TD. Optionally, the first terminal S of the driving transistor TD is the source, and the second terminal D is the drain.

[0035] The light-emitting control module 120 is connected in series between the first power line VDD and the first terminal S of the driving transistor TD. The light-emitting control module 120 may also include a switching device. The control terminal of the light-emitting control module 120 is electrically connected to the light-emitting control line DS, which is used to transmit the light-emitting control signal. During the light-emitting phase, the light-emitting control module 120 responds to the light-emitting control signal and turns on, connecting the first terminal S of the driving transistor TD with the first power line VDD. This causes the driving transistor TD to generate a driving current based on the voltage between its gate and the first terminal, which is then transmitted to the light-emitting module 101 through the first transistor T1. The light-emitting control module 120 can control the duty cycle of the light-emitting time to improve the low grayscale display effect.

[0036] The storage module 130 may include at least one capacitor. The first end of the storage module 130 is connected to the first power line VDD, and the second end of the storage module 130 is connected to the gate G of the driving transistor TD. The storage module 130 can store the voltage of the gate of the driving transistor TD, thereby keeping the gate G voltage of the driving transistor TD stable during the light-emitting stage, ensuring the stability of the driving current generated by the driving transistor TD during the light-emitting stage, and ensuring a good display effect.

[0037] Figure 5 This is a schematic diagram of another pixel driving circuit provided in an embodiment of the present invention, for reference. Figure 5Optionally, the storage module 130 includes a first capacitor Cp and a second capacitor Cst. A first terminal of the first capacitor Cp is electrically connected to a first power line VDD, and a second terminal of the first capacitor Cp is electrically connected to a first terminal of the second capacitor Cst. The second terminal of the second capacitor Cst is electrically connected to the gate G of the driving transistor TD. A first terminal of the light-emitting control module 120 is electrically connected to the first power line VDD, and a second terminal of the light-emitting control module 120 is electrically connected to the second terminal of the first capacitor Cp. The light-emitting control module 120 is also used to be turned on during the initialization phase. The data writing module 110 is also used to transmit an initialization voltage to the gate G of the driving transistor TD during the initialization phase. The initialization phase occurs before the data writing phase. The pixel driving circuit also includes a reset module 140, which is electrically connected to a first terminal of the light-emitting module 101. The reset module 140 is used to transmit a reset voltage to the first terminal of the light-emitting module 101 during the initialization phase and the self-discharge phase. The self-discharge phase occurs between the initialization phase and the data writing phase. The data writing module 110 and the light-emitting control module 120 are also used to be turned off during the self-discharge phase.

[0038] The reset module 140 may include a switching device. The control terminal of the reset module 140 can be electrically connected to the second scan line AZ, which is used to transmit the second scan signal. The first terminal of the reset module 140 is electrically connected to the reset signal line VAR, and the second terminal of the reset module 140 is electrically connected to the first terminal of the light-emitting module 101. The reset signal line VAR is used to transmit the reset voltage. During the initialization phase, the reset module 140 is turned on in response to the second scan signal, thus clearing the residual charge on the first terminal of the light-emitting module 101 from the previous frame and preventing the residual charge on the first terminal of the light-emitting module 101 from affecting the display effect. During the initialization phase, the data line DATA transmits the initialization voltage, and the data writing module 110 is turned on, transmitting the initialization voltage to the gate G of the driving transistor TD, thereby initializing the gate of the driving transistor TD. Thus, there is no need to set up an additional initialization module to initialize the gate of the driving transistor TD in the pixel driving circuit. That is, the data writing module 110 can be reused as the initialization module, which can reduce the number of modules included in the pixel driving circuit. Correspondingly, the number of circuit elements included in the pixel driving circuit is reduced, thereby reducing the topological area of ​​the pixel driving circuit, increasing the pixel density in the display device, and thus achieving higher resolution.

[0039] During the self-discharge phase, the reset module 140 also responds to the second scan signal and turns on, while the data writing module 110 and the light-emitting control module 120 turn off. The first terminal of the second capacitor Cst discharges through the first electrode S of the driving transistor TD, through the driving transistor TD, the first transistor T1, and the reset module 140 to the reset signal line VAR until the voltage difference between the gate G and the first electrode of the driving transistor TD is equal to the threshold voltage of the driving transistor TD. This enables the threshold voltage of the driving transistor TD to be captured during the self-discharge phase to compensate for the threshold voltage of the driving transistor TD and further improve the display uniformity.

[0040] In this embodiment, the storage module 130 includes a first capacitor Cp and a second capacitor Cst connected in series. The common connection terminal of the first capacitor Cp and the second capacitor Cst is connected to the second terminal of the light-emitting control module 120. During the initialization phase, the light-emitting control module 120 is turned on, so that the voltage stored in the second capacitor Cst after the initialization phase is the difference between the first power supply voltage and the initialization voltage. The first power supply voltage is the voltage on the first power line VDD. During the self-discharge phase, the light-emitting control module 120 is turned off, and the gate G and the first electrode S (i.e., the two ends of the second capacitor Cst) of the driving transistor TD are both floating. During the self-discharge of the first electrode S of the driving transistor TD, the potential of the gate G of the driving transistor TD changes accordingly. During the data writing phase, the light-emitting control module 120 is turned off, and the first electrode S of the driving transistor TD is floating, that is, the common connection terminal of the first capacitor Cp and the second capacitor Cst is floating. This causes the potential of the first electrode S of the driving transistor TD to change with the potential of the gate G of the driving transistor TD. During this process, the threshold voltage of the driving transistor TD is compensated by utilizing the substrate bias modulation response, further improving display uniformity and display effect. The following explanation will focus on the specific working process of the pixel driving circuit.

[0041] Figure 6 This is a driving timing diagram of a pixel driving circuit provided in an embodiment of the present invention. This driving timing can be applied to driving... Figure 5 The pixel driving circuit shown is as follows: Figure 5 As shown, the example illustrates a data writing module 110 including a second transistor T2, a light-emitting control module 120 including a third transistor T3, a reset module 140 including a fourth transistor T4, and a light-emitting module 101 including a light-emitting diode. The first terminal of the light-emitting module 101 can be the anode of the light-emitting device, and the second terminal of the light-emitting module 101 can be the cathode of the light-emitting device. Optionally, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the driving transistor TD can be P-type transistors or N-type transistors; this embodiment of the invention does not impose specific limitations. Figure 6The driving timing shown corresponds to the case where the first transistor T1, the second transistor T2, the third transistor T3, and the driving transistor TD are all P-type transistors, and the fourth transistor T4 is an N-type transistor. Accordingly, the effective level in the gate G control signal of the first transistor T1, the second transistor T2, the third transistor T3, and the driving transistor TD is low, and the ineffective level is high; the effective level in the gate control signal of the fourth transistor T4 is high, and the ineffective level is low. Here, the effective level is the level that turns the transistor on, and the ineffective level is the level that turns the transistor off. (Reference) Figure 5 and Figure 6 The operation of the pixel driving circuit includes the initialization stage p1, the self-discharge stage p2, the data writing stage p3, and the light emission stage p4.

[0042] Figure 7 This is a schematic diagram showing the conduction status of each module in the pixel driving circuit during the initialization phase. (Refer to...) Figure 6 and Figure 7 During the initialization phase p1, the first scan signal on the first scan line WS is low, and the second transistor T2 is turned on; the second scan signal on the second scan line AZ is high, and the fourth transistor T4 is turned on; the light emission control signal on the light emission control line DS is low, and the third transistor T3 is turned on. The signal transmitted on the data line DATA is the initialization voltage Vini. At this time, the voltage at the first terminal of the second capacitor Cst is the first power supply voltage, and the voltage at the second terminal of the second capacitor Cst is the initialization voltage Vini. At this time, the voltage difference across the second capacitor Cst is ELVDD-Vini, where ELVDD is the first power supply voltage on the first power supply line VDD. Since the fourth transistor T4 is turned on at this time, the driving transistor TD can release charge to the reset signal line VAR through the first transistor T1 and the fourth transistor T4. The first terminal of the light emission module 200 can also release charge to the reset signal line VAR through the first transistor T1 and the fourth transistor T4.

[0043] Figure 8 This is a schematic diagram showing the conduction status of each module in the pixel drive circuit during the self-discharge phase. (Refer to...) Figure 6 and Figure 8During the self-discharge phase p2, the first scan signal on the first scan line WS is high, and the second transistor T2 is turned off; the second scan signal on the second scan line AZ is high, and the fourth transistor T4 is turned on; the light emission control signal on the light emission control line DS changes from low to high, and when the light emission control signal is high, the third transistor T3 is turned off. During this phase, the first terminal of the second capacitor Cst discharges through the first terminal S (floating point) of the driving transistor TD, through the driving transistor TD, the first transistor T1, and the reset module 140 to the reset signal line VAR. When the voltage difference between the gate G and the first terminal S of the driving transistor TD equals the threshold voltage of the driving transistor TD, the driving transistor TD is turned off, and the self-discharge process ends. At this time, the voltage stored in the second capacitor Cst is the threshold voltage of the driving transistor TD. The substrate of the driving transistor TD can be connected to the first power supply line VDD. Due to the substrate bias modulation effect, the threshold voltage changes. The changed threshold voltage can be calculated using the following formula: |Vth_eff|=a×(ELVDD-VS)+|Vth|, where a is the back-gate effect modulation coefficient, Vth_eff is the threshold voltage after the shift, and Vth is the threshold voltage before the shift. After the self-discharge process ends, the S-potential of the driving transistor TD is VS=ELVDD–(ELVDD-Vini-|Vth|) / a; correspondingly, the G-potential of the driving transistor TD is VG=Vini-(ELVDD-Vini-|Vth|) / a.

[0044] Figure 9 This is a schematic diagram showing the conduction status of each module in the pixel drive circuit during the data writing phase. (Refer to...) Figure 6 and Figure 9During the data writing phase p3, the first scan signal on the first scan line WS is low, and the second transistor T2 is turned on; the second scan signal on the second scan line AZ is high, and the fourth transistor T4 is turned on; the light emission control signal on the light emission control line DS is high, and the third transistor T3 is turned off. The signal transmitted on the data line DATA is the data voltage VDATA. The data voltage VDATA is written to the gate G of the driving transistor TD via the second transistor T2, which is the second terminal of the second capacitor Cst. Since the first terminal of the second capacitor Cst (the first terminal S of the driving transistor TD) is still a floating point, the voltage of the first terminal S of the driving transistor TD increases due to the increase of the gate G voltage of the driving transistor TD. The amount of change is related to the ratio of the second capacitor Cst to the first capacitor Cp. Assuming that the series ratio of the first capacitor Cp to the second capacitor Cst is b=Cp / (Cst+Cp), the voltage change of the first terminal of the driving transistor is (1-b)×ΔVG, where ΔVG represents the gate voltage change of the driving transistor TD, ΔVG=VDATA-Vini+(ELVDD-Vini-|Vth|) / a. At this time, the change in potential of the first terminal S of the driving transistor TD is ΔVS = (1-b) × [VDATA-Vini + (ELVDD-Vini-|Vth|) / a]. Then, the potential of the first terminal S of the driving transistor TD is VS = ELVDD–(ELVDD-Vini-|Vth|) / a + ΔVS = ELVDD–b × (ELVDD-Vini-|Vth|) / a + (1-b) × (VDATA-Vini).

[0045] Figure 10 This is a schematic diagram showing the conduction status of each module in the pixel driving circuit during the light-emitting stage. (Refer to...) Figure 6 and Figure 10During the light-emitting stage p4, the first scan signal on the first scan line WS is high, and the second transistor T2 is turned off; the second scan signal on the second scan line AZ is low, and the fourth transistor T4 is turned off; the light-emitting control signal on the light-emitting control line DS is low, and the third transistor T3 is turned on. At this time, the potential of the first terminal S of the driving transistor TD returns to the first power supply voltage ELVDD, and the gate G of the driving transistor TD becomes floating. Since the potential of the first terminal S of the driving transistor TD is pulled high, the potential of the gate G of the driving transistor TD will also be pulled high accordingly. At this time, the potential of the gate G of the driving transistor TD is equal to VG=b×VDATA+(b / a)×ELVDD+[1-(b / a)–b]×Vini–(b / a)×|Vth|. Therefore, during the light-emitting stage p4, the voltage difference between the gate G and the first terminal of the driving transistor TD is Vgs=b×VDATA+((b / a)-1)×ELVDD+(1-(b / a)-b)×Vini–(b / a)×|Vth|. Since the driving transistor TD is a P-type transistor, and the threshold voltage Vth of the driving crystal TD is <0, then Vgs = b × VDATA + ((b / a) - 1) × ELVDD + (1 - (b / a) - b) × Vini + (b / a) × Vth.

[0046] In the case of b=a, Vgs=b×VDATA+(-b)×Vini+Vth, the driving current generated by the driving transistor is related to Vgs-Vth, that is, related to b×Vdata+(-b)×Vini, and is independent of the threshold voltage of the driving transistor TD. This allows the threshold voltage of the driving transistor TD to be fully compensated, avoiding the influence of the threshold voltage fluctuation of the driving transistor on the generated current, and making the output driving current more accurate.

[0047] This invention also provides a display panel. Figure 11 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention, for reference. Figure 11 The display panel includes a substrate 200; an active layer 210 and at least two conductive layers 220 stacked on one side of the substrate 200; and a plurality of pixel driving circuits according to any embodiment of the present invention formed in the active layer 210 and the at least two conductive layers 220.

[0048] The display panel of this invention includes the pixel driving circuit of any embodiment of this invention and has the beneficial effects of the pixel driving circuit of any embodiment of this invention, which will not be described again here.

[0049] Figure 12 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, for reference. Figure 12Optionally, multiple pixel driving circuits 100 are arranged in rows along a first direction x and in columns along a second direction y, wherein the first direction x and the second direction y intersect; wherein, Figure 11 The diagram shows a portion of the structure in the active layer and the conductive layer. The active layer includes a first active portion 211, which extends along the second direction y. The conductive layer has a first conductive portion 221 and a second conductive portion 222, which are arranged along the second direction y. The first active portion 211 overlaps with the first conductive portion 221 and the second conductive portion 222, respectively. The portion where the first active portion 211 overlaps with the first conductive portion 221 forms the channel region of the driving transistor TD, and the portion where the first active portion 211 overlaps with the second conductive portion 222 forms the channel region of the first transistor T1.

[0050] Specifically, the channel regions of both the driving transistor TD and the first transistor T1 are located in the first active portion 211. The overlap of the first active portion 211 with the first conductive portion 221 and the second conductive portion 222 means that the orthographic projections of the first active portion 211 and the first conductive portion 221 on the substrate overlap, and the orthographic projections of the first active portion 211 and the second conductive portion 222 on the substrate also overlap. The first conductive portion 221 and the second conductive portion 222 are arranged along the second direction y, with a spacing between them, so that the first conductive portion 221 and the second conductive portion 222 overlap with the first active layer to form two different transistors, namely the driving transistor TD and the first transistor T1. Optionally, the first conductive portion 221 and the second conductive portion 222 can be electrically connected through the conductive structure of other conductive layers.

[0051] The overlapping portion of the first active portion 211 and the first conductive portion 221 forms the channel region of the driving transistor TD. The source and drain regions of the driving transistor TD are located on both sides of the channel region of the driving transistor TD, that is, the first electrode and the second electrode of the driving transistor TD are located on both sides of the channel region of the driving transistor TD. Similarly, the overlapping portion of the first active portion 211 and the second conductive portion 222 forms the channel region of the first transistor T1. The source and drain regions of the first transistor T1 are located on both sides of the channel region of the first transistor T1, that is, the first electrode and the second electrode of the first transistor T1 are located on both sides of the channel region of the first transistor T1.

[0052] In this embodiment, by arranging the first conductive portion 221 and the second conductive portion 222 along the second direction y, on the one hand, the first conductive portion 221 and the second conductive portion 222 can overlap with the first active layer to form two different transistors, thereby improving display uniformity. On the other hand, the two are arranged in series along the second direction y, which reduces the space occupied along the first direction x, which is beneficial for compressing the layout area of ​​the pixel driving circuit, thereby improving the resolution.

[0053] like Figure 12 As shown, the first conductive portion 221 includes a first edge B1 and a second edge B2, which are the two outer edges of the first conductive portion 221 in the first direction x. The second conductive portion 222 includes a third edge B3 and a fourth edge B4, which are the two outer edges of the second conductive portion 222 along the first direction x. The orthographic projection of the first active portion 211 onto the substrate is located between the orthographic projections of the first edge B1 and the second edge B2 onto the substrate; and the orthographic projection of the first active portion 211 onto the substrate is located between the orthographic projections of the third edge B3 and the fourth edge B4 onto the substrate. Optionally, the first active portion 211 is rectangular. This ensures that the formed driving transistor TD and the first transistor T1 have the same width.

[0054] In other alternative embodiments, the first active portion 211 may also be of other shapes, as long as the portion of the first active portion 211 overlapping with the first conductive portion 221 and the portion of the first active portion 211 overlapping with the second conductive portion 222 have the same size in the first direction x.

[0055] In some embodiments, the first edge B1 and the second edge B2 are parallel, and the third edge B3 and the fourth edge B4 all extend along the second direction y. Along the second direction y, the first edge B1 and the third edge B3 are on the same straight line, and the second edge B2 and the fourth edge B4 are on the same straight line. This arrangement ensures that the first conductive part 221 does not occupy additional space relative to the second conductive part 222 in the first direction x, thus optimizing the layout structure of the pixel driving circuit and further ensuring the realization of high resolution.

[0056] Continue to refer to Figure 12 Optionally, along the second direction y, the size of the second conductive part 222 is smaller than the size of the first conductive part 221.

[0057] Specifically, the overlapping part of the first active portion 211 and the first conductive portion 221 forms the channel region of the driving transistor TD, and the overlapping part of the first active portion 211 and the second conductive portion 222 forms the channel region of the first transistor T1. Therefore, the length of the channel region of the driving transistor TD is equal to the size of the first conductive portion 221 in the second direction y, and the length of the channel region of the first transistor T1 is equal to the size of the second conductive portion 222 in the second direction y. By setting the size of the second conductive portion 222 to be smaller than the size of the first conductive portion 221, it is ensured that the length of the channel region of the first transistor T1 is smaller than the length of the channel region of the driving transistor TD, thus ensuring that the channel area of the first transistor T1 is smaller, leaving a larger space for the channel region of the driving transistor TD, making the channel region of the driving transistor TD have a larger area, which is conducive to ensuring display uniformity.

[0058] Figure 13 is a topological structure diagram of a pixel driving circuit. Refer to Figure 13 Optionally, the active layer further includes a second active portion 212 and a third active portion 213; along the second direction y, in the same pixel driving circuit 100, the second active portion 212 and the third active portion 213 are located on the same side of the first active portion 211, the second active portion 212 is not connected to the first active portion 211, and the third active portion 213 is electrically connected to the first active portion 211; the display panel further includes a first scan line WS and a light emission control line DS, and the first scan line WS and the second active portion 212 overlap to form a data writing module 110, and the light emission control line DS and the third active portion 213 overlap to form a light emission control module 120.

[0059] Both the second active portion 212 and the third active portion 213 are located on the same side of the first active portion 211, so that the light emission control module 120 and the data writing module 110 are formed on the same side of the driving transistor TD. Since both the light emission control module 120 and the data writing module 110 include switching transistors, for example Figure 5 as shown, the data writing module 110 includes a second transistor T2, the light emission control module 120 includes a third transistor T3, and the channel area of the switching transistor is smaller than the channel area of the driving transistor TD. Exemplarily, along the first direction x, the sizes of both the second active portion 212 and the third active portion 213 are smaller than the size of the first active portion 211. Along the first direction x, the data writing module 110 can be located on one side of the light emission control module 120. Thus, it is beneficial to reduce the size of the topological structure of the pixel driving circuit in the second direction y, further reduce the area of the topological structure, and improve the resolution. As Figure 13 shown, the size of the second active portion 212 along the first direction x is a fifth size W3, and the size of the third active portion 213 along the first direction x is a sixth size W4, where W3 < W1 and W4 < W1.

[0060] Figure 14 This is a schematic diagram of another display panel structure provided in an embodiment of the present invention, for reference. Figure 13 and Figure 14 Optionally, the first scan line WS and the light emission control line DS extend along the first direction x and the second direction y, respectively, and the first conductive part 221 is located between the second conductive part 222 and the light emission control line DS.

[0061] Combination Figure 4 and Figure 5 The pixel driving circuit shown has a driving transistor TD connected in series between the light emission control module 120 and the first transistor T1. By setting the first conductive part 221 between the second conductive part 222 and the light emission control line DS, the driving transistor TD is also formed between the light emission control module 120 and the first transistor T1 along the second direction y in the topology of the pixel driving circuit. That is, the first transistor T1, the driving transistor TD and the transistor devices of the light emission control module 120 are arranged in the second direction y. There is no bent active layer structure in the topology, which reduces the space of the topology and thus helps to improve the resolution.

[0062] In some embodiments, the positions of the light emission control module 120 and the data writing module 110 may be misaligned along the second direction y, that is, the light emission control module 120 and the data writing module 110 may not be located on the same straight line along the first direction x.

[0063] Continue to refer to Figure 13 and Figure 14 In some embodiments, the active layer further includes a fourth active portion 214, which is not connected to the first active portion 211. Along the second direction y, in the same pixel driving circuit, the fourth active portion 214 and the second active portion 212 are located on opposite sides of the first active portion 211. The display panel also includes a second scan line AZ, which overlaps with the fourth active portion 214 to form a reset module 140. Optionally, the second scan line AZ extends along the first direction x.

[0064] Combination Figure 5 , Figure 13 and Figure 14The reset module 140 includes a fourth transistor T4, which is formed by the overlap of the second scan line AZ and the fourth active portion 214. Along the second direction y, in the same pixel driving circuit 100, the fourth active portion 214 and the second active portion 212 are located on opposite sides of the first active portion 211. This avoids excessive parasitic capacitance and crosstalk caused by the reset module 140, data writing module 110, and light emission control module 120 all being located in the same area, thus further optimizing the topology of the display panel. In some embodiments, the fourth transistor T4 has a different channel type than other transistors in the pixel driving circuit. For example, the fourth transistor T4 is an N-type transistor, while the other transistors are P-type transistors. This separates the N-well regions for fabricating P-type transistors and the P-well regions for fabricating N-type transistors, ensuring electrical isolation between them.

[0065] This invention also provides a display device. Figure 15 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention, for reference. Figure 15 The display device 1 includes the display panel 10 as described in any of the foregoing embodiments. The display device may be, but is not limited to, a mobile phone, tablet computer, laptop computer, desktop monitor, television, and head-mounted display devices such as augmented reality (AR) glasses, virtual reality (VR) glasses, and mixed reality (MR) glasses. Since the display device proposed in this invention adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here.

[0066] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0067] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel driving circuit, characterized in that, include: A driving transistor and a first transistor, wherein the first transistor is connected in series between the driving transistor and the light-emitting module, and the gate of the first transistor is electrically connected to the gate of the driving transistor, or the gate of the first transistor is connected to a fixed voltage. The width of the channel region of the first transistor is less than or equal to the width of the channel region of the driving transistor, and the length of the channel region of the first transistor is less than the length of the channel region of the driving transistor.

2. The pixel driving circuit according to claim 1, characterized in that, It also includes a data writing module, a light-emitting control module, and a storage module; the data writing module is electrically connected to the driving transistor and is used to write data voltage to the driving transistor during the data writing phase. The light-emitting control module is connected in series between the first power line and the first terminal of the driving transistor, the first transistor is connected in series between the second terminal of the driving transistor and the first terminal of the light-emitting module, and the second terminal of the light-emitting module is electrically connected to the second power line; the light-emitting control module is used to turn off during the data writing phase and turn on during the light-emitting phase. The storage module is electrically connected to the first power line and the gate of the driving transistor, respectively.

3. The pixel driving circuit according to claim 2, characterized in that, The storage module includes a first capacitor and a second capacitor. A first terminal of the first capacitor is electrically connected to the first power line, a second terminal of the first capacitor is electrically connected to the first terminal of the second capacitor, and a second terminal of the second capacitor is electrically connected to the gate of the driving transistor. The first terminal of the light-emitting control module is electrically connected to the first power line, and the second terminal of the light-emitting control module is electrically connected to the second terminal of the first capacitor; the light-emitting control module is also used to turn on during the initialization phase; the data writing module is also used to transmit an initialization voltage to the gate of the driving transistor during the initialization phase; the initialization phase is performed before the data writing phase; The pixel driving circuit further includes a reset module, which is electrically connected to the first terminal of the light-emitting module and is used to transmit a reset voltage to the first terminal of the light-emitting module during the initialization phase and the self-discharge phase. The self-discharge phase is performed between the initialization phase and the data writing phase. The data writing module and the light-emitting control module are also used to turn off during the self-discharge phase.

4. A display panel, characterized in that, Including substrate; An active layer and at least two conductive layers are stacked on one side of the substrate; a plurality of pixel driving circuits as described in any one of claims 1-3 are formed in the active layer and at least two conductive layers.

5. The display panel according to claim 4, characterized in that, The plurality of pixel driving circuits are arranged in a row along a first direction and in a column along a second direction, wherein the first direction and the second direction intersect. The active layer includes a first active portion that extends along the second direction; the conductive layer is provided with a first conductive portion and a second conductive portion that are arranged along the second direction. The first active portion overlaps with the first conductive portion and the second conductive portion respectively. The portion where the first active portion overlaps with the first conductive portion forms the channel region of the driving transistor, and the portion where the first active portion overlaps with the second conductive portion forms the channel region of the first transistor.

6. The display panel according to claim 5, characterized in that, Along the second direction, the size of the second conductive portion is smaller than the size of the first conductive portion.

7. The display panel according to claim 5, characterized in that, The first active part is rectangular.

8. The display panel according to claim 5, characterized in that, It also includes a second active portion and a third active portion; along the second direction, in the same pixel driving circuit, the second active portion and the third active portion are located on the same side of the first active portion, the second active portion is not connected to the first active portion, and the third active portion is electrically connected to the first active portion; The display panel further includes a first scan line and a light emission control line. The first scan line overlaps with the second active part to form a data writing module, and the light emission control line overlaps with the third active part to form a light emission control module.

9. The display panel according to claim 8, characterized in that, The first scan line and the light emission control line extend along the first direction, and along the second direction, the first conductive portion is located between the second conductive portion and the light emission control line.

10. The display panel according to claim 8, characterized in that, Along the first direction, the dimensions of both the second active portion and the third active portion are smaller than the dimension of the first active portion.

11. The display panel according to claim 8, characterized in that, It also includes a fourth active part, which is not connected to the first active part. Along the second direction, in the same pixel driving circuit, the fourth active part and the second active part are located on opposite sides of the first active part. The display panel also includes a second scan line, which overlaps with the fourth active part to form a reset module.

12. A display device, characterized in that, Includes the display panel as described in any one of claims 4-11.

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