C-14 based silicon carbide isotope battery transducer and method of making same

Abstract

A C-14 based silicon carbide isotopic battery transducer and a preparation method thereof, wherein the C-14 based silicon carbide isotopic battery transducer comprises: a SiC substrate having opposite substrate front and back surfaces; a SiC epitaxial layer located on the substrate front surface, the SiC epitaxial layer comprising an N-type SiC buffer layer, an N-type SiC base layer, a P-type SiC emission layer and a P-type SiC cap layer stacked in turn from bottom to top; a plurality of mutually separated P-surface electrodes; at least one isolation groove in the SiC epitaxial layer on both sides of the plurality of P-surface electrodes, an N-surface electrode located on the substrate back surface; an isolation dielectric film located on the exposed SiC epitaxial layer surface, in the isolation groove and on the surface of the P-surface electrode, a P-surface conductive structure located on the top surface of the exposed P-surface electrode, and an N-surface conductive structure located on the surface of the N-surface electrode. The application improves the energy conversion efficiency of the device through the structure design matched with the C-14 radioactive source.

Description

Technical Field

[0001] This invention relates to the field of nuclear energy technology, specifically to a silicon carbide isotope battery transducer based on C-14 and its preparation method. Background Technology

[0002] With the rapid development of microelectromechanical systems (MEMS) technology, radiation-volt batteries have become a research hotspot in the field of micro-energy. A radiation-volt battery (also known as a radioisotope battery) is a device that converts the energy of energy-carrying particles (such as alpha particles, beta particles, or gamma rays) emitted by the decay of radioactive isotopes into electrical energy. However, most radiation-volt batteries use Ni-63 or H-3 (tritium) radioactive sources as their energy source, and devices using tritium and Ni-63 radioactive sources suffer from insufficient energy conversion efficiency. Summary of the Invention

[0003] The technical problem solved by this invention is to provide a silicon carbide isotope battery transducer based on C-14 and its preparation method. By matching the structural design with the C-14 radioactive source, the energy conversion efficiency of the device is improved.

[0004] To address the aforementioned technical problems, the present invention provides a silicon carbide isotope cell transducer based on C-14, comprising: a SiC substrate having opposing front and back sides; a SiC epitaxial layer located on the front side of the substrate, the SiC epitaxial layer comprising, from bottom to top, an N-type SiC buffer layer, an N-type SiC base layer, a P-type SiC emitter layer, and a P-type SiC cap layer stacked sequentially; a plurality of mutually discrete P-side electrodes located on the surface of the epitaxial layer, the P-side electrodes having a fin-shaped structure; at least located on the plurality of P-side electrodes... The epitaxial layers on both sides of the surface electrode have isolation grooves that penetrate at least the P-type SiC emitter layer and the P-type SiC cap layer; an N-side electrode is located on the back side of the substrate; an isolation dielectric film is located on the exposed surface of the SiC epitaxial layer, within the isolation grooves, and on the surface of the P-side electrode, and the top surface of the P-side electrode adjacent to the isolation groove is exposed by the isolation dielectric film; a P-side conductive structure and an N-side conductive structure are present, the P-side conductive structure being located on the top surface of the exposed P-side electrode and the N-side conductive structure being located on the surface of the N-side electrode.

[0005] Optionally, the thickness of the N-type SiC buffer layer is 0.01 μm to 10 μm, the thickness of the N-type SiC base layer is 0.1 μm to 50 μm, the thickness of the P-type SiC emitter layer is 0.01 μm to 20 μm, and the thickness of the P-type SiC cap layer is 0.01 μm to 20 μm.

[0006] Optionally, the doping concentration of the N-type SiC buffer layer is 1e18cm. -3~9e18cm -3 The doping concentration of the N-type SiC substrate is 1e14cm. -3 ~8e14cm -3 The doping concentration of the p-type SiC emitter layer is 1e15cm. -3 ~8e15cm -3 The doping concentration of the N-type SiC cap layer is 8e18cm. -3 ~9e19cm -3 .

[0007] Optionally, the material of the SiC epitaxial layer is 4H polytype SiC.

[0008] Optionally, the P-side electrode includes: a first nickel layer, a first titanium layer located on the surface of the first nickel layer, an aluminum layer located on the surface of the first titanium layer, and a second titanium layer located on the surface of the aluminum layer.

[0009] Optionally, the thickness of the first nickel layer is 10nm to 100nm, the thickness of the first titanium layer is 10nm to 200nm, the thickness of the aluminum layer is 10nm to 150nm, and the thickness of the second titanium layer is 10nm to 200nm.

[0010] Optionally, the N-face electrode includes: a second nickel layer and a third titanium layer located on the surface of the second nickel layer.

[0011] Optionally, the thickness of the second nickel layer is 10 nm to 150 nm, and the thickness of the third titanium layer is 10 nm to 200 nm.

[0012] Optionally, the thickness of the isolation medium film is 10 nm to 2000 nm.

[0013] Accordingly, the present invention also provides a method for fabricating a silicon carbide isotope cell transducer based on C-14, comprising: providing a SiC substrate having a front side and a back side; forming a SiC epitaxial layer on the front side of the substrate, the SiC epitaxial layer comprising, from bottom to top, an N-type SiC buffer layer, an N-type SiC base layer, a P-type SiC emitter layer, and a P-type SiC cap layer; forming an isolation groove within the SiC epitaxial layer, the isolation groove penetrating at least through the P-type SiC emitter layer and the P-type SiC base layer. A cap layer is formed; a plurality of discrete P-side electrodes are formed on the surface of the SiC epitaxial layer between the isolation grooves, the P-side electrodes having a fin-shaped structure, and the isolation grooves are located at least on both sides of the plurality of P-side electrodes; an N-side electrode is formed on the back side of the substrate; an isolation dielectric film is formed on the exposed surface of the SiC epitaxial layer, inside the isolation grooves, and on the surface of the P-side electrodes, the isolation dielectric film exposing the top surface of the P-side electrode adjacent to the isolation groove; a P-side conductive structure is formed on the top surface of the exposed P-side electrode, and an N-side conductive structure is formed on the surface of the N-side electrode.

[0014] Compared with the prior art, the technical solution of the present invention has the following beneficial effects: The silicon carbide isotope cell transducer based on C-14 provided by this invention includes a SiC substrate with opposing front and back sides, and a SiC epitaxial layer located on the front side. The SiC epitaxial layer comprises, from bottom to top, an N-type SiC buffer layer, an N-type SiC base layer, a P-type SiC emitter layer, and a P-type SiC cap layer. The C-14 radiation source enters from the P-type SiC cap layer, generating a large number of electron-hole pairs in the N-type SiC base layer. Under the influence of the built-in electric field, electrons and holes flow to the SiC substrate and the P-type SiC cap layer, respectively. Because SiC is used as both the SiC substrate and the SiC epitaxial layer, and because SiC has a relatively low average ionization energy among wide-bandgap semiconductors, the number of electron-hole pairs is further increased, thereby improving the energy conversion efficiency of the device. Since several discrete P-side electrodes are located on the surface of the SiC epitaxial layer, and the P-side electrodes have a fin-shaped structure, while the N-side electrodes are located on the back side of the substrate, the emission source C-14 can be injected into the SiC cap layer through the gaps in the fin-shaped structure. The generated holes are introduced into the P-side electrodes, and the generated electrons are introduced into the N-side electrodes. Because the isolation grooves are located at least on both sides of the SiC epitaxial layer of several P-side electrodes, and the isolation grooves penetrate at least the P-type SiC emission layer and the P-type SiC cap layer, the device location is isolated. Because the isolation dielectric film is located on the exposed SiC epitaxial layer surface, within the isolation grooves, and on the surface of the P-side electrodes, and the top surface of the P-side electrode adjacent to the isolation groove is exposed by the isolation dielectric film, the P-side conductive structure is located on the top surface of the exposed P-side electrode, and the N-side conductive structure is located on the surface of the N-side electrode, a large number of electrons and holes are drawn out by the N-side conductive structure and the P-side conductive structure, thereby achieving energy conversion. Simultaneously, this invention increases the number of electron-hole pairs by matching the transducer structure with the radiation source, thereby improving the energy conversion efficiency of the device.

[0015] Furthermore, since the thickness of the N-type SiC buffer layer is 0.01μm to 10μm, the thickness of the N-type SiC base layer is 0.1μm to 50μm, the thickness of the P-type SiC emitter layer is 0.01μm to 20μm, and the thickness of the P-type SiC cap layer is 0.01μm to 20μm, the range of the C-14 radioactive source within the transducer is satisfied, which is beneficial for the semiconductor PIN junction to collect electrons and holes, thereby improving the energy conversion efficiency of the device.

[0016] The method for preparing a silicon carbide isotope battery transducer based on C-14 provided by the technical solution of the present invention can prepare the aforementioned silicon carbide isotope battery transducer based on C-14, and therefore also has the technical effects of the aforementioned silicon carbide isotope battery transducer based on C-14, which will not be repeated here. Attached Figure Description

[0017] Figures 1 to 8This is a schematic diagram of the structure of each step in the preparation method of the silicon carbide isotope battery transducer based on C-14 according to an embodiment of the present invention; Figure 9 This is an IV curve diagram of a Ni-63 standard radioactive source device based on a C-14 silicon carbide isotope battery transducer according to an embodiment of the present invention. Figure 10 This is a PV curve of a Ni-63 standard radioactive source device based on a C-14 silicon carbide isotope battery transducer according to an embodiment of the present invention. Figure 11 This is a diagram showing the response test parameters of the Ni-63 standard radioactive source for the silicon carbide isotope battery transducer based on C-14, according to an embodiment of the present invention. Figure 12 This is a parameter comparison diagram of the C-14-based silicon carbide isotope battery transducer and other silicon carbide isotope battery transducers based on the Ni-63 standard radioactive source response test of this invention. Figure 13 This is an IV response test diagram of a silicon carbide isotope battery transducer based on C-14 according to an embodiment of the present invention; Figure 14 This is an IT response test diagram of a silicon carbide isotope battery transducer based on C-14 according to an embodiment of the present invention; Figure 15 This is an IV response result diagram of a silicon carbide isotope battery transducer based on C-14 according to an embodiment of the present invention.

[0018] Explanation of reference numerals in the attached figures: 100. SiC substrate; 101. Front side of substrate; 102. Back side of substrate; 110. SiC epitaxial layer; 111. N-type SiC buffer layer; 112. N-type SiC base layer; 113. P-type SiC emitter layer; 114. P-type SiC cap layer; 120. Isolation groove; 210, P-side electrode; 220, N-side electrode; 211, P-side conductive structure; 221, N-side conductive structure; 300, isolation dielectric film. Detailed Implementation

[0019] As described in the background section, current radiation-voltaic nuclear battery transducers suffer from insufficient energy conversion efficiency. This will be explained in detail below: On the one hand, the semiconductor material of the transducer is a factor affecting the energy conversion efficiency of the device. Narrow bandgap semiconductor materials have weak radiation resistance; for example, the performance of silicon wafers will degrade within a few days under irradiation with beta rays. On the other hand, the transducer structural design is another factor affecting the energy conversion efficiency of the device. The average and maximum energies of the radiation source determine the range of beta rays inside the transducer. If the range inside the transducer is too large, some electron-hole pairs will be difficult to capture, thereby reducing the energy conversion efficiency of the device.

[0020] To solve the above-mentioned technical problems, the present invention provides a method for preparing a silicon carbide isotope battery transducer based on C-14, which improves the energy conversion efficiency of the device by structural design matching the C-14 radioactive source.

[0021] To make the above-mentioned objectives, features, and beneficial effects of the present invention more apparent and understandable, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus. Additionally, directional terms such as above, below, up, down, upward, downward, left, right, etc., are used relative to exemplary embodiments as they are shown in the figures, with upward or upper directions pointing towards the top of the corresponding figure and downward or lower directions pointing towards the bottom of the corresponding figure.

[0023] Figures 1 to 8 This is a schematic diagram of the structure of each step in the preparation method of the silicon carbide isotope battery transducer based on C-14 according to an embodiment of the present invention.

[0024] Please refer to Figure 1 A SiC substrate 100 is provided, the SiC substrate 100 including an opposing substrate front side 101 and substrate back side 102.

[0025] In this embodiment, the SiC substrate 100 is made of 4H polytype SiC with a hexagonal crystal structure. The size of the SiC substrate 100 can be 4 inches, 6 inches, 8 inches, 12 inches, etc., and there is no limitation thereto.

[0026] Please refer to Figure 2 A SiC epitaxial layer 110 is formed on the front side 101 of the substrate. The SiC epitaxial layer includes an N-type SiC buffer layer 111, an N-type SiC base layer 112, a P-type SiC emitter layer 113, and a P-type SiC cap layer 114 stacked from bottom to top.

[0027] In this embodiment, the material of the SiC epitaxial layer 110 is 4H polytype SiC, and the crystal structure is hexagonal.

[0028] In this embodiment, the process of forming the SiC epitaxial layer 110 may include chemical vapor deposition (CVD).

[0029] Specifically, the thickness of the N-type SiC buffer layer 111 is 0.01 μm to 10 μm, the thickness of the N-type SiC base layer 112 is 0.1 μm to 50 μm, the thickness of the P-type SiC emitter layer 113 is 0.01 μm to 20 μm, and the thickness of the P-type SiC cap layer 114 is 0.01 μm to 20 μm. This satisfies the range of the C-14 radioactive source within the transducer, which is beneficial for the semiconductor PIN junction to collect electrons and holes, thereby improving the energy conversion efficiency of the device. Specifically, the doping concentration of the N-type SiC buffer layer 111 is 1e18cm⁻¹. -3 ~9e18cm -3 The doping concentration of the N-type SiC substrate 112 is 1e14cm. -3 ~8e14cm -3 The doping concentration of the p-type SiC emitter layer 113 is 1e15cm. -3 ~8e15cm -3 The doping concentration of the p-type SiC cap layer 114 is 8e18cm. -3 ~9e19cm -3 .

[0030] Please refer to Figure 3 An isolation groove 120 is formed in the SiC epitaxial layer 110, and the isolation groove 120 penetrates at least the P-type SiC emitter layer 113 and the P-type SiC cap layer 114.

[0031] In this embodiment, before forming the isolation groove 120, the substrate back side 102 is further subjected to chemical mechanical polishing (CMP) and standard RCA cleaning.

[0032] Specifically, the smoothness of the substrate back side 102 is increased by chemical mechanical polishing (CMP).

[0033] Specifically, the standard RCA cleaning process includes: cleaning with sulfuric acid-hydrogen peroxide mixture (SPM) for 300 seconds, cleaning with buffered oxide etchant (BOE) for 80-180 seconds, cleaning with hydrochloric acid for 180 seconds, and rinsing and drying.

[0034] Please continue to refer to this. Figure 3 The method of forming the isolation groove 120 may include: forming a first photoresist mask layer (not shown) on the surface of the SiC epitaxial layer 110, etching the SiC epitaxial layer 110 with the first photoresist mask layer, removing the first photoresist mask layer, and forming the isolation groove 120.

[0035] Specifically, the depth of the isolation groove 120 is 0.01μm to 300μm.

[0036] Specifically, the etching process for the SiC epitaxial layer 110 can be inductively coupled plasma (ICP) etching.

[0037] Please refer to Figure 4 A plurality of mutually discrete P-surface electrodes 210 are formed on the surface of the SiC epitaxial layer 110 between the isolation grooves 120. The P-surface electrodes 210 have a fin-shaped structure, and the isolation grooves 120 are located on at least both sides of the plurality of P-surface electrodes 210.

[0038] In this embodiment, the P-side electrode 210 includes: a first nickel layer, a first titanium layer located on the surface of the first nickel layer, an aluminum layer located on the surface of the first titanium layer, and a second titanium layer located on the surface of the aluminum layer.

[0039] In this embodiment, the thickness of the first nickel layer is 10nm to 100nm, the thickness of the first titanium layer is 10nm to 200nm, the thickness of the aluminum layer is 10nm to 150nm, and the thickness of the second titanium layer is 10nm to 200nm.

[0040] Specifically, the method for forming the P-side electrode 210 includes: after forming the isolation groove 120, forming a second photoresist mask layer (not shown) on the surface of the SiC epitaxial layer 110; depositing a first metal using the second photoresist mask layer as a mask; and stripping the second photoresist mask layer and the first metal located on the second photoresist mask layer to form the P-side electrode 210.

[0041] Specifically, the process of depositing the first metal can include electron beam evaporation.

[0042] Please refer to Figure 5 An N-surface electrode 220 is formed on the back side 102 of the substrate.

[0043] In this embodiment, the N-side electrode 220 includes a second nickel layer and a third titanium layer located on the surface of the second nickel layer.

[0044] In this embodiment, the thickness of the second nickel layer is 10 nm to 150 nm, and the thickness of the third titanium layer is 10 nm to 200 nm.

[0045] In this embodiment, before forming the N-side electrode 220, a protective coating is applied to the surface of the SiC epitaxial layer 110 and the surface of the P-side electrode 210.

[0046] Specifically, the method for forming the N-side electrode 220 may include: after forming the P-side electrode 210, forming a third photoresist mask layer (not shown) on the back side of the substrate 102; depositing a second metal using the third photoresist mask layer as a mask; and stripping the third photoresist mask layer and the second metal located on the third photoresist mask layer to form the N-side electrode 220.

[0047] Specifically, the process for depositing a second metal can include magnetron sputtering deposition and electron beam evaporation.

[0048] Please refer to Figure 6 An isolation dielectric film 300 is formed on the surface of the exposed SiC epitaxial layer 110, inside the isolation groove 120, and on the surface of the P-side electrode 210. The isolation dielectric film 300 exposes the top surface of the P-side electrode 210 adjacent to the isolation groove 120.

[0049] In this embodiment, before forming the isolation medium film 300, the process further includes: RTP rapid annealing treatment, in a nitrogen atmosphere, heating to 700℃~1000℃ at a heating rate of 20℃ / s~50℃ / s, holding at that temperature for 200s~500s, and then rapidly annealing.

[0050] In this embodiment, the thickness of the isolation dielectric film 300 is 10nm to 2000nm.

[0051] In this embodiment, the material of the insulating dielectric film 300 may include at least one of silicon nitride, silicon dioxide, and aluminum oxide.

[0052] Specifically, the method for forming the isolation dielectric film 300 may include: forming an initial isolation dielectric film (not shown) on the surface of the exposed SiC epitaxial layer 110, inside the isolation groove 120 and on the surface of the P-side electrode 210; forming a fourth photoresist mask layer (not shown) on the surface of the initial isolation dielectric film; etching the initial isolation dielectric film using the fourth photoresist mask layer as a mask; and removing the fourth photoresist mask layer to form the isolation dielectric film 300, wherein the isolation dielectric film 300 exposes the top surface of the P-side electrode 210 adjacent to the isolation groove 120.

[0053] Specifically, the process for forming the initial isolation dielectric film can include plasma-enhanced chemical vapor deposition (PECVD) and atomic layer deposition.

[0054] Specifically, the etching process for the initial isolation dielectric film can be reactive ion (RIE) etching.

[0055] Please refer to Figure 7 A P-surface conductive structure 211 is formed on the top surface of the exposed P-surface electrode 210.

[0056] In this embodiment, before forming the P-side conductive structure 211, the substrate back side 102 is coated with adhesive for protection.

[0057] In this embodiment, the P-side conductive structure 211 consists of a fourth titanium layer and a first gold layer located on the surface of the fourth titanium layer. The thickness of the fourth titanium layer is 10 nm to 100 nm, and the thickness of the first gold layer is 500 nm to 2000 nm.

[0058] Specifically, the method for forming the P-side conductive structure 211 may include: after forming the isolation dielectric film 300, forming a fourth photoresist mask layer on the surface of the isolation dielectric film 300; depositing a third metal using the fourth photoresist mask layer as a mask; and stripping the fourth photoresist mask layer and the third metal located on the fourth photoresist mask layer to form the P-side conductive structure 211.

[0059] Specifically, the process of depositing a third metal can include electron beam evaporation.

[0060] Please refer to Figure 8 An N-face conductive structure 221 is formed on the surface of the N-face electrode 220.

[0061] In this embodiment, before forming the N-side conductive structure 221, the method further includes applying adhesive to protect the surface of the isolation dielectric film 300 and the surface of the P-side conductive structure 211.

[0062] In this embodiment, the N-plane conductive structure 221 is a fifth titanium layer and a second gold layer located on the surface of the fifth titanium layer. The thickness of the fifth titanium layer is 10nm to 100nm, and the thickness of the second gold layer is 500nm to 2000nm.

[0063] Specifically, the method for forming the N-side conductive structure 221 may include: after forming the P-side conductive structure 211, forming a fifth photoresist mask layer on the back side of the substrate 102 and the surface of the N-side electrode 220; depositing a fourth metal using the fifth photoresist mask layer as a mask; and stripping the fifth photoresist mask layer and the fourth metal located on the fifth photoresist mask layer to form the N-side conductive structure 221.

[0064] Specifically, the process for depositing a fourth metal can include magnetron sputtering deposition and electron beam evaporation.

[0065] The performance of the silicon carbide isotope battery transducer based on C-14 according to the present invention was tested using a Ni-63 standard radioactive source.

[0066] Please refer to Figures 9 to 11 It is worth noting that in the test of the Ni-63 standard radioactive source, the open-circuit voltage of the silicon carbide isotope battery transducer based on C-14 in this embodiment of the invention can reach 2V. Therefore, in the C-14 radioactive source, the open-circuit voltage of the transducer can reach more than 2V, and it also has a high energy conversion rate.

[0067] Please refer to Figure 12 Compared with the prior art, the silicon carbide isotope battery transducer based on C-14 in this embodiment of the invention has higher open-circuit voltage, short-circuit current and total efficiency, thus demonstrating that the invention has the technical effect of improving the energy conversion efficiency of the device.

[0068] Please refer to Figure 13 The short-circuit current, open-circuit voltage, fill factor, and output power of the silicon carbide isotope battery transducer based on C-14 in this embodiment of the invention have numerical uncertainties of less than 10%, and also have a high fill factor.

[0069] Please refer to Figure 14 In this embodiment of the invention, the current of the silicon carbide isotope battery transducer based on C-14 is entirely generated by the radiation from the C-14 radioactive source. The background current has almost no effect on the output current. In three consecutive 1-minute tests, the current did not change significantly, and the current output was stable.

[0070] Please refer to Figure 15 In this embodiment of the invention, the silicon carbide isotope battery transducer based on C-14 was divided into three groups and continuously monitored for 1 minute. The voltage of each group remained stable at 2.1V without significant changes, indicating good voltage stability.

[0071] The VT response results of the silicon carbide isotope battery transducer based on C-14 in this embodiment of the invention were also tested. The test method was as follows: the positive input terminal of the energy storage PCB was connected to the positive bus of the silicon carbide isotope battery transducer prototype based on C-14 in this embodiment of the invention, and the negative input terminal was connected to the negative bus. The prototype charged the capacitor in the parallel integrated energy storage circuit board. At the same time, the positive output terminal of the pulse output was connected to the positive terminal of the LED, and the negative output terminal of the pulse output was connected to the negative terminal of the LED. After the chip in the parallel integrated energy storage circuit board detected that the capacitor voltage was stable, it performed a pulse discharge on the LED.

[0072] Test results show that under continuous charging of the prototype, the parallel integrated energy storage circuit board begins cold start. The voltage across the capacitor rises from 0V to 2.2V in 106.7s. After the chip detects that the voltage has stabilized, it maintains this voltage for 26.3s before initiating the first pulse discharge. After discharge, a 0.4V voltage drop occurs across the capacitor, and LED illumination is observed. The voltage rises again to 2.2V in 15.7s, and the chip begins timing to prepare for the next pulse discharge. Continuous monitoring yielded 10 pulses and 10 LED illuminations. This verifies that the C-14-based silicon carbide isotope battery transducer of this invention has the capability to drive appliances with a power consumption below milliwatt.

[0073] In this embodiment, a method for fabricating a silicon carbide isotope cell transducer based on C-14 is provided. A SiC substrate 100 with a front side 101 and a back side 102 is provided, along with a SiC epitaxial layer 110 located on the front side 101. The SiC epitaxial layer 110 comprises, from bottom to top, an N-type SiC buffer layer 111, an N-type SiC base layer 112, a P-type SiC emitter layer 113, and a P-type SiC cap layer 114, stacked sequentially. A C-14 radiation source is injected from the P-type SiC cap layer 114, generating a large number of electron-hole pairs in the N-type SiC base layer 112. Under the influence of the built-in electric field, electrons and holes flow to the SiC substrate 100 and the P-type SiC cap layer 104, respectively. Because SiC is used as the SiC substrate 100 and the SiC epitaxial layer 110, and because SiC has a relatively low average ionization energy in wide-bandgap semiconductors, the number of electron-hole pairs is further increased, thereby improving the energy conversion efficiency of the device. Since several mutually independent P-side electrodes 210 are located on the surface of the SiC epitaxial layer 110, and the P-side electrodes 210 have a fin-shaped structure, while the N-side electrodes 220 are located on the back side of the substrate 102, the emission source C-14 can be injected into the P-type SiC cap layer 114 through the gaps in the fin-shaped structure. The generated holes are introduced into the P-side electrodes 210, and the generated electrons are introduced into the N-side electrodes 220. Since the isolation groove 120 is located at least within the SiC epitaxial layers 110 on both sides of several P-side electrodes 210, and the isolation groove 120 penetrates at least the P-type SiC emitter layer 113 and the P-type SiC cap layer 114, it isolates the device location. Since the isolation dielectric film 300 is located on the exposed surface of the SiC epitaxial layers 110, within the isolation groove 120, and on the surface of the P-side electrodes 210, and the top surface of the P-side electrodes 210 adjacent to the isolation groove 120 is exposed by the isolation dielectric film 300, the P-side conductive structure 211 is located on the exposed top surface of the P-side electrodes 210, and the N-side conductive structure 221 is located on the surface of the N-side electrode 220, a large number of electrons and holes are drawn out by the N-side conductive structure 221 and the P-side conductive structure 211, thereby achieving energy conversion. Simultaneously, this invention increases the number of electron-hole pairs by matching the transducer's own structure with the radiation source, thereby improving the device's energy conversion efficiency.

[0074] Accordingly, the technical solution of the present invention also provides a silicon carbide isotope cell transducer based on C-14, characterized in that it includes: a SiC substrate 100, a SiC epitaxial layer 110, a plurality of mutually discrete P-side electrodes 210, an isolation groove 120, an N-side electrode 220, a P-side conductive structure 211 and an N-side conductive structure 221.

[0075] The SiC substrate 100 has a front side 101 and a back side 102.

[0076] The SiC epitaxial layer 110 is located on the front side 101 of the substrate. The SiC epitaxial layer 110 includes an N-type SiC buffer layer 111, an N-type SiC base layer 112, a P-type SiC emitter layer 113, and a P-type SiC cap layer 114 stacked from bottom to top.

[0077] The P-side electrode 210 is located on the surface of the SiC epitaxial layer 110, and the P-side electrode 210 has a fin-shaped structure.

[0078] An isolation groove 120 is located at least in the SiC epitaxial layer 110 on both sides of the plurality of P-side electrodes 210, and the isolation groove 120 penetrates at least the P-type SiC emitter layer 113 and the P-type SiC cap layer 114.

[0079] The N-side electrode 220 is located on the back side 102 of the substrate.

[0080] The isolation dielectric film 300 is located on the surface of the exposed SiC epitaxial layer 110, inside the isolation groove 120, and on the surface of the P-side electrode 210. The top surface of the P-side electrode 210 adjacent to the isolation groove 120 is exposed by the isolation dielectric film 300.

[0081] P-side conductive structure 211 and N-side conductive structure 221, with P-side conductive structure 211 located on the top surface of the exposed P-side electrode 210 and N-side conductive structure 221 located on the surface of the N-side electrode 220.

[0082] Specifically, the materials, formation process, working principle, specific implementation method and beneficial effects of the C-14-based silicon carbide isotope battery transducer in the embodiments of the present invention can be found in the preparation method of the C-14-based silicon carbide isotope battery transducer in the embodiments of the present invention, and will not be repeated here.

[0083] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A silicon carbide isotope battery transducer based on C-14, characterized in that, include: SiC substrate, having a front side and a back side of the substrate; The SiC epitaxial layer is located on the front side of the substrate. The SiC epitaxial layer includes an N-type SiC buffer layer, an N-type SiC base layer, a P-type SiC emitter layer and a P-type SiC cap layer stacked sequentially from bottom to top. A plurality of mutually discrete P-face electrodes are located on the surface of the SiC epitaxial layer, and the P-face electrodes are fin-shaped structures. An isolation groove is located at least in the SiC epitaxial layer on both sides of the plurality of P-side electrodes, and the isolation groove penetrates at least the P-type SiC emitter layer and the P-type SiC cap layer; The N-side electrode is located on the back side of the substrate; An isolation dielectric film is located on the exposed SiC epitaxial layer surface, within the isolation groove, and on the surface of the P-side electrode, and the top surface of the P-side electrode adjacent to the isolation groove is exposed by the isolation dielectric film. A P-side conductive structure and an N-side conductive structure, wherein the P-side conductive structure is located on the top surface of the exposed P-side electrode, and the N-side conductive structure is located on the surface of the N-side electrode.

2. The silicon carbide isotope battery transducer based on C-14 as described in claim 1, characterized in that, The thickness of the N-type SiC buffer layer is 0.01 μm to 10 μm, the thickness of the N-type SiC base layer is 0.1 μm to 50 μm, the thickness of the P-type SiC emitter layer is 0.01 μm to 20 μm, and the thickness of the P-type SiC cap layer is 0.01 μm to 20 μm.

3. The silicon carbide isotope battery transducer based on C-14 as described in claim 2, characterized in that, The doping concentration of the N-type SiC buffer layer is 1e18cm. -3 ~9e18cm -3 The doping concentration of the N-type SiC substrate is 1e14cm. -3 ~8e14cm -3 The doping concentration of the p-type SiC emitter layer is 1e15cm. -3 ~8e15cm -3 The doping concentration of the N-type SiC cap layer is 8e18cm. -3 ~9e19cm -3 .

4. The silicon carbide isotope battery transducer based on C-14 as described in claim 1, characterized in that, The material of the SiC epitaxial layer is 4H polytype SiC.

5. The silicon carbide isotope battery transducer based on C-14 as described in claim 1, characterized in that, The P-side electrode includes: a first nickel layer, a first titanium layer located on the surface of the first nickel layer, an aluminum layer located on the surface of the first titanium layer, and a second titanium layer located on the surface of the aluminum layer.

6. The silicon carbide isotope battery transducer based on C-14 as described in claim 5, characterized in that, The thickness of the first nickel layer is 10nm to 100nm, the thickness of the first titanium layer is 10nm to 200nm, the thickness of the aluminum layer is 10nm to 150nm, and the thickness of the second titanium layer is 10nm to 200nm.

7. The silicon carbide isotope battery transducer based on C-14 as described in claim 1, characterized in that, The N-face electrode includes a second nickel layer and a third titanium layer located on the surface of the second nickel layer.

8. The silicon carbide isotope battery transducer based on C-14 as described in claim 7, characterized in that, The thickness of the second nickel layer is 10 nm to 150 nm, and the thickness of the third titanium layer is 10 nm to 200 nm.

9. The silicon carbide isotope battery transducer based on C-14 as described in claim 1, characterized in that, The thickness of the isolation medium membrane is 10 nm to 2000 nm.

10. A method for fabricating a silicon carbide isotope battery transducer based on C-14, characterized in that, include: A SiC substrate is provided, the SiC substrate having opposing front and back sides; A SiC epitaxial layer is formed on the front side of the substrate. The SiC epitaxial layer includes an N-type SiC buffer layer, an N-type SiC base layer, a P-type SiC emitter layer, and a P-type SiC cap layer stacked sequentially from bottom to top. An isolation groove is formed within the SiC epitaxial layer, and the isolation groove penetrates at least through the P-type SiC emitter layer and the P-type SiC cap layer. A plurality of mutually discrete P-surface electrodes are formed on the surface of the SiC epitaxial layer between the isolation grooves. The P-surface electrodes have a fin-shaped structure, and the isolation grooves are located at least on both sides of the plurality of P-surface electrodes. An N-face electrode is formed on the back side of the substrate; An isolation dielectric film is formed on the exposed SiC epitaxial layer surface, within the isolation groove, and on the surface of the P-side electrode, the isolation dielectric film exposing the top surface of the P-side electrode adjacent to the isolation groove; A P-side conductive structure is formed on the top surface of the exposed P-side electrode, and an N-side conductive structure is formed on the surface of the N-side electrode.

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