A high-isolation dual-frequency high-efficiency radio frequency power amplifier

Abstract

The application discloses a kind of high-isolation dual-frequency high-efficiency radio frequency power amplifiers, including input matching circuit, gate bias circuit, drain bias circuit, power amplifier tube, output matching circuit harmonic control circuit and simplified matching circuit, input matching circuit and gate bias circuit are connected with the gate of power amplifier tube respectively, the source of power amplifier tube is grounded, the drain of power amplifier tube is connected with harmonic control circuit, harmonic control circuit is connected with drain bias circuit, simplified matching circuit and output matching circuit respectively;Harmonic control circuit is used to match the optimum second harmonic source / load impedance of power amplifier tube under dual-frequency band to the impedance region corresponding to its high-efficiency operating point respectively;Simplified matching circuit is used to make the impedance imaginary part of power amplifier tube under dual-frequency band obtained by load traction technology zero, only the real part is retained;The advantage is that high-isolation and high-efficiency are combined, and the structure is simple, the occupied layout area is smaller, the manufacturing cost is lower, and the output matching design debugging difficulty can be reduced.

Description

Technical Field

[0001] This invention relates to radio frequency power amplifiers, and more particularly to a high-isolation dual-band high-efficiency radio frequency power amplifier. Background Technology

[0002] Radio frequency (RF) power amplifiers are core components in the RF front-end of wireless communication equipment. Their basic function is to linearly amplify the modulated RF signal to meet the power transmission requirements of the antenna port. The efficiency, output power, and linearity of RF power amplifiers directly determine the signal coverage, overall power consumption, and system stability of wireless communication equipment.

[0003] In recent years, with the widespread deployment of 4G and 5G mobile communication systems and the popularization of multi-mode, multi-frequency communication terminals, wireless communication equipment has placed higher demands on its radio frequency (RF) front-end. It often needs to operate simultaneously or in a time-division manner on multiple frequency bands (e.g., 1.8 GHz and 2.6 GHz) to support stable and efficient signal transmission across different frequency bands. Traditional single-band RF power amplifiers are no longer sufficient to meet the current development needs of wireless communication equipment for multi-band compatibility, miniaturization, and low power consumption. Therefore, dual-band RF power amplifiers capable of operating efficiently on two frequency bands simultaneously have become a key technological development direction for base stations, wireless terminals, and other RF modules.

[0004] A typical high-isolation, high-efficiency parallel dual-band power amplifier mainly consists of six functional modules: a bias circuit, power amplifier transistors, a stabilization circuit, an input matching circuit, an output matching circuit, and a band-stop filter. The bias circuit has a dual function: providing a quiescent operating point for the power amplifier transistors and providing isolation protection to prevent leakage of the main circuit RF signal to the DC power supply, thereby protecting the DC power supply, reducing unnecessary power loss, and effectively suppressing noise crosstalk from the DC power supply to the RF main circuit, ensuring the purity of the power amplifier circuit. A typical implementation of the bias circuit is a quarter-wavelength microstrip line. The power amplifier transistors, as the core of energy conversion in the entire power amplifier circuit, are responsible for converting the energy from the DC power supply into controlled RF output power; therefore, their selection is fundamental to the entire power amplifier design. The stabilization circuit ensures stable operation of the power amplifier within its operating frequency band, avoiding self-oscillation, and is the primary prerequisite for the normal operation of the power amplifier. Common stabilization circuits employ an RC parallel structure. The main function of input and output matching circuits is to achieve impedance transformation, matching the optimal source and load impedances of the power amplifier transistors under specific operating conditions to the standard 50 Ω system impedance, thereby enabling the power amplifier to achieve its expected performance specifications. To achieve dual-frequency matching, existing input or output matching circuits often employ couplers, branch lines with phase compensation lines, or microstrip series-parallel structures. Band-stop filters are typically cascaded after the output matching circuit. Their function is to suppress signals in non-target operating frequency bands (such as frequencies between two operating frequency bands or harmonic frequency bands) through theoretical calculations and parameter design, compensating for the insufficient selectivity of output matching circuits designed using broadband matching methods in dual-frequency applications.

[0005] However, the aforementioned parallel dual-band power amplifier structure has several inherent limitations. First, cascading a band-stop filter after the output matching circuit not only increases the design complexity of the parallel dual-band power amplifier but also makes the design, debugging, and matching of the overall output matching more difficult, while occupying a larger layout area and increasing manufacturing costs. Second, the performance of this architecture relies excessively on the output matching circuit, only utilizing the inherent efficiency level of the power amplifier transistors themselves, making it difficult to further improve through subsequent circuitry. Furthermore, since harmonics and other non-operating frequency signals can interfere with the output signal during operation of the RF power amplifier, it is necessary to improve the isolation of the RF power amplifier from signals outside the target frequency. Currently, the commonly used method to improve isolation is to add a dedicated isolation circuit, which undoubtedly increases the cost of circuit design. Summary of the Invention

[0006] The technical problem to be solved by the present invention is to provide a high-isolation dual-frequency high-efficiency RF power amplifier that combines high isolation and high efficiency, has a simple structure, occupies a small layout area, has low manufacturing cost, and can reduce the difficulty of output matching design and debugging.

[0007] The technical solution adopted by this invention to solve the above-mentioned technical problems is as follows: a high-isolation dual-band high-efficiency RF power amplifier, comprising an input matching circuit, a gate bias circuit, a drain bias circuit, a power amplifier transistor, and an output matching circuit. The input matching circuit and the gate bias circuit are respectively connected to the gate of the power amplifier transistor, the source of the power amplifier transistor is grounded, and the gate bias circuit and the drain bias circuit are used to enable the power amplifier transistor to operate in class AB. The input matching circuit adopts a T-type matching structure, and the high-isolation dual-band high-efficiency RF power amplifier further includes harmonics. The amplifier includes a control circuit and a simplified matching circuit. The drain of the power amplifier transistor is connected to the harmonic control circuit, which is connected to the drain bias circuit, the simplified matching circuit, and the output matching circuit. The harmonic control circuit is used to match the optimal second harmonic source / load impedance of the power amplifier transistor in the dual-band to the impedance region corresponding to its high-efficiency operating point, thereby improving the dual-band energy conversion efficiency. The simplified matching circuit is used to zero out the imaginary part of the impedance of the power amplifier transistor in the dual-band obtained through load pulling technology, retaining only the real part.

[0008] Compared with the prior art, the advantages of the present invention are as follows: 1. By performing targeted impedance matching design on the input matching circuit, the RF power amplifier has good input return loss and port isolation in both operating frequency bands, effectively suppressing signal crosstalk between frequency bands. This eliminates the need to set a band-stop filter after the output matching circuit. This design not only simplifies the circuit architecture but also creates conditions for overall miniaturization. Second, by using a harmonic control circuit to precisely match the second harmonic impedance of the dual-band amplifier to the high-efficiency impedance region of the power amplifier tube, the energy conversion efficiency of the power amplifier under dual-band conditions is effectively improved. Third, by simplifying the matching circuit, the imaginary part of the dual-band impedance of the power amplifier tube is reduced to zero, and only the real part is retained, which significantly reduces the design and debugging difficulty of the subsequent output matching circuit. Fourth, the added harmonic control circuit and simplified matching circuit both adopt a simple design and do not require additional active components. Their overall layout space is much smaller than that of the omitted band-stop filter, thus significantly simplifying the circuit structure, reducing the overall size and manufacturing cost. In summary, this invention achieves high isolation and high efficiency while possessing advantages such as simple circuit structure, small footprint, low manufacturing cost, and low debugging difficulty, thus well meeting the practical application requirements of dual-band RF power amplifiers.

[0009] Furthermore, the input matching circuit, the gate bias circuit, the drain bias circuit, the output matching circuit, and the harmonic control circuit all have input and output terminals, and the simplified matching circuit has input and output terminals. The input terminal of the input matching circuit is the input terminal of the high-isolation dual-band high-efficiency RF power amplifier, and the output terminal of the input matching circuit is connected to the gate of the power amplifier tube. The input terminal of the gate bias circuit is connected to a first DC power supply, and the output terminal of the gate bias circuit is connected to the gate of the power amplifier tube. The input terminal of the drain bias circuit is connected to a second DC power supply. The input terminal of the harmonic control circuit is connected to the drain of the power amplifier tube, and the output terminal of the harmonic control circuit is connected to the output terminal of the drain bias circuit, the input and output terminals of the simplified matching circuit, and the input terminal of the output matching circuit, respectively. The output terminal of the output matching circuit is the output terminal of the high-isolation dual-band high-efficiency RF power amplifier.

[0010] Furthermore, the input matching circuit is formed by three microstrip lines arranged in a T-shape and connected together.

[0011] Furthermore, in the input matching circuit, the three microstrip lines are a first microstrip line, a second microstrip line, and a third microstrip line; the first microstrip line and the third microstrip line are arranged in the same direction, and the second microstrip line is perpendicular to the arrangement direction of the first microstrip line and the third microstrip line; one end of the first microstrip line is the input terminal of the input matching circuit, the other end of the first microstrip line is connected to one end of the second microstrip line and one end of the third microstrip line respectively, and the other end of the third microstrip line is the output terminal of the input matching circuit.

[0012] Furthermore, the gate bias circuit includes a first capacitor, a second capacitor, a fourth microstrip line, a fifth microstrip line, a sixth microstrip line, and a first resistor; the fourth, fifth, and sixth microstrip lines are arranged in a T-shape, the fourth and sixth microstrip lines are arranged in the same direction, and the fifth microstrip line is perpendicular to the arrangement direction of the fourth and sixth microstrip lines; one end of the first capacitor and one end of the second capacitor are both grounded, and the other ends of the first capacitor, the other ends of the second capacitor, and one end of the fourth microstrip line are connected, with the connection end serving as the input terminal of the gate bias circuit; the other end of the fourth microstrip line is connected to one end of the fifth microstrip line and one end of the sixth microstrip line, respectively, and the other end of the sixth microstrip line is connected to one end of the first resistor, with the other end of the first resistor serving as the output terminal of the gate bias circuit. While providing the gate bias voltage to the power amplifier tube, the first resistor is used to improve the low-frequency stability of the gate bias circuit. The first capacitor and the second capacitor serve as two bypass capacitors, respectively used to filter out radio frequency interference in the power supply path and prevent dual-band radio frequency signals from entering the DC power supply connected to the input terminal of the gate bias circuit.

[0013] Furthermore, the drain bias circuit includes a third capacitor, a fourth capacitor, a seventh microstrip line, an eighth microstrip line, and a ninth microstrip line; the seventh, eighth, and ninth microstrip lines are arranged in a T-shape, the seventh and ninth microstrip lines are arranged in the same direction, and the eighth microstrip line is perpendicular to the arrangement direction of the seventh and ninth microstrip lines; one end of the third capacitor and one end of the fourth capacitor are both grounded, and the other ends of the third capacitor, the other ends of the fourth capacitor, and one end of the seventh microstrip line are connected, with the connection end serving as the input terminal of the drain bias circuit; the other end of the seventh microstrip line is connected to one end of the eighth microstrip line and one end of the ninth microstrip line, respectively, and the other end of the ninth microstrip line serves as the output terminal of the drain bias circuit. While providing drain bias voltage to the power amplifier tube, the third and fourth capacitors in this drain bias circuit serve as two bypass capacitors to filter out radio frequency interference in the power supply path, preventing dual-band radio frequency signals from entering the DC power supply connected to the input terminal of the gate bias circuit.

[0014] Furthermore, the harmonic control circuit includes a tenth microstrip line, an eleventh microstrip line, and a twelfth microstrip line; one end of the tenth microstrip line is the input terminal of the harmonic control circuit, and the other end of the tenth microstrip line is connected to one end of the eleventh microstrip line and one end of the twelfth microstrip line respectively, and its connection terminal is the output terminal of the harmonic control circuit.

[0015] Furthermore, the simplified matching circuit includes a thirteenth microstrip line and a fourteenth microstrip line, one end of the thirteenth microstrip line and one end of the fourteenth microstrip line are connected, and their connection ends are the input and output terminals of the simplified matching circuit.

[0016] Furthermore, the output matching circuit includes a fifteenth microstrip line, a sixteenth microstrip line, and a seventeenth microstrip line; the fifteenth microstrip line and the seventeenth microstrip line are arranged in the same direction, and the sixteenth microstrip line is perpendicular to the arrangement direction of the fifteenth microstrip line and the seventeenth microstrip line; one end of the fifteenth microstrip line is the input terminal of the output matching circuit, and the other end of the fifteenth microstrip line is connected to one end of the sixteenth microstrip line and one end of the seventeenth microstrip line, respectively; the other end of the seventeenth microstrip line is the output terminal of the output matching circuit. Attached Figure Description

[0017] Figure 1 This is a structural block diagram of the high-isolation dual-frequency high-efficiency radio frequency power amplifier of the present invention; Figure 2 The circuit diagram shows the input matching circuit of the high isolation dual-frequency high-efficiency RF power amplifier of the present invention. Figure 3 This is a simulation diagram of the input matching circuit of the high isolation dual-frequency high-efficiency RF power amplifier of the present invention; Figure 4 This is a circuit diagram of the gate bias circuit of the high isolation dual-frequency high efficiency RF power amplifier of the present invention; Figure 5 The circuit diagram shows the drain bias circuit of the high isolation dual-frequency high-efficiency RF power amplifier of the present invention. Figure 6 The circuit diagram shows the harmonic control circuit of the high isolation dual-frequency high-efficiency radio frequency power amplifier of the present invention. Figure 7 The circuit diagram shows a simplified matching circuit for the high-isolation dual-frequency high-efficiency RF power amplifier of the present invention. Figure 8 The circuit diagram shows the output matching circuit of the high isolation dual-frequency high-efficiency RF power amplifier of the present invention. Figure 9 Simulation and experimental results of the high-isolation dual-frequency high-efficiency RF power amplifier of the present invention are shown. Detailed Implementation

[0018] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0019] Example 1: As Figure 1As shown, a high-isolation dual-band high-efficiency RF power amplifier includes an input matching circuit 1, a gate bias circuit 2, a drain bias circuit 5, a power amplifier transistor 3, and an output matching circuit 7. The input matching circuit 1 and the gate bias circuit 2 are respectively connected to the gate of the power amplifier transistor 3, and the source of the power amplifier transistor 3 is grounded. The gate bias circuit 2 and the drain bias circuit 5 are used to make the power amplifier transistor 3 operate in class AB. The input matching circuit 1 adopts a T-type matching structure. The high-isolation dual-band high-efficiency RF power amplifier also includes a harmonic control circuit 4 and a simplified matching circuit 6. The drain of the power amplifier transistor 3 is connected to the harmonic control circuit 4, and the harmonic control circuit 4 is connected to the drain bias circuit 5, the simplified matching circuit 6, and the output matching circuit 7. The harmonic control circuit 4 is used to select the optimal second harmonic source of the power amplifier transistor 3 in the dual-band. The load impedance is matched to the impedance region corresponding to its high-efficiency operating point to improve the dual-band energy conversion efficiency; the simplified matching circuit 6 is used to zero the imaginary part of the impedance of the power amplifier tube 3 in the dual-band obtained by load pulling technology, and only the real part is retained.

[0020] In this embodiment, the input matching circuit 1, gate bias circuit 2, drain bias circuit 5, output matching circuit 7, and harmonic control circuit 4 all have input and output terminals, and the simplified matching circuit 6 has both input and output terminals. The input terminal of the input matching circuit 1 is the input terminal of the high-isolation dual-frequency high-efficiency RF power amplifier, and the output terminal of the input matching circuit 1 is connected to the gate of the power amplifier tube 3. The input terminal of the gate bias circuit 2 is connected to the first DC power supply, and the output terminal of the gate bias circuit 2 is connected to the gate of the power amplifier tube 3. The input terminal of the drain bias circuit is connected to the second DC power supply. The input terminal of the harmonic control circuit 4 is connected to the drain of the power amplifier tube 3, and the output terminal of the harmonic control circuit 4 is connected to the output terminal of the drain bias circuit 5, the input and output terminals of the simplified matching circuit 6, and the input terminal of the output matching circuit 7, respectively. The output terminal of the output matching circuit 7 is the output terminal of the high-isolation dual-frequency high-efficiency RF power amplifier.

[0021] In this embodiment, when a small signal from the dual-band high-isolation dual-band high-efficiency RF power amplifier is input, the input matching circuit 1 matches the standard 50 Ω system impedance to the conjugate value of the optimal source-pulling impedance of the power amplifier tube 3. The power amplifier tube 3 operates in Class AB mode under the combined action of the gate bias circuit 2 and the drain bias circuit 5. The RF signal amplified by the power amplifier tube 3 is output from its drain to the harmonic control circuit 4. The harmonic control circuit 4 matches the second harmonic impedance corresponding to the dual-band to the high-efficiency impedance region of the power amplifier tube 3. The simplified matching circuit 6 then reduces the imaginary part of the impedance of the power amplifier tube 3 in the dual-band to zero, retaining only the real part of the impedance, to reduce the design and debugging difficulty of the subsequent output matching circuit 7. Finally, the output matching circuit 7 matches the conjugate value of the optimal load impedance of the power amplifier tube 3 in the dual-band to the standard 50 Ω system impedance.

[0022] In this embodiment, by performing targeted impedance matching design on the input matching circuit 1 and additionally introducing a harmonic control circuit 4 and a simplified matching circuit 6, high isolation and high efficiency are achieved while also possessing advantages such as simple circuit structure, small footprint, low manufacturing cost, and low debugging difficulty. This effectively meets the practical application requirements of dual-band RF power amplifiers. Specific advantages are analyzed below: 1. By performing targeted impedance matching design on the input matching circuit 1, the RF power amplifier has good input return loss and port isolation in both operating frequency bands, effectively suppressing signal crosstalk between frequency bands, thus eliminating the need to set a band-stop filter after the output matching circuit 7. This design not only simplifies the circuit architecture, but also creates conditions for overall miniaturization. Second, the harmonic control circuit 4 accurately matches the second harmonic impedance of the dual-band power amplifier tube 3 to the high-efficiency impedance region, effectively improving the energy conversion efficiency of the power amplifier in the dual-band. Third, by simplifying the matching circuit 6, the imaginary part of the dual-band impedance of the power amplifier tube 3 is reduced to zero, and only the real part is retained, which significantly reduces the design and debugging difficulty of the subsequent output matching circuit 7. Fourth, the added harmonic control circuit 4 and simplified matching circuit 6 both adopt a simple design and do not require additional active components. Their overall layout space is much smaller than that of the omitted band-stop filter, thus significantly simplifying the circuit structure, reducing the overall size and manufacturing cost.

[0023] Example 2: This example is basically the same as Example 1, except that: Figure 2As shown, the input matching circuit 1 is formed by three microstrip lines arranged in a T-shape and connected together. In the input matching circuit 1, the three microstrip lines are the first microstrip line TL1, the second microstrip line TL2, and the third microstrip line TL3. The first microstrip line TL1 and the third microstrip line TL3 are arranged in the same direction, and the second microstrip line TL2 is perpendicular to the arrangement direction of the first microstrip line TL1 and the third microstrip line TL3. One end of the first microstrip line TL1 is the input terminal of the input matching circuit 1, and the other end of the first microstrip line TL1 is connected to one end of the second microstrip line TL2 and one end of the third microstrip line TL3, respectively. The other end of the third microstrip line TL3 is the output terminal of the input matching circuit 1.

[0024] In this embodiment, the specific working process of the input matching circuit 1 is as follows: The dual-band small signal enters from the input end of the first microstrip line TL1 and is transmitted to its other end via the first microstrip line TL1. The other end serves as a signal splitting and matching adjustment node, connecting one end of the second microstrip line TL2 and one end of the third microstrip line TL3 respectively. The second microstrip line TL2 is perpendicular to the arrangement direction of the first microstrip line TL1 and the third microstrip line TL3, and can match and adjust the input signal through its own impedance characteristics to suppress signal reflection. The dual-band small signal after matching and adjustment is transmitted to its output end via the third microstrip line TL3 and finally sent to the gate of the power amplifier tube 3 to complete the impedance matching on the input side.

[0025] In this embodiment, the input matching circuit 1 adopts a specific layout structure consisting of a first microstrip line TL1, a second microstrip line TL2, and a third microstrip line TL3 (the first microstrip line TL1 and the third microstrip line TL3 are arranged in the same direction, and the second microstrip line TL2 is arranged vertically). Through targeted impedance matching design, the RF power amplifier has good input return loss and port isolation in both operating frequency bands, effectively suppressing crosstalk between frequency bands, thus eliminating the need for a band-stop filter after the output matching circuit 7. This design not only simplifies the circuit architecture but also creates conditions for overall miniaturization.

[0026] Under small-signal conditions with input center frequencies of 1.8 GHz and 2.6 GHz in dual bands, the simulation diagram of input matching circuit 1 is as follows: Figure 3 As shown. Analysis Figure 3 It can be seen that the curve of the reflection coefficient S11 of the input matching circuit 1 as a function of frequency shows two obvious resonant points at 1.8GHz and 2.6GHz. This indicates that good impedance matching is achieved in the two frequency bands, rather than mismatch in the target frequency band, and that it has the characteristics of high isolation.

[0027] Example 3: This example is basically the same as Example 2, except that: Figure 4As shown, the gate bias circuit 2 includes a first capacitor C1, a second capacitor C2, a fourth microstrip line TL4, a fifth microstrip line TL5, a sixth microstrip line TL6, and a first resistor R1. The fourth microstrip line TL4, the fifth microstrip line TL5, and the sixth microstrip line TL6 are arranged in a T-shape. The fourth microstrip line TL4 and the sixth microstrip line TL6 are arranged in the same direction, and the fifth microstrip line TL5 is perpendicular to the arrangement direction of the fourth microstrip line TL4 and the sixth microstrip line TL6. One end of the first capacitor C1 and one end of the second capacitor C2 are both grounded. The other ends of the first capacitor C1, the second capacitor C2, and one end of the fourth microstrip line TL4 are connected, and their connection ends are the input terminals of the gate bias circuit 2. The other end of the fourth microstrip line TL4 is connected to one end of the fifth microstrip line TL5 and one end of the sixth microstrip line TL6, respectively. The other end of the sixth microstrip line TL6 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is the output terminal of the gate bias circuit 2.

[0028] In this embodiment, the specific operation of the gate bias circuit 2 is as follows: The gate bias signal (the DC bias voltage provided by the first DC power supply) enters from the input terminal of the gate bias circuit 2. This input terminal is simultaneously connected to one end of the first capacitor C1, the second capacitor C2, and the fourth microstrip line TL4. The other ends of the first capacitor C1 and the second capacitor C2 are both grounded, which can filter the input gate bias signal, remove noise and interference in the gate bias signal, and ensure the stability of the gate bias signal. The filtered gate bias signal is transmitted through the fourth microstrip line TL4 to the T-node at its other end. This T-node connects the fifth microstrip line TL5 and the sixth microstrip line TL4. One end of line TL6 (the fourth microstrip line TL4 and the sixth microstrip line TL6 are arranged in the same direction, and the fifth microstrip line TL5 is arranged vertically, forming a T-shaped distribution) transmits and adjusts the impedance of the gate bias signal through the microstrip line structure of this T-shaped layout, ensuring stable signal transmission. Then, the gate bias signal is transmitted to the first resistor R1 through the sixth microstrip line TL6. The first resistor R1 provides current limiting protection to prevent excessive current from damaging the gate of the subsequent power amplifier tube 3. Finally, it is delivered to the gate of the power amplifier tube 3 through the other end of the first resistor R1 (the output terminal of the gate bias circuit 2), providing a stable and pure gate bias voltage for the gate of the power amplifier tube 3, ensuring the stable operation of the power amplifier tube 3.

[0029] In this embodiment, the gate bias circuit 2 is composed of a first capacitor C1, a second capacitor C2, fourth microstrip lines TL4 to TL6, and a first resistor R1. The fourth microstrip line TL4, fifth microstrip line TL5, and sixth microstrip line TL6 are arranged in a specific T-shape. This structural design has significant advantages: First, the dual-grounded filtering design of the first capacitor C1 and the second capacitor C2 effectively filters out noise interference in the gate bias signal, ensuring that the gate bias signal input to the gate of the power amplifier tube 3 is pure and stable, avoiding noise affecting the operating performance of the power amplifier tube 3, and guaranteeing the signal processing quality of the RF power amplifier; second, the T-shaped microstrip line structure allows for precise adjustment of the gate bias signal. The transmission impedance of the gate bias signal ensures smooth transmission of the gate bias signal, reducing signal loss. This layout is also simple, facilitating integration with the overall circuit and saving layout space. Thirdly, the addition of a first resistor R1 provides current limiting protection, effectively preventing excessive current from flowing into the gate of the power amplifier transistor 3, thus avoiding damage to the transistor and improving circuit reliability and lifespan. Fourthly, the entire gate bias circuit 2 consists only of passive components and microstrip lines, eliminating the need for additional active components and complex control circuits. Its simple structure, low cost, and convenient debugging, combined with the input matching circuit 1, further simplify the overall circuit architecture, contributing to the miniaturization and low-cost realization of the RF power amplifier.

[0030] Example 4: This example is basically the same as Example 3, except that: Figure 5 As shown, the drain bias circuit 5 includes a third capacitor C3, a fourth capacitor C4, a seventh microstrip line TL7, an eighth microstrip line TL8, and a ninth microstrip line TL9. The seventh microstrip line TL7, the eighth microstrip line TL8, and the ninth microstrip line TL9 are arranged in a T-shape. The seventh microstrip line TL7 and the ninth microstrip line TL9 are arranged in the same direction, and the eighth microstrip line TL8 is perpendicular to the arrangement direction of the seventh microstrip line TL7 and the ninth microstrip line TL9. One end of the third capacitor C3 and one end of the fourth capacitor C4 are grounded. The other ends of the third capacitor C3, the other ends of the fourth capacitor C4, and one end of the seventh microstrip line TL7 are connected, and their connection ends are the input terminals of the drain bias circuit 5. The other end of the seventh microstrip line TL7 is connected to one end of the eighth microstrip line TL8 and one end of the ninth microstrip line TL9, respectively. The other end of the ninth microstrip line TL9 is the output terminal of the drain bias circuit 5.

[0031] In this embodiment, the specific operation of the drain bias circuit 5 is as follows: The drain bias signal (the DC bias voltage provided by the second DC power supply) enters from the input terminal of the drain bias circuit 5. This input terminal is simultaneously connected to one end of the third capacitor C3, the fourth capacitor C4, and the seventh microstrip line TL7. The other ends of the third capacitor C3 and the fourth capacitor C4 are both grounded, which can perform dual filtering on the input drain bias signal, effectively filtering out noise, interference, and high-frequency noise in the signal, ensuring the purity and stability of the drain bias signal. The filtered drain bias signal is transmitted through the seventh microstrip line TL7 to the T-node at its other end. This T-node connects the eighth microstrip line TL8 and the ninth microstrip line TL9. One end (the seventh microstrip line TL7 and the ninth microstrip line TL9 are arranged in the same direction, and the eighth microstrip line TL8 is perpendicular to this arrangement direction, forming a T-shaped distribution) is consistent with the T-shaped microstrip line layout of the gate bias circuit 2. The drain bias signal is transmitted and impedance matched and adjusted through the microstrip line structure of this T-shaped layout to ensure low loss and high stability during signal transmission and to adapt to the working impedance requirements of the drain. Finally, the adjusted drain bias signal is transmitted to its output end through the ninth microstrip line TL9 and sent to the drain of the power amplifier tube 3 to provide a stable and clean drain bias voltage for the drain of the power amplifier tube 3, ensuring that the power amplifier tube 3 is in the best working state and ensuring the efficient and stable operation of the RF power amplifier.

[0032] In this embodiment, the drain bias circuit 5 is composed of the third capacitor C3, the fourth capacitor C4, and the seventh microstrip line TL7 to the ninth microstrip line TL9. The seventh microstrip line TL7, the eighth microstrip line TL8, and the ninth microstrip line TL9 are arranged in a specific T-shape (the seventh microstrip line TL7 and the ninth microstrip line TL9 are arranged in the same direction, and the eighth microstrip line TL8 is perpendicular to this direction). This arrangement matches the T-shaped microstrip line layout of the gate bias circuit 2, resulting in a scientifically sound and beneficial design: First, the use of a dual-grounded, dual-filter design with the third capacitor C3 and the fourth capacitor C4 provides a superior filtering effect compared to a single filtering structure. This effectively removes noise, interference, and high-frequency noise from the drain bias signal, ensuring a pure and stable bias signal input to the drain of the power amplifier tube 3. This prevents the power amplifier tube 3 from malfunctioning due to an unstable bias signal, thus guaranteeing the output performance and signal quality of the RF power amplifier. Second, the T-shaped distribution... The microstrip line structure allows for precise adjustment of the transmission impedance of the drain bias signal, ensuring good matching with the drain impedance of the power amplifier transistor 3. This reduces signal transmission loss and improves the transmission efficiency of the bias signal. Furthermore, the T-shaped layout is simple and regular, facilitating integration with the input matching circuit 1 and the gate bias circuit 2, effectively saving layout space and contributing to overall circuit miniaturization. Thirdly, the entire drain bias circuit 5 consists only of passive components and microstrip lines, eliminating the need for additional active components and complex control circuits. Its simple structure and small component count not only reduce manufacturing costs but also simplify the debugging process and improve circuit manufacturability. Fourthly, in conjunction with the input matching circuit 1 and the gate bias circuit 2, it forms a simple and stable overall circuit architecture, further enhancing the operational stability and reliability of the RF power amplifier. Simultaneously, it addresses the requirements of miniaturization and low cost, adapting to the practical application scenarios of dual-band RF power amplifiers.

[0033] Example 5: This example is basically the same as Example 4, except that: Figure 6 As shown, the harmonic control circuit 4 includes a tenth microstrip line TL10, an eleventh microstrip line TL11, and a twelfth microstrip line TL12. One end of the tenth microstrip line TL10 is the input terminal of the harmonic control circuit 4, and the other end of the tenth microstrip line TL10 is connected to one end of the eleventh microstrip line TL11 and one end of the twelfth microstrip line TL12, respectively, and its connection terminal is the output terminal of the harmonic control circuit 4.

[0034] In this embodiment, the specific working process of the harmonic control circuit 4 is as follows: The signal from the power amplifier tube 3 (including the dual-band fundamental signal and the second harmonic signal) enters from one end of the tenth microstrip line TL10 (the input end of the harmonic control circuit 4), and is transmitted to the node at the other end of the tenth microstrip line TL10. This node is connected to one end of the eleventh microstrip line TL11 and one end of the twelfth microstrip line TL12, forming a signal splitting and adjustment node. Through the impedance synergy of the tenth microstrip line TL10, the eleventh microstrip line TL11 and the twelfth microstrip line TL12, the second harmonic in the signal is precisely suppressed and adjusted, effectively attenuating the intensity of the second harmonic signal, while not affecting the normal transmission of the dual-band fundamental signal. The fundamental signal after harmonic adjustment is sent to the subsequent circuit through the output end of the harmonic control circuit 4 to ensure the purity of the output signal and guarantee the working performance of the RF power amplifier.

[0035] In this embodiment, the harmonic control circuit 4 is constructed using only the tenth microstrip line TL10, the eleventh microstrip line TL11, and the twelfth microstrip line TL12. The structural design is simple and reasonable, effectively solving the harmonic interference problem of the dual-band RF power amplifier, and has significant beneficial effects: First, the structure is extremely simple, consisting of only three microstrip lines, eliminating the need for additional active devices, filter capacitors, or resistors, effectively reducing the number of components, lowering circuit manufacturing costs, simplifying the debugging process, and improving the circuit's manufacturability; second, through the coordinated impedance design of the three microstrip lines, it can accurately suppress the second harmonic in the dual-band signal and attenuate... Harmonic interference is eliminated to ensure the purity of the fundamental signal, preventing harmonic signals from affecting the output performance and signal quality of the RF power amplifier and improving the amplifier's operating efficiency. Thirdly, the overall circuit structure is compact, consisting only of microstrip lines, occupying minimal layout space and facilitating integration with the input matching circuit 1, gate bias circuit 2, and drain bias circuit 5, further contributing to the miniaturization of the overall circuit. Fourthly, no additional complex control circuits are required, resulting in high operational stability. In conjunction with other circuits, it can further optimize the overall performance of the RF power amplifier, ensuring efficient and stable operation in both frequency bands, meeting practical application requirements.

[0036] Example 6: This example is basically the same as Example 5, except that: Figure 7 As shown, the simplified matching circuit 6 includes a thirteenth microstrip line TL13 and a fourteenth microstrip line TL14. One end of the thirteenth microstrip line TL13 and one end of the fourteenth microstrip line TL14 are connected, and their connection ends are the input and output terminals of the simplified matching circuit 6.

[0037] In this embodiment, the specific working process of the simplified matching circuit 6 is as follows: The small signal of the dual-band to be matched enters from the connection terminal of the thirteenth microstrip line TL13 and the fourteenth microstrip line TL14 (the input and output terminal of the simplified matching circuit 6). This connection terminal is a common node for the input and output of the signal. After the signal enters, the impedance of the signal is precisely adjusted through the impedance synergy of the thirteenth microstrip line TL13 and the fourteenth microstrip line TL14, so that the imaginary part of the impedance of the dual-band of the power amplifier tube 3 is reduced to zero and only the real part is retained, so as to achieve pure resistive impedance matching. The signal after impedance matching adjustment is still output through the common connection terminal (input and output terminal) and sent to the subsequent output matching circuit 7, which provides a guarantee for the low complexity design of the subsequent output matching circuit 7, ensures smooth signal transmission and low loss, and ensures the overall working performance of the RF power amplifier.

[0038] The simplified matching circuit 6 in this embodiment is constructed using only the thirteenth microstrip line TL13 and the fourteenth microstrip line TL14. Its extremely simple structure specifically achieves simplified impedance matching for the dual-band power amplifier transistor 3, offering significant advantages: First, its extremely simple structure, consisting of only two microstrip lines without any additional components, significantly reduces the number of components compared to traditional complex matching circuits, lowering circuit manufacturing costs. It also greatly simplifies the debugging process, improving the circuit's manufacturability and debugging efficiency. Second, through the coordinated impedance design of the two microstrip lines, the imaginary part of the dual-band impedance of the power amplifier transistor 3 can be accurately zeroed out while retaining the real part, achieving purely resistive matching and effectively reducing the cost of subsequent output matching circuit 7. The design and debugging difficulty is reduced, and the layout and component usage of the output matching circuit 7 are decreased. Third, the overall circuit structure is compact, consisting of only two microstrip lines, occupying minimal layout space. This facilitates integration with the input matching circuit 1, gate bias circuit 2, drain bias circuit 5, and harmonic control circuit 4, further contributing to the miniaturization of the overall circuit. Fourth, it requires no additional complex control circuits or active devices, exhibiting high operational stability and low loss. In conjunction with other circuits, it can further optimize the overall impedance matching effect of the RF power amplifier, ensuring efficient and stable operation in both frequency bands. This balances miniaturization, low cost, and high performance requirements, making it suitable for practical application scenarios.

[0039] Example 7: This example is basically the same as Example 6, except that: Figure 8As shown, the output matching circuit 7 includes a fifteenth microstrip line TL15, a sixteenth microstrip line TL16, and a seventeenth microstrip line TL17. The fifteenth microstrip line TL15 and the seventeenth microstrip line TL17 are arranged in the same direction, and the sixteenth microstrip line TL16 is perpendicular to the arrangement direction of the fifteenth microstrip line TL15 and the seventeenth microstrip line TL17. One end of the fifteenth microstrip line TL15 is the input terminal of the output matching circuit 7, and the other end of the fifteenth microstrip line TL15 is connected to one end of the sixteenth microstrip line TL16 and one end of the seventeenth microstrip line TL17, respectively. The other end of the seventeenth microstrip line TL17 is the output terminal of the output matching circuit 7.

[0040] In this embodiment, the specific operation of the output matching circuit 7 is as follows: The dual-band RF signal amplified by the power amplifier tube 3 enters the circuit from one end of the fifteenth microstrip line TL15 (the input terminal of the output matching circuit 7). The signal is transmitted along the fifteenth microstrip line TL15 to the T-shaped node at its other end. This node connects one end of the sixteenth microstrip line TL16 and one end of the seventeenth microstrip line TL17, forming a distributed T-shaped impedance transformation structure of "series-parallel-series". By precisely designing the characteristic impedance and electrical length of the fifteenth microstrip line TL15, the sixteenth microstrip line TL16, and the seventeenth microstrip line TL17, this T-structure performs a two-step coordinated adjustment of the signal impedance: First, the fifteenth microstrip line TL15, as a series segment, initially adjusts the real impedance of the signal; second, the sixteenth microstrip line TL16, as a vertically arranged parallel stub, provides controllable reactance, precisely canceling the imaginary component in the signal and achieving reactance compensation; finally, the seventeenth microstrip line TL17, as an output series segment, further transforms the adjusted impedance to the standard impedance of the load (such as an antenna) (typically 50Ω), ensuring impedance conjugate matching. The clean dual-band fundamental signal, after the above impedance transformation and harmonic suppression, is output through the other end of the seventeenth microstrip line TL17 (the output terminal of output matching circuit 7) and efficiently transmitted to the subsequent load, completing maximum power transmission and signal shaping.

[0041] In this embodiment, the output matching circuit 7 adopts a T-shaped distributed structure composed of three microstrip lines. Its layout is consistent with the T-shaped topology of the input matching circuit 1 and the gate (or source) bias circuit, offering significant technical advantages in dual-band power amplifier applications: First, it provides precise dual-band matching, achieving maximum power transmission. Based on the flexible impedance adjustment capability of the T-shaped distributed topology, by optimizing the parameters of the three microstrip lines, the impedance matching requirements of both operating frequency bands can be met simultaneously. This ensures that the output impedance of the power amplifier tube 3 and the load impedance achieve conjugate matching in both frequency bands, effectively reducing the standing wave ratio (VSWR), minimizing signal reflection, and maximizing RF power transmission efficiency. First, it offers high efficiency, addressing the pain point of traditional matching circuits struggling to achieve high performance across dual frequency bands. Second, its structure is well-organized and highly compatible with the overall circuit. The fifteenth microstrip line TL15 and the seventeenth microstrip line TL17 are arranged in the same direction, while the sixteenth microstrip line TL16 is arranged vertically. This T-shaped layout is perfectly compatible with the T-shaped microstrip line structures of the input matching circuit 1, gate bias circuit 2, and drain bias circuit 5 mentioned earlier. This not only simplifies the consistency design of the layout but also significantly reduces the overall circuit area, contributing to the miniaturization of the RF power amplifier and reducing fabrication and assembly costs. Third, it features a passive distributed design with high efficiency. High reliability and low loss: The circuit consists of only three microstrip lines, without any active devices or lumped parameter components, fundamentally avoiding the noise, nonlinear distortion, and reliability risks associated with active devices. The distributed characteristics of microstrip lines make parasitic parameters controllable in the RF band, resulting in low signal transmission loss, making it particularly suitable for high-frequency dual-band applications. It also boasts high long-term operational stability and convenient debugging. Fourthly, it features synergistic harmonic suppression, optimizing output signal quality. Combined with the pre-processing of the harmonic control circuit 4 and the simplified matching circuit 6 mentioned above, this T-type output matching circuit 7 can further enhance the output signal quality through the reactance characteristics of the parallel stub (the sixteenth microstrip line TL16). The attenuation of second and third harmonics that are not fully suppressed can ensure the spectral purity of the output signal without the need for additional band-stop filters, thus avoiding harmonic interference to the communication system and simplifying the overall circuit architecture. Fifth, it is compatible with the simplified matching circuit 6, reducing the complexity of system design. For the purely resistive impedance output by the simplified matching circuit 6 mentioned above, the T-type output matching circuit 7 can directly complete the final impedance transformation without the need for additional compensation circuits. This significantly reduces the design difficulty and debugging workload of the output matching circuit 7, improves the manufacturability and mass production consistency of the circuit, and takes into account the practical application requirements of high performance, miniaturization and low cost.

[0042] Based on the specific structures of the input matching circuit 1, gate bias circuit 2, drain bias circuit 5, harmonic control circuit 4, simplified matching circuit 6, and output matching circuit 7 described above, a complete dual-band RF power amplifier simulation model was built using ADS simulation software. Dual-band operating parameters (center frequencies of 1.8 GHz and 2.6 GHz, respectively) and component parameters (microstrip line characteristic impedance and electrical length, capacitance and resistance parameters) were set, and simulation optimization was performed to obtain simulation curves. Subsequently, an actual test circuit board identical to the simulation model was fabricated using Rogers4350b high-frequency board material. A suitable GaNHEMT power amplifier device was selected, and a test platform was built. Following standard RF testing procedures, various key performance parameters of the actual circuit board were measured, and the measured data were recorded and measured curves were plotted. Finally, the simulation curves and measured curves were integrated and plotted to obtain... Figure 9 The simulation and actual measurement figures are shown.

[0043] Figure 9 In the diagram, PAE simulation represents the PAE simulation curve of the power amplifier of the present invention, PAE measured represents the PAE measured curve of the power amplifier of the present invention, Gain simulation represents the Gain simulation curve of the power amplifier of the present invention, Gain measured represents the Gain measured curve of the power amplifier of the present invention, Pout simulation represents the simulation curve of the output power of the power amplifier of the present invention, and Pout measured represents the measured curve of the output power of the power amplifier of the present invention.

[0044] analyze Figure 9 It can be seen that the power amplifier of the present invention exhibits dual-frequency operation characteristics, with two center frequencies of approximately 1.8 GHz and 2.6 GHz, respectively. At the 1.8 GHz operating point, the measured maximum PAE of the power amplifier of the present invention is approximately 73%, the measured output power is approximately 42 dBm, and the gain is approximately 13 dB; at the 2.6 GHz operating point, the measured maximum PAE of the power amplifier of the present invention is approximately 69%, the output power is approximately 40 dBm, and the gain is approximately 13 dB. Furthermore, between the two operating frequencies and in the outer frequency range, the PAE, gain, and output power of the power amplifier of the present invention all show a significant decreasing trend, demonstrating the performance advantage of the power amplifier of the present invention in achieving high efficiency and high power output near the center frequency. This curve verifies the effectiveness of the matching network and dual-frequency resonant design of the power amplifier of the present invention, achieving efficient large-signal amplification across the 1.8 GHz and 2.6 GHz frequency bands.

Claims

1. A high-isolation dual-band high-efficiency radio frequency power amplifier, comprising an input matching circuit, a gate bias circuit, a drain bias circuit, a power amplifier transistor, and an output matching circuit, wherein the input matching circuit and the gate bias circuit are respectively connected to the gate of the power amplifier transistor, the source of the power amplifier transistor is grounded, and the gate bias circuit and the drain bias circuit are used to enable the power amplifier transistor to operate in class AB; characterized in that, The input matching circuit adopts a T-type matching structure. The high-isolation dual-band high-efficiency RF power amplifier also includes a harmonic control circuit and a simplified matching circuit. The drain of the power amplifier tube is connected to the harmonic control circuit, which is connected to the drain bias circuit, the simplified matching circuit, and the output matching circuit. The harmonic control circuit is used to match the optimal second harmonic source / load impedance of the power amplifier tube in the dual-band to the impedance region corresponding to its high-efficiency operating point, so as to improve the dual-band energy conversion efficiency. The simplified matching circuit is used to zero out the imaginary part of the impedance of the power amplifier tube in the dual-band obtained by load pulling technology, retaining only the real part.

2. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 1, characterized in that, The input matching circuit, the gate bias circuit, the drain bias circuit, the output matching circuit, and the harmonic control circuit all have input and output terminals, and the simplified matching circuit has both input and output terminals. The input terminal of the input matching circuit is the input terminal of the high-isolation dual-band high-efficiency RF power amplifier, and the output terminal of the input matching circuit is connected to the gate of the power amplifier transistor. The input terminal of the gate bias circuit is connected to a first DC power supply, and the output terminal of the gate bias circuit is connected to the gate of the power amplifier transistor. The input terminal of the drain bias circuit is connected to a second DC power supply. The input terminal of the harmonic control circuit is connected to the drain of the power amplifier transistor, and the output terminal of the harmonic control circuit is connected to the output terminal of the drain bias circuit, the input and output terminals of the simplified matching circuit, and the input terminal of the output matching circuit. The output terminal of the output matching circuit is the output terminal of the high-isolation dual-band high-efficiency RF power amplifier.

3. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 2, characterized in that, The input matching circuit is formed by three microstrip lines arranged in a T-shape and connected together.

4. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 3, characterized in that, In the input matching circuit, the three microstrip lines are a first microstrip line, a second microstrip line, and a third microstrip line; the first microstrip line and the third microstrip line are arranged in the same direction, and the second microstrip line is perpendicular to the arrangement direction of the first microstrip line and the third microstrip line. One end of the first microstrip line is the input terminal of the input matching circuit, and the other end of the first microstrip line is connected to one end of the second microstrip line and one end of the third microstrip line, respectively. The other end of the third microstrip line is the output terminal of the input matching circuit.

5. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 2, characterized in that, The gate bias circuit includes a first capacitor, a second capacitor, a fourth microstrip line, a fifth microstrip line, a sixth microstrip line, and a first resistor. The fourth, fifth, and sixth microstrip lines are arranged in a T-shape, with the fourth and sixth microstrip lines aligned in the same direction, and the fifth microstrip line perpendicular to the alignment direction of the fourth and sixth microstrip lines. One end of the first capacitor and one end of the second capacitor are grounded, and the other ends of the first and second capacitors are connected to one end of the fourth microstrip line, with these connections serving as the input terminal of the gate bias circuit. The other end of the fourth microstrip line is connected to one end of the fifth and sixth microstrip lines, respectively, and the other end of the sixth microstrip line is connected to one end of the first resistor, with the other end of the first resistor serving as the output terminal of the gate bias circuit.

6. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 2, characterized in that, The drain bias circuit includes a third capacitor, a fourth capacitor, a seventh microstrip line, an eighth microstrip line, and a ninth microstrip line. The seventh, eighth, and ninth microstrip lines are arranged in a T-shape. The seventh and ninth microstrip lines are arranged in the same direction, and the eighth microstrip line is perpendicular to the arrangement direction of the seventh and ninth microstrip lines. One end of the third capacitor and one end of the fourth capacitor are grounded. The other ends of the third capacitor, the other ends of the fourth capacitor, and one end of the seventh microstrip line are connected, and their connection ends are the input terminals of the drain bias circuit. The other end of the seventh microstrip line is connected to one end of the eighth microstrip line and one end of the ninth microstrip line, respectively. The other end of the ninth microstrip line is the output terminal of the drain bias circuit.

7. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 2, characterized in that, The harmonic control circuit includes a tenth microstrip line, an eleventh microstrip line, and a twelfth microstrip line; one end of the tenth microstrip line is the input terminal of the harmonic control circuit, and the other end of the tenth microstrip line is connected to one end of the eleventh microstrip line and one end of the twelfth microstrip line, respectively, and its connection terminal is the output terminal of the harmonic control circuit.

8. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 2, characterized in that, The simplified matching circuit includes a thirteenth microstrip line and a fourteenth microstrip line, with one end of the thirteenth microstrip line and one end of the fourteenth microstrip line connected together, and the connection end serving as the input and output terminal of the simplified matching circuit.

9. The high-isolation dual-frequency high-efficiency RF power amplifier according to claim 2, characterized in that, The output matching circuit includes a fifteenth microstrip line, a sixteenth microstrip line, and a seventeenth microstrip line; the fifteenth microstrip line and the seventeenth microstrip line are arranged in the same direction, and the sixteenth microstrip line is perpendicular to the arrangement direction of the fifteenth microstrip line and the seventeenth microstrip line; One end of the fifteenth microstrip line is the input terminal of the output matching circuit, and the other end of the fifteenth microstrip line is connected to one end of the sixteenth microstrip line and one end of the seventeenth microstrip line, respectively. The other end of the seventeenth microstrip line is the output terminal of the output matching circuit.

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