Multiplexer design using 2d passive glass filters integrated with 3d through glass via filters

Abstract

A multiplexer structure (500) includes a passive substrate (508). The multiplexer structure can also include a high-band filter (502) on the passive substrate. The high-band filter (502) can include a 2D planar spiral inductor(s) (530, 540) on the passive substrate. The multiplexer structure (500) can also include a low-band filter (504) on the passive substrate. The low-band filter (504) can include a 3D through-substrate inductor (510, 520) and a first capacitor(s) on the passive substrate. The multiplexer structure (500) can also include a through-substrate via (VIA) coupling the high-band filter (502) and the low-band filter (504).

Description

[0001] This divisional application is a divisional application of the PCT national phase patent application with the international filing date of December 5, 2016, national application number 201680076967.5, entitled "Multiplexer Design Using a 2D Passive Glass Filter Integrated with a 3D Through-Glass Via Filter". Technical Field

[0002] This disclosure generally relates to integrated circuits (ICs). More specifically, this disclosure relates to multiplexer designs using 2D passive on glass (POG) filters integrated with 3D through-glass via (TGV) filters. Background Technology

[0003] For wireless communication, duplexers help process signals carried in carrier aggregation systems. In carrier aggregation systems, signals communicate using both high-frequency and low-frequency bands. In chipsets, duplexers are typically inserted between the antenna and the tuner (or radio frequency (RF) switch) to ensure high performance. Duplexer designs typically include inductors and capacitors. High performance can be achieved by using inductors and capacitors with high quality factors (or high Q factors). High-performance duplexers can also be achieved by reducing electromagnetic coupling between components, which can be achieved through the arrangement and orientation of the components. Duplexer performance can be quantified by measuring insertion loss and rejection at certain frequencies (e.g., quantities expressed in decibels (dB)).

[0004] Duplexer manufacturing processes are compatible with standard semiconductor processes, such as those used to manufacture voltage-controlled capacitors (varactor diodes), switched array capacitors, or other similar capacitors. Fabricating components for duplexer designs on a single substrate can be advantageous. Fabrication on a single substrate also allows tunable duplexers to be tuned with a variety of different parameters.

[0005] Manufacturing high-performance duplexers in an efficient and cost-effective manner is problematic. Increasing the Q value of inductors and capacitors in a duplexer is also a challenge. It would be beneficial to reduce the electromagnetic coupling between the components in the duplexer, while simultaneously reducing the duplexer's size and achieving the most economical use of resources. Summary of the Invention

[0006] A multiplexer structure includes a passive substrate. The multiplexer structure may further include a high-frequency band filter on the passive substrate. The high-frequency band filter may include one or more 2D planar spiral inductors on the passive substrate. The multiplexer structure may also include a low-frequency band filter on the passive substrate. The low-frequency band filter may include a 3D through-substrate inductor and one or more first capacitors on the passive substrate. The multiplexer structure may also include one or more through-substrate vias coupling the high-frequency band filter and the low-frequency band filter.

[0007] A method for constructing a multiplexer structure from a passive substrate panel may include fabricating a high-frequency band filter on the passive substrate panel. The high-frequency band filter may include one or more 2D planar spiral inductors on the passive substrate panel. The method may also include fabricating a low-frequency band filter on the passive substrate panel. The low-frequency band filter may include a 3D through-substrate inductor and one or more first capacitors on the passive substrate panel. The method may further include fabricating vias through the passive substrate panel, coupling the high-frequency band filter and the low-frequency band filter.

[0008] A multiplexer structure includes a passive substrate. The multiplexer structure may further include a high-frequency band filter on the passive substrate. The high-frequency band filter may include one or more 2D planar spiral inductors on the passive substrate. The multiplexer structure may also include a low-frequency band filter on the passive substrate. The low-frequency band filter may include a 3D through-substrate inductor and one or more first capacitors on the passive substrate. The multiplexer structure may further include means for coupling the high-frequency band filter and the low-frequency band filter.

[0009] A radio frequency (RF) front-end module may include a multiplexer structure. The multiplexer structure may include a high-frequency band filter on a passive substrate. The high-frequency band filter may include one or more 2D planar spiral inductors on the passive substrate. The multiplexer structure may also include a low-frequency band filter on the passive substrate. The low-frequency band filter may include a 3D through-substrate inductor and one or more first capacitors on the passive substrate. The multiplexer structure may also include one or more through-substrate vias coupling the high-frequency band filter and the low-frequency band filter. The RF front-end module may also include an antenna coupled to the output of the multiplexer structure.

[0010] This has provided a fairly broad overview of the features and technical advantages of this disclosure in order to better understand the detailed description that follows. Additional features and advantages of this disclosure will now be described. Those skilled in the art will understand that this disclosure can be readily used as the basis for modifying or designing other structures for achieving the same purpose as this disclosure. Those skilled in the art will also recognize that such equivalent constructions do not depart from the teachings of this disclosure as set forth in the appended claims. The novel features, as well as other objects and advantages, concerning the organization and operation of this disclosure and considered characteristic of this disclosure, will be better understood from the following description when considered in conjunction with the accompanying drawings. However, it is to be clearly understood that each drawing is provided for illustrative and descriptive purposes only and is not intended to be a definition of limitation of this disclosure. Attached Figure Description

[0011] For a more complete understanding of this disclosure, reference is now made to the following description taken in conjunction with the accompanying drawings.

[0012] Figure 1A This is a schematic diagram of a radio frequency (RF) front-end (RFFE) module employing a duplexer according to one aspect of this disclosure.

[0013] Figure 1B This is a schematic diagram of a radio frequency (RF) front-end (RFFE) module and a WiFi module using a duplexer for a chipset, according to various aspects of this disclosure.

[0014] Figure 2A This is a schematic diagram of a duplexer design based on one aspect of this disclosure.

[0015] Figure 2B This is a diagram illustrating one aspect of this disclosure. Figure 2A The performance of the duplexer design is shown in the figure.

[0016] Figure 2C This further illustrates one aspect of the disclosure. Figure 2A A diagram of a duplexer design.

[0017] Figure 3A This is a top view of the layout of a duplexer design according to one aspect of this disclosure.

[0018] Figure 3B Several aspects according to this disclosure are shown. Figure 3A Cross-sectional view of the duplexer design.

[0019] Figure 4A This is a top view of the layout of a duplexer design according to one aspect of this disclosure.

[0020] Figure 4B Several aspects according to this disclosure are shown. Figure 4ACross-sectional view of the duplexer design.

[0021] Figure 5A The illustration shows a multiplexer structure that uses a 2D filter integrated with a 3D filter for high-quality (Q) factor radio frequency (RF) applications, according to various aspects of this disclosure.

[0022] Figure 5B The illustration depicts a 2D filter, including one integrated with a 3D filter, for high-quality (Q) factor radio frequency (RF) applications, according to various aspects of this disclosure. Figure 5A A top view of the components of a multiplexer structure.

[0023] Figure 6 This is a process flow diagram illustrating a method for fabricating a multiplexer structure according to various aspects of this disclosure.

[0024] Figure 7 This is a block diagram illustrating an exemplary wireless communication system in which the configuration of this disclosure can be advantageously employed.

[0025] Figure 8 This is a block diagram illustrating a design workstation configured for the circuitry, layout, and logic design of semiconductor components. Detailed Implementation

[0026] The detailed description set forth below with reference to the accompanying drawings is intended as a description of various configurations, and not as representing the only configuration in which the concepts described herein can be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the various concepts. However, it will be clear to those skilled in the art that these concepts can be practiced without these specific details. In some cases, well-known structures and components are shown in block diagram form to avoid confusion with these concepts. As described herein, the term “and / or” is used to mean “inclusive or”, and the term “or” is used to mean “exclusive or”.

[0027] Due to cost and power consumption considerations, mobile radio frequency (RF) chip design (e.g., mobile RF transceivers) has migrated to deep sub-micron process nodes. The design complexity of mobile RF transceivers is further complicated by the added circuitry features (such as carrier aggregation) needed to support enhanced communication. Additional design challenges for mobile RF transceivers include analog / RF performance considerations, including mismatch, noise, and other performance factors. The design of these mobile RF transceivers involves the use of passive components, such as those for suppressing resonance and / or for performing filtering, bypassing, and coupling.

[0028] The successful manufacture of modern semiconductor chips involves the interaction between materials and the processes used. In particular, the formation of conductive material platings for semiconductor manufacturing in back-end processes (BEOL) is an increasingly challenging part of the process flow, especially in maintaining small feature sizes. The same challenge of maintaining small feature sizes also applies to passive glass (POG) technology, where high-performance components such as inductors and capacitors are built on highly insulating substrates that can also have very low losses.

[0029] Passive glass devices involve high-performance inductor and capacitor assemblies that offer numerous advantages over other technologies, such as surface mount technology or multilayer ceramic chips. These advantages include more compact size and less manufacturing variation. Passive glass devices also have higher quality (Q) factor values ​​to meet stringent low insertion loss and low power consumption specifications. Devices such as inductors can be realized as 3D structures using passive glass technology. Due to their 3D realization, 3D through-substrate inductors or other 3D devices may also suffer from many design limitations.

[0030] An inductor is an example of an electrical device used to temporarily store energy in a magnetic field within a coil of wire, based on its inductance value. This inductance value provides a measure of the ratio of voltage to the rate of change of current through the inductor. When the current flowing through the inductor changes, energy is temporarily stored in the magnetic field within the coil. In addition to their magnetic field storage capabilities, inductors are commonly used in alternating current (AC) electronic devices, such as wireless equipment. For example, the design of mobile RF transceivers incorporates inductors that utilize improved inductance density while simultaneously reducing high-frequency magnetic losses.

[0031] Various aspects of this disclosure provide techniques for fabricating multiplexers using 2D passive glass (POG) filters integrated with 3D through-glass via (TGV) filters. Semiconductor fabrication processes for multiplexer structures may include front-end operation (FEOL) processes, intermediate operation (MOL) processes, and back-end operation (BEOL) processes. It should be understood that, unless otherwise stated, the term "layer" includes thin films and is not construed as indicating vertical or horizontal thickness. As described herein, the term "substrate" may refer to a substrate of a diced wafer or a substrate of an undicated wafer. Similarly, the terms chip and die can be used interchangeably unless such interchangeability diminishes credibility.

[0032] As described herein, a back-end process interconnect layer can refer to a conductive interconnect layer (e.g., metal one (M1), metal two (M2), metal three (M3), etc.) used for electrical coupling to front-end process active devices of an integrated circuit. The back-end process interconnect layer can be electrically coupled to an intermediate process interconnect layer for, for example, connecting M1 to an oxide diffusion (OD) layer of the integrated circuit. A back-end process first via (V2) can connect M2 to M3 or other back-end process interconnect layers.

[0033] This disclosure describes multiplexers for high-quality (Q) factor radio frequency (RF) applications using 2D passive glass (POG) filters integrated with 3D through-glass via (TGV) filters. In one arrangement, the multiplexer structure includes a high-frequency band (HB) filter on a passive substrate. The HB filter includes a 2D spiral inductor on the passive substrate. The multiplexer structure also includes a low-frequency band (LB) filter on the passive substrate. The LB filter includes a 3D inductor and a first capacitor on the passive substrate. The multiplexer structure also includes at least one through-substrate via coupling the HB filter and the LB filter. In one aspect of this disclosure, the HB filter and the LB filter are arranged on opposite surfaces of a glass substrate to provide a double-sided multiplexer structure. In this arrangement, the HB filter includes a second capacitor on a first surface of the passive substrate. Alternatively, the HB filter and the LB filter may share a first capacitor on a second surface of the passive substrate opposite to the first surface.

[0034] Figure 1A This is a schematic diagram of a radio frequency (RF) front-end (RFFE) module 100 employing a duplexer 200 according to one aspect of this disclosure. The RF front-end module 100 includes a power amplifier 102, a duplexer / filter 104, and an RF switching module 106. The power amplifier 102 amplifies one or more signals to a specific power level for transmission. The duplexer / filter 104 filters the input / output signals according to various parameters, including frequency, insertion loss, rejection, or other similar parameters. Additionally, the RF switching module 106 can select certain portions of the input signal to be passed to the remainder of the RF front-end module 100.

[0035] The RF front-end module 100 also includes tuner circuitry 112 (e.g., first tuner circuitry 112A and second tuner circuitry 112B), a duplexer 200, a capacitor 116, an inductor 118, a ground terminal 115, and an antenna 114. Tuner circuitry 112 (e.g., first tuner circuitry 112A and second tuner circuitry 112B) includes components such as tuners, portable data input terminals (PDET), and home analog-to-digital converters (HKADCs). Tuner circuitry 112 can perform impedance tuning (e.g., voltage standing wave ratio (VSWR) optimization) for antenna 114. The RF front-end module 100 also includes a passive combiner 108 coupled to a wireless transceiver (WTR) 120. Combiner 108 combines the detected power from the first tuner circuitry 112A and the second tuner circuitry 112B. Wireless transceiver 120 processes information from passive combiner 108 and provides that information to modem 130 (e.g., mobile station modem (MSM)). Modem 130 provides digital signals to application processor (AP) 140.

[0036] like Figure 1A As shown, duplexer 200 is located between the tuner components of tuner circuit 112 and capacitor 116, inductor 118, and antenna 114. Duplexer 200 can be placed between antenna 114 and tuner circuit 112 to provide high system performance from RF front-end module 100 to a chipset including wireless transceiver 120, modem 130, and application processor 140. Duplexer 200 also performs frequency domain multiplexing on both high and low frequency bands. After duplexer 200 performs its frequency domain multiplexing function on the input signal, the output of duplexer 200 is fed to an optional LC (inductor / capacitor) network including capacitor 116 and inductor 118. When needed, the LC network can provide additional impedance matching components for antenna 114. Signals at a specific frequency are then transmitted or received by antenna 114. Although a single capacitor and inductor are shown, multiple components are also possible.

[0037] Figure 1BThis is a schematic diagram of a WiFi module 170 including a first duplexer 200-1 and an RF front-end module 150 including a second duplexer 200-2 for use in a chipset 160 to provide carrier aggregation, according to one aspect of this disclosure. The WiFi module 170 includes a first duplexer 200-1 that communicatively couples an antenna 192 to a wireless LAN module (e.g., WLAN module 172). The RF front-end module 150 includes a second duplexer 200-2 that communicatively couples an antenna 194 to a wireless transceiver (WTR) 120 via a duplexer 180. The WTR 120 and the WLAN module 172 of the WiFi module 170 are coupled to a modem (MSM, e.g., a baseband modem) 130, which is powered by a power supply 152 via a power management integrated circuit (PMIC) 156. The chipset 160 also includes capacitors 162 and 164 and one or more inductors 166 to provide signal integrity. The PMIC 156, modem 130, wireless transceiver 120, and WLAN module 172 each include capacitors (e.g., 158, 132, 122, and 174) and operate according to clock 154. The geometry and arrangement of the various inductor and capacitor assemblies in chipset 160 can reduce electromagnetic coupling between components.

[0038] Figure 2A This is a schematic diagram of a duplexer 200 according to one aspect of this disclosure. The duplexer 200 includes a high-frequency band (HB) input port 202, a low-frequency band (LB) input port 204, and an antenna 206. The high-frequency band path of the duplexer 200 includes an input capacitor 218 (C5) and a first parallel coupling capacitor 242 (C2) with a fourth inductor 240 (L4). The high-frequency band path also includes a second capacitor 216 (C4) and a second parallel coupling capacitor 232 (C3) with a third inductor 230 (L3), and an output capacitor 228 (C1). The low-frequency band path of the duplexer 200 includes an input capacitor 214 (C6) and a first parallel coupling capacitor 222 (C7) with a second inductor 220 (L2). The low-frequency band path also includes a second capacitor 212 (C8) and a first inductor 210 (L1). Figure 2B As shown in graph 250, the operation of duplexer 200 is controlled by first inductor 210, second inductor 220, third inductor 230 and fourth inductor 240.

[0039] Figure 2BThis is a graph 250 illustrating the performance of a duplexer design according to one aspect of this disclosure. The x-axis of graph 250 reflects the frequency in gigahertz (GHz), and the y-axis reflects the decibel (dB) rating. High-pass filter curve 252 is the frequency response (transmission in dB) of the third inductor 230 (L3) and the fourth inductor 240 (L4). Low-pass filter curve 254 is the frequency response (transmission in dB) of the first inductor 210 (L1) and the second inductor 220 (L2). Figure 2A In the duplexer configuration, the antenna pad (e.g., antenna 206) is for the output of both the high-frequency and low-frequency paths, while the input ports (e.g., high-frequency input port 202 and low-frequency input port 204) are separate. According to curve 250, satisfying the low-pass filter curve 254 may involve inductors (e.g., first inductor 210 (L1) and second inductor 220 (L2)) with higher performance than those used to satisfy the high-pass filter curve 252 (e.g., third inductor 230 (L3) and fourth inductor 240 (L4)).

[0040] Figure 2C This further illustrates one aspect of the disclosure. Figure 2A A diagram of duplexer 200 is shown. Duplexer 200 includes a high-frequency band (HB) input port 202, a low-frequency band (LB) input port 204, and an antenna 206 coupled to an output port. The high-frequency band path of duplexer 200 includes a high-frequency band antenna switch 260-1. The low-frequency band path of duplexer 200 includes a low-frequency band antenna switch 260-2. Wireless devices including RF front-end modules can use antenna switches 260 and duplexer 200 to achieve a wide frequency band for the RF input and RF output of the wireless device. Additionally, antenna 206 can be a multiple-input multiple-output (MIMO) antenna. MIMO antennas will be widely used in the RF front-end of wireless devices to support features such as carrier aggregation.

[0041] Figure 3A This is a top view of the layout of a duplexer design 300 according to one aspect of this disclosure. According to the 2D configuration, the layout of the duplexer design 300 is consistent with that from... Figure 2A This corresponds to a schematic diagram of the duplexer 200. Furthermore, these components are implemented in (or on) a passive substrate 308. As described herein, the term "passive substrate" can refer to a substrate of a diced wafer or panel, or it can refer to a substrate of an undicated wafer / panel. In one arrangement, the passive substrate is composed of glass, air, quartz, sapphire, high-resistivity silicon, or other similar passive materials. The passive substrate can be a coreless substrate.

[0042] The duplexer design 300 includes a high-frequency band (HB) input path 302, a low-frequency band (LB) input path 304, and an antenna 306. In this arrangement, the first inductor 310 (L1) and the second inductor 320 (L2) are arranged using 2D spiral inductors. Additionally, the third inductor 330 and the fourth inductor 340 are also arranged using 2D spiral inductors. Various capacitors (e.g., C1 to C8) are also used... Figure 2A The configuration shown is illustrated and arranged. The thickness of the 2D planar inductor can range from ten (10) to thirty (30) micrometers. In addition, due to the 2D planar spiral configuration of the inductor, the coverage area occupied by the duplexer design 300 can be in the range of 2 micrometers by 2.5 micrometers. Although this arrangement can be manufactured using a less complex design, it consumes additional space.

[0043] Figure 3B Several aspects according to this disclosure are shown. Figure 3A A cross-sectional view 350 of the duplexer design 300 is shown. For illustrative purposes, only the first inductor 310 (L1) and the second inductor 320 (L2) supported by the passive substrate 308 are shown.

[0044] Figure 4A This is a top view of the layout of a duplexer design 400 according to one aspect of this disclosure. According to the 3D implementation, the layout of the duplexer design 400 is consistent with that from... Figure 2A The diagram corresponds to that of the duplexer 200. Similarly, these components are mounted on a passive substrate 408 composed of glass, air, quartz, sapphire, high-resistivity silicon, or other similar passive materials (see [reference needed]). Figure 4B Implemented in (or on) ).

[0045] exist Figure 4A In the illustrated arrangement, the duplexer design 400 also includes a high-frequency band (HB) input path 402, a low-frequency band (LB) input path 404, and an antenna 406. However, in this arrangement, the first inductor 410 (L1) and the second inductor 420 (L2) are arranged using 3D spiral inductors. Additionally, the third inductor 430 and the fourth inductor 440 are also arranged using 3D spiral inductors. Various capacitors (e.g., C1 to C8) are also arranged according to... Figure 2A The configuration shown is illustrated and arranged. As a result, relative to... Figure 3A and Figure 3B For the duplexer design 300, the duplexer design 400 occupies a reduced coverage area, namely within a range of 2 mm by 1.7 mm.

[0046] Figure 4B Several aspects according to this disclosure are shown. Figure 4AA cross-sectional view 450 of the duplexer design 400 is shown. For illustrative purposes, only the first inductor 410 (L1) and the second inductor 420 (L2) supported by the passive substrate 408 are shown. Figures 3A to 4B The structures of the various inductors and capacitors shown are not limited to those shown and any structure can be used to achieve a 300 / 400 layout for the duplexer design. Figure 2A Possible implementations of the duplexer 200 shown. Furthermore, the geometry and arrangement of the various inductor and capacitor assemblies in the duplexer 200 can be configured to further reduce electromagnetic coupling between the components.

[0047] exist Figure 4A In the configuration shown, the inductors (e.g., first inductor 410 (L1), second inductor 420 (L2), third inductor 430 (L3), and fourth inductor 440 (L4)) are implemented in a 3D configuration. Figure 4B The cross-sectional view further illustrates a series of traces and a high-performance inductor with through-holes in the substrate. Although Figure 4A and Figure 4B The duplexer design has a 400% duty cycle. Figure 3A and 3B The duplexer design 300 has a smaller coverage area, but the duplexer design 400 is more complex to manufacture and involves additional costs for implementing high-performance 3D inductors (e.g., 410, 420, 430, and 440).

[0048] According to various aspects of this disclosure, the 3D implementation of the first inductor 410 and the second inductor 420 ( Figure 4A It can be implemented in 2D with the third inductor 330 and the fourth inductor 340. Figure 3A Integration, for example, such as Figure 5A and 5B As shown. Specifically, because it satisfies the low-pass filter curve 254 ( Figure 2B This allows for the use of higher performance inductors, so the first inductor 410 and the second inductor 420 can be used. Figure 4A and Figure 4B The higher-cost 3D arrangement shown is used. Conversely, because satisfying the high-pass filter curve 252 allows for the use of lower-performance inductors, the third inductor 230 (L3) and the fourth inductor 240 (L4) can be used. Figure 3A and Figure 3B This is achieved through a lower cost and simplified 2D layout, as shown in the diagram.

[0049] Figure 5AThe figure illustrates a multiplexer structure 500 using a 2D filter integrated with a 3D filter for high-quality (Q) factor radio frequency (RF) applications, according to various aspects of this disclosure. In one arrangement, the multiplexer structure 500 includes a high-frequency band (HB) filter 502 on a passive substrate 508. In one aspect of this disclosure, the passive substrate 508 may be a cut portion of a passive substrate panel (e.g., a glass substrate panel) that supports a double-sided printing process. For example, the glass substrate panel may have dimensions including a length of twenty (20) inches multiplied by a width of twenty (20) inches (20'' × 20''), wherein the panel thickness is in the range of three hundred (300) to four hundred (400) micrometers.

[0050] In this arrangement, the double-sided printing process enables the printing of conductive interconnect layers (e.g., metal A (MA), metal B (MB), metal C (MC), etc.) on the first surface 509-1 of the passive substrate 508. This double-sided printing process also enables the printing of back-end process (BEOL) interconnect layers (e.g., metal 1 (M1), metal 2 (M2), metal 3 (M3), etc.) on the second surface 509-2 of the passive substrate 508. According to various aspects of this disclosure, this double-sided printing process enables the realization of a double-sided multiplexer structure, as described in further detail below.

[0051] The high-frequency band filter includes one or more 2D spiral inductors (e.g., a third inductor 530 (L3) and a fourth inductor 540 (L4)) on the passive substrate 508. The multiplexer structure 500 also includes a low-frequency band (LB) filter 504 on the passive substrate 508. The LB filter 504 includes one or more 3D inductors (e.g., a first inductor 510 (L1) and a second inductor 520 (L2)) and a first capacitor (C1) on the passive substrate 508. The multiplexer structure 500 also includes one or more through-substrate vias (VIAs) coupling the high-frequency band filter 502 and the LB filter 504.

[0052] In this aspect of the disclosure, a high-frequency band filter 502 and a low-frequency band filter 504 are arranged on opposite surfaces of a glass substrate panel to provide a bifacial multiplexer structure. In this arrangement, the high-frequency band filter 502 includes a second capacitor (C2) on a first surface 509-1 of a passive substrate 508. Alternatively, the high-frequency band filter 502 and the low-frequency band filter 504 may share a first capacitor C1 on a second surface 509-2 of the passive substrate 508 opposite to the first surface 509-1. In one arrangement, the first surface of the passive substrate is the back side of the bifacial multiplexer away from the system board (e.g., a printed circuit board (PCB)).

[0053] exist Figure 5AIn the arrangement shown, the first capacitor C1 is formed by back-end process (BEOL) interconnect layers M1 and M2, which are separated by a dielectric layer (e.g., aluminum oxide) on the second surface 509-2 of the passive substrate 508. In this arrangement, the first capacitor C1 is coupled to the BEOL interconnect layer M3 through a through-substrate via V2. Additionally, the second capacitor C2 is formed by conductive interconnect layers MA and MB, separated by a dielectric layer on the first surface 509-1 of the passive substrate 508. The third inductor 530 (L3) and the fourth inductor 540 (L4) can be formed by the conductive interconnect layer MC, while the first inductor 510 (L1) and the second inductor 520 (L2) can be formed by the BEOL interconnect layer M1. The multiplexer structure 500 is also surrounded by a final passive layer VP (e.g., polyimide or solder resist).

[0054] Figure 5B The figure illustrates a 2D filter, including integration with a 3D filter, for high Q-factor RF applications according to various aspects of this disclosure. Figure 5A A top view 550 of the components of the multiplexer structure 500. In this arrangement, side B of the multiplexer structure 500 includes a high-frequency band filter 502, which includes a third inductor 530 (L3) and a fourth inductor 540 (L4) arranged within a 1 mm x 2.5 mm coverage area. Additionally, side A of the multiplexer structure 500 includes a low-frequency band filter 504, which includes a first inductor 510 (L1) and a second inductor 520 (L2) arranged within a 1 mm x 1.7 mm coverage area. The multiplexer structure 500 also includes one or more through-substrate vias (VIAs) coupling the high-frequency band filter 502 and the low-frequency band filter 504.

[0055] Figure 6 This diagram illustrates a process flow of a method 600 for constructing a multiplexer structure according to one aspect of this disclosure. In block 602, a high-frequency band (HB) filter including a 2D planar spiral inductor is fabricated on a passive substrate panel. For example, as... Figure 5A As shown, the multiplexer structure 500 includes a high-frequency band filter 502 on a first surface 509-1 of a passive substrate 508. The high-frequency band filter may include one or more 2D planar spiral inductors (e.g., a third inductor 530 (L3) and a fourth inductor 540 (L4)) on the first surface 509-1 of the passive substrate 508.

[0056] As described above, the passive substrate 508 can be formed by dicing a glass substrate panel along dicing lines, which may be referred to herein as "dicing streets." The dicing lines indicate the locations where the glass panel substrate will be cut or divided into several pieces. The dicing lines can define the outlines of various RF circuits already fabricated on the glass panel substrate. This dicing process can be performed using a stealth dicing process, which involves scribing and cracking along the dicing streets without material loss. Stealth dicing can be distinguished from silicon dicing, which involves material loss due to, for example, grinding by a saw blade along the dicing streets.

[0057] In block 604, a low-frequency band (LB) filter, including a 3D through-substrate inductor and a first capacitor, is fabricated on a passive substrate panel. For example, as... Figure 5A As shown, the multiplexer structure 500 includes a low-frequency filter 504 on a second surface 509-2 of a passive substrate 508. The low-frequency filter may include one or more 3D through-substrate inductors (e.g., a first inductor 510 (L1) and a second inductor 520 (L2)) and a first capacitor (C1) on the second surface 509-2 of the passive substrate 508.

[0058] In frame 606, a through-substrate via is fabricated that penetrates the passive substrate and couples the high-frequency band filter and the low-frequency band filter. For example... Figure 5B As shown, the multiplexer structure 500 also includes one or more through-substrate vias (VIAs) coupling a high-frequency band filter 502 and a low-frequency band filter 504. Method 600 may further include fabricating at least one second capacitor on a first surface of a passive substrate. According to various aspects of this disclosure, such as... Figure 5A As shown, a double-sided printing process for a glass panel substrate realizes a double-sided multiplexer structure. Although shown in the mentioned order, it should be understood that the method of constructing the multiplexer structure can be performed in any desired order, including but not limited to performing method 600 in the reverse order of starting with box 606 and ending with box 602.

[0059] According to another aspect of this disclosure, a circuit for a multiplexer structure using through-glass vias or through-substrate vias is described. The multiplexer structure includes a high-frequency band filter and a low-frequency band filter on opposite surfaces of a passive substrate. The multiplexer structure also includes means for coupling the high-frequency band filter and the low-frequency band filter. The coupling means may be… Figure 5A The image shows a through-substrate VIA. Alternatively, the aforementioned device can be any module or device configured to perform the functions described above.

[0060] Various aspects of this disclosure provide techniques for fabricating multiplexers using 2D passive glass (POG) filters integrated with 3D through-glass via (TGV) filters. Several aspects of this disclosure describe multiplexers using 2D POG filters integrated with 3D TGV filters for high Q-factor RF applications. In one arrangement, the multiplexer structure includes a high-frequency band (HB) filter on a passive substrate. The HB filter includes a 2D spiral inductor on the passive substrate. The multiplexer structure also includes a low-frequency band (LB) filter on the passive substrate. The LB filter includes a 3D inductor and a first capacitor on the passive substrate. The multiplexer structure also includes at least one through-substrate via coupling the HB filter and the LB filter.

[0061] In one aspect of this disclosure, a high-frequency band filter and a low-frequency band filter are arranged on opposite surfaces of a glass substrate to provide a double-sided multiplexer structure. In this arrangement, the high-frequency band filter includes a second capacitor on a first surface of the passive substrate. Alternatively, the high-frequency band filter and the low-frequency band filter may share a first capacitor on a second surface of the passive substrate opposite to the first surface. In particular, because the low-pass filter curve 254 ( Figure 2B This allows for the use of higher performance inductors, so the first inductor 410 and the second inductor 420 can be used. Figure 4A and Figure 4B The higher-cost 3D arrangement shown is used to achieve this. Higher-performance inductors can be high-Q, high-density 3D inductors for critical bands (e.g., low bands). Conversely, because satisfying the high-pass filter curve 252 allows for the use of lower-performance inductors, the third inductor 330 (L3) and the fourth inductor 340 (L4) can be used. Figure 3A and Figure 3B This is achieved through a lower cost and simplified 2D planar layout. Furthermore, placing the 2D filter away from the system board (e.g., PCB) eliminates the influence of customer-specific planar layouts.

[0062] Figure 7 This is a block diagram illustrating an exemplary wireless communication system 700 from which one aspect of this disclosure can be advantageously employed. For illustrative purposes, Figure 7 Three remote units 720, 730, and 750, and two base stations 740 are shown. It should be understood that wireless communication systems can have more remote units and base stations. Remote units 720, 730, and 750 include IC devices 725A, 725C, and 725B, which include the disclosed multiplexer architecture. It should be understood that other devices may also include the disclosed multiplexer devices, such as base stations, switching equipment, and network equipment. Figure 7The forward link signal 780 from base station 740 to remote units 720, 730 and 750 and the reverse link signal 790 from remote units 720, 730 and 750 to base station 740 are shown.

[0063] exist Figure 7 In this diagram, remote unit 720 is shown as a mobile phone, remote unit 730 is shown as a portable computer, and remote unit 750 is shown as a fixed-location remote unit in a wireless local loop system. For example, a remote unit can be a mobile phone, a handheld personal communication system (PCS) unit, a portable data unit such as a personal digital assistant (PDA), a device with GPS functionality, a navigation device, a set-top box, a music player, a video player, an entertainment unit, a fixed-location data unit such as a meter reading device, or other communication devices that store or retrieve data or computer instructions, or a combination of the above. Although Figure 7 Remote units according to various aspects of this disclosure are illustrated, but this disclosure is not limited to these exemplary illustrated units. Aspects of this disclosure are applicable to a wide range of devices, including the disclosed multiplexer device.

[0064] Figure 8 This is a block diagram illustrating a design workstation for circuit, layout, and logic design of semiconductor components, such as the multiplexer devices disclosed above. Design workstation 800 includes a hard disk 801 containing operating system software, support files, and design software such as Cadence or OrCAD. Design workstation 800 also includes a display 802 to facilitate the design of circuit 810 or semiconductor components 812, such as multiplexer devices. Storage medium 804 is provided for tangibly storing circuit designs 810 or semiconductor components 812. Circuit designs 810 or semiconductor components 812 can be stored on storage medium 804 in file formats such as GDSII or GERBER. Storage medium 804 can be a CD-ROM, DVD, hard disk, flash memory, or other suitable device. Furthermore, design workstation 800 includes a drive mechanism 803 for accepting input from storage medium 804 or writing output to storage medium 804.

[0065] The data recorded on storage medium 804 can specify logic circuit configurations, pattern data for photolithography masks, or mask pattern data for serial writing tools such as electron beam lithography. The data may also include logic verification data, such as timing diagrams or network circuits associated with logic simulation. Providing data on storage medium 804 facilitates the design of circuit design 810 or semiconductor assembly 812 by reducing the number of processes used to design semiconductor wafers.

[0066] For firmware and / or software implementations, the methods can be implemented using modules (e.g., processes, functions, etc.) that perform the functions described herein. Machine-readable media that tangibly implements the instructions can be used to implement the methods described herein. For example, software code can be stored in memory and executed by a processor unit. Memory can be implemented inside or outside the processor unit. As used herein, the term "memory" refers to long-term, short-term, volatile, non-volatile, or other types of memory, and is not limited to a particular type of memory or a particular number of memories, or the type of medium storing memory.

[0067] If implemented in firmware and / or software, these functions can be stored as one or more instructions or code on a computer-readable medium. Examples include computer-readable media encoded with data structures and computer-readable media encoded with computer programs. Computer-readable media include physical computer storage media. Storage media can be any available medium accessible to a computer. By way of example and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or other media that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer; disks and optical discs as used herein include compact optical discs (CDs), laser discs, optical discs, digital versatile optical discs (DVDs), floppy disks, and Blu-ray discs, wherein disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0068] In addition to being stored on a computer-readable medium, instructions and / or data may be provided as signals on a transmission medium included in a communication apparatus. For example, a communication apparatus may include a transceiver having signals indicating instructions and data. The instructions and data are configured to cause one or more processors to perform the functions outlined in the claims.

[0069] Although this disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions, and alterations may be made herein without departing from the technology of this disclosure as defined by the appended claims. For example, relational terms such as “above” and “below” are used with respect to substrates or electronic devices. Of course, if the substrate or electronic device is inverted, above becomes below, and vice versa. Additionally, if laterally positioned, above and below may refer to the sides of the substrate or electronic device. Furthermore, the scope of this application is not intended to be limited to the specific configurations of the processes, machines, manufactures, compositions of matter, means, methods, and steps described in the specification. As will be readily understood from this disclosure by one of ordinary skill in the art, currently existing or future-developed processes, machines, manufactures, compositions of matter, means, methods, or steps can be performed based on this disclosure using the corresponding configurations described herein to perform substantially the same function or achieve substantially the same results. Therefore, the appended claims are intended to include such processes, machines, manufactures, compositions of matter, means, methods, or steps within their scope.

Claims

1. A multiplexer structure, comprising: Passive substrate; A high-frequency band filter on the passive substrate, the high-frequency band filter comprising at least a 2D planar spiral inductor on the passive substrate; A low-frequency filter on the passive substrate, the low-frequency filter comprising a 3D through-substrate inductor and at least one first capacitor on the passive substrate; as well as At least one through-substrate via is used to couple the high-frequency band filter and the low-frequency band filter.

2. The multiplexer structure according to claim 1, wherein the high-frequency band filter is directly on the first surface of the passive substrate, and the low-frequency band filter is directly on the second surface of the passive substrate opposite to the first surface, as a double-sided multiplexer structure.

3. The multiplexer structure according to claim 2 further includes a through-glass via, the through-glass via coupling the high-frequency band filter on the first surface of the glass substrate and the low-frequency band filter on the second surface of the glass substrate.

4. The multiplexer structure according to claim 2, wherein the high-frequency band filter includes at least one second capacitor on the first surface of the passive substrate.

5. The multiplexer structure according to claim 2, wherein the first surface of the passive substrate is the back side of the double-sided multiplexer structure away from the system board.

6. The multiplexer structure according to claim 1, wherein the thickness of the 2D inductor is in the range of ten (10) to thirty (30) micrometers.

7. The multiplexer structure according to claim 1, wherein the multiplexer structure is integrated into a radio frequency (RF) front-end module, the RF front-end module being incorporated into at least one of a music player, video player, entertainment unit, navigation device, communication device, personal digital assistant (PDA), fixed location data unit, mobile phone, and portable computer.

8. A method for constructing a multiplexer structure from a passive substrate panel, comprising: A high-frequency band filter is fabricated on the passive substrate panel, the high-frequency band filter comprising at least a 2D planar spiral inductor on the passive substrate panel; A low-frequency filter is fabricated on the passive substrate panel, the low-frequency filter comprising a 3D through-substrate inductor and at least one first capacitor on the passive substrate panel; as well as A via is fabricated through the passive substrate panel, the via coupling the high-frequency band filter and the low-frequency band filter.

9. The method of claim 8, wherein the high-frequency band filter is directly fabricated on the first surface of the passive substrate panel, and the low-frequency band filter is directly fabricated on the second surface of the passive substrate panel opposite to the first surface, to provide a double-sided multiplexer using a double-sided printing process.

10. The method of claim 9, wherein manufacturing the via further comprises manufacturing a through-glass via that couples the high-frequency band filter on a first side of the glass substrate panel and the low-frequency band filter on a second side of the glass substrate panel.

11. The method of claim 9, wherein manufacturing the high-frequency band filter further comprises manufacturing at least one second capacitor on the first surface of the passive substrate panel.

12. The method of claim 8, further comprising using a stealth dicing process to separate the passive substrate panel along the dicing path.

13. The method of claim 8, further comprising integrating the multiplexer structure into a radio frequency (RF) front-end module, the RF front-end module being incorporated into at least one of a music player, video player, entertainment unit, navigation device, communication device, personal digital assistant (PDA), fixed location data unit, mobile phone, and portable computer.

14. A multiplexer structure, comprising: Passive substrate; A high-frequency band filter on the passive substrate, the high-frequency band filter comprising at least a 2D planar spiral inductor on the passive substrate; A low-frequency filter on the passive substrate, the low-frequency filter comprising a 3D through-substrate inductor and at least one first capacitor on the passive substrate; as well as A device for coupling the high-frequency band filter and the low-frequency band filter.

15. The multiplexer structure according to claim 14, wherein the high-frequency band filter is directly on the first surface of the passive substrate, and the low-frequency band filter is directly on the second surface of the passive substrate opposite to the first surface, as a double-sided multiplexer structure.

16. The multiplexer structure according to claim 15 further includes a through-glass via, the through-glass via coupling the high-frequency band filter on a first side of the glass substrate and the low-frequency band filter on a second side of the glass substrate.

17. The multiplexer structure of claim 15, wherein the high-frequency band filter includes at least one second capacitor on the first surface of the passive substrate.

18. The multiplexer structure of claim 15, wherein the first surface of the passive substrate is the back side of the double-sided multiplexer structure away from the system board.

19. The multiplexer structure according to claim 14, wherein the thickness of the 2D inductor is in the range of ten (10) to thirty (30) micrometers.

20. The multiplexer structure according to claim 14, wherein the multiplexer structure is integrated into a radio frequency (RF) front-end module, the RF front-end module being incorporated into at least one of a music player, video player, entertainment unit, navigation device, communication device, personal digital assistant (PDA), fixed location data unit, mobile phone, and portable computer.

21. A radio frequency (RF) front-end module, comprising: A multiplexer structure includes: a high-frequency band filter on a passive substrate, the high-frequency band filter including at least a 2D planar spiral inductor on the passive substrate; a low-frequency band filter on the passive substrate, the low-frequency band filter including a 3D through-substrate inductor and at least one first capacitor on the passive substrate; and at least one through-substrate via coupling the high-frequency band filter and the low-frequency band filter; and An antenna that is coupled to the output of the multiplexer structure.

22. The RF front-end module according to claim 21, further comprising: A high-frequency band antenna switch, wherein the high-frequency band antenna switch is coupled to the high-frequency band filter through the high-frequency band input port of the multiplexer structure; as well as A low-frequency band antenna switch, wherein the low-frequency band antenna switch is coupled to the low-frequency band filter through the low-frequency band input port of the multiplexer structure.

23. The RF front-end module of claim 21, wherein the high-frequency band filter is directly on the first surface of the passive substrate, and the low-frequency band filter is directly on the second surface of the passive substrate opposite to the first surface, as a double-sided multiplexer structure.

24. The RF front-end module of claim 23 further includes a through-glass via that couples the high-frequency band filter on the first surface of the glass substrate and the low-frequency band filter on the second surface of the glass substrate.

25. The RF front-end module of claim 21, wherein the RF front-end module is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communication device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.

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