Wideband low-error w-band phase shifting circuit

Abstract

A broadband low-error W-band phase shift circuit comprises three transistor switches, two parallel slow wave transmission lines, a slow wave coupling line compensation network and two compensation capacitors, wherein: the gates of the first and second transistor switches receive control voltages, the gate of the third transistor switch receives an inverted control voltage, the source and drain of the first transistor switch are respectively an input port and an output port of the circuit, one end of the first and second slow wave transmission lines is respectively connected to the input port and the output port, the other end is commonly connected to the drain of the second transistor switch, the source of the second transistor switch is respectively connected to the drain of the third transistor switch and the slow wave coupling line compensation network, the source of the third transistor switch is grounded, and one end of the two compensation capacitors is respectively connected to the slow wave coupling line compensation network, and the other end is grounded. The working frequency of the present application can cover 80-110GHz, when realizing a 45° target phase shift, the test amplitude error is less than 0.2dB, the phase error is less than 0.4°, and the chip area is only 70μm×220μm.

Description

Technical Field

[0001] This invention relates to a technology in the field of radio frequency devices, specifically a broadband, low-error W-band phase-shifting circuit. Background Technology

[0002] In the W-band (75-110GHz), phase-shifting circuits are constrained by the parasitic parameters of the switching transistors, resulting in degraded amplitude and phase characteristics and limited operating bandwidth. Existing phase-shifting circuits use lumped inductors to improve parasitic characteristics, but this results in narrow bandwidth and large size, failing to address the amplitude and phase mismatch problem at the level of distributed parameters and electromagnetic coupling mechanisms. Summary of the Invention

[0003] This invention addresses the limitations of existing technologies that cannot operate at higher frequencies and exhibit more pronounced parasitic effects in the W-band. Furthermore, it addresses the inability to control amplitude and phase errors over a wide bandwidth due to the use of lumped inductors and capacitors. The invention proposes a broadband, low-error W-band phase-shifting circuit capable of operating at frequencies from 80 to 110 GHz. When achieving a 45° target phase shift, its measured amplitude error is less than 0.2 dB, and its phase error is less than 0.4°. The chip area is only 70 μm × 220 μm.

[0004] This invention is achieved through the following technical solution:

[0005] This invention relates to a broadband, low-error W-band phase-shifting circuit, comprising: three transistor switches, two parallel slow-wave transmission lines, a slow-wave coupling line compensation network, and two compensation capacitors. The gates of the first and second transistor switches receive a control voltage, and the gate of the third transistor switch receives an inverting control voltage. The source and drain of the first transistor switch serve as the circuit's input and output ports, respectively. One end of each of the first and second slow-wave transmission lines is connected to the input and output ports, respectively, and the other end is connected to the drain of the second transistor switch. The source of the second transistor switch is connected to the drain of the third transistor switch and the slow-wave coupling line compensation network, respectively. The source of the third transistor switch is grounded. One end of each of the two compensation capacitors is connected to the slow-wave coupling line compensation network, and the other end is grounded.

[0006] When the first and second transistor switches are in the ON state and the third transistor switch is in the OFF state, the phase shifter operates in the reference state, exhibiting low phase shift characteristics. When the first and second transistor switches are in the OFF state and the third transistor switch is in the ON state, the phase shifter operates in the phase shift state, exhibiting low-pass phase shift characteristics.

[0007] The slow-wave coupling line compensation network includes: a third metal line that is respectively connected to two compensation capacitors and is arranged opposite to each other; a fourth metal line that is respectively connected to the source stage of the second and third transistor switches; and a slow-wave structure that is respectively arranged outside the third and fourth metal lines, wherein: the slow-wave structure is a multi-segment parallel metal pair with a direction perpendicular to the third and fourth metal lines.

[0008] The slow-wave coupling line compensation network is set in a multi-layer grounding structure, which has a hollow slot. The third and fourth metal wires are located at the top of the hollow slot, and the slow-wave structure is located inside the hollow slot.

[0009] The aforementioned multi-layer grounding structure consists of nine grounding metal layers arranged sequentially from top to bottom, wherein: the thickness of the first grounding metal layer is the same as that of the third and fourth metal wires, and the second metal layer is connected to the slow wave structure.

[0010] Technical effect

[0011] This invention utilizes a slow-wave coupling line compensation network to broadband shape the response of the phase shifter in reference mode, offsetting phase dispersion and amplitude fluctuations caused by the parasitic capacitance of the third transistor switch, thereby reducing phase shift and amplitude errors and increasing the operating bandwidth. Compared to existing technologies, the W-band phase shift circuit of this invention can achieve a variable phase shift of 45° within a wide frequency band of 80–110 GHz, with a phase error of less than 0.4° and an amplitude error of less than 0.2 dB. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the structure of the present invention;

[0013] Figure 2 for Figure 1 Schematic diagram;

[0014] Figure 3 This is the equivalent circuit diagram of the present invention in reference mode;

[0015] Figure 4 This is the equivalent circuit diagram of the present invention in phase-shifting mode;

[0016] Figure 5 This is a schematic diagram of the slow-wave coupled-line compensation network.

[0017] Figure 6 for Figure 5 Cross-sectional view;

[0018] Figure 7 This is a schematic diagram showing the connection between the slow-wave coupling line compensation network and the compensation capacitor.

[0019] Figure 8 An exploded view of a slow-wave coupled-line compensation network;

[0020] Figure 9 For slow-wave coupled-line compensation networks, true results of parity simulation in the 80-110GHz frequency band are presented;

[0021] Figure 10 The results are the S-parameter amplitude test results in the 80-110GHz frequency band under 45° phase shift mode, where S21 is the reference mode and S43 is the phase shift mode;

[0022] Figure 11 The results are S-parameter phase test results in the 80-110GHz frequency band under 45° phase shift mode, where S21 is the reference mode and S43 is the phase shift mode.

[0023] Figure 12 The amplitude error test results are for the 80-110GHz frequency band under 45° phase shift mode. ;

[0024] Figure 13 The phase error test results are for the 80-110GHz frequency band under 45° phase shift mode. . Detailed Implementation

[0025] like Figure 1 and Figure 2 As shown, this embodiment illustrates a broadband, low-error W-band phase-shifting circuit achieving a 45° phase shift, comprising: three transistor switches Q1, Q2, and Q3; a pair of slow-wave transmission lines TL1 and TL2; a slow-wave coupling line compensation network; and two compensation capacitors C. comp1 With C comp2 Wherein: the first and second transistor switches Q1 and Q2 are controlled by voltage SW respectively, and the third transistor switch Q3 is controlled by the inverted voltage SWI of SW. The first transistor switch Q1 is connected to the input port and the output port. The two ends of the series-connected first and second slow wave transmission lines TL1 and TL2 are connected to the input port and the output port respectively, and the midpoint of the slow wave transmission lines TL1 and TL2 is connected to the drain of the second transistor switch Q2. The source of the second transistor switch Q2 is connected to the drain of the third transistor switch Q3 and the slow wave coupling line compensation network respectively. The source of the third transistor switch Q3 is grounded. Two compensation capacitors C comp1 With C comp2 One end is connected to a slow-wave coupled-line compensation network, and the other end is grounded. The frequency characteristics of the reference mode are broadband shaped by the slow-wave coupled-line compensation network, compensating for phase dispersion in the 80-110GHz range and reducing broadband phase and amplitude errors.

[0026] like Figure 3As shown, in reference mode, the W-band phase-shifting circuit operates as follows: when the control signal SW is high and SWI is low, the first transistor switch Q1 and the second transistor switch Q2 are in the on state, while the third transistor switch Q3 is in the off state. In this mode, the input signal is mainly transmitted through the on first transistor switch Q1, exhibiting low phase shift characteristics. However, the off-state parasitic capacitance C3 of the third transistor switch Q3 will cause RF signal leakage, resulting in errors in the amplitude and phase responses of the reference mode.

[0027] like Figure 4 As shown, the W-band phase-shifting circuit in phase-shifting mode works as follows: when the control signal SW is low and SWI is high, the first transistor switch Q1 and the second transistor switch Q2 are turned off, and the third transistor switch Q3 is turned on. At this time, the input signal is guided into the low-pass phase-shifting path formed by the slow wave transmission lines TL1 and TL2 and the turn-off capacitor C2 of Q2, generating the required phase shift.

[0028] like Figures 5-8 As shown, the slow-wave coupling line compensation network includes: two compensation capacitors C respectively arranged opposite to each other. comp1 With C comp2 The third metal line TL3 is connected to the third metal line TL4, which is connected to the source of the second and third transistor switches Q2 and Q3 respectively, and the slow wave structure 3 is disposed outside the third and fourth metal lines TL3 and TL4 respectively. The slow wave structure 3 is a multi-segment parallel metal pair with the direction perpendicular to the third and fourth metal lines. This causes the coupling line structure composed of the first metal line and the second metal line to generate a slow wave effect, reducing the physical length required for the first metal line and the second metal line, and realizing a compact chip layout.

[0029] The parallel metal pairs are periodically distributed, with each metal having a thickness of 0.9 μm and a length of 3.5 μm.

[0030] The linewidth and spacing of the third and fourth metal lines TL3 and TL4 are both 2μm.

[0031] The slow-wave coupled-line compensation network is set up as follows: Figure 6 In the multi-layer grounding structure 4 shown, a hollow groove is provided in the multi-layer grounding structure 4, the third and fourth metal wires TL3 and TL4 are located at the top of the hollow groove, and the slow wave structure 3 is located inside the hollow groove.

[0032] The multi-layer grounding structure 4 is specifically composed of nine grounding metal layers arranged sequentially from top to bottom, wherein: the thickness of the first grounding metal layer 401 is the same as that of the third and fourth metal lines TL3 and TL4, and the second metal layer 402 is connected to the slow wave structure 3.

[0033] like Figure 9As shown, odd-mode impedance Even-mode impedance Electrical length And in conjunction with capacitor C comp1 =C comp2 = 9.4fF.

[0034] Through practical application experiments, the broadband low-error W-band phase shifter of this invention was tested in an on-chip testing environment using a high-frequency probe station and a vector network analyzer, measuring 2-port S-parameters. The experimental data obtained are as follows:

[0035] like Figure 10 The figure shows the S-parameter amplitude test results of the circuit in 45° phase-shift mode, where S21 is the reference mode and S43 is the phase-shift mode.

[0036] like Figure 11 The figure shows the S-parameter phase test results of the circuit in 45° phase-shift mode, where S21 is the reference mode and S43 is the phase-shift mode.

[0037] like Figure 12 The figure shows the measurement results of the amplitude error of this circuit. For the 45° phase-shift mode, this invention exhibits excellent amplitude consistency in the 80-110GHz frequency band, with amplitude error controlled within 0.2dB.

[0038] like Figure 13 The figure shows the measurement results of the phase error of this circuit. For the 45° phase-shift mode, this invention controls the phase error to within 0.4° in the 80-110GHz frequency band, demonstrating the significant technical advantages of this solution.

[0039] Compared with the prior art, in the test of the physical chip of the W-band phase shifter, the phase shifter of this invention can achieve a variable phase shift of 45° in the 80–110 GHz wide frequency band, with a phase error of less than 0.4° and an amplitude error of less than 0.2 dB.

[0040] The above-described specific implementations can be partially adjusted by those skilled in the art in different ways without departing from the principles and purpose of the present invention. The scope of protection of the present invention is defined by the claims and is not limited to the above-described specific implementations. All implementation schemes within the scope of the claims are bound by the present invention.

Claims

1. A broadband, low-error W-band phase-shifting circuit, characterized in that, include: The circuit consists of three transistor switches, two parallel slow-wave transmission lines, a slow-wave coupling line compensation network, and two compensation capacitors. The gates of the first and second transistor switches receive a control voltage, and the gate of the third transistor switch receives an inverted control voltage. The source and drain of the first transistor switch serve as the circuit input and output ports, respectively. One end of each of the first and second slow-wave transmission lines is connected to the input and output ports, respectively, and the other end is connected to the drain of the second transistor switch. The source of the second transistor switch is connected to the drain of the third transistor switch and the slow-wave coupling line compensation network. The source of the third transistor switch is grounded. One end of each of the two compensation capacitors is connected to the slow-wave coupling line compensation network, and the other end is grounded. When the first and second transistor switches are in the on state and the third transistor switch is in the off state, the phase shifter operates in the reference state and exhibits low phase shift characteristics. When the first and second transistor switches are off and the third transistor switch is on, the phase shifter operates in the phase shift state and exhibits low-pass phase shift characteristics.

2. The broadband, low-error W-band phase-shifting circuit according to claim 1, characterized in that, The slow-wave coupling line compensation network includes: a third metal line that is respectively connected to two compensation capacitors and a fourth metal line that is respectively connected to the source terminals of the second and third transistor switches; and a slow-wave structure that is respectively disposed outside the third and fourth metal lines, wherein: the slow-wave structure is a multi-segment parallel metal pair with a direction perpendicular to the third and fourth metal lines.

3. The broadband, low-error W-band phase-shifting circuit according to claim 1, characterized in that, The slow-wave coupling line compensation network is set in a multi-layer grounding structure, which has a hollow slot. The third and fourth metal wires are located at the top of the hollow slot, and the slow-wave structure is located inside the hollow slot.

4. The broadband, low-error W-band phase-shifting circuit according to claim 1, characterized in that, The aforementioned multi-layer grounding structure consists of nine grounding metal layers arranged sequentially from top to bottom, wherein: the thickness of the first grounding metal layer is the same as that of the third and fourth metal wires, and the second metal layer is connected to the slow wave structure.

5. The broadband, low-error W-band phase-shifting circuit according to claim 1, characterized in that, In the reference mode, the broadband low-error switching phase-shifting circuit is specifically configured such that when the control signal is high or low, the first transistor switch and the second transistor switch are in the on state, and the third transistor switch is in the off state. In this mode, the input signal is mainly transmitted through the on first transistor switch, exhibiting low phase shift characteristics. In phase-shifting mode, the broadband low-error switching phase-shifting circuit described above works as follows: when the control terminal signal is low level or high level, the first transistor switch and the second transistor switch are turned off, and the third transistor switch is turned on. At this time, the input signal is guided into the low-pass phase-shifting path composed of the slow wave transmission line and the turn-off capacitor, generating the required phase shift.

6. The broadband, low-error W-band phase-shifting circuit according to claim 2, characterized in that, The parallel metal pairs are periodically distributed, with each metal having a thickness of 0.9 μm and a length of 3.5 μm.

7. The broadband, low-error W-band phase-shifting circuit according to any one of claims 2-4, characterized in that, The linewidth and spacing of the third and fourth metal lines are both 2 μm.

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