An ideal diode circuit

Abstract

The application provides an ideal diode circuit, belonging to the technical field of integrated circuits, comprising: a power tube, the source of which receives an input signal, and the drain of which generates an output signal; a first comparator unit, which generates a first comparison signal according to a voltage difference signal of the input signal and the output signal and a first preset threshold value; a second comparator unit, which generates a second comparison signal according to the voltage difference signal and a second preset threshold value; a first control unit, which is controllably connected between the gate of the power tube and the input signal under the control of the first comparison signal; and a second control unit, which is controllably connected between the gate of the power tube and a first voltage under the control of the second comparison signal. The beneficial effects are as follows: the on-off state of the power tube is controlled by monitoring the voltage difference between the input and output signals; the gate of the power tube is rapidly discharged to be off when reverse blocking, thereby blocking the reverse current; and the gate voltage of the power tube is adjusted when forward conduction, thereby maintaining a low on-voltage drop, reducing power loss and thermal management cost.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more particularly to an ideal diode circuit. Background Technology

[0002] In recent years, with the rapid development of technology, power management chips have been widely used in industrial control and various consumer electronics products, which has also put forward higher requirements for power consumption and thermal management.

[0003] Schottky diodes are widely used in power supply circuits to achieve power switching and protection functions. Traditional Schottky diode application circuits include... Figure 1 As shown, the first power supply VIN1 supplies power to the load through the first Schottky diode D1, and the second power supply VIN2 supplies power to the load through the second Schottky diode D2. When one of the power supplies fails and an input short circuit occurs, the Schottky diodes in its path will be reverse biased, thereby isolating the other power supply from the faulty power supply. At this time, the load will be completely powered by the other normal power supply.

[0004] However, this circuit has two obvious drawbacks: First, during the forward conduction period, due to the voltage drop of the Schottky diode during forward conduction, a significant efficiency loss will occur when a large load current flows through the Schottky diode, thereby increasing the cost of thermal management; second, during the reverse blocking period of the Schottky diode, the reverse leakage current of the Schottky diode will increase sharply with the increase of junction temperature, resulting in a further increase in the power loss of the reverse conduction device.

[0005] In summary, traditional Schottky diodes suffer from high power loss and high thermal management costs in practical applications, especially under high load conditions, where the forward conduction process causes significant efficiency losses. Existing technologies typically require additional heat dissipation devices such as heat sinks to manage power dissipation, which undoubtedly increases system cost and footprint. Summary of the Invention

[0006] To address the above technical problems, this invention provides an ideal diode circuit with extremely small forward voltage drop and fast reverse blocking function.

[0007] The technical problem solved by this invention can be achieved by the following technical solutions: An ideal diode circuit includes: A power transistor, wherein the source of the power transistor is used to receive an input signal and the drain of the power transistor is used to generate an output signal; The first comparator unit is used to generate a first comparison signal based on the voltage difference signal between the input signal and the output signal and a first preset threshold. The second comparator unit is used to generate a second comparison signal based on the differential pressure signal and a second preset threshold. A first control unit is controllably connected between the gate of the power transistor and the input signal under the control of the first comparison signal, and is used to discharge the gate of the power transistor to the off state. The second control unit is controllably connected between the gate of the power transistor and the first voltage under the control of the second comparison signal, and is used to adjust the gate voltage of the power transistor to reduce the on-state voltage drop of the power transistor.

[0008] In the ideal diode circuit described in this invention, when the voltage difference signal is less than the first preset threshold, the first comparison signal is a high-level signal, and the first control unit turns on the gate of the power transistor to the input signal, discharging the gate of the power transistor to the off state to achieve reverse blocking.

[0009] In the ideal diode circuit described in this invention, when the voltage difference signal is greater than the second preset threshold, the second comparison signal is a low-level signal, and the second control unit turns on the gate of the power transistor to the first voltage, thereby raising the gate voltage of the power transistor and reducing the on-state voltage drop of the power transistor.

[0010] In the ideal diode circuit described in this invention, the power supply terminal of the second comparator unit is connected to the first voltage.

[0011] The ideal diode circuit of the present invention includes, in which the first control unit comprises: A first transistor, the gate of which is connected to the differential voltage signal, the source of which is connected to the input signal, and the drain of which is connected to the gate of the power transistor.

[0012] In the ideal diode circuit described in this invention, the first transistor is an NMOS transistor.

[0013] The ideal diode circuit of the present invention, wherein the second control unit includes: The second transistor has its gate connected to the second comparison signal, its source connected to the first voltage through a first resistor, and its drain connected to the gate of the power transistor and the bias current. A third transistor, the gate of which is connected to the source of the second transistor, the source of which is connected to the first voltage, and the drain of which is connected to the gate of the power transistor.

[0014] In the ideal diode circuit described in this invention, the second transistor is a PMOS transistor, and the third transistor is a PMOS transistor.

[0015] In the ideal diode circuit described in this invention, the first voltage is generated by a charge pump unit, one end of which is connected to the input signal, and the other end of which generates the first voltage.

[0016] The ideal diode circuit of the present invention further includes: a voltage sampling unit, wherein the input terminal of the voltage sampling unit is connected to the input signal and the output signal respectively, and the output terminal of the voltage sampling unit is connected to the first comparator unit and the second comparator unit respectively, for outputting the differential voltage signal based on the first sampling signal sampled from the input signal and the second sampling signal sampled from the output signal.

[0017] The advantages or beneficial effects of the technical solution of this invention are as follows: This invention controls the conduction state of a power transistor by monitoring the voltage difference between the input and output signals. When in reverse blocking mode, the first control unit discharges the gate of the power transistor to quickly turn it off, thereby blocking the reverse current. When in forward conducting mode, the second control unit adjusts the gate voltage of the power transistor to maintain a low on-state voltage drop, thereby reducing power loss and thermal management costs. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of a conventional Schottky diode application circuit in a preferred embodiment of the present invention; Figure 2 This is a schematic diagram of an ideal diode circuit in a preferred embodiment of the present invention. Detailed Implementation

[0019] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0021] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but this is not intended to limit the scope of the invention.

[0022] In a preferred embodiment of the present invention, based on the above-mentioned problems existing in the prior art, an ideal diode circuit is now provided, such as... Figure 2 As shown, it includes: Power transistor Q1, the source of power transistor Q1 is used to receive the input signal VIN, and the drain of power transistor Q1 is used to generate the output signal VOUT; The first comparator unit 101 is used to generate a first comparison signal based on the voltage difference signal between the input signal VIN and the output signal VOUT and a first preset threshold. The second comparator unit 102 is used to generate a second comparison signal based on the differential pressure signal and a second preset threshold. The first control unit 103 is controllably connected between the gate of the power transistor Q1 and the input signal VIN under the control of the first comparison signal, and is used to discharge the gate of the power transistor Q1 to the off state. The second control unit 104 is controllably connected between the gate of the power transistor Q1 and the first voltage under the control of the second comparison signal, and is used to adjust the gate voltage of the power transistor Q1 to reduce the on-state voltage drop of the power transistor Q1.

[0023] Specifically, addressing the issues of high power loss and high thermal management costs associated with traditional Schottky diodes in application, this embodiment controls the conduction state of power transistor Q1 by monitoring the voltage difference between the input signal VIN at the input terminal and the output signal VOUT at the output terminal. When in reverse blocking mode, the first control unit 103 discharges the gate of power transistor Q1, causing it to quickly turn off and thus blocking reverse current. When in forward conducting mode, the second control unit 104 adjusts the gate voltage of power transistor Q1 to maintain a low on-state voltage drop, thereby reducing power loss and thermal management costs.

[0024] Furthermore, the first preset threshold is a reverse blocking threshold. When the input signal VIN is lower than the output signal VOUT and the voltage difference is less than the first preset threshold, the first comparator unit 101 outputs a high-level first comparison signal; otherwise, the first comparator unit 101 outputs a low-level first comparison signal.

[0025] Furthermore, the second preset threshold is a positive adjustment threshold. When the input signal VIN is higher than the output signal VOUT and the voltage difference is greater than the second preset threshold, the second comparator unit 102 outputs a low-level second comparison signal; otherwise, the second comparator unit 102 outputs a high-level second comparison signal.

[0026] In the ideal diode circuit of the present invention, when the voltage difference signal is less than the first preset threshold, the first comparison signal is a high-level signal, and the first control unit 103 turns on the gate of the power transistor Q1 to the input signal VIN, discharging the gate of the power transistor Q1 to a completely off state, thereby blocking the reverse current.

[0027] Specifically, under reverse blocking conditions, when the input signal VIN is lower than the output signal VOUT and the voltage difference is less than the first preset threshold, the first comparator unit 101 outputs a high-level first comparison signal, which turns on the first control unit 103, quickly discharges the gate of the power transistor Q1, and then turns off the power transistor Q1 instantly, reliably blocking the reverse current and preventing the subsequent circuit from being impacted by reverse current.

[0028] In the ideal diode circuit of the present invention, when the voltage difference signal is greater than the second preset threshold, the second comparison signal is a low level signal, and the second control unit 104 turns on the gate of the power transistor Q1 to the first voltage, thereby raising the gate voltage of the power transistor Q1 and reducing the on-state voltage drop of the power transistor Q1.

[0029] Specifically, under forward conduction conditions, when the input signal VIN is higher than the output signal VOUT and the voltage difference is greater than the second preset threshold, the second comparator unit 102 outputs a low-level second comparison signal, which turns on the second control unit 104 to raise the gate potential of the power transistor Q1 and reduce the on-resistance of the power transistor Q1, thereby maintaining an extremely low on-state voltage drop and significantly reducing power loss and thermal management costs.

[0030] In the ideal diode circuit of the present invention, the power supply terminal of the second comparator unit 102 is connected to the first voltage to provide a stable operating power supply for the second comparator unit 102.

[0031] The ideal diode circuit of the present invention includes a first control unit 103 comprising: The first transistor NM1 has a gate connected to the differential voltage signal, a source connected to the input signal VIN, and a drain connected to the gate of the power transistor Q1.

[0032] In this embodiment, when the first comparison signal is low, the first transistor NM1 is turned off; when the first comparison signal is high, the first transistor NM1 is quickly and fully turned on, connecting the gate of the power transistor Q1 with the input signal VIN, and rapidly discharging the gate of the power transistor Q1, causing its gate potential to be quickly pulled down to the turn-off level, thus achieving a faster reverse blocking speed during reverse blocking.

[0033] In the ideal diode circuit of this invention, the first transistor NM1 is an NMOS transistor. By utilizing the high-speed conduction characteristics of the NMOS transistor, rapid gate discharge of the power transistor Q1 is achieved, significantly improving the reverse blocking speed. Turn-off is completed within microseconds, blocking reverse current, preventing damage to subsequent circuits, and improving circuit reliability.

[0034] The ideal diode circuit of the present invention includes a second control unit 104 comprising: The second transistor PM1 has its gate connected to the second comparison signal, its source connected to the first voltage through the first resistor R1, and its drain connected to the gate of the power transistor Q1 and the bias current. The third transistor PM2 has its gate connected to the source of the second transistor PM1, the source of the third transistor PM2 is connected to the first voltage, and the drain of the third transistor PM2 is connected to the gate of the power transistor Q1.

[0035] In the ideal diode circuit of this invention, the second transistor PM1 is a PMOS transistor, and the third transistor PM2 is a PMOS transistor.

[0036] Specifically, compared with the prior art, this embodiment uses a second transistor PM1, a third transistor PM2 and a first resistor R1 to achieve linear control of the gate voltage of the N-type power transistor Q1 with a simpler circuit structure, without the need for complex control logic, which greatly saves chip area and material costs; by raising the gate voltage, a lower on-state voltage drop is maintained, which greatly saves cost and space.

[0037] Furthermore, the aforementioned bias current is provided by the bias current source IBIAS. One end of the bias current source IBIAS is connected to the drain of the second transistor PM1, and the other end of the bias current source IBIAS is connected to the ground terminal, providing a stable bias for the gate control circuit.

[0038] It should be noted that the first comparator unit 101 and the second comparator unit 102 mentioned above can both be implemented using comparator circuits that are already mature in the prior art, and will not be described in detail here.

[0039] In the ideal diode circuit of the present invention, the first voltage is generated by the charge pump unit 105. One end of the charge pump unit 105 is connected to the input signal VIN, and the other end of the charge pump unit 105 generates the first voltage, which is a gate drive voltage higher than the input voltage.

[0040] Specifically, the charge pump unit 105 is used to provide the second control unit 104 and the second comparator unit 102 with a gate drive voltage higher than the input signal VIN voltage, ensuring that the gate potential of the power transistor Q1 is high enough, further reducing the on-resistance, achieving a lower on-voltage drop, and ensuring that the circuit operates stably over a wide input voltage range.

[0041] It should be noted that the above-mentioned charge pump unit 105 can be implemented using a charge pump circuit that is already mature in the prior art, and will not be described in detail here.

[0042] The ideal diode circuit of the present invention further includes: a voltage sampling unit 106, the input terminal of the voltage sampling unit 106 being connected to the input signal VIN and the output signal VOUT respectively, and the output terminal of the voltage sampling unit 106 being connected to the first comparator unit 101 and the second comparator unit 102 respectively, for outputting a differential voltage signal based on the first sampling signal sampled from the input signal VIN and the second sampling signal sampled from the output signal VOUT.

[0043] Specifically, the voltage sampling unit 106 samples the source voltage and drain voltage of the power transistor Q1 respectively, generates a first sampling signal corresponding to the input signal VIN and a second sampling signal corresponding to the output signal VOUT, and outputs a differential voltage signal based on the difference between the first sampling signal and the second sampling signal.

[0044] It should be noted that the voltage sampling unit 106 described above can all be implemented using existing mature voltage sampling circuits, which will not be elaborated here.

[0045] The working principle of the ideal diode circuit of the present invention is as follows: the voltage sampling unit 106 samples the input signal VIN and the output signal VOUT respectively, generates a first sampling signal sampled from the input signal VIN and a second sampling signal sampled from the output signal VOUT, and outputs a differential voltage signal based on the difference between the first sampling signal and the second sampling signal.

[0046] When the voltage difference between the input signal VIN and the output signal VOUT is less than the reverse blocking threshold, the first comparator unit 101 outputs a high-level signal, which turns on the first transistor NM1 and rapidly discharges the gate of the power transistor Q1, thereby realizing the rapid turn-off of the power transistor Q1, thus quickly blocking the reverse current and achieving more reliable protection.

[0047] When the voltage difference between the input signal VIN and the output signal VOUT is greater than the positive adjustment threshold, the second comparator unit 102 outputs a low-level signal, and the second transistor PM1 and the third transistor PM2 are turned on, thereby increasing the gate voltage of the power transistor Q1, reducing the on-resistance, and thus reducing power loss and thermal management costs.

[0048] The above are merely preferred embodiments of the present invention and are not intended to limit the implementation methods and protection scope of the present invention. Those skilled in the art should recognize that any equivalent substitutions and obvious changes made using the content of this specification and illustrations should be included within the protection scope of the present invention.

Claims

1. An ideal diode circuit, characterized in that, include: A power transistor, wherein the source of the power transistor is used to receive an input signal and the drain of the power transistor is used to generate an output signal; The first comparator unit is used to generate a first comparison signal based on the voltage difference signal between the input signal and the output signal and a first preset threshold. The second comparator unit is used to generate a second comparison signal based on the differential pressure signal and a second preset threshold. A first control unit is controllably connected between the gate of the power transistor and the input signal under the control of the first comparison signal, and is used to discharge the gate of the power transistor to the off state. The second control unit is controllably connected between the gate of the power transistor and the first voltage under the control of the second comparison signal, and is used to adjust the gate voltage of the power transistor to reduce the on-state voltage drop of the power transistor.

2. The ideal diode circuit according to claim 1, characterized in that, When the differential pressure signal is less than the first preset threshold, the first comparison signal is a high-level signal, and the first control unit turns on the gate of the power transistor to the input signal, discharging the gate of the power transistor to the off state to achieve reverse blocking.

3. The ideal diode circuit according to claim 1, characterized in that, When the differential voltage signal is greater than the second preset threshold, the second comparison signal is a low-level signal, and the second control unit turns on the gate of the power transistor to the first voltage, raising the gate voltage of the power transistor to reduce the on-state voltage drop of the power transistor.

4. The ideal diode circuit according to claim 1, characterized in that, The power supply terminal of the second comparator unit is connected to the first voltage.

5. The ideal diode circuit according to claim 1, characterized in that, The first control unit includes: A first transistor, the gate of which is connected to the differential voltage signal, the source of which is connected to the input signal, and the drain of which is connected to the gate of the power transistor.

6. The ideal diode circuit according to claim 5, characterized in that, The first transistor is an NMOS transistor.

7. The ideal diode circuit according to claim 1, characterized in that, The second control unit includes: The second transistor has its gate connected to the second comparison signal, its source connected to the first voltage through a first resistor, and its drain connected to the gate of the power transistor and the bias current. A third transistor, the gate of which is connected to the source of the second transistor, the source of which is connected to the first voltage, and the drain of which is connected to the gate of the power transistor.

8. The ideal diode circuit according to claim 7, characterized in that, The second transistor is a PMOS transistor, and the third transistor is a PMOS transistor.

9. The ideal diode circuit according to claim 1, 4, or 7, characterized in that, The first voltage is generated by a charge pump unit, one end of which is connected to the input signal, and the other end of which generates the first voltage.

10. The ideal diode circuit according to claim 1, characterized in that, Also includes: A voltage sampling unit, wherein the input terminals of the voltage sampling unit are respectively connected to the input signal and the output signal, and the output terminals of the voltage sampling unit are respectively connected to the first comparator unit and the second comparator unit, for outputting the differential pressure signal based on the first sampling signal sampled from the input signal and the second sampling signal sampled from the output signal.

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