A high-precision time-frequency synchronization method, system, device, medium and product

Abstract

The application discloses a high-precision time-frequency synchronization method, system, device, medium and product, and relates to the field of wireless communication. The application designs a frame synchronization algorithm based on parallel capture technology for the time-frequency synchronization demand of navigation and communication technology in a satellite denial environment, improves the frame synchronization efficiency and precision within an acceptable range of resource consumption, and also improves the anti-interference ability. A frequency offset estimation algorithm based on data assistance is designed, the precision of frequency offset estimation is improved with the assistance of existing data. A phase offset estimation algorithm based on data assistance is designed, the precision of phase offset estimation is improved. Simulation results show that the algorithm used in the application can effectively improve the efficiency, estimation precision and anti-interference ability of time-frequency synchronization, and meets the demand of time-frequency synchronization in a satellite denial environment.

Description

Technical Field

[0001] This invention relates to the field of wireless communication, and specifically to a high-precision time-frequency synchronization method, system, device, medium, and product. Background Technology

[0002] The statements in this section are provided only as background information in connection with this disclosure and may not constitute prior art.

[0003] Satellite navigation systems, with their advantages of global coverage, all-weather operation, high-precision positioning, and covert reception, have become an indispensable source of navigation information. However, they also face significant potential threats of interference and even physical destruction. In complex electromagnetic environments, multiple network platforms need to cooperate; when regional platforms suffer from satellite navigation signal interference (i.e., in a satellite-denied environment), a cooperative positioning mechanism between multiple platforms can provide a highly reliable position reference for collaborative operations. Before a communication link is established, achieving time and frequency synchronization between the transmitting and receiving ends is an indispensable prerequisite and a necessary condition for the receiving end to accurately demodulate and recover valid information.

[0004] Currently, there has been extensive research both domestically and internationally on high-precision time and frequency synchronization technologies for satellite-denied environments. For example, some studies focus on developing time synchronization methods with strong anti-interference capabilities and frequency calibration between distributed systems; some studies employ advanced signal processing algorithms and adaptive frequency tracking techniques to improve the accuracy and anti-interference performance of systems in complex environments; and some studies are actively committed to the deep integration of next-generation communication technologies with navigation and positioning to achieve sub-nanosecond time synchronization and centimeter-level positioning accuracy under dynamic conditions.

[0005] To ensure efficient and rapid collaborative operations between network platforms, high-precision time-frequency synchronization technology with strong anti-interference capabilities is crucial. In various frequency-hopping communication systems, the choice of synchronization method directly affects the system's survivability and reliability in complex electromagnetic environments. However, common time-frequency synchronization methods in existing technologies still have the following drawbacks: (1) Independent channel synchronization method: The synchronization signal is transmitted through a dedicated link, which has the advantages of low interference and high stability. However, it occupies additional bandwidth, has low system resource utilization, and has poor scalability when the channel is limited.

[0006] (2) Synchronization header method: A synchronization sequence is inserted into the data transmission frame. This method is simple to implement and does not require a separate channel. However, the acquisition success rate drops significantly in low signal-to-noise ratio environments, and the synchronization header is easily intercepted or interfered with, resulting in insufficient security and robustness.

[0007] (3) Reference clock synchronization method: This method relies on a high-precision clock source (such as an atomic clock) to maintain the time uniformity of each node, resulting in extremely high long-term stability. However, the equipment is expensive, and clock drift and initial synchronization deviation still need to be calibrated through communication, making it unsuitable for low-cost or distributed flexible deployment scenarios.

[0008] (4) Serial acquisition technology: Synchronization is achieved by searching bit by bit or frequency point by frequency point. It has a simple structure and low resource consumption. However, the acquisition time increases linearly with the sequence length and the number of frequency points. The delay is significant in high dynamic or multi-node networking, which makes it difficult to meet the needs of rapid coordination.

[0009] In summary, parallel acquisition technology utilizes a multi-channel processing structure to simultaneously detect multiple frequency points or phase units. Although it has certain requirements in terms of hardware complexity and power consumption, it possesses extremely fast acquisition speed and excellent anti-frequency offset and anti-interference performance, making it particularly suitable for rapid synchronization establishment of frequency hopping systems in environments with strong interference and high mobility. However, in practical applications, how to further integrate specific frame structures (such as TDMA frame structures) and achieve high-precision frequency offset and phase offset estimation and compensation after frame synchronization, thereby further improving the efficiency, accuracy, and anti-interference capability of time-frequency synchronization within an acceptable range of resource consumption, is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0010] The purpose of this invention is to address the challenges posed by strong electromagnetic interference and high maneuverability to frequency-hopping communication systems in satellite-denied environments. Traditional time-frequency synchronization methods (such as independent channel methods, synchronization head methods, and serial acquisition methods) suffer from drawbacks such as high resource consumption, low acquisition success rate under low signal-to-noise ratio, high cost, or significant acquisition delay. These methods struggle to simultaneously achieve rapid synchronization establishment and high-precision parameter estimation. This invention provides a high-precision time-frequency synchronization method, system, device, medium, and product. Based on the TDMA frame structure and a specific synchronization head frequency-hopping pattern design (including coarse and fine synchronization heads), a two-step frame synchronization algorithm (multi-channel reception combined with a secondary decision mechanism) based on parallel acquisition technology is used at the receiving end to achieve high-precision time delay positioning. Furthermore, a data-assisted algorithm is employed to sequentially utilize the autocorrelation function and cross-correlation function of the received signal to achieve accurate frequency offset and phase offset estimation. This achieves efficient, fast, and accurate time-frequency synchronization under complex adversarial conditions, significantly improving the system's frame synchronization efficiency, parameter estimation accuracy, and overall anti-interference capability within acceptable resource consumption limits.

[0011] The technical solution of the present invention is as follows: A high-precision time-frequency synchronization method is applied at a receiving end, the method comprising: Receive frequency hopping communication signals, which are transmitted in conjunction with a TDMA frame structure and include a synchronization header sequence; A frame synchronization algorithm based on parallel acquisition technology is used to receive the frequency hopping communication signal through multiple channels and perform correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization. The frame synchronization is implemented in two steps: coarse synchronization and fine synchronization. After frame synchronization is completed, the demodulated synchronization header sequence is obtained based on the determined frame start position. A frequency offset estimation algorithm based on autocorrelation function is adopted, and the synchronization header sequence is used as auxiliary data to perform frequency offset estimation, obtain the frequency offset estimate value, and perform frequency offset compensation on the received signal. After frequency offset estimation and compensation are completed, a data-assisted phase offset estimation algorithm is adopted. Using the synchronization header sequence after frame synchronization and frequency offset compensation are completed, phase offset estimation is performed based on the cross-correlation function of the received signal and the local synchronization signal to obtain the phase offset estimate and perform phase offset compensation.

[0012] Furthermore, the synchronization header sequence includes a coarse synchronization header sequence and a fine synchronization header sequence. Both the coarse synchronization header sequence and the fine synchronization header sequence adopt a double-pulse encapsulation format, and each symbol packet contains two pulses that transmit the same data. The coarse synchronization header sequence contains 16 symbol packets and a total of 32 pulses. The 32 pulses are divided into four groups and transmitted via frequency hopping at eight frequency hopping points. The precision synchronization header sequence contains 4 symbol packets and a total of 8 pulses. The 8 pulses are divided into two groups and transmitted via frequency hopping at 4 frequency hopping points.

[0013] Furthermore, the frame synchronization algorithm based on parallel acquisition technology receives the frequency hopping communication signal through multiple channels and performs correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization, including a coarse synchronization stage: It adopts 8-channel reception, each channel corresponding to a frequency hopping point of a coarse synchronization header sequence; Each received signal is correlated with the local modulated synchronization signal to obtain a correlation peak. The correlation peaks of each channel are delayed to the position of the 32nd pulse and superimposed to obtain 8 non-coherent cumulative values ​​as statistical decision quantities. For each path, an initial decision is made: using the length of the coarse synchronization header sequence as the search interval, the maximum value of the statistical decision quantity of each path and the position corresponding to the maximum value are searched. If the maximum value is greater than the set real-time threshold, the initial decision of the current path is determined to be successful, and the position corresponding to the maximum value is saved. Perform a second decision: Calculate the number of paths P that succeeded in the first decision. If P is greater than or equal to 4, then the coarse synchronization is determined to be successful, and the position corresponding to the maximum value is output as the starting position obtained from the coarse synchronization.

[0014] Furthermore, after outputting the starting position obtained from coarse synchronization in the coarse synchronization stage, a fine synchronization stage is performed. The specific steps of the fine synchronization stage include: It adopts 4-channel reception, each channel corresponding to a frequency hopping point of a fine synchronization header sequence; The incoherent cumulative value of the four received signals is calculated based on the defined search interval; Search for the relative position corresponding to the maximum value of each incoherent cumulative value, and sort the relative positions corresponding to the maximum values ​​of each path in ascending order to obtain the relative position sequence; The absolute value of the difference between adjacent positions in the relative position sequence is calculated sequentially. Based on the set deviation threshold, a second decision is made on the adjacent positions, and the relative positions that meet the decision conditions are extracted into the set of successful positions. The number of elements in the successful position set is counted. If the number is greater than or equal to 2, the fine synchronization is determined to be successful, and the average value of the elements in the successful position set is determined as the accurate position of the frame start.

[0015] Furthermore, the frequency offset estimation algorithm based on the autocorrelation function, using the synchronization header sequence as auxiliary data to perform frequency offset estimation, and obtaining the frequency offset estimate, includes: Obtain the received signal sequence at the corresponding frame start position, and perform conjugate multiplication on the received signal sequence using the known synchronization header sequence to obtain the demodulated observation sequence; Let the length of the observation sequence be D, and calculate the autocorrelation function of the observation sequence; wherein, the upper limit of the delay variable of the autocorrelation function is half the length D of the observation sequence; The autocorrelation functions of the delay variable within the upper limit range are summed, the phase angle of the summation result is extracted, and the phase angle is proportionally converted according to the sampling period and upper limit value of the signal to obtain the frequency offset estimate.

[0016] Furthermore, the data-assisted phase offset estimation algorithm utilizes the synchronization header sequence after frame synchronization and frequency offset compensation, and performs phase offset estimation based on the cross-correlation function of the received signal and the local synchronization signal to obtain the phase offset estimate value, including: The phase deviation that needs to be estimated in the received signal sequence after frequency offset compensation is used as an unknown variable to construct the joint probability density function of the received signal sequence. Remove the correlation terms in the joint probability density function that are unrelated to the phase deviation, and transform the remaining likelihood function expression into the sum of the real parts of the cross-correlation function between the received signal sequence and the locally known synchronization header sequence; The maximum value of the summation of the real parts of the cross-correlation function is obtained to obtain the phase bias estimate of the maximum likelihood estimate, wherein the phase bias estimate is the phase angle of the conjugate multiplication result of the received signal sequence and the locally known synchronization header sequence within the observation sequence length.

[0017] This invention also proposes a high-precision time-frequency synchronization system for use at a receiving end, the system comprising: A receiving module is used to receive frequency hopping communication signals, which are transmitted in conjunction with a TDMA frame structure and include a synchronization header sequence. The frame synchronization module is used to receive the frequency hopping communication signal through multiple channels using a frame synchronization algorithm based on parallel acquisition technology, and perform correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization. The frame synchronization is implemented in two steps: coarse synchronization and fine synchronization. The frequency offset estimation and compensation module is used to obtain the demodulated synchronization header sequence based on the determined frame start position after frame synchronization is completed, and to use the synchronization header sequence as auxiliary data to perform frequency offset estimation using an autocorrelation function-based frequency offset estimation algorithm to obtain the frequency offset estimation value and perform frequency offset compensation on the received signal. The phase offset estimation and compensation module is used to perform phase offset estimation and compensation by employing a data-assisted phase offset estimation algorithm after frequency offset estimation and compensation are completed. It uses the synchronization header sequence after frame synchronization and frequency offset compensation to perform phase offset estimation based on the cross-correlation function of the received signal and the local synchronization signal, obtains the phase offset estimate value, and performs phase offset compensation.

[0018] The present invention also proposes an electronic device, comprising: At least one processor; and a memory communicatively connected to said at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory to perform the method described above.

[0019] The present invention also proposes a computer-readable storage medium for storing instructions that, when executed, cause the method described above to be implemented.

[0020] The present invention also proposes a computer program product, which implements the above-described method when executed by a processor.

[0021] Compared with existing technologies, the advantages of this invention are: 1. This invention overcomes the time-consuming bottleneck of traditional serial acquisition, achieving fast and high-precision frame synchronization in complex electromagnetic environments. Addressing the needs of satellite denial environments and highly dynamic cooperative networks, this invention abandons the traditional bit-by-bit search serial mechanism and innovatively adopts a two-level (coarse synchronization and fine synchronization) frame synchronization architecture based on parallel acquisition technology. By using multiple reception channels (8 channels for coarse synchronization and 4 channels for fine synchronization) combined with rigorous secondary decision logic (such as P / Q decision for coarse synchronization and adjacent peak difference clustering decision for fine synchronization), it effectively overcomes the false alarm and missed alarm problems easily caused by a single threshold within an acceptable range of resource consumption. This not only significantly shortens the synchronization establishment time but also significantly improves the system's anti-interference capability and synchronization accuracy in environments with strong adversarial forces and low signal-to-noise ratios.

[0022] 2. A synchronization frequency hopping pattern with high autocorrelation and high resilience was designed, improving the signal's concealment and survivability. This invention targets the TDMA frame structure, splitting the synchronization header sequence into a coarse synchronization header sequence (32 pulses / 8 frequency hopping points) and a fine synchronization header sequence (8 pulses / 4 frequency hopping points) in a specific format. This physical layer design, combining multi-frequency random frequency hopping transmission with dual-pulse encapsulation, gives the synchronization signal excellent autocorrelation and anti-interception performance. Even if some frequency points are physically destroyed by the enemy or subjected to narrowband targeted interference, the system can still achieve synchronization using the incoherent cumulative values ​​of the remaining paths.

[0023] 3. A data-assisted frequency offset estimation algorithm using multiplexed synchronization headers is proposed, achieving high-precision frequency offset compensation without increasing additional pilot overhead. This invention fully utilizes the synchronization header sequence successfully captured during the frame synchronization phase as auxiliary data, and uses the autocorrelation function of the demodulated observation sequence for frequency offset estimation. By limiting the upper limit of the delay variable and performing cumulative summation, this method effectively smooths the phase jitter caused by random noise, and then accurately extracts the frequency offset value through proportional conversion. Compared with traditional blind estimation algorithms, this method has higher estimation accuracy at low signal-to-noise ratios and does not occupy additional data transmission bandwidth.

[0024] 4. The phase offset estimation algorithm based on the maximum likelihood criterion is optimized, significantly reducing computational complexity while ensuring theoretically optimal estimation. Addressing the residual phase offset after frequency offset compensation, this invention cleverly removes interference terms unrelated to the phase offset from the joint probability density function, transforming the complex maximum likelihood probability solution into a simple engineering operation of "summing the real parts of the cross-correlation functions of the received signal and the local synchronization header sequence." This process mathematically guarantees that the phase offset estimation accuracy approaches the optimal bound (Cramer-Rao lower bound), while significantly reducing the consumption of multipliers and logic resources in engineering hardware implementation, providing a reliable benchmark for accurate demodulation and recovery of valid information at the receiver. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in the embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0026] Figure 1 It has four encapsulation formats; Figure 2 The format for the symbol package; Figure 3 The transmission waveform after the synchronization header is encapsulated; Figure 4 The frequency hopping pattern for the synchronization header; Figure 5 Design process for coarse synchronization algorithm; Figure 6 Design flow for fine synchronization algorithm; Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0027] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0028] The features and performance of the present invention will be further described in detail below with reference to embodiments.

[0029] Example 1 This embodiment proposes a high-precision time-frequency synchronization method. Combining the TDMA frame structure, the synchronization code is encapsulated in a specific format at the transmitting end and transmitted using a specific frequency hopping pattern. At the receiving end, a method based on parallel acquisition technology is used to acquire the synchronization header to achieve frame synchronization. After frame synchronization is completed, frequency offset estimation and compensation are performed based on the autocorrelation function of the received signal. After frame synchronization, frequency offset estimation and compensation are completed, phase offset estimation and compensation are performed based on the cross-correlation function of the received signal and the local synchronization signal.

[0030] In this embodiment, a high-precision time-frequency synchronization method is specifically applied at the receiving end, and the method specifically includes the following steps: Receive frequency hopping communication signals, which are transmitted in conjunction with a TDMA frame structure and include a synchronization header sequence; A frame synchronization algorithm based on parallel acquisition technology is used to receive the frequency hopping communication signal through multiple channels and perform correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization. The frame synchronization is implemented in two steps: coarse synchronization and fine synchronization. After frame synchronization is completed, the demodulated synchronization header sequence is obtained based on the determined frame start position. A frequency offset estimation algorithm based on autocorrelation function is adopted, and the synchronization header sequence is used as auxiliary data to perform frequency offset estimation, obtain the frequency offset estimate value, and perform frequency offset compensation on the received signal. After frequency offset estimation and compensation are completed, a data-assisted phase offset estimation algorithm is adopted. Using the synchronization header sequence after frame synchronization and frequency offset compensation are completed, phase offset estimation is performed based on the cross-correlation function of the received signal and the local synchronization signal to obtain the phase offset estimate and perform phase offset compensation.

[0031] In this embodiment, specifically, the synchronization header sequence includes a coarse synchronization header sequence and a fine synchronization header sequence. Both the coarse and fine synchronization header sequences adopt a double-pulse encapsulation format, with each symbol packet containing two pulses transmitting the same data. It should be noted that in this embodiment, information is transmitted using the TDMA protocol, and messages are transmitted in time slots. There are four encapsulation formats for the transmission waveform: Standard Double Pulse Encapsulation (STDP), Double Compressed Single Pulse Encapsulation (P2SP), Double Compressed Double Pulse Encapsulation (P2DP), and Quadruple Compressed Single Pulse Encapsulation (P4SP), as shown below. Figure 1 As shown. In this embodiment, the synchronization header adopts a dual-pulse encapsulation format to form a dual-pulse symbol packet; The coarse synchronization header sequence contains 16 symbol packets and a total of 32 pulses. The 32 pulses are divided into four groups and transmitted via frequency hopping at eight frequency hopping points. The precision synchronization header sequence contains 4 symbol packets and a total of 8 pulses. The 8 pulses are divided into two groups and transmitted via frequency hopping at 4 frequency hopping points. The symbol packet after double-pulse encapsulation is as follows: Figure 2 As shown, a single pulse in each symbol packet consists of a 6.4µs information sequence and a 6.6µs silence sequence. A single symbol packet contains two pulses, both of which transmit the same data, for a total of 26µs.

[0032] In this embodiment, it should be noted that, in order to improve the success rate of frame synchronization detection, the synchronization header must have good autocorrelation to facilitate acquisition and tracking at the receiving end. Therefore, a 31-bit m-sequence is used as the coarse synchronization code. To match the format of the transmitted data, zeros are added to the end of the 31-bit m-sequence to transform it into a 32-bit sequence. This sequence is then MSK modulated and encapsulated in a double-pulse configuration. The data to be transmitted is spread into a 32-bit sequence using CCSK in groups of 5 bits, and the mapping relationship is shown in Table 1. Since S0 has good correlation, it is selected as the fine synchronization code, which is then MSK modulated and encapsulated in a double-pulse configuration. The transmission waveform of the synchronization code after MSK modulation and double-pulse encapsulation is shown below. Figure 3 As shown.

[0033] Table 1. Mapping relationship between 5-bit characters and 32-bit CCSK sequences

[0034] The duration of a single pulse is 13µs, therefore the frequency hopping rate is 13µs / hop. The signal carrier frequency is between 960MHz and 1215MHz, distributed evenly across 51 frequency points at 3MHz intervals. The 1008MHz-1053MHz and 1065MHz-1113MHz bands are IFF bands and therefore do not include frequency hopping points. The coarse synchronization header contains 16 symbol packets totaling 32 pulses, while the fine synchronization header contains 4 symbol packets totaling 8 pulses. Its frequency hopping pattern is as follows: Figure 4 As shown, the 32 pulses of the coarse synchronization head are divided into four groups and randomly transmitted on eight frequency points, while the 8 pulses of the fine synchronization head are divided into two groups and randomly transmitted on four frequency points.

[0035] In this embodiment, specifically, the frame synchronization algorithm based on parallel acquisition technology receives the frequency hopping communication signal through multiple channels, performs correlation processing with the local synchronization signal, and determines the accurate position of the frame start after a second decision to achieve frame synchronization, including a coarse synchronization stage: It adopts 8-channel reception, each channel corresponding to a frequency hopping point of a coarse synchronization header sequence; Each received signal is correlated with the local modulated synchronization signal to obtain a correlation peak. The correlation peaks of each channel are delayed to the position of the 32nd pulse and superimposed to obtain 8 non-coherent cumulative values ​​as statistical decision quantities. For each path, an initial decision is made: using the length of the coarse synchronization header sequence as the search interval, the maximum value of the statistical decision quantity of each path and the position corresponding to the maximum value are searched. If the maximum value is greater than the set real-time threshold, the initial decision of the current path is determined to be successful, and the position corresponding to the maximum value is saved. Perform a second decision: Calculate the number of paths P that succeeded in the first decision. If P is greater than or equal to 4, then the coarse synchronization is determined to be successful, and the position corresponding to the maximum value is output as the starting position obtained from the coarse synchronization.

[0036] Furthermore, after outputting the starting position obtained from coarse synchronization in the coarse synchronization stage, a fine synchronization stage is performed. The specific steps of the fine synchronization stage include: It adopts 4-channel reception, each channel corresponding to a frequency hopping point of a fine synchronization header sequence; The incoherent cumulative value of the four received signals is calculated based on the defined search interval; Search for the relative position corresponding to the maximum value of each incoherent cumulative value, and sort the relative positions corresponding to the maximum values ​​of each path in ascending order to obtain the relative position sequence; The absolute value of the difference between adjacent positions in the relative position sequence is calculated sequentially. Based on the set deviation threshold, a second decision is made on the adjacent positions, and the relative positions that meet the decision conditions are extracted into the set of successful positions. The number of elements in the successful position set is counted. If the number is greater than or equal to 2, the fine synchronization is determined to be successful, and the average value of the elements in the successful position set is determined as the accurate position of the frame start.

[0037] In this embodiment, to facilitate understanding of the technical solution of the present invention, the frame synchronization algorithm is further described as follows: The frame synchronization algorithm is based on parallel acquisition technology. At the receiving end, multiple receptions are performed. After correlation with the local modulated synchronization signal, the correlation value is processed to obtain the decision statistics. After two decisions, it is determined whether the position of the frame start has been found. If not, the local modulated synchronization signal is shifted backward, and the multiple reception, correlation and decision process is repeated until the position of the frame start is found and the delay is output.

[0038] The signal obtained by the receiver after down-conversion and low-pass filtering is:

[0039] in: The received signal after proper down-conversion and filtering; This represents the baseband signal after MSK modulation, and satisfies... , Indicates time delay. Indicates frequency offset. This represents the random phase offset of the m-th pulse, which conforms to... Uniform distribution on; This indicates that the mean is 0 and the variance is . Additive Gaussian noise.

[0040] Assume the sampling frequency is The downsampled signal is:

[0041] In the formula: Indicates the sampling time; The received signal is first multiplied by the conjugate of the local modulated synchronization signal to obtain... As shown in the following formula:

[0042] Because multiple receivers are used, each channel's All values ​​were accumulated and averaged to obtain the relevant values. As shown in the following formula:

[0043] in: Indicates the first Lu Di The correlation value of each pulse; If the number of sampling points for a symbol is Then it exists ,and and The following relationship exists between them. Next, the correlation values ​​are squared to remove the influence of phase. The squared result is:

[0044] Finally, based on the frequency hopping pattern, the correlation peak is delayed to the position of the 32nd pulse to obtain the statistical decision value COR, and the statistical decision value is used for two decisions.

[0045] Frame synchronization consists of two steps: coarse synchronization and fine synchronization. Coarse synchronization uses eight receivers, each corresponding to a frequency hopping point. After correlation with the locally modulated synchronization signal, each receiver will have four correlation peaks. These peaks are delayed to the 32nd pulse and then superimposed to obtain eight incoherent cumulative values, which are used as statistical decision values. Next, the maximum value is searched within the search interval defined by the length of the coarse synchronization header. and the relative position of the maximum value Since the square-law detection and incoherent accumulation processing have been performed, the decision statistic COR now follows a chi-square distribution, and its probability density function is:

[0046] In the formula, , To estimate noise power in real time, if the correlation value is more than two chips away from the location of the correlation peak, it is considered noise. The average of these correlation values ​​is then used as the power of noise. The estimated value is obtained, thus yielding its probability density function. At this point, a fixed false alarm probability is set, and the decision threshold can be obtained from the following formula. :

[0047] Therefore, the coarse synchronization algorithm process is as follows: Figure 5 As shown, the coarse synchronization algorithm flow is as follows: Step 1: Initialize the coarse synchronization completion flag and the length of the search interval, where the search interval length is the length of the coarse synchronization header; Step 2: Set the number of sliding intervals to 0, indicating that the signal is not being searched backward; Step 3: Determine the search interval based on the number of sliding intervals and the length of the search interval; Step 4: Calculate the coherent cumulative value (COR) of the 8 channels; Step 5: Make a decision for each path. The decision method is to search for the maximum value of each path and its corresponding position. If the peak value is greater than the real-time threshold, the decision is successful and the position of the peak value is saved. Step 6: Calculate the number of paths that resulted in a successful judgment; Step 7: Determine if P is greater than or equal to 4. If it is, set loc_coarse=1 and output the starting position obtained by coarse synchronization as loc. If it is not, return to step 3.

[0048] The flowchart of the precise synchronization algorithm is as follows: Figure 6 As shown. After coarse synchronization, fine synchronization is performed to further improve synchronization accuracy. The difference between fine and coarse synchronization is that fine synchronization uses four receivers, each corresponding to a frequency hopping point of a fine synchronization head. After obtaining the decision statistics through noncoherent accumulation, the following steps are used for decision-making: Step 1: Initialize the fine synchronization completion flag and the search interval length; Step 2: Determine the search interval and calculate the incoherent cumulative value of the four paths; Step 3: Search for the relative position of each maximum value and sort in ascending order. ; Step 4: Current judgment Element number Initialize the decision matrix of the P / Q decision method. ; Step 5: If Then join in At the same time, if and Then Join Skip to step 7; if and Then join in ; Step 6: Return to step 5 until... ; Step 7: [The text appears to be incomplete and contains several grammatical errors. A more accurate translation would require the full context.] Let P be the number of elements in the middle. If P ≥ 2, the decision is successful and the starting position is denoted as P. The average value of the elements in the middle.

[0049] In this embodiment, specifically, the frequency offset estimation algorithm based on the autocorrelation function, using the synchronization header sequence as auxiliary data to perform frequency offset estimation and obtain the frequency offset estimate, includes: Obtain the received signal sequence at the corresponding frame start position, and perform conjugate multiplication on the received signal sequence using the known synchronization header sequence to obtain the demodulated observation sequence; Let the length of the observation sequence be D, and calculate the autocorrelation function of the observation sequence; wherein, the upper limit of the delay variable of the autocorrelation function is half the length D of the observation sequence; The autocorrelation functions of the delay variable within the upper limit range are summed, the phase angle of the summation result is extracted, and the phase angle is proportionally converted according to the sampling period and upper limit value of the signal to obtain the frequency offset estimate.

[0050] In this embodiment, it should be noted that after frame synchronization is completed, the start position of the frame can be obtained. At this time, frequency offset and phase offset exist, which will have a significant impact on signal recovery. Therefore, frequency offset estimation and compensation are required. After frame synchronization, the received signal is:

[0051] After demodulation, we can obtain:

[0052] Take the length as Using the observed sequence as the observed sequence, and solving for the autocorrelation function of the observed sequence, we can obtain:

[0053] In the formula, for The upper limit is taken here. .Will Substituting the values ​​and taking the average yields the following formula:

[0054] This formula can be approximated as:

[0055] because Finally, the estimated value of the frequency offset can be obtained as follows:

[0056] In this embodiment, specifically, the data-assisted phase offset estimation algorithm is used. This algorithm utilizes the synchronization header sequence after frame synchronization and frequency offset compensation, and performs phase offset estimation based on the cross-correlation function of the received signal and the local synchronization signal to obtain the phase offset estimate value. This includes: The phase deviation that needs to be estimated in the received signal sequence after frequency offset compensation is used as an unknown variable to construct the joint probability density function of the received signal sequence. Remove the correlation terms in the joint probability density function that are unrelated to the phase deviation, and transform the remaining likelihood function expression into the sum of the real parts of the cross-correlation function between the received signal sequence and the locally known synchronization header sequence; The maximum value of the summation of the real parts of the cross-correlation function is obtained to obtain the phase bias estimate of the maximum likelihood estimate, wherein the phase bias estimate is the phase angle of the conjugate multiplication result of the received signal sequence and the locally known synchronization header sequence within the observation sequence length.

[0057] In this embodiment, it should be noted that after frame synchronization and frequency offset estimation are completed, phase offset still exists in the signal, affecting the demodulation of the signal. The received signal at this time can be expressed as:

[0058] In the formula, For the phase deviation that needs to be estimated, Let be the length of the observed sequence. The joint probability density function of the observed sequence is:

[0059] In the formula, ,because and It is not related to phase deviation, therefore the simplified likelihood function expression is:

[0060] Solving for the maximum value of this expression yields the maximum likelihood estimate. :

[0061] Based on the same inventive concept, this invention also proposes a high-precision time-frequency synchronization system for use at a receiving end, the system comprising: A receiving module is used to receive frequency hopping communication signals, which are transmitted in conjunction with a TDMA frame structure and include a synchronization header sequence. The frame synchronization module is used to receive the frequency hopping communication signal through multiple channels using a frame synchronization algorithm based on parallel acquisition technology, and perform correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization. The frame synchronization is implemented in two steps: coarse synchronization and fine synchronization. The frequency offset estimation and compensation module is used to obtain the demodulated synchronization header sequence based on the determined frame start position after frame synchronization is completed, and to use the synchronization header sequence as auxiliary data to perform frequency offset estimation using an autocorrelation function-based frequency offset estimation algorithm to obtain the frequency offset estimation value and perform frequency offset compensation on the received signal. The phase offset estimation and compensation module is used to perform phase offset estimation and compensation by employing a data-assisted phase offset estimation algorithm after frequency offset estimation and compensation are completed. It uses the synchronization header sequence after frame synchronization and frequency offset compensation to perform phase offset estimation based on the cross-correlation function of the received signal and the local synchronization signal, obtains the phase offset estimate value, and performs phase offset compensation.

[0062] Based on the same technical concept, embodiments of the present invention also provide an electronic device that can implement the high-precision time-frequency synchronization method provided in the above embodiments of the present invention. In one embodiment, the electronic device can be a server, a terminal device, or other electronic equipment. Figure 7 As shown, the electronic device may include: At least one processor and a memory connected to the at least one processor. In this embodiment of the invention, the specific connection medium between the processor and the memory is not limited. Figure 7 The example used is the connection between the processor and memory via a bus. The bus... Figure 7 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. Buses can be divided into address buses, data buses, control buses, etc., but for ease of representation, [the specific bus type is not shown here]. Figure 7 The processor is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, a processor can also be called a controller; there are no restrictions on the name.

[0063] In this embodiment of the invention, the memory stores instructions executable by at least one processor. By executing the instructions stored in the memory, the at least one processor can perform a high-precision time-frequency synchronization method as described above. The processor can implement... Figure 7 The functions of each module in the device shown.

[0064] The processor is the control center of the device. It can connect to various parts of the control device through various interfaces and lines. By running or executing instructions stored in memory and calling data stored in memory, it can monitor the device's various functions and process data, thereby enabling overall monitoring of the device.

[0065] In an alternative design, the processor may include one or more processing units. The processor may integrate an application processor and a modem processor, wherein the application processor primarily handles the operating system, user interface, and applications, while the modem processor primarily handles wireless communication. It is understood that the modem processor may also not be integrated into the processor. In some embodiments, the processor and memory may be implemented on the same chip; in some embodiments, they may also be implemented separately on separate chips.

[0066] The processor can be a general-purpose processor, such as a CPU, digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the high-precision time-frequency synchronization method disclosed in the embodiments of this invention can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0067] Memory, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory can include at least one type of storage medium, such as flash memory, hard disk, multimedia cards, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), and electrically erasable programmable read-only memory (EPROM). Only memory (EEPROM), magnetic storage, magnetic disks, optical disks, etc. A memory is any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. The memory in embodiments of this invention can also be a circuit or any other device capable of performing storage functions for storing program instructions and / or data.

[0068] By designing and programming the processor, the code corresponding to the high-precision time-frequency synchronization method described in the foregoing embodiments can be embedded into the chip, enabling the chip to execute the steps of the method described in the foregoing embodiments during operation. How to design and program the processor is a technique well-known to those skilled in the art and will not be elaborated upon here.

[0069] Based on the same inventive concept, embodiments of the present invention also provide a storage medium storing computer instructions that, when executed on a computer, cause the computer to perform a high-precision time-frequency synchronization method described above.

[0070] In some alternative embodiments, the present invention also provides that various aspects of a high-precision time-frequency synchronization method can also be implemented as a program product comprising program code that, when the program product is run on a device, causes the control device to perform the steps in a high-precision time-frequency synchronization method according to various exemplary embodiments of the present invention as described above.

[0071] It should be noted that although several units or sub-units of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of the invention, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided and embodied by multiple units. Furthermore, although the operation of the method of the invention is described in a specific order in the drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0072] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can be implemented in one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs) containing computer-usable program code. The form of a computer program product implemented on ROM, optical memory, etc.

[0073] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a server, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0074] Program code for performing the operations of this invention can be written using any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0075] In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0076] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0077] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0078] In addition, in some embodiments, a computer program product is proposed that implements the above-described high-precision time-frequency synchronization method when executed by a processor.

[0079] The embodiments described above merely illustrate specific implementation methods of this application, and while the descriptions are detailed and specific, they should not be construed as limiting the scope of protection of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the technical solution of this application, and these modifications and improvements all fall within the scope of protection of this application.

[0080] This background section is provided to generally present the context of the invention. The work of the currently named inventors, the work to the extent described in this background section, and aspects of this section that did not constitute prior art at the time of application are neither expressly nor impliedly acknowledged as prior art to the invention.

Claims

1. A high-precision time-frequency synchronization method, characterized in that, Applied to the receiving end, the method includes: Receive frequency hopping communication signals, which are transmitted in conjunction with a TDMA frame structure and include a synchronization header sequence; A frame synchronization algorithm based on parallel acquisition technology is used to receive the frequency hopping communication signal through multiple channels and perform correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization. The frame synchronization is implemented in two steps: coarse synchronization and fine synchronization. After frame synchronization is completed, the demodulated synchronization header sequence is obtained based on the determined frame start position. A frequency offset estimation algorithm based on autocorrelation function is adopted, and the synchronization header sequence is used as auxiliary data to perform frequency offset estimation, obtain the frequency offset estimate value, and perform frequency offset compensation on the received signal. After frequency offset estimation and compensation are completed, a data-assisted phase offset estimation algorithm is adopted. Using the synchronization header sequence after frame synchronization and frequency offset compensation are completed, phase offset estimation is performed based on the cross-correlation function of the received signal and the local synchronization signal to obtain the phase offset estimate value and perform phase offset compensation.

2. The high-precision time-frequency synchronization method according to claim 1, characterized in that, The synchronization header sequence includes a coarse synchronization header sequence and a fine synchronization header sequence. Both the coarse synchronization header sequence and the fine synchronization header sequence adopt a double-pulse encapsulation format, and each symbol packet contains two pulses that transmit the same data. The coarse synchronization header sequence contains 16 symbol packets and a total of 32 pulses. The 32 pulses are divided into four groups and transmitted via frequency hopping at eight frequency hopping points. The precision synchronization header sequence contains 4 symbol packets and a total of 8 pulses. The 8 pulses are divided into two groups and transmitted via frequency hopping at 4 frequency hopping points.

3. The high-precision time-frequency synchronization method according to claim 2, characterized in that, The frame synchronization algorithm based on parallel acquisition technology receives the frequency hopping communication signal through multiple channels and performs correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization, including a coarse synchronization stage: It adopts 8-channel reception, each channel corresponding to a frequency hopping point of a coarse synchronization header sequence; Each received signal is correlated with the local modulated synchronization signal to obtain a correlation peak. The correlation peaks of each channel are delayed to the position of the 32nd pulse and superimposed to obtain 8 non-coherent cumulative values ​​as statistical decision quantities. For each path, an initial decision is made: using the length of the coarse synchronization header sequence as the search interval, the maximum value of the statistical decision quantity of each path and the position corresponding to the maximum value are searched. If the maximum value is greater than the set real-time threshold, the initial decision of the current path is determined to be successful, and the position corresponding to the maximum value is saved. Perform a second decision: Calculate the number of paths P that succeeded in the first decision. If P is greater than or equal to 4, then the coarse synchronization is determined to be successful, and the position corresponding to the maximum value is output as the starting position obtained from the coarse synchronization.

4. The high-precision time-frequency synchronization method according to claim 3, characterized in that, After outputting the starting position obtained from coarse synchronization in the coarse synchronization stage, the fine synchronization stage is performed. The specific steps of the fine synchronization stage include: It adopts 4-channel reception, each channel corresponding to a frequency hopping point of a fine synchronization header sequence; The incoherent cumulative value of the four received signals is calculated based on the defined search interval; Search for the relative position corresponding to the maximum value of each incoherent cumulative value, and sort the relative positions corresponding to the maximum values ​​of each path in ascending order to obtain the relative position sequence; The absolute value of the difference between adjacent positions in the relative position sequence is calculated sequentially. Based on the set deviation threshold, a second decision is made on the adjacent positions, and the relative positions that meet the decision conditions are extracted into the set of successful positions. The number of elements in the successful position set is counted. If the number is greater than or equal to 2, the fine synchronization is determined to be successful, and the average value of the elements in the successful position set is determined as the accurate position of the frame start.

5. The high-precision time-frequency synchronization method according to claim 1, characterized in that, The frequency offset estimation algorithm based on the autocorrelation function uses the synchronization header sequence as auxiliary data to estimate the frequency offset, and obtains the frequency offset estimate value, including: Obtain the received signal sequence at the corresponding frame start position, and multiply the received signal sequence by the known synchronization header sequence using conjugate multiplication to obtain the demodulated observation sequence; Let the length of the observation sequence be D, and calculate the autocorrelation function of the observation sequence; wherein, the upper limit of the delay variable of the autocorrelation function is half the length D of the observation sequence; The autocorrelation functions of the delay variable within the upper limit range are summed, the phase angle of the summation result is extracted, and the phase angle is proportionally converted according to the sampling period and upper limit value of the signal to obtain the frequency offset estimate.

6. The high-precision time-frequency synchronization method according to claim 1, characterized in that, The data-assisted phase offset estimation algorithm is used to estimate the phase offset based on the cross-correlation function of the received signal and the local synchronization signal after frame synchronization and frequency offset compensation, using the synchronization header sequence. The phase offset estimate includes: The phase deviation that needs to be estimated in the received signal sequence after frequency offset compensation is used as an unknown variable to construct the joint probability density function of the received signal sequence. Remove the correlation terms in the joint probability density function that are unrelated to the phase deviation, and transform the remaining likelihood function expression into the sum of the real parts of the cross-correlation function between the received signal sequence and the locally known synchronization header sequence; The maximum value of the summation of the real parts of the cross-correlation function is obtained to obtain the phase bias estimate of the maximum likelihood estimate, wherein the phase bias estimate is the phase angle of the conjugate multiplication result of the received signal sequence and the locally known synchronization header sequence within the observation sequence length.

7. A high-precision time-frequency synchronization system, characterized in that, The system, applied at the receiving end, includes: A receiving module is used to receive frequency hopping communication signals, which are transmitted in conjunction with a TDMA frame structure and include a synchronization header sequence. The frame synchronization module is used to receive the frequency hopping communication signal through multiple channels using a frame synchronization algorithm based on parallel acquisition technology, and perform correlation processing with the local synchronization signal. After two decisions, the accurate position of the frame start is determined to achieve frame synchronization. The frame synchronization is implemented in two steps: coarse synchronization and fine synchronization. The frequency offset estimation and compensation module is used to obtain the demodulated synchronization header sequence based on the determined frame start position after frame synchronization is completed, and to use the synchronization header sequence as auxiliary data to perform frequency offset estimation using an autocorrelation function-based frequency offset estimation algorithm to obtain the frequency offset estimation value and perform frequency offset compensation on the received signal. The phase offset estimation and compensation module is used to perform phase offset estimation and compensation by employing a data-assisted phase offset estimation algorithm after frequency offset estimation and compensation are completed. It uses the synchronization header sequence after frame synchronization and frequency offset compensation to perform phase offset estimation based on the cross-correlation function of the received signal and the local synchronization signal, obtains the phase offset estimate value, and performs phase offset compensation.

8. An electronic device, characterized in that, include: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores instructions executable by the at least one processor, which executes the instructions stored in the memory to perform the method as described in any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store instructions that, when executed, cause the method as described in any one of claims 1-6 to be implemented.

10. A computer program product, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1-6.

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