A method for manufacturing a partial copper thickness addition of a non-conductive wire PCB
By forming a chemical copper layer on the PCB as a conductive layer, the problems of space occupation and scratch risk of conductive lines in traditional electroplating processes are solved. This achieves local copper thickness addition without conductive lines, improving production efficiency and product yield.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- KUSN HULI MICROELECTRONICS
- Filing Date
- 2026-05-22
- Publication Date
- 2026-07-14
AI Technical Summary
Traditional selective electroplating of negative films requires the laying of temporary conductive lines, which occupies wiring space, restricts the degree of freedom of wiring, and increases the complexity of the process and the risk of surface scratches.
Temporary conductive lines are replaced with chemical copper layers. A basic electroplated copper layer is formed by full-board electroplating. Pattern transfer and etching are then performed to form fine circuit patterns. After the chemical copper plating covers the circuit surface, selective electroplating is performed to thicken the layer. Finally, the chemical copper layer in the unthickened areas is removed by micro-etching.
It enables local copper thickness enhancement for arbitrarily complex patterns, reduces process complexity, avoids the risk of scratches during etching and subsequent processing, and improves product yield and production efficiency.
Smart Images
Figure CN122395839A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to a method for locally increasing the copper thickness of a PCB without conductive lines. Background Technology
[0002] In modern high-performance electronic products, different functional areas on a PCB have varying requirements for copper thickness. Signal lines require precisely controlled linewidth and copper thickness to meet impedance matching needs, while power paths, ground planes, or connector pads require thicker copper layers to carry high currents or enhance mechanical strength. Currently, the industry commonly uses selective electroplating (SEP) to achieve localized copper thickness enhancement: after copper plating on the substrate, a dry film is applied, and the areas requiring thicker copper layers, along with the conductive lines connecting these areas, are exposed and developed using a negative film process. Current is transmitted through pre-designed conductive lines to increase the copper thickness in the target area. After electroplating, the temporary conductive lines are removed through an etching process. This method is widely used in high-density interconnects and complex circuit structures.
[0003] However, traditional selective electroplating (SEP) processes for negative films have significant technical drawbacks: the placement of conductive lines requires valuable PCB wiring area, which is extremely detrimental to high-density interconnect board designs and severely restricts wiring freedom; conductive lines can typically only serve relatively regular and concentrated patterns, and for sparsely distributed, complex-shaped, or thickened patterns located in different network areas, conductive line placement is extremely difficult or even impossible, resulting in limitations on product electrical performance and structural design; the additional etching process for removing conductive lines not only increases production costs and time but also introduces the risk of scratching the surface of the formed circuit during etching and subsequent processing, affecting product yield and reliability. Therefore, there is an urgent need for a new process method that eliminates the need for conductive lines and enables local copper thickness addition for arbitrarily complex patterns. Summary of the Invention
[0004] The purpose of this invention is to solve the problems of traditional selective electroplating processes that require the laying of temporary conductive lines, which occupy wiring space, restrict wiring freedom, and increase process complexity and surface scratch risk. Therefore, this invention proposes a method for local copper thickness addition on PCBs without conductive lines.
[0005] The technical solution of the present invention to solve the above-mentioned technical problems is as follows: A method for locally increasing the copper thickness of a PCB without conductive lines includes the following steps: S1: Perform full-board electroplating on the PCB substrate with drilled holes to form a basic electroplated copper layer on the board surface and hole walls. S2: Perform the first pattern transfer on the basic electroplated copper layer to form the first circuit pattern protective layer; S3: Etch the board that forms the protective layer to remove the unprotected copper layer and form a fine circuit pattern, and then remove the protective layer; S4: Perform chemical copper plating on the etched board to deposit a chemical copper layer on the board surface, which covers the circuit surface and the substrate surface. S5: Perform a second pattern transfer on the chemical copper layer to expose the chemical copper layer in the target area where the copper thickness needs to be increased; S6: Selective electroplating is performed using the chemical copper layer as a conductive layer to form a thickened electroplated copper layer in the exposed target area. S7: Remove the protective layer for the second graphics transfer; S8: Perform micro-etching to remove the chemical copper layer that is not covered by the thickened electroplated copper layer.
[0006] Based on the above technical solution, the present invention can be further improved as follows.
[0007] Furthermore, in step S1, the process of electroplating the entire PCB substrate with drilled holes includes a copper plating process and a copper electroplating process. The copper plating process forms a conductive copper layer on the hole wall, and the copper electroplating process increases the thickness of the copper layer on the board surface and the hole wall simultaneously. The thickness of the basic electroplated copper layer is determined according to the copper thickness required in the lowest area of the product, and the thickness of the basic electroplated copper layer is 15μm-25μm.
[0008] Furthermore, the pattern transfer in steps S2 and S5 is achieved using a lamination, exposure, and development process. The first exposure film used in step S2 contains the final complete circuit pattern, which covers all lines, pads, and via structures. The second exposure film used in step S5 only contains the pattern of the target area where copper needs to be thickened. This target area includes at least one of high-current pads, power paths, ground planes, or connector pads. The lamination process uses dry film as the photoresist material. The exposure process uses ultraviolet light to cause a photochemical reaction in the dry film. The development process uses a developer to remove the dry film from unexposed or exposed areas.
[0009] Furthermore, the etching in step S3 employs an acidic etching process. The acidic etching solution includes a hydrochloric acid-hydrogen peroxide system or a sulfuric acid-hydrogen peroxide system. During the etching process, the concentration, temperature, and etching time of the etching solution are controlled to completely remove the base electroplated copper layer that is not protected by the dry film, forming a fine circuit pattern with precisely controlled linewidth. After etching, the dry film protective layer is removed by an alkaline solution, which is a sodium hydroxide solution or a sodium carbonate solution. The stripping temperature is controlled at 40℃-60℃.
[0010] Furthermore, the electroless copper plating process in step S4 includes pretreatment, catalytic activation, and redox reaction processes. The pretreatment includes degreasing and micro-etching steps. Catalytic activation forms a catalytic core on the board surface using a palladium salt solution. The redox reaction process causes copper ions to be reduced and deposited at the catalytic core to form an electroless copper layer. The thickness of the electroless copper layer is 0.3m-0.8m. This electroless copper layer is continuously distributed on the entire board surface, covering the top and sidewalls of the circuit and the exposed substrate surface. Moreover, this electroless copper layer is conductive and can provide a conductive path for subsequent electroplating processes.
[0011] Furthermore, before step S4, the process includes pretreatment and drying of the etched board. The pretreatment includes cleaning and surface activation. Cleaning uses deionized water to remove residual etching solution and stripping solution from the surface. Surface activation uses an acidic solution to slightly roughen the copper surface to enhance the adhesion of the chemical copper layer. The drying step uses a hot air circulating oven or infrared drying equipment at a temperature of 80℃-120℃ for 10-30 minutes to ensure that the board surface is completely dry and free of moisture residue.
[0012] Furthermore, in step S6, selective electroplating uses a copper sulfate electroplating solution system. During the electroplating process, the current is conducted to the exposed target area through a continuously distributed chemical copper layer. The electroplated copper is deposited only on the surface of the exposed chemical copper layer to form a thickened electroplated copper layer. The electroplating process parameters include: current density of 1-3 A / dm, electroplating solution temperature of 20℃-30℃, and electroplating solution pH value of 0.5-2.0. By controlling the electroplating time, the thickness of the thickened electroplated copper layer is controlled, so that the copper thickness in the target area is increased by 15m-30m, and the total copper thickness in the target area reaches 35m-50m.
[0013] Furthermore, after step S6 and before step S7, an optical inspection is performed. The optical inspection uses an automatic optical inspection device or microscope to check the copper thickness and pattern quality of the thickened area. The inspection includes whether the thickness of the thickened electroplated copper layer meets the design requirements, whether the edge of the thickened area is clear, and whether there are electroplating voids or pinhole defects. Step S7 is performed only after confirming that the copper thickness and pattern quality of the thickened area meet the requirements. Boards that do not meet the requirements are reworked or scrapped.
[0014] Furthermore, the micro-etching process in step S8 uses a sulfuric acid-hydrogen peroxide system etching solution with a sulfuric acid concentration of 5%-15%, a hydrogen peroxide concentration of 3%-8%, and an etching solution temperature of 25℃-35℃. The micro-etching process removes the chemical copper layer not covered by the thickened electroplated copper layer through a gentle chemical reaction. The micro-etching depth is controlled within the range of 0.3m-1.0m, ensuring that the chemical copper layer is completely removed without significantly affecting the base electroplated copper layer and the thickened electroplated copper layer. The thickness loss of the base electroplated copper layer and the thickened electroplated copper layer is controlled within 1m.
[0015] Furthermore, the PCB substrate is one of FR-4 core board, CEM-3 core board, or high-frequency board material; the thickness of the basic electroplated copper layer is 15m-25m; the thickness of the chemical copper layer is 0.3m-0.8m; and the thickness of the thickened electroplated copper layer is 15m-30m, resulting in a total copper thickness of 35m-50m in the target area after thickening. This method is applicable to the manufacturing of high-density interconnect boards, communication boards, PCBs for radar products, automotive electronic PCBs, or server motherboards, enabling PCB structures with different copper thicknesses in different functional areas.
[0016] Compared with the prior art, the technical solution of this application has the following beneficial technical effects: This invention involves chemically plating copper onto the entire board after etching to form a fine circuit pattern. A continuously distributed chemical copper layer is deposited on the board surface as a conductive layer, covering both the circuit surface and the substrate surface. This provides a conductive path throughout the entire board for subsequent selective electroplating. Because the chemical copper layer is continuously distributed throughout the board, regardless of whether the target thickening area is concentrated or dispersed, regular or irregular in shape, or belongs to the same or different networks, the exposed area can be precisely controlled through a second pattern transfer, directly achieving selective electroplating thickening without any limitations on pattern distribution or shape. Furthermore, this invention removes the chemical copper layer not covered by the thickened electroplated copper layer through micro-etching. This chemical copper layer is only 0.3-0.8 μm thick, and the micro-etching depth is simple to control, avoiding the deep etching process required in traditional processes to remove thicker conductive lines. This eliminates the risk of scratching the surface of the formed circuit during etching and subsequent processing, while also reducing process complexity, lowering production costs, and improving product yield and production efficiency. Attached Figure Description
[0017] Figure 1 This is a schematic diagram of the PCB substrate structure with drilled holes according to the present invention; Figure 2 This is a schematic diagram of the structure of the basic electroplated copper layer formed after step S1 of the present invention; Figure 3 This is a schematic diagram of the structure formed by etching after step S3 of the present invention. Figure 4 This is a schematic diagram of the structure of the deposited chemical copper layer after step S4 of the present invention; Figure 5 This is a schematic diagram of the structure in which the target area is exposed after the second graphic transfer following step S5 of the present invention. Figure 6 This is a schematic diagram of the structure formed by selective electroplating to create a thickened electroplated copper layer after step S6 of the present invention. Figure 7 This is a schematic diagram of the structure after step S7 of the present invention is completed and the second graphic transfer protective layer is removed; Figure 8 This is a schematic diagram of the final structure after the micro-etching process is completed following step S8 of the present invention. Detailed Implementation
[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0019] Example 1: like Figures 1 to 8 As shown, this embodiment provides a method for locally increasing copper thickness on a PCB without conductive lines. This method uses a chemically plated copper layer to replace the traditional temporary conductive line structure, achieving locally increased copper thickness for arbitrarily complex patterns. Specifically, it includes the following steps: Step S1: Perform full-board electroplating on the PCB substrate with drilled holes to form a basic electroplated copper layer on the board surface and hole walls.
[0020] like Figure 1 and Figure 2 As shown, a PCB substrate 1 with drilled holes is taken. This PCB substrate 1 can be selected from FR-4 core board, CEM-3 core board, or high-frequency board. The process of full-board electroplating of the PCB substrate with drilled holes includes a copper immersion process and a copper plating process. The copper immersion process forms an initial conductive copper layer on the hole wall through chemical deposition, establishing an electrical connection between the hole wall and the board surface. The copper plating process increases the copper layer thickness on the board surface and the hole wall synchronously through an electrochemical reaction, ensuring the consistency of the copper layer thickness on the hole wall and the board surface. The thickness of the basic electroplated copper layer is determined according to the copper thickness required in the lowest area of the product. Usually, the thickness of the basic electroplated copper layer is controlled in the range of 15μm-25μm. In this embodiment, 20μm is preferred as the basic copper thickness. The full-board electroplating process parameters include: current density 1.5-2.5A / dm, electroplating solution temperature 22℃-28℃, and electroplating time calculated and determined according to the required copper thickness.
[0021] Step S2: Perform the first pattern transfer on the base electroplated copper layer to form the first circuit pattern protective layer.
[0022] The pattern transfer in step S2 is achieved through lamination, exposure, and development. Specifically, a first dry film is laminated onto the base electroplated copper layer as a photoresist material; the dry film thickness is typically 15-40 μm. A first exposure film containing the final complete circuit pattern is used for exposure processing. This circuit pattern covers all lines, pads, and via structures. The exposure process uses ultraviolet light to induce a photochemical reaction in the dry film, with the exposure energy controlled at 80-120 mJ / cm. Subsequently, a development process is performed. The development process uses a developer (sodium carbonate solution, concentration 1%-1.5%) to remove the dry film from unexposed areas. The development temperature is 30℃-35℃, and the development time is adjusted according to the dry film thickness. After development, the circuit pattern to be retained is completely covered and protected by the dry film, while the unprotected copper layer areas are exposed.
[0023] Step S3: Etch the board with the protective layer to remove the unprotected copper layer and form a fine circuit pattern, and then remove the protective layer.
[0024] like Figure 3 As shown, the etching in step S3 employs an acidic etching process. The acidic etching solution includes either a hydrochloric acid-hydrogen peroxide system or a sulfuric acid-hydrogen peroxide system. The hydrochloric acid-hydrogen peroxide system has a formulation of 10%-15% hydrochloric acid concentration and 3%-5% hydrogen peroxide concentration; the sulfuric acid-hydrogen peroxide system has a formulation of 8%-12% sulfuric acid concentration and 4%-6% hydrogen peroxide concentration. During the etching process, the etching solution concentration, temperature, and etching time are controlled to completely remove the base electroplated copper layer not protected by the dry film. The etching temperature is controlled at 28℃-35℃, and the etching rate is controlled at 15-25 m / min, forming a fine circuit pattern with precisely controlled linewidth. After etching, the dry film protective layer is removed using an alkaline solution. The alkaline solution is either sodium hydroxide solution (concentration 3%-5%) or sodium carbonate solution (concentration 3%-5%). The stripping temperature is controlled at 40℃-60℃, and the stripping time is 3-8 minutes, ensuring complete removal of the dry film without residue. At this point, a fine circuit pattern structure with a copper thickness of 15μm-25μm is formed on the board surface.
[0025] Step S4: Perform chemical copper plating on the etched board to deposit a chemical copper layer on the board surface, covering the circuit surface and the substrate surface.
[0026] like Figure 4As shown, before step S4, the etched board needs to undergo pretreatment and drying. Pretreatment includes cleaning and surface activation. Cleaning uses deionized water for multi-stage rinsing to remove residual etching solution and stripping solution from the surface. Each rinsing stage lasts 30-60 seconds, and the water temperature is controlled at room temperature. Surface activation involves slightly roughening the copper surface with an acidic solution (dilute sulfuric acid, concentration 5%-10%) to enhance the adhesion of the chemical copper layer. The roughening time is 30-90 seconds. The drying step uses a hot air circulating oven or infrared drying equipment. The drying temperature is 80℃-120℃, preferably 100℃ in this embodiment, and the drying time is 10-30 minutes to ensure the board surface is completely dry and free of moisture residue.
[0027] After pretreatment, the electroless copper plating process begins. Step S4 of the electroless copper plating process includes pretreatment, catalytic activation, and redox reaction. Pretreatment includes degreasing and micro-etching. Degreasing uses an alkaline degreasing agent to remove surface oil contaminants at a temperature of 55℃-65℃ for 3-5 minutes. Micro-etching uses sodium persulfate solution to microscopically roughen the surface to a depth of 0.5-1.5 μm. Catalytic activation uses a palladium salt solution (palladium chloride or palladium sulfate solution, palladium ion concentration 20-50 ppm) to form catalytic cores on the plate surface at a temperature of 35℃-45℃ for 3-6 minutes, resulting in uniform palladium particle distribution across the entire plate surface. The redox reaction process reduces and deposits copper ions at the catalytic cores to form an electroless copper layer. The electroless copper plating solution contains copper sulfate and formaldehyde as reducing agents, complexing agents, and stabilizers. The solution temperature is controlled at 45℃-55℃, the pH value at 11.5-12.5, and the deposition rate is approximately 0.5-1.0 m / h. The thickness of the chemical copper layer is 0.3m-0.8m, preferably 0.5m in this embodiment. The chemical copper layer is continuously distributed on the entire board surface, covering the top and side walls of the circuit and the exposed substrate surface. The chemical copper layer has good conductivity and can provide a conductive path throughout the entire board for subsequent electroplating processes, completely replacing the function of temporary conductive lines in traditional processes.
[0028] Step S5: Perform a second pattern transfer on the chemical copper layer to expose the chemical copper layer in the target area where the copper thickness needs to be increased.
[0029] like Figure 5As shown, the pattern transfer in step S5 is also achieved using lamination, exposure, and development processes. A second dry film is laminated onto the chemical copper layer, with the same dry film type and thickness as the first pattern transfer. Exposure and development are performed using a second exposure film, which only contains the pattern of the target area where copper thickening is required. This target area includes at least one of high-current pads, power paths, ground planes, or connector pads. The design of the second exposure film is entirely based on functional requirements and is not limited by the conductive line layout, allowing for the design of thickened patterns of any complex, dispersed, or irregular shape. The exposure and development process parameters are the same as in step S2. After development, the dry film of the target area where copper thickening is required is removed, exposing the chemical copper layer in that area, while the chemical copper layer of the remaining areas is completely covered and protected by the second dry film.
[0030] Step S6: Selective electroplating is performed using a chemical copper layer as a conductive layer to form a thickened electroplated copper layer in the exposed target area.
[0031] like Figure 6 As shown, the selective electroplating in step S6 uses a copper sulfate electroplating solution system. The electroplating solution composition includes: 150-250 g / L copper sulfate, 50-80 g / L sulfuric acid, 40-80 ppm chloride ions, and appropriate amounts of brightener and leveling agent. During the electroplating process, the current is conducted to the exposed target area through the continuously distributed chemical copper layer. Since the chemical copper layer is continuously distributed throughout the entire board, the current can be conducted from the board edge or any contact point through the chemical copper layer to all exposed areas, regardless of how dispersed or complex these areas are. Electroplated copper is deposited only on the surface of the exposed chemical copper layer to form a thickened electroplated copper layer; the areas of the chemical copper layer covered by the dry film do not undergo electroplating reaction. The electroplating process parameters include: current density of 1-3 A / dm, preferably 2 A / dm in this embodiment; electroplating solution temperature of 20℃-30℃, preferably 25℃; electroplating solution pH value of 0.5-2.0, preferably 1.0-1.5; the electroplating solution needs to be continuously circulated and filtered to maintain stability. The thickness of the electroplated copper layer is controlled by adjusting the electroplating time. The electroplating rate is approximately 20-25 m / h, which increases the copper thickness in the target area by 15-30 m. In this embodiment, the copper thickness in the target area is increased by 20 m, and the total copper thickness in the target area reaches 35-50 m (20 m of basic electroplated copper layer + 0.5 m of chemical copper layer + 20 m of thickened electroplated copper layer = 40.5 m).
[0032] Optical inspection is performed after step S6 and before step S7. This inspection uses automated optical inspection (AOI) equipment or a microscope to check the copper thickness and pattern quality of the thickened area. The inspection includes: verifying that the thickness of the thickened electroplated copper layer meets design requirements using metallographic sections or X-ray fluorescence thickness gauges; checking for clear edges in the thickened area, and identifying any blurred edges or plating exceeding boundaries; and examining for plating voids or pinholes using a microscope at 100-200x magnification to observe surface quality. Step S7 is only performed after confirming that the copper thickness and pattern quality of the thickened area meet the requirements. Boards that do not meet the requirements are reworked (if the copper thickness is insufficient, additional plating can be done) or scrapped (if serious defects exist).
[0033] Step S7: Remove the protective layer of the second graphic transfer.
[0034] like Figure 7 As shown, after electroplating is completed and passes inspection, the entire second layer of dry film on the board surface is removed using an alkaline solution. The stripping is performed using a sodium hydroxide solution (3%-5% concentration) or a dedicated stripping solution, with the stripping temperature controlled between 40℃ and 60℃ (preferably 50℃ in this embodiment), and the stripping time is 5-10 minutes. The stripping process must ensure complete removal of the dry film, leaving no dry film fragments. After stripping, the board is thoroughly rinsed with deionized water to remove any alkaline residue. At this point, the board surface is as follows: the target area has a composite structure of a basic electroplated copper layer + a chemical copper layer + a thickened electroplated copper layer, with a copper thickness of 35μm-50μm; the non-target circuit area has a structure of a basic electroplated copper layer + a chemical copper layer, with a copper thickness of 15μm-26μm; and the exposed substrate area is only covered with a chemical copper layer.
[0035] Step S8: Perform micro-etching to remove the chemical copper layer that is not covered by the thickened electroplated copper layer.
[0036] like Figure 8As shown, the micro-etching process in step S8 uses a sulfuric acid-hydrogen peroxide etching solution. The sulfuric acid concentration of this etching solution is 5%-15%, preferably 10% in this embodiment, and the hydrogen peroxide concentration is 3%-8%, preferably 5% in this embodiment. The etching solution temperature is 25℃-35℃, preferably 30℃. The micro-etching process selectively removes the chemical copper layer not covered by the thickened electroplated copper layer through a mild chemical reaction. This etching solution has a faster etching rate for thin chemical copper layers and a slower etching rate for thicker base electroplated copper layers and thickened electroplated copper layers. The micro-etching depth is controlled within the range of 0.3m-1.0m, and the micro-etching time is determined according to the thickness of the chemical copper layer, usually 1-3 minutes, ensuring that the chemical copper layer is completely removed without significantly affecting the base electroplated copper layer and thickened electroplated copper layer. The thickness loss of the base electroplated copper layer and thickened electroplated copper layer is controlled within 1m. The micro-etching process requires confirmation of complete removal of the chemical copper layer by washing the board with water or visual inspection, and the exposed substrate area is restored to its insulating state. After micro-etching, thoroughly clean with deionized water and then dry. This completes the fabrication of PCBs with different copper thicknesses.
[0037] After completing the above steps, a differentiated copper thickness structure is formed on the PCB board: the signal line area maintains a basic copper thickness of 15μm-25μm to meet impedance control requirements; the copper thickness in target areas such as high-current pads and power paths reaches 35μm-50μm to meet current carrying capacity and mechanical strength requirements. This method is applicable to the manufacturing of high-density interconnect boards, communication boards, PCBs for radar products, automotive electronics PCBs, or server motherboards, achieving PCB structures with different copper thicknesses in different functional areas.
[0038] Example 2: The difference between this embodiment and Embodiment 1 lies in the use of different process parameters and board type. A CEM-3 core board is selected as the PCB substrate 1. The thickness of the basic electroplated copper layer is set to 15 μm, the thickness of the chemical copper layer is controlled at 0.8 μm, and the thickness of the thickened electroplated copper layer is increased by 30 μm, bringing the total copper thickness in the target area to approximately 46 μm. The electroplating process parameters are adjusted to: current density 3 A / dm³, electroplating solution temperature 20°C, and the electroplating time is correspondingly extended. This parameter combination is suitable for manufacturing high-power power boards or automotive electronic PCBs where higher copper thickness is required.
[0039] Example 3: The difference between this embodiment and Embodiment 1 lies in the distribution characteristics of the target areas to be thickened. In this embodiment, the target areas to be thickened include multiple dispersed pads located at different positions on the board surface, irregularly shaped ground layers, and power paths located in different electrical networks. These areas are difficult to connect with conductive lines in traditional negative selective electroplating processes. Using the method of this invention, through the full-board conductive path provided by the chemical copper layer, all target areas can be selectively electroplated and thickened simultaneously, without being limited by dispersed locations or complex shapes, fully demonstrating the technical advantage of this invention that it eliminates the need for conductive lines.
[0040] Example 4: This embodiment provides a method for locally increasing copper thickness in inner layer core boards. For inner layer core boards of multilayer PCBs, some areas require increased copper thickness for local reinforcement. Following steps S1 to S8, the inner layer core board with differentiated copper thickness is fabricated and then laminated with other layers to form a multilayer PCB structure. This application expands the scope of the invention, demonstrating that it is applicable not only to outer layer circuit fabrication but also to the local reinforcement needs of inner layer core boards.
[0041] This invention completely solves the technical problems of conductive lines occupying wiring space, limiting design flexibility, and increasing process complexity by depositing an electroless copper layer as a conductive layer across the entire board, replacing the temporary conductive line structure in traditional processes. The electroless copper layer is continuously distributed across the entire board surface, providing conductive paths for target areas of any location and shape, achieving truly unconstrained local copper thickness addition. The micro-etching process is simple and controllable, avoiding the risks of deep etching and surface scratches that occur in traditional processes, thus improving product yield and reliability.
[0042] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, including an element by a statement does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0043] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A method for fabricating a PCB with locally increased copper thickness without conductive lines, characterized in that, Includes the following steps: S1: Perform full-board electroplating on the PCB substrate with drilled holes to form a basic electroplated copper layer on the board surface and hole walls. S2: Perform the first pattern transfer on the basic electroplated copper layer to form the first circuit pattern protective layer; S3: Etch the board that forms the protective layer to remove the unprotected copper layer and form a fine circuit pattern, and then remove the protective layer; S4: Perform chemical copper plating on the etched board to deposit a chemical copper layer on the board surface, which covers the circuit surface and the substrate surface. S5: Perform a second pattern transfer on the chemical copper layer to expose the chemical copper layer in the target area where the copper thickness needs to be increased; S6: Selective electroplating is performed using the chemical copper layer as a conductive layer to form a thickened electroplated copper layer in the exposed target area. S7: Remove the protective layer for the second graphics transfer; S8: Perform micro-etching to remove the chemical copper layer that is not covered by the thickened electroplated copper layer.
2. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, In step S1, the process of electroplating the entire PCB substrate with drilled holes includes a copper plating process and a copper electroplating process. The copper plating process forms a conductive copper layer on the hole wall, and the copper electroplating process increases the thickness of the copper layer on the board surface and the hole wall simultaneously. The thickness of the basic electroplated copper layer is determined according to the copper thickness required in the lowest area of the product, and the thickness of the basic electroplated copper layer is 15 μm-25 μm.
3. The method for locally increasing copper thickness in a non-conductive PCB according to claim 1, characterized in that, The pattern transfer in steps S2 and S5 is achieved using lamination, exposure, and development processes. The first exposure film used in step S2 contains the final complete circuit pattern, which covers all lines, pads, and via structures. The second exposure film used in step S5 only contains the pattern of the target area where copper needs to be thickened. This target area includes at least one of high-current pads, power paths, ground planes, or connector pads. The lamination process uses dry film as the photoresist material. The exposure process uses ultraviolet light to cause a photochemical reaction in the dry film. The development process uses a developer to remove the dry film from unexposed or exposed areas.
4. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, The etching in step S3 uses an acid etching process. The acid etching solution includes a hydrochloric acid-hydrogen peroxide system or a sulfuric acid-hydrogen peroxide system. The etching process completely removes the base electroplated copper layer that is not protected by the dry film by controlling the concentration of the etching solution, temperature and etching time, forming a fine circuit pattern with precise linewidth control. After etching, the dry film protective layer is removed by an alkaline solution, which is a sodium hydroxide solution or a sodium carbonate solution, and the peeling temperature is controlled at 40℃-60℃.
5. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, The electroless copper plating process in step S4 includes pretreatment, catalytic activation, and redox reaction. The pretreatment includes degreasing and micro-etching steps. Catalytic activation forms a catalytic core on the board surface using a palladium salt solution. The redox reaction process causes copper ions to be reduced and deposited at the catalytic core to form an electroless copper layer. The thickness of the electroless copper layer is 0.3m-0.8m. This electroless copper layer is continuously distributed on the entire board surface, covering the top and side walls of the circuit and the exposed substrate surface. Moreover, this electroless copper layer is conductive and can provide a conductive path for subsequent electroplating processes.
6. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, Before step S4, the process includes pretreatment and drying of the etched board. The pretreatment includes cleaning and surface activation. Cleaning uses deionized water to rinse away residual etching solution and stripping solution. Surface activation uses an acidic solution to slightly roughen the copper surface to enhance the adhesion of the chemical copper layer. The drying step uses a hot air circulating oven or infrared drying equipment at a temperature of 80℃-120℃ for 10-30 minutes to ensure that the board surface is completely dry and free of moisture residue.
7. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, The selective electroplating in step S6 uses a copper sulfate electroplating solution system. During the electroplating process, the current is conducted to the exposed target area through a continuously distributed chemical copper layer. The electroplated copper is deposited only on the surface of the exposed chemical copper layer to form a thickened electroplated copper layer. The electroplating process parameters include: current density of 1-3A / dm, electroplating solution temperature of 20℃-30℃, and electroplating solution pH value of 0.5-2.0; by controlling the electroplating time, the thickness of the electroplated copper layer is increased, thereby increasing the copper thickness in the target area by 15m-30m, and the total copper thickness in the target area reaches 35m-50m.
8. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, Optical inspection is performed after step S6 and before step S7. The optical inspection uses an automatic optical inspection device or microscope to check the copper thickness and pattern quality of the thickened area. The inspection includes whether the thickness of the thickened electroplated copper layer meets the design requirements, whether the edge of the thickened area is clear, and whether there are electroplating voids or pinhole defects. Step S7 is performed only after the copper thickness and pattern quality of the thickened area are confirmed to meet the requirements. Boards that do not meet the requirements are reworked or scrapped.
9. The method for locally increasing copper thickness in a PCB without conductive lines according to claim 1, characterized in that, The micro-etching process in step S8 uses a sulfuric acid-hydrogen peroxide system etching solution with a sulfuric acid concentration of 5%-15%, a hydrogen peroxide concentration of 3%-8%, and an etching solution temperature of 25℃-35℃. The micro-etching process removes the chemical copper layer not covered by the thickened electroplated copper layer through a mild chemical reaction. The micro-etching depth is controlled within the range of 0.3m-1.0m, ensuring that the chemical copper layer is completely removed without significantly affecting the base electroplated copper layer and the thickened electroplated copper layer. The thickness loss of the base electroplated copper layer and the thickened electroplated copper layer is controlled within 1m.
10. The method for locally increasing copper thickness in a non-conductive PCB according to claim 1, characterized in that, The PCB substrate is one of FR-4 core board, CEM-3 core board or high-frequency board material. The thickness of the basic electroplated copper layer is 15m-25m, the thickness of the chemical copper layer is 0.3m-0.8m, and the thickness of the thickened electroplated copper layer is 15m-30m. After thickening, the total copper thickness of the target area reaches 35m-50m. This method is applicable to the manufacturing of high-density interconnect boards, communication boards, PCBs for radar products, automotive electronic PCBs or server motherboards, realizing PCB structures with different copper thicknesses in different functional areas.