Silicon-based gallium nitride heterojunction epitaxy method for high-frequency radio frequency devices

By using nanocone arrays and multilayer structure design in silicon-based gallium nitride heterojunction epitaxy, combined with low-temperature annealing and interface treatment, the stress and dislocation problems caused by lattice mismatch and thermal expansion are solved, improving the two-dimensional electron gas mobility, which is suitable for the manufacture of high-frequency and high-power radio frequency devices.

CN122395983APending Publication Date: 2026-07-14ZHONGKE (SHENZHEN) WIRELESS SEMICON CO LTD +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ZHONGKE (SHENZHEN) WIRELESS SEMICON CO LTD
Filing Date
2026-06-15
Publication Date
2026-07-14

AI Technical Summary

Technical Problem

Existing silicon-based gallium nitride heterojunction epitaxial technology suffers from problems such as high residual stress, high dislocation density, epitaxial layer cracking, and decreased two-dimensional electron gas mobility due to lattice mismatch and thermal expansion coefficient mismatch between GaN and Si substrate.

Method used

By employing a periodic nanocone array patterned high-resistivity silicon substrate, a low-temperature AlN nucleation layer, an AlGaN buffer layer with gradually varying Al composition, an AlN/GaN superlattice, a migration-enhanced epitaxial mode, and a three-segment Fe-doped AlGaN back barrier layer, combined with H2 atmosphere annealing and ozone passivation treatment, stress modulation and interface repair at low temperatures can be achieved.

Benefits of technology

It effectively reduces dislocation density, improves two-dimensional electron gas mobility, ensures epitaxial layer quality, is compatible with silicon-based CMOS processes, and is suitable for high-frequency, high-power radio frequency devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a silicon-based gallium nitride heterojunction epitaxy method for high-frequency radio frequency devices and relates to the technical field of semiconductor devices, which comprises the following steps: sequentially epitaxying a low-temperature AlN nucleation layer, an Al component gradually changed AlGaN buffer layer and an AlN / GaN superlattice strain regulation layer grown in a migration enhanced epitaxy mode on a patterned high-resistance silicon substrate with a periodic nano-taper array; after first annealing in an H2 atmosphere, growing a three-section Fe-doped AlGaN back barrier layer and performing first low-temperature ozone passivation; then sequentially epitaxying a GaN channel layer, an AlN interlayer, an AlGaN barrier layer and a GaN cap layer; and finally performing second rapid annealing in an N2 atmosphere. The application realizes a low-stress and low-dislocation-density GaN heterojunction under the condition of ≤1050 DEG C, obtains a high-mobility two-dimensional electron gas, and is suitable for large-scale production of high-frequency high-power devices.
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Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, specifically, it relates to a silicon-based gallium nitride heterojunction epitaxy method for high-frequency radio frequency devices. Background Technology

[0002] Gallium nitride (GaN)-based semiconductor materials have shown great application potential in high-frequency, high-power radio frequency (RF) devices due to their wide bandgap, high critical breakdown electric field, high saturated electron drift velocity, and excellent thermal stability. With the rapid development of technologies such as 5G communication, radar systems, and satellite communication, the demand for high-performance GaN RF devices is increasing. To achieve low-cost, large-size, and compatible integrated manufacturing with mainstream silicon-based CMOS processes, silicon substrates have become an important platform for GaN epitaxial growth. However, the approximately 17% lattice mismatch and up to 56% difference in thermal expansion coefficients between GaN and silicon easily lead to severe stress accumulation, high-density dislocation defects, and even epitaxial layer cracking during high-temperature epitaxy, severely restricting device performance and yield.

[0003] Traditional GaN-on-Si epitaxy often employs high-temperature growth processes above 1050℃. While this can improve atomic migration and crystal quality, it exacerbates thermal mismatch stress and induces nitride decomposition, Si-N interdiffusion, and parasitic reactions on the silicon substrate surface, introducing additional defects. Low-temperature epitaxy (≤1050℃), although alleviating thermal stress, is limited by insufficient atomic surface mobility, leading to uneven nucleation, rough interfaces, and increased dislocation density, making it difficult to form high-quality heterojunction structures. To address these challenges, existing technologies attempt to introduce patterned silicon substrates to provide lateral stress relief channels or use compositionally graded buffer layers to gradually transition the lattice constant. However, a single patterned structure has limited ability to control complex three-dimensional stress fields, making it difficult to simultaneously maintain stress uniformity in the center and edge regions. Conventional AlGaN buffer layers are prone to localized stress concentrations due to abrupt compositional changes, failing to effectively suppress through-dislocations. Furthermore, passivation of interface defects and dangling bonds typically relies on high-temperature treatment or strong chemical methods, which may not only disrupt the doping distribution but also make it difficult to simultaneously achieve defect repair and precise control of impurity concentration at low temperatures.

[0004] In recent years, migration-enhanced epitaxy (MEE), digital alloy buffer layers, and Fe-doped back barrier strategies have been used to improve crystal quality and electrical performance. However, these methods are often applied in isolation and lack synergistic design. For example, while MEE can improve atomic rearrangement efficiency through growth interruption, its defect repair effect is limited without accompanying annealing and interface treatment. Although Fe doping can achieve semi-insulating properties, uniform doping can easily lead to abrupt changes in the interface electric field, affecting the stability of the two-dimensional electron gas (2DEG). Conventional single-passive surface treatment cannot simultaneously optimize the interface of the channel layer and the barrier layer, and residual oxygen impurities or unsaturated dangling bonds will still scatter carriers, reducing mobility. Therefore, there is an urgent need for an integrated low-temperature epitaxy method that can simultaneously achieve low stress, low dislocation density, high mobility 2DEG, and high breakdown voltage at ≤1050℃ through multi-dimensional synergy of structural design, composition engineering, growth kinetics control, and fine interface treatment, thereby meeting the stringent requirements of high-frequency and high-power RF devices for material performance and process compatibility. Summary of the Invention

[0005] The purpose of this invention is to provide a silicon-based gallium nitride heterojunction epitaxial method for high-frequency radio frequency devices, which mainly solves the key problems in existing silicon-based gallium nitride (GaN) heterojunction epitaxial technology, such as high residual stress, high dislocation density, epitaxial layer cracking, and decreased mobility of two-dimensional electron gas (2DEG) caused by lattice mismatch and thermal expansion coefficient mismatch between GaN and Si substrate.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices includes the following steps:

[0008] S1 provides a patterned high-resistivity silicon substrate with a periodic nanocone array;

[0009] S2, a low-temperature AlN nucleation layer is grown on the patterned high-resistivity silicon substrate;

[0010] S3, an AlGaN buffer layer with a gradually changing Al composition is grown on the low-temperature AlN nucleation layer;

[0011] S4, a strain-controlled layer containing an AlN / GaN superlattice is grown on the AlGaN buffer layer to obtain the first structure;

[0012] S5, the first structure is subjected to a first annealing at 800-950°C in an atmosphere containing H2;

[0013] S6, an Fe-doped AlGaN back barrier layer with a specific concentration distribution is grown on the first structure after the first annealing, and the AlGaN back barrier layer is subjected to the first surface treatment; the top layer structure is grown on the passivated back barrier layer surface.

[0014] S7, the top layer structure is a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer grown sequentially at low temperature epitaxial growth.

[0015] S8. After growing the AlN insertion layer and before growing the AlGaN barrier layer, the AlN insertion layer undergoes a second surface treatment.

[0016] S9 is subjected to a second annealing at 800-950℃ in an N2 atmosphere.

[0017] Furthermore, in this invention, the growth temperature of the low-temperature AlN nucleation layer is 900-980℃, the thickness is 50-150nm, and the V / III ratio is 2000-4000.

[0018] Furthermore, in this invention, the AlGaN buffer layer is formed by alternating growth of an ultrathin GaN layer and an AlN layer with a thickness of 1-5 molecular layers, wherein the ratio of the number of periods of the AlN layer to the GaN layer is 0.2-1.5, and the equivalent Al composition of the AlGaN buffer layer linearly varies from 0.3 to 0.05.

[0019] Furthermore, in this invention, the AlN / GaN superlattice strain-controlled layer is grown using a migration-enhanced epitaxial mode. After growing each GaN or AlN sublayer, the source supply is interrupted for 5-30 seconds, while the temperature is maintained at 1020-1050℃.

[0020] Furthermore, in this invention, the Fe doping concentration in the AlGaN back barrier layer is increased from 1×10⁻⁶ near the superlattice layer. 17 cm -3 Gradually increase to 5×10 in the middle of the layer 17 cm -3 Then gradually reduce to 1×10 near the channel layer. 17 cm -3 .

[0021] Furthermore, in this invention, the first surface treatment includes: cooling the structure with the AlGaN back barrier layer grown to 400-600°C, and introducing 200-1000 ppm of O3 / O2 mixed gas into the reaction chamber for 1-5 minutes, controlling the oxygen impurity concentration to be 1×10⁻⁶. 16 -5×10 16 cm -3 .

[0022] Furthermore, in this invention, the growth temperatures of the GaN channel layer, AlN insertion layer, AlGaN barrier layer, and GaN cap layer are all controlled between 1000-1050°C.

[0023] Furthermore, in this invention, after the second surface treatment, an NH3 plasma treatment step is also included, with a treatment power of 50-100W, a time of 10-30s, and a pressure of 50-100mTorr.

[0024] Furthermore, in this invention, the height of the nanocone is 100-300 nm and the bottom diameter is 50-150 nm; the angle between the sidewall and the bottom surface of the nanocone array is 54.7°, and the height and bottom diameter of the nanocone both increase linearly from the center of the substrate to the edge.

[0025] Furthermore, in this invention, the conditions for the second annealing are as follows: in an N2 atmosphere, the temperature is raised to 800-950°C at a rate of 50-100°C / s, held for 30-90s, and then rapidly cooled at a rate of >200°C / s.

[0026] Compared with the prior art, the present invention has the following beneficial effects:

[0027] (1) This invention provides lateral stress relief channels through a gradient nanocone array, achieves continuous transition of lattice constant through a digital alloy AlGaN buffer layer, and regulates strain distribution through MEE mode superlattice. Combined with stress relaxation through H2 atmosphere annealing, this systematically solves the stress concentration problem caused by the 17% lattice mismatch and 56% thermal expansion coefficient difference between GaN and the silicon substrate. The measured dislocation density is as low as 2.5 × 10⁻⁶. 7 cm -2 Compared with the planar substrate solution, it reduces the surface stress by 25 times; the surface stress is ≤0.22GPa, which is reduced by 4 times, thus avoiding epitaxial layer cracking at the source and providing a high-quality crystal foundation for high-frequency devices.

[0028] (2) This invention employs a first low-temperature ozone passivation to repair the dangling bonds in the back barrier layer, followed by a second ozone passivation combined with NH3 plasma treatment to precisely control the oxygen impurity concentration at the AlN insertion layer interface. Simultaneously, a three-stage Fe gradient doping back barrier is used to avoid abrupt changes in the electric field. This results in a two-dimensional electron gas (2DEG) mobility of 2100 cm⁻¹. 2 / V·s, which is 22% higher than the single passivation scheme, effectively suppresses carrier scattering and provides a high mobility transport channel for high-frequency radio frequency signal transmission.

[0029] (3) The temperature of all epitaxial steps in this invention is controlled at ≤1050℃ to avoid the problems of SiO2 decomposition, Si-N interdiffusion and GaN decomposition on silicon substrate at high temperature; Fe doping back barrier can achieve resistivity >10 without additional high temperature activation.10 The semi-insulating property of Ω·cm makes it fully compatible with silicon-based CMOS processes. A 0.25μm gate length HEMT device fabricated based on this structure has a cutoff frequency (f... t The maximum oscillation frequency (f) reaches 152 GHz. max With a frequency of up to 231GHz and a breakdown voltage of 680V, ​​it can be directly applied to the mass production of high-frequency, high-power radio frequency devices in fields such as 5G communication and radar systems. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of a silicon-based gallium nitride heterojunction epitaxial structure for high-frequency radio frequency devices, fabricated using the method of this invention.

[0031] The names corresponding to the reference numerals in the attached figures are as follows:

[0032] 100: Silicon substrate; 101: Nanocone array; 200: AlN nucleation layer; 300: AlGaN buffer layer; 400: AlN / GaN superlattice; 410: H2 atmosphere annealing process; 500: Three-segment AlGaN back barrier layer; 501: First segment iron-doped AlGaN back barrier layer; 502: Second segment iron-doped AlGaN back barrier layer; 503: Third segment iron-doped AlGaN back barrier layer; 510: O3 treatment and NH3 plasma treatment interface; 600: Top layer structure; 601: GaN channel layer; 602: AlN insertion layer; 610: N2 annealing process; 603: AlGaN barrier layer; 604: GaN cap layer. Detailed Implementation

[0033] The present invention will be further described below with reference to the accompanying drawings and embodiments. The embodiments of the present invention include, but are not limited to, the following embodiments.

[0034] like Figure 1 The diagram shows a schematic of a silicon-based gallium nitride heterojunction epitaxial structure for high-frequency radio frequency devices. From bottom to top, the structure includes: a silicon substrate 100, a nanocone array 101, an AlN nucleation layer 200, an AlGaN buffer layer 300, an AlN / GaN superlattice 400, a three-segment AlGaN back barrier layer 500 (composed of a first segment of iron-doped AlGaN back barrier layer 501, a second segment of iron-doped AlGaN back barrier layer 502, and a third segment of iron-doped AlGaN back barrier layer 503), and a top layer structure 600 (including a GaN channel layer 601, an AlN insertion layer 602, an AlGaN barrier layer 603, and a GaN cap layer 604). Atmospheric annealing process 410 is applied to the first structure after the formation of AlN / GaN superlattice 400. Processing and Plasma treatment interface 510 is applied to the surface of the three-segment AlGaN back barrier layer 500 and the surface of the AlN insertion layer 602, respectively. Annealing process 610 is carried out after the top layer structure 600 has grown.

[0035] The fabrication method of the above structure is as follows: First, a patterned high-resistivity silicon substrate 100 with a periodic nanocone array 101 is provided. The height of the nanocone is 100–300 nm, the bottom diameter is 50–150 nm, the angle between the sidewall and the bottom surface is 54.7°, and the height and bottom diameter of the nanocone increase linearly from the center to the edge of the substrate. This structure is fabricated by photolithography and ICP etching processes, specifically including mask design, photoresist coating and development, and staged ICP etching. During the etching process, taking advantage of the slowest natural etching rate of the silicon crystal surface, the O2 flow rate is controlled in an SF6 / O2 / Ar mixed gas system to gradually transition the initial vertical etching to a 54.7° inclined sidewall; at the same time, by extending the etching time of the edge region, the nanocone size increases linearly from the center to the edge. The gradient nanocone array 101 increases the three-dimensional surface area of ​​the epitaxial interface, constructs a lateral stress release channel, and forms a radial stress gradient field, effectively dispersing the concentrated stress between GaN and Si substrate caused by lattice mismatch (approximately 17%) and thermal expansion coefficient mismatch (approximately 56%).

[0036] Subsequently, an AlN nucleation layer 200 was epitaxially grown on a patterned silicon substrate 100 using an MOCVD apparatus. Within a temperature window of 900–980 °C, TMAl was used as the aluminum source and NH3 as the nitrogen source. The V / III ratio (the ratio of the flow rates of group V elements to group III elements in the reaction source) was controlled at 2000–4000, resulting in an AlN nucleation layer 200 with a thickness of 50–150 nm. This low-temperature growth condition avoided SiO2 decomposition and Si-N interdiffusion on the silicon substrate surface at high temperatures (>1000 °C), reducing substrate damage. The high V / III ratio ensured a sufficient nitrogen source supply, suppressing island growth caused by excessively rapid Al atom migration and promoting the formation of a continuous and dense AlN layer. The 50–150 nm thickness balanced nucleation density and stress accumulation, ultimately yielding a high-quality nucleation layer with a surface roughness of less than 0.5 nm, providing a uniform lattice template for the subsequent AlGaN buffer layer 300.

[0037] Next, an AlGaN buffer layer 300 with a gradually varying Al composition was grown on the AlN nucleation layer 200 using digital alloy epitaxy. By alternately depositing ultrathin GaN and AlN sublayers of 1–5 molecular layers, the AlN / GaN period ratio was linearly reduced from 1.5 to 0.2, thereby achieving a continuous gradual change in the equivalent Al composition from 0.3 to 0.05. This design allows the lattice constant to gradually transition from 0.311 nm for AlN to 0.319 nm for GaN, avoiding stress concentration caused by abrupt compositional changes. Since each layer is only 1–5 molecular layers thick (approximately 0.25–1.25 nm), adjacent AlN and GaN layers undergo atomic-level mixing during growth, forming a "pseudo-continuous" alloy layer, significantly reducing delamination interface defects. The total thickness was controlled at 0.8–1.5 μm, ensuring sufficient stress buffering while avoiding excessive thickness that could lead to cracking.

[0038] Subsequently, an AlN / GaN superlattice 400 was grown on the AlGaN buffer layer 300 using migration-enhanced epitaxy (MEE). Specifically, after each AlN or GaN sublayer was grown (e.g., 2nm AlN + 4nm GaN constitutes one cycle), the source supply (excluding TMGa / TMAl and NH3) was interrupted for 5–30 seconds, while maintaining the growth temperature at 1020–1050℃ and the NH3 flow rate at 40–80 slm. This interruption process provides additional migration time for surface Ga / Al / N atoms, enabling them to fill vacancies, repair step flow defects, and promote the bending, intersection, and annihilation of penetrating dislocations, thereby improving crystal quality within a total thermal budget not exceeding 1050℃. Continuous NH3 supply maintains the surface nitrogen passivation state and prevents nitrogen vacancies from forming during the interruption.

[0039] After the superlattice growth is completed, step S5 is performed: the first structure containing AlN / GaN superlattice 400 is subjected to a first annealing treatment at 800–950℃ for 5–15 minutes in an H2 atmosphere (H2 volume percentage 20–28%, balance N2), i.e. Figure 1 The H2 atmosphere annealing process 410 is marked in the text. H2, as a reducing gas, can react with nitrogen vacancies (V_N) in the epitaxial layer to generate NHx species, effectively passivating such donor defects and reducing leakage current; the temperature of 800–950℃ is sufficient to activate finite atomic migration, promote the repair of lattice defects such as stacking faults, and at the same time promote the redistribution of internal stress in AlN / GaN superlattice 400, alleviating interlayer stress concentration, but below the GaN decomposition temperature (>1050℃), to avoid material decomposition.

[0040] After annealing, step S6 is performed: A three-segment Fe-doped AlGaN back barrier layer 500 is epitaxially grown on the annealed structure. This layer consists of a first segment of iron-doped AlGaN back barrier layer 501, a second segment of iron-doped AlGaN back barrier layer 502, and a third segment of iron-doped AlGaN back barrier layer 503, sequentially arranged. The Fe doping concentration exhibits a gradient distribution: from 1×10⁻⁶ near the AlN / GaN superlattice 400 side... 17 cm -3 The second iron-doped AlGaN back barrier layer 502, which gradually increases to 5 × 10⁻⁶ in the intermediate layer, is gradually increased to 5 × 10⁻⁶. 17 cm -3 Then gradually decrease to 1×10 near the 601 side of the subsequent GaN channel layer. 17 cm -3 This gradient design avoids interface defects caused by Fe concentration abrupt changes, while the high-concentration region in the middle forms a strong potential barrier, suppressing leakage current diffusion from the silicon substrate 100 to the two-dimensional electron gas (2DEG) channel. The Al composition is controlled at 0.05–0.10, and the thickness is 300–600 nm. The wide bandgap of AlGaN further enhances the back barrier effect, achieving a resistivity >10. 10 Its semi-insulating properties of Ω·cm allow it to meet device isolation requirements without the need for high-temperature activation.

[0041] Subsequently, the surface of the three-segment AlGaN back barrier layer 500 was subjected to the first surface treatment, namely low-temperature ozone passivation treatment. Figure 1 Part of the interface 510 for O3 treatment and NH3 plasma treatment. The structure is cooled to 400–600℃, and a mixed O3 / O2 gas (O3 content approximately 20%) is introduced at 200–1000 ppm for 1–5 minutes, controlling the oxygen impurity concentration to 1×10⁻⁶. 16 –5×10 16 cm -3 Ozone (O3) has strong oxidizing properties that can oxidize surface Al / Ga dangling bonds into a dense Al2O3 / Ga2O3 passivation film, reducing the interface state density; low-temperature treatment prevents Fe dopant atoms from diffusing and disrupting the three-stage concentration gradient; and precise control of oxygen concentration avoids excessive oxygen introducing donor defects that lead to a decrease in resistivity.

[0042] Following this, a top-layer structure 600 is sequentially grown at low temperature on the passivated three-segment AlGaN back barrier layer 500. This structure includes a GaN channel layer 601 (thickness 500–1000 nm), an AlN insertion layer 602 (thickness 0.5–2 nm), an AlGaN barrier layer 603 (Al composition 0.2–0.3, thickness 15–30 nm), and a GaN cap layer 604 (thickness 1–5 nm). The growth temperature of all layers is controlled at 1000–1050 °C. A high-concentration two-dimensional electron gas (2DEG) is formed between the GaN channel layer 601 and the AlGaN barrier layer 603 due to band shift. The ultrathin AlN insertion layer 602 enhances the 2DEG confinement capability and improves mobility. The GaN cap layer 604 protects the barrier layer from contamination by subsequent processes.

[0043] After the AlN insertion layer 602 is grown and before the AlGaN barrier layer 603 is grown, the surface of the AlN insertion layer 602 undergoes a second surface treatment, namely ozone passivation (conditions are the same as S7), followed by NH3 plasma treatment. Figure 1 The other part of the interface 510 for O3 treatment and NH3 plasma treatment. NH3 plasma treatment at 50–100 W power and 50–100 mTorr pressure for 10–30 seconds generates hydrogen radicals that neutralize excess oxygen ions (O2) remaining from the first ozone treatment. 2- To prevent oxygen impurities from diffusing into the GaN channel layer 601, thus maintaining the high mobility of the 2DEG, plasma power is controlled below 100W to avoid lattice damage caused by high-energy ion bombardment.

[0044] Finally, a second rapid annealing process is performed in an N2 atmosphere, i.e. Figure 1 The N2 annealing process, as indicated in the diagram, involves heating to 800–950°C at a rate of 50–100°C / s, holding at that temperature for 30–90 seconds, and then rapidly cooling to room temperature at a rate >200°C / s. Rapid heating shortens the dwell time at low temperatures, preventing Fe atoms from diffusing long distances along the concentration gradient and maintaining a three-segment doping distribution. Holding at 800–950°C activates the electrical activity of the Fe dopant, causing it to migrate from interstitial sites to Ga substitutional sites, where it can act as a deep-level acceptor. Rapid cooling "freezes" the repaired lattice structure, suppressing the formation of new defects and ensuring stable electrical performance.

[0045] Specifically, the following four examples and four comparative examples are provided to verify the above method.

[0046] Example 1

[0047] Nanocone parameters: height from 100nm at the center to 300nm at the edge; bottom diameter from 50nm to 150nm; period of 500nm;

[0048] Low-temperature AlN nucleation layer growth: A 100 nm AlN nucleation layer was grown at 950 °C using an MOCVD equipment with a TMAl flow rate of 30 sccm, an NH3 flow rate of 60 slm, a V / III ratio of 3000, and a growth pressure of 100 Torr.

[0049] Digital alloy AlGaN buffer layer growth: By alternating growth of 2 molecular layers of AlN and 3 molecular layers of GaN, and by gradually increasing the number of molecular layers of GaN, the AlN / GaN period ratio is linearly reduced from 1.5 to 0.2, and the Al composition is linearly gradually changed from 0.3 to 0.05. The total thickness is 1.2 μm, and the growth temperature is 1030℃.

[0050] MEE mode superlattice growth: 10 cycles of AlN / GaN superlattice growth, each cycle including 2nm AlN and 4nm GaN, the source supply is interrupted for 15s after each sublayer is grown, the NH3 flow rate is maintained at 50slm, and the growth temperature is 1030℃.

[0051] First annealing: Anneal at 900℃ for 10 min in an H2 atmosphere (72% nitrogen, 28% hydrogen, v / v) and a pressure of 500 Torr;

[0052] Fe-doped AlGaN back barrier layer growth: Al composition 0.07, thickness 450 nm, Fe doping concentration from 1×10 17 cm -3 Gradually increase to 5×10 in the middle layer 17 cm -3 Then gradually reduce to 1×10 17 cm -3 The first structure was obtained at a growth temperature of 1020℃.

[0053] First ozone passivation: The first structure was cooled to 500℃, and a 500ppm O3 / O2 mixed gas (O3 accounting for 20%) was introduced for 3 minutes, controlling the oxygen impurity concentration to 3×10. 16 cm -3 ;

[0054] A GaN channel layer and an AlN insertion layer are sequentially grown on the first structure after the first ozone passivation, wherein:

[0055] GaN channel layer: 800 nm thick, growth temperature 1030 °C;

[0056] AlN insertion layer: 1 nm thick, growth temperature 1040 °C;

[0057] Second ozone passivation and plasma treatment: ozone purification treatment of AlN insertion layer (conditions are the same as the first ozone passivation conditions), followed by introduction of NH3 plasma, power 80W, treatment for 20s, pressure 80mTorr;

[0058] An AlGaN barrier layer and a GaN cap layer are further grown on the surface of the plasma-treated AlN insertion layer, wherein:

[0059] AlGaN barrier layer: Al composition 0.25, thickness 20nm, growth temperature 1030℃;

[0060] GaN cap layer: 2nm thickness, growth temperature 1000℃;

[0061] Second annealing: Heat to 900℃ in N2 atmosphere at a rate of 80℃ / s, hold for 60s, and then cool to room temperature at a rate of 250℃ / s.

[0062] Example 2

[0063] The difference from Example 1 is that a 4-inch high-resistivity silicon substrate with a periodic nanocone array is selected. The height of the nanocones increases linearly from 100nm at the center to 200nm at the edge, the bottom diameter increases linearly from 50nm to 100nm, and the period is 400nm.

[0064] Low-temperature AlN nucleation layer growth: 50 nm AlN was grown at 900 °C using an MOCVD device with a V / III ratio of 2000, a TMAl flow rate of 20 sccm, an NH3 flow rate of 40 slm, and a growth pressure of 100 Torr.

[0065] Digital alloy AlGaN buffer layer: AlN with 1 molecular layer and GaN with 2 molecular layers are grown alternately. By gradually increasing the number of GaN molecular layers, the AlN / GaN period ratio is linearly reduced from 1.0 to 0.2, and the Al composition is linearly gradually changed from 0.3 to 0.05. The thickness is 0.8 μm and the growth temperature is 1020℃.

[0066] MEE superlattice growth: 10-cycle AlN / GaN superlattice, each cycle including 1nm AlN+3nm GaN, the source supply is interrupted for 5s after each sublayer is grown, the NH3 flow rate is maintained at 60slm, and the growth temperature is 1020℃.

[0067] First annealing: Anneal at 800℃ for 15 min in an H2 atmosphere (75% nitrogen, 25% hydrogen, v / v) and a pressure of 500 Torr;

[0068] Fe-doped AlGaN back barrier layer growth: Al composition 0.05, thickness 300 nm, Fe doping concentration from 1×10 17 cm-3 Gradually increase to 5×10 in the middle layer 17 cm -3 Then gradually reduce to 1×10 17 cm -3 The first structure was obtained at a growth temperature of 1010℃.

[0069] First ozone passivation: The first structure was cooled to 400℃, and 200ppm O3 / O2 (O3 accounting for 20%) was introduced for 5 minutes, while controlling the oxygen impurity concentration to 1×10. 16 cm -3 ;

[0070] A GaN channel layer and an AlN insertion layer are sequentially grown on the first structure after the first ozone passivation, wherein:

[0071] GaN channel layer: 500nm thickness, growth temperature 1000℃;

[0072] AlN insertion layer: thickness 0.5nm, growth temperature 1020℃;

[0073] Second ozone passivation and plasma treatment: ozone purification treatment of AlN insertion layer (conditions are the same as the first ozone passivation conditions), NH3 plasma is added, power is 50W, treatment is 30s, pressure is 50mTorr;

[0074] An AlGaN barrier layer and a GaN cap layer are further grown on the surface of the plasma-treated AlN insertion layer, wherein:

[0075] AlGaN barrier layer: Al content 0.2, thickness 15nm, growth temperature 1020℃;

[0076] GaN cap layer: 1nm thickness, growth temperature 980℃;

[0077] Second annealing: In a N2 atmosphere, heat to 800℃ at 50℃ / s, hold for 90s, and cool to room temperature at 200℃ / s.

[0078] Example 3

[0079] The difference from Example 1 is that an 8-inch high-resistivity silicon substrate with a periodic nanocone array is selected, the height of the nanocones increases linearly from 150nm at the center to 300nm at the edge, the bottom diameter increases linearly from 80nm to 150nm, and the period is 600nm.

[0080] Low-temperature AlN nucleation layer growth: 150 nm AlN was grown at 980 °C using an MOCVD equipment with a V / III ratio of 4000, a TMAl flow rate of 40 sccm, an NH3 flow rate of 80 slm, and a growth pressure of 100 Torr.

[0081] Digital alloy AlGaN buffer layer: AlN with 5 molecular layers and GaN with 3 molecular layers are grown alternately. By gradually increasing the number of GaN molecular layers, the AlN / GaN period ratio is linearly reduced from 1.5 to 0.5, and the Al composition is linearly changed from 0.3 to 0.05. The thickness is 1.5 μm and the growth temperature is 1050℃.

[0082] MEE superlattice growth: 15-cycle AlN / GaN superlattice, each cycle including 3nm AlN+5nm GaN, the source supply is interrupted for 30s after each sublayer is grown, the NH3 flow rate is maintained at 60slm, and the growth temperature is 1050℃.

[0083] First annealing: Anneal at 950°C for 5 min in an H2 atmosphere (80% nitrogen, 20% hydrogen, v / v) and a pressure of 500 Torr;

[0084] Fe-doped AlGaN back barrier layer growth: Al composition 0.10, thickness 600 nm, Fe doping concentration from 1×10 17 cm -3 Gradually increase to 5×10 in the middle layer 17 cm -3 Then gradually reduce to 1×10 17 cm -3 The first structure was obtained at a growth temperature of 1030℃.

[0085] First ozone passivation: The first structure is cooled to 600℃, and 1000ppm O3 / O2 (O3 accounting for 20%) is introduced for 1 minute, controlling the oxygen impurity concentration to 5×10. 16 cm -3 ;

[0086] A GaN channel layer and an AlN insertion layer are sequentially grown on the first structure after the first ozone passivation, wherein:

[0087] GaN channel layer: 1000nm thick, growth temperature 1050℃;

[0088] AlN insertion layer: 2nm thickness, growth temperature 1050℃;

[0089] Second ozone passivation and plasma treatment: ozone purification treatment of AlN insertion layer (conditions are the same as the first ozone passivation conditions), NH3 plasma is added, power is 100W, treatment is 10s, pressure is 100mTorr;

[0090] An AlGaN barrier layer and a GaN cap layer are further grown on the surface of the plasma-treated AlN insertion layer, wherein:

[0091] AlGaN barrier layer: Al content 0.3, thickness 30nm, growth temperature 1050℃;

[0092] GaN cap layer: 5nm thickness, growth temperature 1050℃;

[0093] Second annealing: Heat to 950℃ at 100℃ / s in N2 atmosphere, hold for 30s, and cool to room temperature at 300℃ / s.

[0094] Example 4

[0095] The difference from Example 1 is that a 6-inch high-resistivity silicon substrate with a periodic nanocone array is selected. The height of the nanocones increases linearly from 200nm at the center to 250nm at the edge, and the bottom diameter increases linearly from 100nm to 120nm with a period of 500nm.

[0096] Low-temperature AlN nucleation layer growth: 80 nm AlN was grown at 930 °C using an MOCVD device with a V / III ratio of 2500, a TMAl flow rate of 25 sccm, an NH3 flow rate of 50 slm, and a growth pressure of 100 Torr.

[0097] Digital alloy AlGaN buffer layer: AlN with 3 molecular layers and GaN with 4 molecular layers are grown alternately. By gradually increasing the number of GaN molecular layers, the AlN / GaN period ratio is linearly reduced from 0.8 to 0.3, and the Al composition is linearly gradually changed from 0.3 to 0.05. The thickness is 1.0 μm and the growth temperature is 1040℃.

[0098] MEE superlattice growth: 12-cycle AlN / GaN superlattice, each cycle including 2nm AlN+3nm GaN, the source supply is interrupted for 20s after each sublayer is grown, the NH3 flow rate is maintained at 60slm, and the growth temperature is 1040℃.

[0099] First annealing: Annealing at 850°C for 12 min in an H2 atmosphere (78% nitrogen, 22% hydrogen, v / v) at a pressure of 500 Torr;

[0100] Fe-doped AlGaN back barrier layer growth: Al composition 0.08, thickness 500 nm, Fe doping concentration from 1×10 17 cm -3 Gradually increase to 5×10 in the middle layer 17 cm -3 Then gradually reduce to 1×10 17 cm -3 The first structure was obtained at a growth temperature of 1025℃.

[0101] First ozone passivation: The first structure was cooled to 550℃, and 800ppm O3 / O2 (O3 accounting for 20%) was introduced for 2 minutes, controlling the oxygen impurity concentration to 4×10. 16 cm -3 ;

[0102] A GaN channel layer and an AlN insertion layer are sequentially grown on the first structure after the first ozone passivation, wherein:

[0103] GaN channel layer: 700nm thick, growth temperature 1040℃;

[0104] AlN insertion layer: 1.5 nm thick, growth temperature 1040 °C;

[0105] Second ozone passivation and plasma treatment: ozone purification treatment of AlN insertion layer (conditions are the same as the first ozone passivation conditions), NH3 plasma is added, power is 70W, treatment is 25s, pressure is 80mTorr;

[0106] An AlGaN barrier layer and a GaN cap layer are further grown on the surface of the plasma-treated AlN insertion layer, wherein:

[0107] AlGaN barrier layer: Al content 0.27, thickness 25nm, growth temperature 1040℃;

[0108] GaN cap layer: 3nm thickness, growth temperature 1020℃;

[0109] Second annealing: In a N2 atmosphere, the temperature is increased to 880℃ at 70℃ / s, held for 45s, and then cooled to room temperature at 280℃ / s.

[0110] Comparative Example 1

[0111] Compared with Example 1, the difference is that the substrate is a planar silicon substrate (without a periodic nanocone array), while the other steps and parameters are the same as in Example 1.

[0112] Comparative Example 2

[0113] Compared with Example 1, the difference is that the AlGaN buffer layer uses a conventional buffer layer (non-digital alloying technology, with the Al composition fixed at 0.2), while the other steps and parameters are the same as in Example 1.

[0114] Comparative Example 3

[0115] Compared with Example 1, the difference is that only a single ozone passivation is used (without a second passivation and plasma treatment), while the other steps and parameters are the same.

[0116] Comparative Example 4

[0117] Compared to Example 1, the difference lies in the uniform distribution of Fe doping (1×10⁻⁶). 17 cm -3 The other steps and parameters are the same.

[0118] The epitaxial materials and devices prepared in Examples 1-4 and Comparative Examples 1-4 were subjected to performance tests. The test methods and standards are as follows:

[0119] 1. Dislocation density: The full width at half maximum (FWHM) of the rocking curves of the (0002) and (10-12) crystal planes was measured using high-resolution X-ray diffraction (HRXRD), and the total dislocation density was calculated.

[0120] 2. Characteristics of two-dimensional electron gas (2DEG): The concentration and mobility of 2DEG were calculated by measuring the Hall effect at 300K with a magnetic field strength of 0.5T.

[0121] 3. Stress State: The peak position of the E2 (high) vibrational mode of GaN was measured using a micro-area Raman spectrometer. Based on the peak position shift (referencing the E2 peak position of stress-free GaN at 439 cm⁻¹), the results were determined. -1 Calculate the stress values ​​(blue shift indicates compressive stress, red shift indicates tensile stress);

[0122] 4. Surface roughness: 5×5μm was scanned using atomic force microscopy (AFM). 2 For the region, obtain the root mean square roughness (RMS).

[0123] 5. High-frequency performance of the device: A 0.25μm gate length HEMT device was fabricated, and the S-parameters were measured in the 1-40GHz frequency band using a vector network analyzer. The cutoff frequency (f) was calculated. t ) and maximum oscillation frequency (f max );

[0124] 6. Breakdown voltage: The breakdown voltage of the device is measured using a semiconductor parameter analyzer. The voltage at which the leakage current reaches 1mA / mm is defined as the breakdown voltage.

[0125] The test results are shown in the table below:

[0126] Table 1 Test Results

[0127]

[0128] Compared with Comparative Example 1 (without nanocones), Example 1 showed a 25-fold increase in dislocation density, a 30% decrease in electron mobility, a 4-fold increase in stress, and a significant deterioration in the device's high-frequency performance and breakdown voltage. This indicates that the gradient nanocone array effectively alleviates lattice mismatch and thermal mismatch stress by increasing the surface area and introducing lateral stress relief channels.

[0129] Comparative Example 1 and Comparative Example 2 (non-digital alloy buffer layer): dislocation density increased by 1.8 times, electron mobility decreased by 17%, f t The decrease was 19%. This indicates that digital alloying technology, through continuous and gradual changes in composition, achieves the gradual release of stress and reduces defects caused by stress concentration.

[0130] Comparative Example 1 and Comparative Example 3 (single passivation): Electron mobility decreased by 22%, f max The decrease was 27%. This indicates that dual passivation and plasma treatment effectively reduced interface defects and residual oxygen impurities, improved the interface quality of the heterojunction, and thus enhanced carrier transport characteristics.

[0131] Comparing Example 1 and Comparative Example 4 (uniform Fe doping): the breakdown voltage decreased by 23%, and the 2DEG concentration decreased by 18%. This demonstrates that the three-stage Fe doping effectively suppressed leakage current and optimized the 2DEG distribution by constructing a gradient electric field, thereby improving the device's breakdown voltage performance.

[0132] Example 4 exhibits the best performance, with the lowest dislocation density (2.5 × 10⁻⁶). 7 cm -2 ), with the highest electron mobility (2100 cm⁻¹). 2 / V·s), device f t Reaching 152GHz, f max It reaches 231 GHz and has a breakdown voltage of 680 V, thanks to the synergistic effect of optimized nanocone size gradient, MEE cycle design, and dual interface treatment.

[0133] The epitaxial structure prepared using the above complete process has a measured dislocation density as low as 2.5 × 10⁻⁶. 7 cm -2 2DEG mobility reaches 2100 cm⁻¹ 2 / V·s, surface stress ≤0.22GPa, surface roughness ≤0.32nm. A 0.25μm gate length HEMT device based on this structure has a cutoff frequency (f... t The maximum oscillation frequency (f) reaches 152 GHz. max The voltage reaches 231 GHz and has a breakdown voltage of 680 V, significantly outperforming comparative methods using planar substrates, fixed composition buffer layers, single interface treatment, or uniform Fe doping. All epitaxial steps in this invention are performed at temperatures ≤1050℃, avoiding silicon substrate damage and GaN decomposition caused by high temperatures. It is fully compatible with existing silicon-based CMOS processes and suitable for large-scale production of high-frequency, high-power RF devices.

[0134] The above embodiments are merely one of the preferred embodiments of the present invention and should not be used to limit the scope of protection of the present invention. Any modifications or refinements made to the main design concept and spirit of the present invention that are not of substantial significance, but solve the same technical problem as the present invention, should be included within the scope of protection of the present invention.

Claims

1. A method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices, characterized in that, Includes the following steps: S1 provides a patterned high-resistivity silicon substrate with a periodic nanocone array; S2, a low-temperature AlN nucleation layer is grown on the patterned high-resistivity silicon substrate; S3, an AlGaN buffer layer with a gradually changing Al composition is grown on the low-temperature AlN nucleation layer; S4, a strain-controlled layer containing an AlN / GaN superlattice is grown on the AlGaN buffer layer to obtain the first structure; S5, the first structure is subjected to a first annealing at 800-950°C in an atmosphere containing H2; S6, an Fe-doped AlGaN back barrier layer with a set concentration distribution characteristic is grown on the first structure after the first annealing, and the AlGaN back barrier layer is subjected to the first surface treatment; the top layer structure is grown on the passivated AlGaN back barrier layer surface. S7, the top layer structure is a GaN channel layer, an AlN insertion layer, an AlGaN barrier layer and a GaN cap layer grown sequentially at low temperature epitaxial growth. S8. After growing the AlN insertion layer and before growing the AlGaN barrier layer, the AlN insertion layer undergoes a second surface treatment. S9 is subjected to a second annealing at 800-950℃ in an N2 atmosphere.

2. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The growth temperature of the low-temperature AlN nucleation layer is 900-980℃, the thickness is 50-150nm, and the V / III ratio is 2000-4000.

3. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The AlGaN buffer layer is formed by alternating growth of ultrathin GaN and AlN layers with a thickness of 1-5 molecular layers, wherein the ratio of the number of AlN layers to the number of GaN layers is 0.2-1.5, and the equivalent Al composition of the AlGaN buffer layer linearly varies from 0.3 to 0.

05.

4. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The AlN / GaN superlattice strain-controlled layer is grown using a migration-enhanced epitaxial mode. After growing each GaN or AlN sublayer, the source supply is interrupted for 5-30 seconds while maintaining the temperature at 1020-1050℃.

5. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The Fe doping concentration in the AlGaN back barrier layer ranges from 1 × 10⁻⁶ near the superlattice layer. 17 cm -3 Gradually increase to 5×10 in the middle of the layer 17 cm -3 Then gradually reduce to 1×10 near the channel layer. 17 cm -3 .

6. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The first surface treatment includes: cooling the structure with the AlGaN back barrier layer grown to 400-600℃, and introducing 200-1000ppm of O3 / O2 mixed gas into the reaction chamber for 1-5 minutes, while controlling the oxygen impurity concentration to 1×10⁻⁶. 16 -5×10 16 cm -3 .

7. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The growth temperatures of the GaN channel layer, AlN insertion layer, AlGaN barrier layer, and GaN cap layer are all controlled between 1000-1050℃.

8. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, After the second surface treatment, an NH3 plasma treatment step is also included, with a treatment power of 50-100W, a time of 10-30s, and a pressure of 50-100mTorr.

9. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The height of the nanocone is 100-300 nm and the bottom diameter is 50-150 nm. The angle between the sidewall and the bottom surface of the nanocone array is 54.7°. From the center of the substrate to the edge, the height and bottom diameter of the nanocone both increase linearly.

10. The method for epitaxial growth of a silicon-based gallium nitride heterojunction for high-frequency radio frequency devices according to claim 1, characterized in that, The conditions for the second annealing are as follows: in an N2 atmosphere, the temperature is raised to 800-950℃ at a rate of 50-100℃ / s, held for 30-90s, and then rapidly cooled at a rate of >200℃ / s.