Vertically aligned biocl high-k dielectric, transistor device, method of preparation and applications

Abstract

The application discloses a vertical orientation BiOCl high-k medium, a transistor device, a preparation method and application, and the preparation method comprises the following steps: at least placing BiCl3 powder and a substrate in the same reaction space, taking the BiCl3 powder and oxygen as precursors, introducing inert carrier gas into the reaction space at a certain flow rate to perform reaction, controlling the vertical growth of the precursors on the substrate into BiOCl nanosheets, and obtaining the BiOCl high-k medium. The application adjusts the mass transfer behavior and local reaction environment in the reaction system by using the carrier gas flow rate, so that the growth orientation of the BiOCl nanosheet is induced to change, and the synergistic optimization of the structure morphology and interface characteristics of the two-dimensional high-k medium is realized. The preparation method has obvious advantages in process temperature and compatibility, and can be popularized to other layered dielectric material systems, and provides a new implementation path for constructing a low-power-consumption, high-stability two-dimensional electronic device and a three-dimensional integrated structure.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor chip technology, specifically relating to a vertically oriented BiOCl high-k dielectric, transistor device, fabrication method, and application. Background Technology

[0002] With the continuous development of integrated circuit technology, device dimensions are constantly approaching the sub-10 nanometer scale. The traditional path of improving performance by relying on geometric reduction is gradually being constrained by factors such as short-channel effects, increased power consumption, and thermal management. Against this backdrop, improving device performance increasingly depends on the synergistic optimization of material systems and interface engineering. Especially with the ever-increasing demands for gate control capabilities, the interface state between the gate dielectric and channel material has become a crucial factor determining the electrical behavior of devices. For next-generation low-power electronic devices, an ideal gate dielectric / channel interface should possess characteristics such as no dangling bonds, low defect density, and weak interactions to reduce interface scattering and stabilize carrier transport. However, in the actual device fabrication process, structural defects, impurity residues, or chemical bond perturbations easily introduced at the interface often lead to problems such as subthreshold characteristic degradation, threshold voltage drift, and enhanced leakage behavior, thus limiting further improvements in device performance. Therefore, achieving high-quality interface construction while maintaining the intrinsic quality of materials has become one of the key problems urgently needing to be solved in the field of micro-nano electronics.

[0003] Among numerous candidate material systems, two-dimensional materials with layered crystal structures are considered a crucial foundation for constructing novel electronic devices due to the absence of dangling bonds on their surfaces and their excellent electrical properties. In particular, the weak interactions between two-dimensional semiconductors and layered high-dielectric-constant insulators can achieve interfacial coupling, thus mitigating to some extent the complex interfacial chemical reactions encountered in traditional three-dimensional materials. Meanwhile, with the ever-increasing demand for large-area device integration, the controllable synthesis of high-quality two-dimensional materials has become a critical step. Among existing fabrication techniques, chemical vapor deposition (CVD) has become an important method for preparing high-quality two-dimensional materials due to its ability to achieve directional decomposition and recombination of precursors in a gas-phase environment, exhibiting good uniformity and scalability. Compared to mechanical exfoliation methods, which are difficult to scale up, and solution methods, which suffer from high defect densities, vapor phase growth technology offers significant advantages in crystal continuity, thickness controllability, and process compatibility, meeting the dual requirements of material quality and consistency in future integrated circuit manufacturing.

[0004] However, in actual vapor deposition processes, layered materials typically tend to extend laterally along the substrate surface. Their growth is primarily driven by reducing surface free energy, ultimately forming large-area, sheet-like structures. In this growth mode, strong interfacial contact forms between the material and the substrate, making it difficult to achieve non-destructive peeling or transfer in subsequent processes. This introduces additional interfacial contamination or structural damage during device integration. This strong interfacial coupling not only limits the flexible integration of materials between different substrates but also increases the difficulty of constructing high-quality heterostructures.

[0005] Therefore, how to control the orientation of two-dimensional materials while taking into account the interface quality has become an urgent problem to be solved. Summary of the Invention

[0006] The purpose of this invention is to provide a vertically oriented BiOCl high-k dielectric, a transistor device, a fabrication method, and an application. This invention solves the problems of difficult-to-control orientation and limited interface integration of two-dimensional high-k dielectrics in the prior art, realizes the controllable growth of high-quality dielectric materials, and fabricates high-performance, low-power transistor devices based on this dielectric.

[0007] To achieve the above objectives, a specific embodiment of the present invention provides the following technical solution:

[0008] A method for preparing a vertically oriented BiOCl high-k dielectric, the method comprising the following steps:

[0009] BiCl3 powder and substrate are placed in the same reaction space. BiCl3 powder and oxygen are used as precursors. Inert carrier gas is introduced into the reaction space at a certain flow rate to carry out the reaction. The precursor is controlled to grow vertically on the substrate into BiOCl nanosheets to obtain BiOCl high-k medium.

[0010] In one or more embodiments of the present invention, the flow rate of the carrier gas is 50 sccm-110 sccm, and the growth time is 10 min-20 min.

[0011] In one or more embodiments of the present invention, the reaction temperature is 450°C-500°C.

[0012] In one or more embodiments of the present invention, the morphology of the BiOCl nanosheets on the substrate includes vertical structures oriented perpendicularly to the substrate surface and transverse structures oriented in-plane to the substrate surface, wherein the number of vertical structures accounts for 2%-92%.

[0013] In one or more embodiments of the present invention, the carrier gas is one of argon, an argon / hydrogen mixture; and / or,

[0014] The substrate is mica.

[0015] Another specific embodiment of the present invention provides the following technical solution:

[0016] A vertically oriented BiOCl high-k dielectric is prepared by the above-described preparation method.

[0017] Another specific embodiment of the present invention provides the following technical solution:

[0018] Application of a vertically oriented BiOCl high-k dielectric in transistor devices.

[0019] Another specific embodiment of the present invention provides the following technical solution:

[0020] A method for fabricating a transistor device, the method comprising the following steps:

[0021] Provides a substrate and support for growing BiOCl nanosheets;

[0022] The substrate and the support are brought into contact, and BiOCl nanosheets on the surface of the substrate are picked up, so that the BiOCl nanosheets are transferred to the support.

[0023] The support carrying BiOCl nanosheets was brought into contact with the surface of a channeled substrate and held under a pressure of 0.1 MPa-0.3 MPa for 1 min-2 min. The support was then removed to obtain a substrate with a gate dielectric loaded on its surface.

[0024] The substrate with the gate dielectric loaded on its surface is photolithographically etched, and then the adhesion layer and the top gate electrode are prepared sequentially. The top gate structure is then peeled off from the substrate.

[0025] In one or more embodiments of the present invention, the carrier material is PDMS; and / or,

[0026] The substrate is a Si / SiO2 substrate; and / or,

[0027] The channel material is MoS2; and / or,

[0028] The adhesive layer is made of chromium, and the top gate electrode is made of gold; and / or,

[0029] When the carrier is removed, it is removed at a speed of 0.5 mm / s to 0.2 mm / s.

[0030] Another specific embodiment of the present invention provides the following technical solution:

[0031] A transistor device is prepared by the above-described preparation method.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] 1. This invention achieves a controllable transition of BiOCl from in-plane growth to vertical orientation growth by regulating the carrier gas flow rate during CVD growth. This effectively reduces the contact area and interfacial bonding force between the material and the substrate, thereby significantly improving the material's transferability. This method can obtain structurally complete and uniformly oriented single-crystal nanosheet arrays, avoiding the interfacial contamination and integration difficulties caused by traditional in-plane growth, and providing important conditions for constructing clean van der Waals interfaces.

[0034] 2. Gate dielectrics constructed based on vertically grown BiOCl exhibit superior performance in transistor devices, including low leakage current, high on / off ratio, and subthreshold swing approaching the theoretical limit. Simultaneously, device hysteresis is significantly reduced, effectively improving stability and reliability. This method combines lower process temperatures with good compatibility and can be extended to two-dimensional high-k dielectric systems, showing promising application prospects in low-power electronic devices and integrated circuits. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of CVD growth of a two-dimensional BiOCl gate dielectric in one embodiment of the present invention;

[0037] Figure 2 This is a scanning electron microscope image of the vertically oriented BiOCl high-k medium in Embodiment 2 of the present invention;

[0038] Figure 3 This is an optical photograph of the vertically oriented BiOCl high-k medium in Embodiment 3 of the present invention;

[0039] Figure 4 The percentages of vertically grown and in-plane grown BiOCl under different carrier gas flow rates in Examples 1-4 of this invention;

[0040] Figure 5 This is a schematic diagram of the dry transfer process of vertically oriented BiOCl high-k dielectric in this invention;

[0041] Figure 6 This is a schematic diagram of a transistor device on a silicon / silicon dioxide substrate in Embodiment 5 of the present invention;

[0042] Figure 7 This is a transfer curve performance diagram of the transistor device in Embodiment 5 of the present invention;

[0043] Figure 8 This is a graph showing the output characteristics of the transistor device in Embodiment 5 of the present invention. Detailed Implementation

[0044] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure are described clearly and completely below. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0045] To address the challenges posed by the lateral growth of layered materials along the substrate surface during vapor deposition, controlling the material orientation during the growth stage to align it vertically can significantly reduce the contact area between the material and the substrate, thereby lowering the interfacial bonding strength and providing favorable conditions for subsequent transfer and integration. Furthermore, due to the inherent anisotropy of layered materials, they can maintain crystal structure integrity even in a vertically oriented state, laying the foundation for constructing device structures with excellent interface quality. Therefore, how to control the kinetic conditions during growth to achieve the transformation of two-dimensional materials from lateral expansion to vertical alignment has become an important research direction in the controllable fabrication and interface engineering of two-dimensional materials.

[0046] Based on the aforementioned needs, regulating reactant transport, surface diffusion, and nucleation behavior during vapor-phase growth has gradually become an effective approach to achieve structural control. By altering key parameters in the reaction environment, such as carrier gas flow rate, reactant concentration, and local supersaturation, the crystal growth path can be influenced to some extent, thereby controlling different morphologies. However, existing research largely focuses on controlling material size and layer number, lacking systematic research on the intrinsic relationship between growth orientation and interface integration. Especially in high-k (high dielectric constant) two-dimensional dielectric material systems, there is still significant room for improvement in achieving synergistic optimization of structural orientation and device integration while ensuring the material's electrical properties. Therefore, it is necessary to develop a fabrication method that can regulate the orientation of two-dimensional materials during vapor-phase growth while also considering interface quality, to meet the demands of novel electronic devices for high performance and high reliability.

[0047] Based on this, this invention utilizes a CVD method with kinetic growth control to achieve controllable fabrication of vertically oriented BiOCl high-k gate dielectrics. It achieves synergistic optimization of the morphology and interface properties of two-dimensional high-k dielectric structures, solving the problems of difficult material transfer and uncontrollable interface defects in traditional systems. By adjusting the carrier gas flow rate, the growth pattern shifts from in-plane to vertical, reducing interfacial bonding forces and achieving clean transfer and high-quality van der Waals interface construction. This method can be used to fabricate low-power, high-performance transistor devices. Furthermore, the method in this invention has significant advantages in terms of process temperature and compatibility, and can be extended to other layered dielectric material systems, providing a new path for constructing low-power, high-stability two-dimensional electronic devices and three-dimensional integrated structures.

[0048] A specific embodiment of the present invention provides a method for preparing a vertically oriented BiOCl high-k dielectric, which specifically includes the following steps:

[0049] Step 1: Prepare raw materials.

[0050] Specifically, such as Figure 1 As shown, take a quartz tube, place BiCl3 (bismuth chloride) powder at the bottom or middle of the quartz tube, and place the mica substrate at the opening of the quartz tube.

[0051] Step 2, the reaction proceeds.

[0052] Specifically, using a single-temperature zone tube furnace system with BiCl3 and oxygen (O2) as precursors, the quartz tube from step 1 is placed in a CVD (chemical vapor deposition) tube furnace with the tube opening facing the furnace vent, and the BiCl3 powder in the quartz tube located in the center of the furnace. At the same time, 1-10 grains of diluted silica gel are placed at the furnace vent to stably supply water vapor.

[0053] Argon or an argon / hydrogen mixture is first introduced into the tubular furnace to remove excess moisture. Then, an inert carrier gas (argon or an argon / hydrogen mixture) is introduced to regulate the reaction kinetics. By precisely controlling the reaction temperature, carrier gas flow rate, and growth time, different forms of BiOCl (bismuth oxychloride) can be grown. The reaction temperature is 450℃-500℃, the carrier gas flow rate is 50sccm-110sccm, and the growth time is 10min-20min.

[0054] In this step, the growth process is controlled by adjusting the carrier gas flow rate. Specifically, under low flow rate conditions, the system tends to minimize energy and the crystals extend along the substrate surface; while at higher flow rates, the enhanced supply of reactants leads to an increase in local supersaturation, causing the crystals to preferentially grow in the edge direction and extend rapidly along the normal direction, ultimately forming a dense array of vertically oriented nanosheets.

[0055] The morphology of the BiOCl nanosheets obtained in this step includes vertical structures oriented perpendicularly to the substrate surface and transverse structures oriented in-plane along the substrate surface, with the vertical structures accounting for 2%-92% of the total.

[0056] Another specific embodiment of the present invention provides a vertically oriented BiOCl high-k dielectric, which is prepared by the above preparation method.

[0057] Another specific embodiment of the present invention provides an application of a vertically oriented BiOCl high-k dielectric in a transistor device.

[0058] Another specific embodiment of the present invention provides a method for fabricating a transistor device, which specifically includes the following steps:

[0059] Step 1: Prepare a vertically oriented BiOCl high-k dielectric.

[0060] Specifically, a vertically oriented BiOCl high-k dielectric was prepared using the above preparation method.

[0061] Step 2: Transfer BiOCl dielectric material.

[0062] Specifically, a PDMS (polydimethylsiloxane) elastomer with a thickness of 1-2 mm was used as the transfer carrier. The carrier was fixed on a micromanipulation platform, and a mica substrate with vertically oriented BiOCl nanosheets was aligned and brought into contact with the carrier. Through adhesion to the surface of the PDMS elastomer, the BiOCl nanosheets could be completely picked up from the surface of the mica substrate. Due to the small contact area between the vertically grown structure and the substrate and the weak interfacial bonding force, the BiOCl nanosheets could be completely exfoliated without introducing solvent or polymer residues.

[0063] A two-dimensional MoS2 channel material was obtained from a Si / SiO2 substrate by mechanical exfoliation. The two-dimensional MoS2 channel material was then transferred to the substrate surface using a micromanipulation platform to form a channel region.

[0064] A dry transfer process was employed, in which a carrier supporting BiOCl nanosheets was precisely aligned with the channel region on the substrate surface under microscope assistance, and the carrier was slowly lowered to bring the BiOCl nanosheets into contact with the substrate surface. Subsequently, a pressure of 0.1 MPa–0.3 MPa was applied and maintained for 1–2 minutes to enhance the interfacial adhesion between the BiOCl nanosheets and the substrate, allowing a stable heterojunction structure to form between the BiOCl nanosheets and the channel through van der Waals interactions, resulting in a substrate with a gate dielectric loaded on its surface. Finally, the carrier was slowly peeled off at a low speed of 0.5 mm / s–2 mm / s, ensuring the complete transfer of the BiOCl nanosheets to the substrate surface. The entire process requires no liquid medium or chemical solvent, effectively avoiding interfacial contamination and residue problems, thus facilitating the acquisition of a clean, low-defect pristine van der Waals interface structure.

[0065] For substrates with gate dielectrics on their surface, electron beam lithography is used to define the pattern according to actual requirements. Then, a 5nm thick chromium (Cr) layer and a 75nm thick gold (Au) layer are sequentially deposited as the top gate electrode using an evaporation process. Specifically, the evaporation process involves evaporating the metal target material by resistance heating under a high vacuum environment (4×10⁻⁶). -4 A dense and well-adhesive metal film is obtained by uniformly depositing metal onto the sample surface using a method called (Pa), with the evaporation deposition rate controlled below 0.25 Å / s. The metal-deposited sample is then immersed in acetone solution for 30 min and sonicated for 10 seconds to remove excess photoresist and metal. Next, the sample is immersed in isopropanol solution for 30 seconds to remove residual acetone and then dried with a nitrogen gun to obtain a complete top-gate structure.

[0066] This invention utilizes a vertically oriented BiOCl high-k dielectric to construct a BiOCl / MoS2 field-effect transistor. The vertical orientation significantly reduces the contact interaction between the material and the substrate, enabling complete transfer via a dry process. Furthermore, it forms a chemically bond-free interface structure on the MoS2 surface, effectively reducing the interface state density and carrier scattering effects. Electrical tests demonstrate that the top-gate field-effect transistor based on the vertically oriented BiOCl high-k dielectric exhibits stable performance within the -1V to 1V operating range, with an on / off ratio exceeding 10. 8 The subthreshold swing reaches a minimum of 63.4 mV / dec, while the device hysteresis is controlled within 1 mV, demonstrating excellent interface quality and electrical control capability.

[0067] The present invention will be further described in detail below with reference to specific embodiments.

[0068] Unless otherwise specified, the BiCl3, gold, chromium, acetone, isopropanol, mica, silicon wafers, etc. used in this invention are all known to those skilled in the art and can be obtained commercially. High-resolution SEM images of the CVD-grown BiOCl samples of this invention were captured using a Hitachi S4800 scanning electron microscope. Optical images of the devices were acquired using an RX50M microscope. All electrical measurements were performed at 10... −3 The parameters were analyzed using a Keithley 4200A-SCS semiconductor parameter analyzer under vacuum conditions.

[0069] Example 1

[0070] The preparation method of the vertically oriented BiOCl high-k dielectric in this embodiment is as follows:

[0071] Take a 10mL single-opening quartz test tube with an outer diameter of 15mm×105mm. Place 80mg of BiCl3 powder at the bottom of the quartz test tube and place two pieces of freshly cleaved fluorinated mica, each 1cm×1cm in size, at the mouth of the quartz test tube.

[0072] Using a single-zone tube furnace system with BiCl3 and oxygen as precursors, a quartz test tube is placed in the CVD tube furnace with the tube opening facing the CVD tube furnace vent. The BiCl3 powder in the quartz test tube is located in the middle of the CVD tube furnace, and five grains of diluted silica gel are placed at the CVD tube furnace vent to stably provide water vapor.

[0073] Before the reaction began, an argon / hydrogen mixture was introduced into the CVD tube furnace. The volume ratio of argon to hydrogen in the mixture was 95%:5%, the flow rate was 300 sccm, and the introduction time was 10 min. Subsequently, the reaction was carried out under an argon / hydrogen carrier gas atmosphere (argon to hydrogen volume ratio of 95%:5%) at a reaction temperature of 500 °C and a carrier gas flow rate of 50 sccm. BiOCl nanosheets were grown on a mica substrate for 20 min.

[0074] Example 2

[0075] The preparation method of the vertically oriented BiOCl high-k dielectric in this embodiment is as follows:

[0076] Take a 10mL single-opening quartz test tube with an outer diameter of 15mm×105mm. Place 80mg of BiCl3 powder at the bottom of the quartz test tube and place two pieces of freshly cleaved fluorinated mica, each 1cm×1cm in size, at the mouth of the quartz test tube.

[0077] Using a single-zone tube furnace system with BiCl3 and oxygen as precursors, a quartz test tube is placed in the CVD tube furnace with the tube opening facing the CVD tube furnace vent. The BiCl3 powder in the quartz test tube is located in the middle of the CVD tube furnace, and five grains of diluted silica gel are placed at the CVD tube furnace vent to stably provide water vapor.

[0078] Before the reaction began, an argon / hydrogen mixture was introduced into the CVD tube furnace. The volume ratio of argon to hydrogen in the argon / hydrogen mixture was 95%:5%, the flow rate was 300 sccm, and the introduction time was 10 min. Subsequently, the reaction was carried out in an atmosphere of argon / hydrogen carrier gas (argon to hydrogen volume ratio of 95%:5%) at a reaction temperature of 500℃ and a carrier gas flow rate of 70 sccm. BiOCl nanosheets were grown on a mica substrate for 20 min.

[0079] Example 3

[0080] The preparation method of the vertically oriented BiOCl high-k dielectric in this embodiment is as follows:

[0081] Take a 10mL single-opening quartz test tube with an outer diameter of 15mm×105mm. Place 80mg of BiCl3 powder at the bottom of the quartz test tube and place two pieces of freshly cleaved fluorinated mica, each 1cm×1cm in size, at the mouth of the quartz test tube.

[0082] Using a single-zone tube furnace system with BiCl3 and oxygen as precursors, a quartz test tube is placed in the CVD tube furnace with the tube opening facing the CVD tube furnace vent. The BiCl3 powder in the quartz test tube is located in the middle of the CVD tube furnace, and five grains of diluted silica gel are placed at the CVD tube furnace vent to stably provide water vapor.

[0083] Before the reaction began, an argon / hydrogen mixture was introduced into the CVD tube furnace. The volume ratio of argon to hydrogen in the argon / hydrogen mixture was 95%:5%, the flow rate was 300 sccm, and the introduction time was 10 min. Subsequently, the reaction was carried out in an atmosphere of argon / hydrogen carrier gas (argon to hydrogen volume ratio of 95%:5%) at a reaction temperature of 500 °C and a carrier gas flow rate of 90 sccm. BiOCl nanosheets were grown on a mica substrate for 20 min.

[0084] Example 4

[0085] The preparation method of the vertically oriented BiOCl high-k dielectric in this embodiment is as follows:

[0086] Take a 10mL single-opening quartz test tube with an outer diameter of 15mm×105mm. Place 80mg of BiCl3 powder at the bottom of the quartz test tube and place two pieces of freshly cleaved fluorinated mica, each 1cm×1cm in size, at the mouth of the quartz test tube.

[0087] Using a single-zone tube furnace system with BiCl3 and oxygen as precursors, a quartz test tube is placed in the CVD tube furnace with the tube opening facing the CVD tube furnace vent. The BiCl3 powder in the quartz test tube is located in the middle of the CVD tube furnace, and five grains of diluted silica gel are placed at the CVD tube furnace vent to stably provide water vapor.

[0088] Before the reaction began, an argon / hydrogen mixture was introduced into the CVD tube furnace. The volume ratio of argon to hydrogen in the argon / hydrogen mixture was 95%:5%, the flow rate was 300 sccm, and the introduction time was 10 min. Subsequently, the reaction was carried out in an atmosphere of argon / hydrogen carrier gas (argon to hydrogen volume ratio of 95%:5%) at a reaction temperature of 500 °C and a carrier gas flow rate of 110 sccm. BiOCl nanosheets were grown on a mica substrate for 20 min.

[0089] For the vertically oriented BiOCl high-k media prepared in Examples 1-4, Raman spectroscopy was used (characteristic peak located at 145 cm⁻¹). -1 The single-crystal structure was confirmed by X-ray diffraction ((001) crystal plane diffraction peak). Preliminary observations of BiOCl films grown under different carrier gas flow rates were conducted using an optical microscope, recording their morphological characteristics and orientation differences. Scanning electron microscope images of the vertically oriented BiOCl high-k dielectric in Example 2 are shown below. Figure 2 As shown, the optical photograph of the vertically oriented BiOCl high-k medium in Example 3 is as follows. Figure 3 As shown.

[0090] Furthermore, the samples were further characterized using scanning electron microscopy (SEM). By statistically analyzing the distribution ratio of vertically oriented and in-plane oriented BiOCl nanosheets in different regions, the regulatory effect of carrier gas flow rate on the growth mode transition was quantitatively evaluated. Figure 4 As shown, the proportion of BiOCl nanosheets grown vertically and in-plane will be affected under different carrier gas flow rates. When the carrier gas flow rate is gradually increased from 50 sccm to 110 sccm, the BiOCl crystal gradually changes from a lateral growth mode driven by surface diffusion to a vertical stacking mode characterized by rapid nucleation and local deposition. The proportion of vertical structures increases significantly from about 2% to about 92%.

[0091] In addition, the dielectric properties of the obtained BiOCl films were evaluated: capacitance-voltage (CV) tests were performed using a 4284A capacitance meter, and the dielectric constant was calculated based on the measured capacitance. The results show that the dielectric constant of the BiOCl films in Examples 1-4 all reached 40, exhibiting excellent high-k characteristics.

[0092] Example 5

[0093] The method for fabricating the transistor device in this embodiment is as follows:

[0094] A 1 mm thick PDMS elastomer was used as the transfer carrier, and the carrier was fixed on the rigid support substrate of the micromanipulation platform.

[0095] The mica substrate with BiOCl nanosheets grown in Example 3 was used. Under the assistance of a microscope, the mica substrate and the carrier were precisely aligned and contacted for 10 seconds. The BiOCl nanosheets were picked up from the surface of the mica substrate by the adhesion of PDMS elastomer.

[0096] A 4-inch Si / SiO2 substrate was used, with a SiO2 oxide layer thickness of 300 nm. Two-dimensional MoS2 channel material was obtained by mechanical exfoliation. The MoS2 channel material was then transferred to the substrate surface using a micromanipulation platform to form a channel region with a length of 7 μm, a width of 4.5 μm, and a thickness of 6.5 nm.

[0097] like Figure 5 As shown, a dry transfer process was employed. Under microscope assistance, the carrier supporting BiOCl nanosheets was precisely aligned with the substrate and adhered to the channel region on the substrate surface. Subsequently, a pressure of 0.2 MPa was applied and held for 1 min. Finally, the carrier was slowly peeled off at a speed of 1 mm / s, allowing the BiOCl nanosheets to be completely transferred to the substrate surface. The total thickness of the BiOCl nanosheets on the substrate surface was 23 nm, thus completing the gate dielectric transfer.

[0098] After the gate dielectric transfer is completed, electron beam lithography is used to define the pattern. A 5nm chromium layer and a 75nm gold layer are deposited sequentially as the top gate electrode using a vapor deposition process. A lift-off process is then performed to obtain the complete top gate structure: the sample with the metal deposited is immersed in acetone solution for 30 minutes and sonicated for 10 seconds to remove excess photoresist and metal. The sample is then immersed in isopropanol solution for 30 seconds to remove residual acetone solution and dried with a nitrogen gun.

[0099] A schematic diagram of the transistor device fabricated on the silicon / silicon dioxide substrate in this embodiment is shown below. Figure 6 As shown.

[0100] In this embodiment, field-effect transistors (FETs) with BiOCl as the dielectric layer, Cr / Au as the electrode material, and molybdenum disulfide (MoS2) as the channel were fabricated. The electrical performance of the devices was tested using a semiconductor parameter analysis system. Under a drain-source voltage (Vds) of 100mV, their transfer characteristic curves and output characteristic curves were measured to evaluate key parameters such as the device's on / off ratio, subthreshold swing, and stability. Figure 7 and Figure 8As shown, the results indicate that the device exhibits typical n-type characteristics, with a channel current on / off ratio as high as 1.0 × 10⁻⁶. 8 Gate leakage current as low as 10 -14 Grade A, with subthreshold swing close to the room temperature limit (63.4mV / dec) and device hysteresis controlled within 1mV, demonstrating excellent interface quality and electrical controllability.

[0101] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from the spirit or essential characteristics of this disclosure. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this disclosure.

[0102] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for preparing a vertically oriented BiOCl high-k dielectric, characterized in that, The preparation method includes the following steps: BiCl3 powder and substrate are placed in the same reaction space. BiCl3 powder and oxygen are used as precursors. Inert carrier gas is introduced into the reaction space at a certain flow rate to carry out the reaction. The precursor is controlled to grow vertically on the substrate into BiOCl nanosheets to obtain BiOCl high-k medium.

2. The method for preparing a vertically oriented BiOCl high-k dielectric according to claim 1, characterized in that, The carrier gas flow rate is 50 sccm-110 sccm, and the growth time is 10 min-20 min.

3. The method for preparing a vertically oriented BiOCl high-k dielectric according to claim 1, characterized in that, The reaction temperature is 450℃-500℃.

4. The method for preparing a vertically oriented BiOCl high-k dielectric according to claim 1, characterized in that, The morphology of the BiOCl nanosheets on the substrate includes vertical structures oriented perpendicularly to the substrate surface and transverse structures oriented in-plane along the substrate surface, wherein the number of vertical structures accounts for 2%-92%.

5. The method for preparing a vertically oriented BiOCl high-k dielectric according to claim 1, characterized in that, The carrier gas is one of argon, argon / hydrogen mixture; and / or, The substrate is mica.

6. A vertically oriented BiOCl high-k dielectric, characterized in that, It is prepared by the preparation method according to any one of claims 1-5.

7. The application of the vertically oriented BiOCl high-k dielectric of claim 6 in a transistor device.

8. A method for fabricating a transistor device, characterized in that, The preparation method includes the following steps: Provides a substrate and support for growing BiOCl nanosheets as prepared in claim 1; The substrate and the support are brought into contact, and BiOCl nanosheets on the surface of the substrate are picked up, so that the BiOCl nanosheets are transferred to the support. The support carrying BiOCl nanosheets was brought into contact with the surface of a channeled substrate and held under a pressure of 0.1 MPa-0.3 MPa for 1 min-2 min. The support was then removed to obtain a substrate with a gate dielectric loaded on its surface. The substrate with the gate dielectric loaded on its surface is photolithographically etched, and then the adhesion layer and the top gate electrode are sequentially prepared. The top gate structure is then peeled off from the substrate.

9. The method for fabricating a transistor device according to claim 8, characterized in that, The carrier material is PDMS; and / or, The substrate is a Si / SiO2 substrate; and / or, The channel material is MoS2; and / or, The adhesive layer is made of chromium, and the top gate electrode is made of gold; and / or, When the carrier is removed, it is removed at a speed of 0.5 mm / s to 0.2 mm / s.

10. A transistor device, characterized in that, It is prepared by the preparation method described in claim 8.

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