Layout structure and device structure of SRAM
By employing a centrally symmetrical well region design and symmetrical transistor distribution in the 8T Dual Port SRAM, the layout asymmetry problem was solved, the stability and consistency of electrical parameters were improved, and the cost was reduced.
CN122396046APending Publication Date: 2026-07-14SHANGHAI OPTICAL COMMUNICATIONS CORP
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI OPTICAL COMMUNICATIONS CORP
- Filing Date
- 2025-01-13
- Publication Date
- 2026-07-14
Smart Images
Figure CN122396046A_ABST
Abstract
The embodiment of the present application provides a kind of layout structure of SRAM, comprising: first well region, the first well region includes the first part along the first direction and the second part along the second direction;First transfer transistor, the first transfer transistor is located in the first part of the first well region;Second transfer transistor;First pull-down transistor, the first pull-down transistor is located in the second part of the first well region;Second well region, the second well region is centrosymmetric with the first well region, and the second well region includes the first part along the first direction and the second part along the third direction;Third transfer transistor, the third transfer transistor is located in the first part of the second well region;Fourth transfer transistor, the fourth transfer transistor is located in the first part of second well region and symmetric with third transfer transistor relative to the second part of second well region;Second pull-down transistor, second pull-down transistor is located in the second part of second well region.
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