Arc reduction and radio frequency control of electrostatic chucks in semiconductor processing

Abstract

A semiconductor processing chamber can include a pedestal configured to support a substrate during a plasma enhanced chemical vapor deposition (PECVD) process that forms a film on a surface of the substrate. The chamber can also include one or more internal mesh electrodes embedded in the pedestal. The one or more internal mesh electrodes can be configured to provide radio frequency (RF) power to a plasma in the semiconductor processing chamber during the PECVD process. An outer diameter of the one or more internal mesh electrodes can be less than a diameter of the substrate. The chamber can further include an RF source configured to deliver the RF power to the one or more internal mesh electrodes. Such a configuration can reduce arcing within the processing chamber.

Description

Technical Field

[0001] This application claims the interest in and priority of U.S. Nonprovisional Application No. 18 / 482,560, filed on October 6, 2023, entitled “ARC REDUCTION AND RFCONTROL FOR ELECTROSTATIC CHUCKS IN SEMICONDUCTOR PROCESSING”, the contents of which are incorporated herein by reference in their entirety.

[0002] This disclosure generally describes methods and systems for reducing electric arcing in semiconductor processing chambers caused by electrostatic adsorption devices. More specifically, this disclosure describes mesh size and power characteristics that can reduce electric arcing and improve the quality of films around a substrate. Background Technology

[0003] Integrated circuits are realized through processes that create complex patterned material layers on the surface of a substrate. The production of patterned materials on a substrate requires controlled methods for the formation and removal of exposed materials. As device dimensions continue to shrink, material formation can impact subsequent operations. For example, in gap-filling operations, material may be formed or deposited to fill trenches or other features formed on a semiconductor substrate. These filling operations can be challenging because features may have higher aspect ratios and smaller critical dimensions. For instance, continued deposition may pinch off features and potentially create voids within them, as deposition may occur on top of and along the sidewalls. This can affect device performance and subsequent processing operations. In some devices, it may be necessary to selectively remove sidewall material deposited in features.

[0004] Therefore, there is a need to improve systems and methods for producing high-quality devices and structures. This technology can meet these and other needs. Summary of the Invention

[0005] In some embodiments, the semiconductor processing chamber may include a base configured to support a substrate during a plasma-enhanced chemical vapor deposition (PECVD) process, in which a film is formed on the surface of the substrate. The chamber may also include one or more internal meshes embedded in the base. The one or more internal meshes may be configured to provide radio frequency (RF) power to the plasma within the semiconductor processing chamber during the PECVD process. The chamber may additionally include an RF source configured to deliver RF power to the one or more internal meshes. The chamber may further include one or more variable capacitors coupled between the RF source and the one or more internal meshes. Adjusting the capacitance value of the one or more variable capacitors can adjust the amount of RF power supplied to the one or more internal meshes.

[0006] In some embodiments, methods for reducing cracking in films formed around a substrate during deposition may include supporting the substrate on a base within a semiconductor processing chamber. The semiconductor processing chamber may be configured to perform a plasma-enhanced chemical vapor deposition (PECVD) process that forms a film on the surface of the substrate. The method may also include providing a precursor to the semiconductor processing chamber. The precursor may include a material for forming a film on the substrate. The method may additionally include forming a plasma from the precursor within the semiconductor processing chamber. The method may further include delivering radio frequency (RF) power to the plasma through one or more internal mesh openings embedded in the base. The RF power may induce an electric field including horizontal components that draw ions from the plasma toward the periphery of the substrate during film formation.

[0007] In some embodiments, the semiconductor processing chamber may include a base configured to support a substrate during a plasma-enhanced chemical vapor deposition (PECVD) process, in which a film is formed on the surface of the substrate. The chamber may also include one or more internal meshes embedded in the base. The one or more internal meshes may be configured to provide radio frequency (RF) power to the plasma within the semiconductor processing chamber during the PECVD process. The outer diameter of the one or more internal meshes may be smaller than the diameter of the substrate. The chamber may further include an RF source configured to deliver RF power to the one or more internal meshes.

[0008] In any specific implementation, any and all of the following features may be implemented in any combination and without limitation. One or more internal meshes may include multiple internal meshes. One or more internal meshes may include a single internal mesh. One or more internal meshes may include two hemispherical meshes. The chamber may include an annular external mesh surrounding one or more internal meshes, and a variable capacitor coupled between the RF source and the external mesh. Adjusting the capacitance value of the variable capacitor may adjust the amount of RF power supplied to the external mesh. The system may include a computer system programmed to adjust the variable capacitor and one or more variable capacitors during the PECVD process to adjust the amount of RF power supplied to one or more internal meshes and the amount of RF power supplied to the external mesh. The capacitance value of the variable capacitor may be reduced until the film cracking around the substrate is less than 5%. The diameter of one or more internal meshes may be smaller than the diameter of the substrate, such that the substrate can completely cover one or more internal meshes when supported by a base. The outer diameter of one or more internal meshes may be smaller than the diameter of the substrate. The method / operation may also include forming a film on the substrate by delivering RF power to a plasma, wherein the film may include one or more alternating layers of oxides and nitrides. The film may also include a relatively thick silicon oxide layer, exceeding 25 µm, formed using a tetraethyl orthosilicate (TEOS) precursor. The method / operation may also include adjusting the capacitance of one or more variable capacitors to adjust the amount of radio frequency (RF) power supplied to one or more internal meshes and causing the electric field level component. The diameter of the substrate may be 0 to 5 mm larger than the outer diameter of one or more meshes. The outer diameter of one or more meshes may be between 95% and 99% of the substrate diameter. The chamber may also include an outer mesh, which is annular and surrounds one or more internal meshes, with an inner diameter larger than the substrate diameter. The difference between the outer diameter of one or more internal meshes and the substrate diameter may be sufficient to eliminate arcing generated by one or more internal meshes during the PECVD process. The substrate need not include an outer mesh surrounding one or more internal meshes, so that any meshes delivering RF power to the plasma are covered by the substrate on the substrate. Attached Figure Description

[0009] The nature and advantages of the various embodiments can be further understood by referring to the remainder of the specification and the accompanying drawings, in which similar reference numerals are used in several drawings to refer to similar parts. In some cases, sub-labels are associated with reference numerals to indicate one of a plurality of similar parts. When a reference numeral is mentioned without specifying the existing sub-label, the purpose is to refer to all of these plurality of similar parts.

[0010] Figure 1 A schematic cross-sectional view of an exemplary processing chamber according to some specific embodiments of the present technology is shown.

[0011] Figure 2A A specific embodiment of a semiconductor processing chamber according to some specific embodiments is shown.

[0012] Figure 2B Example configurations of various mesh openings that may be included in the base, according to some specific embodiments, are shown.

[0013] Figure 3 A schematic diagram showing the placement of the base and mesh relative to the substrate according to some specific embodiments is shown.

[0014] Figure 4 A flowchart is shown of a method for reducing film cracking on the periphery of a substrate during deposition, according to some specific embodiments.

[0015] Figure 5 An exemplary computer system is shown, in which various specific implementations can be carried out. Detailed Implementation

[0016] This article describes the characteristics of selecting and power-tuning radio frequency (RF) meshes in a substrate during deposition processes such as plasma-enhanced chemical vapor deposition (PECVD). Generally, the electric field generated by the potential difference between the plasma and the substrate is perpendicular and orthogonal to the top surface of the substrate. While this can form a durable film on the top of the substrate, the film often cracks at substrate edges or bevels. For example, bevels may include angles or gaps, where ions in the plasma have difficulty contacting the substrate when the electric field is purely perpendicular. Therefore, beveled films are primarily formed by plasma radicals and are more prone to cracking or peeling. Charge buildup on the RF meshes in the substrate can also generate arcing.

[0017] This disclosure describes techniques for reducing electric arcing and improving the quality of films around a substrate. The size of the internal mesh openings can be reduced so that the outer diameter of these openings is smaller than the diameter of the substrate. This creates a potential difference between the RF mesh openings and the plasma, thereby forming a horizontal component of the electric field. This horizontal component directs ions toward the beveled edges of the substrate, improving film quality. Covering the internal mesh openings with the substrate can also effectively reduce or even prevent electric arcing from the electrostatic chuck, allowing the arc to diffuse from the electrostatic chuck to other parts of the processing chamber. Some embodiments may include variable capacitors for each mesh opening in the substrate. By changing the capacitance values ​​of these variable capacitors, the relative RF power delivered to each mesh opening can be adjusted. For example, by increasing the power delivered to the internal mesh openings and / or decreasing the power delivered to the external mesh openings beyond the substrate diameter, the electric field can be directed toward the substrate edges.

[0018] After describing the general aspects of a chamber according to some embodiments of the present technology (in which plasma processing operations discussed below can be performed), specific methods may be discussed. It should be understood that the present technology is not intended to be limited to the specific membrane, chamber, or processing procedure discussed, as the described technology can be used to improve a variety of membrane formation processes and is applicable to a wide range of processing chambers and operations.

[0019] Figure 1 A cross-sectional view of an exemplary processing chamber 100 according to some specific embodiments of the present technology is shown. This figure illustrates an overview of a system incorporating one or more aspects of the present technology, and / or a system specifically configured to perform one or more operations according to specific embodiments of the present technology. Further details of the chamber 100 or methods of execution may be further described below. The chamber 100 may be used to form film layers, etch material layers, form other material layers, or combinations thereof, although it should be understood that deposition and etching methods can be similarly performed in any chamber in which deposition and etching processes may occur. The processing chamber 100 may include a chamber body 102, a substrate support 104 disposed within the chamber body 102, and a cover assembly 106 coupled to the chamber body 102 and surrounding the substrate support 104 within a processing space 120. A substrate 103 may be provided to the processing space 120 through an opening 126, which may be sealed in a conventional manner using a slit valve or door for processing. During processing, the substrate 103 may rest on a surface 105 of the substrate support. In some embodiments, the substrate support 104 can rotate along a vertical axis, and the axis 144 of the substrate support 104 can be located on the vertical axis or fixed. Alternatively, the substrate support 104 can be lifted and rotated as needed during the deposition process.

[0020] Gas distributor 112 may define an orifice 118 for distributing the processing precursor into the processing space 120. Gas distributor 112 may be coupled to a first power source 142, such as an RF generator, RF power source, DC power source, pulsed DC power source, pulsed RF power source, or any other power source that may be coupled to the processing chamber. In some embodiments, the first power source 142 may be an RF power source.

[0021] The gas distributor 112 can be a conductive gas distributor or a non-conductive gas distributor. The gas distributor 112 can also be formed from conductive and non-conductive components. For example, the body of the gas distributor 112 can be conductive, while the panel of the gas distributor 112 can be non-conductive. The gas distributor 112 can be powered by an electrical source, such as a power source... Figure 1 The first power source 142 shown provides power, or in some embodiments the gas distributor 112 may be coupled to ground.

[0022] The first electrode 122 may be coupled to the substrate support 104. The first electrode 122 may be embedded within the substrate support 104 or coupled to the surface of the substrate support 104. The first electrode 122 may be a plate, a perforated plate, a mesh, a wire mesh, or any other arrangement of conductive elements. The first electrode 122 may be a tuning electrode and may be coupled to a tuning circuit 136 via a conduit 146, for example, a cable with a selected resistance value (e.g., 50 ohms), disposed in the shaft 144 of the substrate support 104. The tuning circuit 136 may have an electronic sensor 138 and an electronic controller 140, the latter being a variable capacitor. The electronic sensor 138 may be a voltage or current sensor and may be coupled to the electronic controller 140 for further control of plasma conditions in the processing space 120.

[0023] The second electrode 124 may be a bias electrode and / or an electrostatic adsorption electrode, and may be coupled to the substrate support 104. The second electrode may be coupled to a second power source 150 through a filter 148, which may be an impedance matching circuit. The second power source 150 may be a DC power supply, a pulsed DC power supply, an RF bias power supply, a pulsed RF source, or a bias power supply, or a combination of these or other power sources. In some embodiments, the second power source 150 may be an RF bias power supply. The substrate support 104 may also include one or more heating elements configured to heat the substrate to a processing temperature, which may be between about 25°C and about 800°C or higher.

[0024] Figure 1 The cover assembly 106 and substrate support 104 can be used with any processing chamber for plasma or thermal processing. During operation, the processing chamber 100 can control the plasma conditions in the processing space 120 in real time, for example, via a system controller 101 that may be included in the processor 107. The substrate 103 can be placed on the substrate support 104, and processing gas can be allowed to flow through the cover assembly 106 via the inlet 114 according to any desired airflow plan. The gas can flow out of the processing chamber 100 through the outlet 152. A power supply can be coupled to the gas distributor 112 to establish plasma in the processing space 120. In some embodiments, a second electrode 124 can be used to bias the substrate.

[0025] After energizing the plasma in the processing space 120, a potential difference can be established between the plasma and the first electrode 122. The electronic controller 140 can then be used to adjust the flow characteristics of the ground path represented by the tuning circuit 136. A setpoint can be passed to the tuning circuit 136 to provide independent control over the deposition rate and the uniformity of plasma density from center to edge. In a specific embodiment where the electronic controller may be a variable capacitor, an electronic sensor can adjust the variable capacitor to independently maximize the deposition rate and minimize thickness non-uniformity.

[0026] The tuning circuit 136 may have a variable impedance, which can be adjusted via the electronic controller 140. In the case that the electronic controller 140 is a variable capacitor, a range of capacitance values ​​for each variable capacitor can be selected to provide an impedance range. This range may depend on the frequency and voltage characteristics of the plasma, and there may be a minimum value within the capacitance range of each variable capacitor. Therefore, when the capacitance value of the electronic controller 140 is at its minimum or maximum, the impedance of the tuning circuit 136 may be high, resulting in a minimum air or lateral coverage of the plasma shape on the substrate support. When the capacitance value of the electronic controller 140 approaches the value that minimizes the impedance of the tuning circuit 136, the air coverage of the plasma may increase to its maximum, effectively covering the entire operating area of ​​the substrate support 104. When the capacitance value of the electronic controller 140 deviates from the minimum impedance setting, the plasma shape may contract from the chamber wall, and the air coverage of the substrate support may decrease.

[0027] Electronic sensor 138 can be used to adjust tuning circuit 136 in a closed loop. Depending on the type of sensor used, a current or voltage setpoint can be installed in each sensor. The sensor can be equipped with control software that determines the adjustment of electronic controller 140 to minimize deviation from the setpoint. Therefore, the plasma shape can be selected and dynamically controlled during processing. It should be understood that although the foregoing discussion is based on electronic controller 140, which can be a variable capacitor, any electronic component with adjustable characteristics can be used to provide tuning circuit 136 with adjustable impedance.

[0028] The processing chamber 100 can be used in some specific embodiments of the present technology for processing methods that may include bottom-to-bottom deposition of material for a semiconductor structure. It should be understood that the chamber is not intended to be limiting, and any chamber configured to perform the operation can be used similarly.

[0029] Figure 2A An embodiment of a semiconductor processing chamber 200 according to some specific embodiments is shown. For example, the semiconductor processing chamber 200 may be as described above. Figure 1The specific implementation of the processing chamber 100 shown is illustrated. In some embodiments, the semiconductor processing chamber 200 may be specifically configured to perform chemical vapor deposition (CVD) on a substrate. Chemical vapor deposition is a process that uses the chemical reaction of gaseous precursor molecules to deposit a thin film of material onto a substrate. A precursor gas may be introduced into the semiconductor processing chamber 200 and a solid film may be formed on the substrate surface under elevated temperature and / or pressure.

[0030] Chemical vapor deposition (CVD) can be used to deposit a variety of materials, including ceramics, organic chemical compounds, semiconductors, and metals. For example, this disclosure may refer to the deposition of alternating oxide and / or nitride layers in an "ONO" stack, which can be used in various semiconductor devices. This disclosure may also specifically refer to the deposition of relatively thick silicon oxide films on semiconductor layers or ONO stacks using tetraethyl orthosilicate (TEOS) precursors. However, these types of film deposition are provided by way of example only and are not intended to be limiting. The techniques described herein can be used to deposit any type of film on a substrate.

[0031] Some specific implementations of CVD processes can be enhanced using plasma-enhanced CVD (PECVD). PECVD is a variation of CVD in which a plasma is formed in the processing region 220 of a semiconductor processing chamber 200 to enhance film deposition and improve the performance of the deposited film. For example, a precursor gas can be introduced into the processing region 220 along with a carrier gas (such as nitrogen or argon). A plasma can then be formed together with the precursor gas, which is in a highly charged state containing free radicals, ions, and other substances. The high-energy ions of the plasma can dissociate from the precursor molecules, making them more readily involved in the chemical reactions during film deposition. Furthermore, the plasma can generate highly reactive free radicals (such as atomic hydrogen, atomic nitrogen, etc.), which can also participate in surface reactions and influence the properties of the deposited film.

[0032] To energize the plasma in processing region 220, semiconductor processing chamber 200 may include a base 241 configured to receive substrate 202 thereon. Base 241 may include one or more radio frequency (RF) meshes embedded within it. For example, as... Figure 2A As shown, the base 241 may include one or more internal mesh openings, such as a first internal mesh opening 206 and a second internal mesh opening 208. Figure 2B Examples of configurations of various mesh openings that may be included in the base 241 according to some specific embodiments are shown. Figure 2B The view of the middle base 241 can be shown Figure 2AA top view of the base 241 is provided, along with an internal view showing the location of the mesh openings within the base 241. For example, the first internal mesh opening 206 may include a semi-circular, hemispherical, or semi-circular radio frequency (RF) mesh opening. Similarly, the second internal mesh opening 208 may include a semi-circular, hemispherical, or semi-circular RF mesh opening. The first internal mesh opening 206 and the second internal mesh opening may be formed by a conductive wiring pattern (such as a copper wire mesh). A gap or insulating space may exist between the first internal mesh opening 206 and the second internal mesh opening 208. Although in Figure 2B While not explicitly stated, one or more internal mesh openings may include a single mesh opening that combines the first internal mesh opening 206 and the second internal mesh opening 208 into a single circular internal mesh opening. Alternatively, one or more internal mesh openings may include more than two internal mesh openings. For example, one or more internal mesh openings may include mesh openings with four circular outlines, six mesh openings, etc. More generally, the pattern of one or more internal mesh openings may include... Figure 2A The pie pattern shown includes a sector, as well as concentric circles or rings.

[0033] The first internal mesh 206 and the second internal mesh 208 may be coupled to a power source to provide radio frequency power and / or electrostatic attraction (ESC) force to the plasma in the processing region 220 to hold the substrate 202 to the base 241 during deposition. For example, the first internal mesh 206 may be coupled to a first lead 212 extending from the base 241. The first lead 212 may be coupled to a first ESC source 230. The first ESC source 230 may include a DC voltage source that provides a DC voltage to a portion of the substrate 202 directly above the first internal mesh 206. Radio frequency filtering circuitry may be placed between the first ESC source 230 and the first internal mesh 206. The radio frequency filtering circuitry may include active or passive components, such as an inductor 232, a resistor, and / or a variable capacitor 234. The radio frequency filtering circuitry may be configured to filter out components that can provide radio frequency frequencies to or coupled to the first lead 212, for example, to protect the first ESC source 230.

[0034] Similarly, the second internal mesh 208 can be coupled to a second ESC source 240, which provides a DC voltage opposite to the first ESC source 230. For example, the second internal mesh 208 can be coupled to a second lead 210 extending from the base 241. The potential difference between the first ESC source 230 and the second ESC source 240 can generate an electrostatic force to hold the substrate 202 to the base 241. An RF filter circuit consisting of an inductor 242, a resistor, and / or a variable capacitor 244 can be placed between the second lead 210 and the second ESC source 240 to filter out RF frequencies that may be present on the second lead 210.

[0035] The first lead 212 and / or the second lead 210 may also be coupled to an RF source configured to provide RF power to one or more internal meshes in the base 241. For example, a single RF source 250 may provide RF power to the first lead 212 and / or the second lead 210. In some embodiments, one or more variable capacitors 258 may be coupled between the RF source 250 and one or more internal meshes. As described below, adjusting the individual capacitance value of one or more variable capacitors 258 can adjust the amount of RF power supplied to each of the one or more internal meshes in the base 241.

[0036] When producing a film on substrate 202 using a deposition process, several technical issues may arise that affect film quality. For example, the film on substrate 202 may be formed by free radicals and / or ions generated by plasma. When the film is primarily formed by high-energy ions, it is more robust, dense, and less prone to cracking or peeling. In contrast, films formed primarily by free radicals generated by plasma tend to have lower density and are more susceptible to cracking and peeling. Therefore, some embodiments create an electric field between the plasma in processing region 220 and the base 241 to accelerate the movement of high-energy ions in the plasma toward substrate 202 during film formation. For example, the potential difference between the radio frequency power supplied to the first internal mesh 206 and / or the second internal mesh 208 and the potential of the plasma in processing region 220 can cause the formation of an electric field, thereby accelerating the ions in the plasma toward substrate 202.

[0037] However, since one or more internal mesh openings are typically located beneath the substrate 202, the directionality of the electric field may be primarily oriented vertically. In other words, the electric field generated by the potential difference between the plasma and the base 241 causes ions to be oriented vertically downwards onto the surface of the substrate 202. While this forms a dense and durable film on the substrate surface, this vertical electric field can also easily create problematic films at the edges or bevels of the substrate. For example, some substrate designs may include beveled edges, creating small gaps or sloping surfaces along the edges of the substrate 202. Therefore, the beveled edges of the substrate 202 may include surfaces that are not orthogonal to the vertical electric field. The beveled edges of the substrate 202 can also form small gaps, making it difficult for ions to enter the areas within the gaps. Plasma radicals can enter these small gaps, thus forming material films primarily at the edges or bevels of the substrate 202. Consequently, the film mass density at the edges of the substrate 202 is lower, making it prone to cracking or peeling. For example, conventional film formation methods may result in cracks or defects covering more than 60% of the area at the edges of the substrate 202. Other test data show that more than 70% and / or more than 80% of the edge area includes cracks or defects, depending on the RF power and the configuration of the base 241.

[0038] The specific embodiments described herein address this technical problem. In some embodiments, the system can provide radio frequency power to one or more internal mesh openings embedded in the base, the radio frequency power generating a horizontal component in the electric field. This horizontal component can accordingly direct ions from the plasma in a diagonal direction, thereby increasing the likelihood that the film at the periphery and beveled edges of the substrate 202 is formed by ions rather than plasma radicals.

[0039] One technique for generating a horizontal component in an electric field is to control the relative radio frequency power supplied to one or more internal meshes. For example, Figure 2A The specific embodiment shown illustrates the first inner mesh 206 and the second inner mesh 208 described above. Furthermore, some designs of the base 241 may include an outer mesh 204 surrounding one or more inner meshes. For example... Figure 2B As shown, the outer mesh 204 may be annular, surrounding one or more inner meshes. Gap or insulating regions may separate the outer mesh 204 from one or more inner meshes, thereby electrically isolating the outer mesh 204 from the one or more inner meshes. The outer mesh 204 may be implemented using meshes of conductive wiring or other patterns to form the annular shape of the outer mesh 204. Similar to the first inner mesh 206 and the second inner mesh 208, the outer mesh 204 may be coupled to a third lead 214. The third lead 214 may exit from the base 241 and be coupled to the RF source 250. Furthermore, the variable capacitor 258 may include a variable capacitor 254 positioned between the RF source 250 and the outer mesh 204.

[0040] The directionality of the electric field around substrate 202 can be controlled by adjusting the capacitance value of variable capacitor 258. For example, since each mesh is coupled to the same RF source 250, providing the same capacitance value to each variable capacitor 258 provides the same RF power to each mesh. Therefore, the outer mesh 204, the first inner mesh 206, and the second inner mesh 208 may appear as a single mesh to the plasma, providing uniform RF power throughout the mesh. This can generate a dominant uniform electric field pointing vertically downwards from the plasma towards substrate 202. Since the areas of both the mesh and the plasma exceed the diameter of substrate 202, the electric field will be approximately perpendicular to substrate 202, directly impacting the surface of substrate 202 with ions. This may cause cracking or peeling at the beveled edges of substrate 202.

[0041] To generate a horizontal component of the electric field at the edge of substrate 202, the radio frequency (RF) power supplied to the external mesh can be reduced. For example, by reducing the value of variable capacitor 254 in the range of about 51 nF to about 0 nF, the RF power supplied to the external mesh 204 can be reduced relative to the RF power supplied to the first internal mesh 206 and the second internal mesh 208. Since the plasma extends beyond the diameter edge of substrate 202, the potential difference between the external plasma and one or more internal meshes can now be conducted inward toward the edge of substrate 202. Alternatively, increasing the variable capacitance value of variable capacitors 252, 256 can reduce the impedance on the first lead 212 and / or the second lead 210, thereby increasing the RF power supplied to the first internal mesh 206 and / or the second internal mesh 208 relative to the external mesh 204. This may also cause the electric field to point from the outer portion of the plasma toward one or more internal meshes, thereby generating a horizontal component in the electric field pointing inward toward the periphery of substrate 202.

[0042] Figure 3 A schematic diagram showing the positions of the base 241 and the mesh relative to the substrate 202 according to some specific embodiments is shown. As described above, when the radio frequency power supplied to the external mesh 204 is less than the radio frequency power supplied to the first internal mesh 206, the electric field 306 may include a horizontal component that causes the electric field 306 to at least partially point towards the edge of the substrate 202. The substrate 202 may include a beveled edge 307, such as... Figure 3 As shown. (This is an example.) Figure 3 The diagram also illustrates how the membrane 309 at the beveled edge 307 may crack or peel due to the reasons described above. Note that the beveled edge 307 is provided as an example only and is not intended to be limiting. Other edge geometries may appear in different specific embodiments.

[0043] In addition to adjusting the relative radio frequency power supplied to the mesh, some specific embodiments may alter the physical configuration of the mesh to reduce film cracking along the edges of substrate 202. For example, the diameter of one or more internal mesh openings may be smaller than the diameter of substrate 202. A smaller diameter allows substrate 202 to completely cover one or more internal mesh openings in base 241. Figure 3 As illustrated in the example, the edge of substrate 202 may extend beyond, for example, the diameter or edge of the first internal mesh 206. By reducing the radio frequency power delivered to the external mesh 204, and / or by moving the edges of one or more internal meshes further inward beneath substrate 202, the horizontal component of the electric field 306 can be increased. This, in turn, increases the number of ions that may strike the edges or corners of substrate 202. As described above, this will improve the film quality at the edges of substrate 202.

[0044] Reducing the diameter of one or more internal mesh apertures can also solve another technical problem present in the deposition process. Specifically, an electric arc refers to a situation where a direct current charge accumulated in an electrostatic chuck discharges to another part of the processing area 220. For example, an electric arc may occur between any of the mesh apertures described herein and the substrate, the sidewalls of the processing chamber, the plasma, and / or any other conductive element in the semiconductor processing chamber 200. These arcs can damage the substrate 202 and / or the semiconductor processing chamber. These arcs can also affect the quality of the film deposited on the substrate 202. The specific embodiments described herein address the technical problem of arcing by reducing the diameter of the internal mesh apertures to be smaller than the diameter of the substrate 202. It has been found that reducing the size of the internal mesh apertures to be covered by the area of ​​the substrate 202 can completely eliminate arcing during the deposition process.

[0045] In different embodiments, the distance 304 between the outer edge of the substrate 202 and the outer diameter of one or more internal mesh apertures can vary. For example, some embodiments may provide internal mesh apertures with a diameter approximately equal to that of the substrate 202. In some embodiments, this configuration is sufficient to reduce arcing. Other embodiments may further reduce the outer diameter of the internal mesh apertures, making the distance 304 greater than 0 mm. Generally, increasing the distance 304 between the diameter of the substrate 202 and the outer diameter of the internal mesh apertures reduces arcing. However, excessively increasing the distance 304 may reduce the electric field strength around the substrate 202 and begin to negatively impact the quality of the film being formed. Conversely, reducing the size of the DC mesh apertures can lead to insufficient adsorption, especially for processes where wafer warpage becomes more stretched as the process continues.

[0046] In some embodiments, the size of the outer diameter of the inner mesh can be determined according to the characteristics of the chamber, such that the spacing 304 is about 1 mm, about 2 mm, about 3 mm, about 4 mm, about 5 mm, about 6 mm, about 7 mm, about 8 mm, about 9 mm, about 10 mm, about 12 mm, about 15 mm, or larger. In some embodiments, depending on the characteristics of the chamber, the spacing 304 can range from about 0 mm to about 2 mm, from about 2 mm to about 5 mm, from about 5 mm to about 7 mm, from about 7 mm to about 10 mm, from about 10 mm to about 12 mm, from about 12 mm to about 15 mm, or larger and / or any combination of these ranges. In other embodiments, the size of the inner mesh can be determined according to the diameter of the substrate 202. For example, in some embodiments, the outer diameter of the inner mesh can be set to about 100% to about 98% of the diameter of the substrate 202. In other embodiments, the outer diameter of the internal mesh may be less than or between about 98% and about 96%, less than or between about 96% and about 95%, less than or between about 95% and about 94%, less than or between about 94% and about 93%, less than or between about 93% and about 92%, less than or between about 92% and about 90%, and less than about 90% and / or any combination of these ranges, depending on the characteristics of the chamber.

[0047] Please note that reducing the outer diameter of the internal mesh apertures to be smaller than the diameter of substrate 202 is not always necessary, but may improve performance. For example, some embodiments may use a first internal mesh aperture 206 and a second internal mesh aperture 208 with an outer diameter greater than or equal to the diameter of substrate 202. However, by reducing the relative RF power supplied to the external mesh aperture 204, the film quality at the edges of substrate 202 can be improved. Other embodiments may combine reducing the size of the internal mesh apertures with RF tuning using variable capacitor 258 to improve performance.

[0048] In some embodiments, the size of the inner diameter of the outer mesh 204 can be determined according to the characteristics of the chamber, such that the spacing 302 is approximately 1 mm, approximately 2 mm, approximately 3 mm, approximately 4 mm, approximately 5 mm, approximately 6 mm, approximately 7 mm, approximately 8 mm, approximately 9 mm, approximately 10 mm, approximately 12 mm, approximately 15 mm, or greater. In some embodiments, depending on the characteristics of the chamber, the distance 302 can range from approximately 0 mm to approximately 2 mm, from approximately 2 mm to approximately 5 mm, from approximately 5 mm to approximately 7 mm, from approximately 7 mm to approximately 10 mm, from approximately 10 mm to approximately 12 mm, from approximately 12 mm to approximately 15 mm, or greater, and / or any combination of these ranges. In other embodiments, the size of the outer mesh 204 can be determined according to the diameter of the substrate 202. For example, in some embodiments, the inner diameter of the outer mesh 204 can be set between approximately 100% and approximately 102% of the diameter of the substrate 202. In other embodiments, the inner diameter of the outer mesh 204 may be greater than or between about 102% and about 104%, greater than or between about 104% and about 105%, greater than or between about 105% and about 106%, greater than or between about 106% and about 107%, greater than or between about 107% and about 108%, greater than or between about 108% and about 110%, and greater than about 110% and / or any combination of these ranges, depending on the characteristics of the chamber.

[0049] In some embodiments, the external mesh 204 can be completely eliminated. While the embodiments discussed above may include the external mesh 204 to provide flexibility in how RF power is supplied to the base 241, the external mesh 204 may also be eliminated from the base 241. Alternatively, the effect of the external mesh 204 can be significantly reduced by decreasing or attenuating the power supplied to the external mesh 204 via the variable capacitor 254. For example, some parts of the deposition process may benefit from supplying power to the external mesh 204, while other parts of the deposition process may benefit from reducing the power supplied to the external mesh 204. Therefore, some embodiments may dynamically adjust the RF power supplied to the external mesh relative to one or more internal meshes by adjusting the variable capacitor 258 during the deposition process.

[0050] For example, the system may include a controller 260 programmed to dynamically adjust the capacitance value of the variable capacitor 258 during execution of the deposition process. For example, the semiconductor processing chamber 200 may be executed using a "recipe" that includes recipe steps for adjusting the execution conditions or actions taken by the semiconductor processing chamber 200. The recipe may adjust temperature, pressure, gas flow rate, gaseous substances present in the processing region 220, radio frequency power supplied to the mesh, DC power supplied to the mesh, and so on. In some embodiments, the recipe may include adjustments to the variable capacitor 258 during the deposition process. For example, radio frequency power may be supplied to the external mesh 204 during a first portion of the deposition process, and the radio frequency power may be removed from the external mesh 204 during a second portion of the deposition process by adjusting the capacitance value of the variable capacitor 254 in the recipe.

[0051] The controller 260 may include one or more processors (e.g., microprocessor, microcontroller, processor core, distributed processor, etc.). The processor can be programmed to perform operations according to instructions stored on one or more memory devices (e.g., cache memory, disk storage, temporary memory, RAM or ROM devices, etc.). In some embodiments, the instructions may be stored on a non-transitory, tangible, computer-readable medium, such as a physical storage device. The instructions may optionally be stored on a computer program product separate from the processor.

[0052] One or more processors can be implemented in a local controller on the semiconductor processing chamber 200. Alternatively, one or more processors can be distributed across multiple different computing systems. For example, controller 260 can be part of a local or remote server that controls the execution of the semiconductor processing chamber 200. During the deposition process, instructions can be distributed between the server and the local controller.

[0053] The dimensions of the internal mesh relative to the substrate 202 and the formulation settings of the variable capacitor 258 can be set during the design and / or configuration of the semiconductor processing chamber 200. Specifically, the design of these components can be tested and adjusted during the manufacturing process of the semiconductor processing chamber 200. For example, the substrate can be deposited in the processing region 220. The film quality at the bevel of the substrate 202 can then be analyzed using a bevel inspection tool, a metrology station, or any other technique for measuring or inspecting film quality. The formulation can then be updated, and the value of the variable capacitor 258 adjusted to improve film quality.

[0054] For example, some embodiments may set a threshold for the acceptable amount of cracking in the film at the bevel of substrate 202. This threshold may be less than 25%, less than 20%, less than 15%, less than 10%, less than 5%, less than 2%, and / or less than any other value depending on substrate requirements. The quality of the film can be measured and assigned based on the amount of cracking observed on the substrate. The formulation can then be changed, for example, by reducing the capacitance value of the outer mesh 204 in at least a portion of the process. Subsequent substrates can then be treated with the updated formulation, and the resulting film can be measured to determine whether the cracking has been reduced below the acceptable threshold. This process can be repeated until an optimal capacitance value is determined. This iterative process can produce a set of optimal capacitance values ​​that do not excessively reduce the electric field around the substrate but produce a sufficient horizontal component to form a high-quality film at the bevel. For example, the capacitance value of the variable capacitor 254 on the outer mesh 204 can be increased until the film cracking around the substrate is less than 10%, until the film cracking around the substrate is less than 5%, and so on.

[0055] This process can also be used to determine the optimal size of one or more internal apertures. For example, the size and outer diameter of the internal apertures can be reduced until cracking is reduced to below an acceptable threshold. Furthermore, the size of the internal apertures can be reduced until arcing is eliminated during deposition. These design improvements for internal aperture size and / or variable capacitance values ​​can be made individually or in combination to effectively address arcing and film quality issues.

[0056] In addition to the aforementioned design timing adjustments, some embodiments can also be dynamically adjusted based on on-site measurements performed during the deposition process. For example, techniques such as optical spectroscopy and process gas sampling can be used to measure different characteristics of the deposition process. Some embodiments can also monitor voltage or radio frequency power characteristics supplied to one or more internal or external meshes 204, such as impedance, reflected power, current, and / or any other characteristics. These measured characteristics can be correlated with the film quality at the bevel or periphery of the substrate 202. The controller 260 can process these measured characteristics in real time and adjust the variable capacitor 258 to improve film quality. For example, the measured characteristics may be associated with cracking exceeding an acceptable threshold (e.g., exceeding 5%). The controller 260 can adjust the variable capacitor 258 until the measured characteristics are associated with cracking below the acceptable threshold.

[0057] Figure 4 A flowchart of a method 400 for reducing film cracking on the periphery of a substrate during deposition, according to some specific embodiments, is shown. This method can be performed by the aforementioned semiconductor processing chamber. Additionally, some operations in this method can be performed by a controller 260. These processor operations can be specific embodiments executed by a processor and stored instructions to cause specified conditions to occur in the processing region 220.

[0058] The method may include supporting a substrate (402) on a base within a semiconductor processing chamber. The semiconductor processing chamber may be configured to perform a plasma-enhanced chemical vapor deposition (PECVD) process, which forms a film on the surface of the substrate. For example, the deposition process may include forming alternating oxide and nitride layers in an ONO stack. The deposition process may also include forming a relatively thick silicon oxide layer (e.g., using a TEOS precursor) with a thickness greater than 10 µm, greater than 15 µm, greater than 20 µm, greater than 25 µm, greater than 30 µm, or greater. The substrate may be formed of silicon, silicon germanium, or other substrate materials. Layers may include IPD layers of the ONO layers, comprising a dielectric material (which may be silicon oxide) alternately stacked with a site material (e.g., which may be silicon nitride or polycrystalline silicon). In some embodiments, the number of film layers can be very large, including 10 or more layer pairs, 20 or more layer pairs, 50 or more layer pairs, 100 or more layer pairs, and so on. For example, the height of the semiconductor structure may exceed 10 micrometers, 20 micrometers, etc.

[0059] The method may further include providing a precursor to a semiconductor processing chamber, wherein the precursor comprises a material (404) for forming a film on a substrate. The precursor may include a carrier gas, such as nitrogen, helium, argon, or other inert, inert, or useful precursor. The precursor may also include a gaseous substance comprising the film material, such as TEOS, O2, N2O, SiH4, NH3, N2, etc. In this step, the flow rate of the precursor gas may range from about 0 sccm to about 13000 sccm. For example, the flow rate range may be between 0 sccm and about 1,000 sccm, between 1,000 sccm and about 2,000 sccm, between 2,000 sccm and about 3,000 sccm, between 3,000 sccm and about 4,000 sccm, between 4,000 sccm and about 5,000 sccm, between 5,000 sccm and about 6,000 sccm, between 6,000 sccm and about 7,000 sccm, between 7,000 sccm and about 8,000 sccm, between 8,000 sccm and about 9,000 sccm, between 9,000 sccm and about 10,000 sccm, between 10,000 sccm and about 11,000 sccm, between 11,000 sccm and about 12,000 sccm, between 12,000 sccm and about 13,000 sccm, greater than 13,000 sccm, and / or any combination of these ranges.

[0060] The method may additionally include forming plasma (406) from a precursor in a semiconductor processing chamber. In a specific embodiment, the temperature within the processing chamber or the substrate layer may be maintained between about 200°C and about 700°C. The temperature may be maintained above or about 200°C, or above or about 250°C, above or about 300°C, above or about 350°C, above or about 400°C, above or about 450°C, above or about 500°C, above or about 550°C, above or about 600°C, above or about 650°C, above or about 700°C, or higher. The pressure may be maintained below or about 15 Torr, or below or about 10 Torr, below or about 5 Torr, below or about 4 Torr, below or about 3 Torr, below or about 2 Torr, below or about 1 Torr, below or about 100 mTorr, or lower. In a specific implementation, the pressure can be maintained between approximately 500 mTorr and approximately 10 Torr.

[0061] The method may further include providing radio frequency power (408) to the plasma through one or more internal mesh openings embedded in the base. The applied plasma power can range from about 0 W to about 5000 W. For example, the plasma power range can be between about 0 W and about 1000 W, about 1000 W and about 2000 W, about 2000 W and about 3000 W, about 3000 W and about 4000 W, about 4000 W and about 5000 W, and / or any combination of such ranges. In some embodiments, the frequency range may be associated with the applied radio frequency power. For example, some embodiments may use a high-frequency radio frequency source of about 27 MHz. Some embodiments may additionally or alternatively use a low-frequency radio frequency source of about 350 kHz. A range of frequencies, such as 13.56 MHz and other commonly used frequencies or frequency ranges, may also be used between these two frequencies. Some embodiments may also use a higher frequency range, such as 40 MHz. It should be noted that these embodiments are compatible with any frequency range or subrange between 300 kHz and 40 MHz or higher.

[0062] The method may also include generating an electric field including a horizontal component during film formation, which guides ions from the plasma to the periphery (410) of the substrate. This horizontal component can be generated by adjusting the radio frequency power supplied to various meshes in the substrate. For example, as described above. Figure 2A As shown, the RF power can be adjusted using a variable capacitor between a single RF source and the individual meshes in the substrate. As described above, by adjusting the RF power through adjustable capacitors or other means, more RF power can be directed to the inner meshes rather than the outer meshes. This may correspondingly direct the electric field inwards and add a horizontal component to the electric field. This can direct one component of the electric field towards the bevel or outer edge of the substrate.

[0063] The horizontal component can also be generated by reducing the size of one or more internal mesh openings relative to the substrate size. For example, as shown above. Figure 3 As shown, the outer diameter of one or more internal mesh apertures can be reduced to be less than or equal to the diameter of the substrate. In various embodiments, the diameter of the substrate can be 0 mm to 5 mm larger than the outer diameter of the mesh aperture, and the outer diameter of the mesh aperture can be 95% to 99% of the substrate diameter, and / or any other size among the aforementioned comparative dimensions. The outer diameter of the internal mesh apertures can be reduced until it effectively attenuates the arc or is reduced to below an acceptable threshold (e.g., 5%). Some embodiments may also eliminate external mesh apertures or reduce the RF power delivered to the RF mesh apertures.

[0064] It should be understood that, Figure 4 The specific steps illustrated provide a particular method for forming a film on a substrate according to various embodiments. Other sequences of steps may also be performed according to alternative embodiments. For example, the steps described above may be performed in a different order according to alternative embodiments. Furthermore, Figure 4 Each step shown may include multiple sub-steps, which can be executed in different orders. Furthermore, additional steps may be added or removed depending on the specific application. Many variations, modifications, and alternatives also fall within the scope of this disclosure.

[0065] Each method described herein can be executed by a computer system. Each step of these methods can be performed automatically by the computer system and / or may provide input / output involving a user. For example, a user may provide input for each step of the method, each of which may provide a specific output in response to a request for such input, wherein the output is generated by the computer system. Each input may be received in response to a corresponding requested output. Furthermore, input may be received from a user, another computer system as a data stream, retrieved from a memory location, retrieved via a network, requested from a roll-to-roll service, and / or similarly. Similarly, output may be provided to a user as a data stream, provided to another computer system, stored in memory, sent via a network, provided to a web service, and / or such. In short, each step of the methods described herein can be executed by a computer system and may involve any number of inputs, outputs, and / or requests to the computer system, which may or may not involve a user. Those steps that do not involve a user can be said to be executed automatically by the computer system without human intervention. Therefore, as can be understood from this disclosure, each step of each method described herein can be modified to include input and output with a user, and can also be performed automatically by a computer system without human intervention, wherein any determination is made by the processor. Furthermore, some specific implementations of each method described herein can be stored as a set of instructions on a tangible, non-transitory storage medium to form a tangible software product.

[0066] Figure 5 An exemplary computer system 500 is illustrated, in which various specific embodiments can be implemented. System 500 can be used to implement any of the computer systems described above. As shown, computer system 500 includes a processing unit 504 that communicates with several peripheral subsystems via a bus subsystem 502. These peripheral subsystems may include a processing acceleration unit 506, an I / O subsystem 508, a storage subsystem 518, and a communication subsystem 524. Storage subsystem 518 includes a tangible computer-readable storage medium 522 and system memory 510.

[0067] Bus subsystem 502 provides a mechanism for enabling components and subsystems of computer system 500 to communicate with each other as intended. While bus subsystem 502 is schematically shown as a single bus, alternative implementations of the bus subsystem may utilize multiple buses. Bus subsystem 502 can be any of several types of bus architectures, including memory buses or memory controllers, peripheral buses, and local buses using any of various bus architectures. For example, such architectures may include Industry Standard Architecture (ISA) buses, Micro Channel Architecture (MCA) buses, Enhanced ISA (EISA) buses, Video Electronics Standards Association (VESA) local buses, and Peripheral Component Interconnect (PCI) buses, the latter of which may be implemented as mezzanine buses manufactured according to the IEEE P1386.1 standard.

[0068] Processing unit 504 may be implemented as one or more integrated circuits (e.g., conventional microprocessors or microcontrollers) for controlling the execution of computer system 500. Processing unit 504 may include one or more processors. These processors may include single-core or multi-core processors. In specific embodiments, processing unit 504 may be implemented as one or more independent processing units 532 and / or 534, each including a single-core or multi-core processor. In other specific embodiments, processing unit 504 may also be implemented as a quad-core processing unit formed by integrating two dual-core processors into a single chip.

[0069] In various embodiments, processing unit 504 can execute various programs in response to program code and can maintain multiple concurrently executing programs or programs. At any given time, some or all of the program code to be executed can reside in processor 504 and / or storage subsystem 518. Through appropriate programming, processor 504 can provide the various functions described above. Computer system 500 may additionally include processing acceleration unit 506, which may include digital signal processor (DSP), dedicated processor and / or similar devices.

[0070] I / O subsystem 508 may include user interface input devices and user interface output devices. User interface input devices may include keyboards, pointing devices (such as mice or trackballs), touchpads or touchscreens integrated into the display, scroll wheels, selection wheels, dials, buttons, switches, keyboards, audio input devices with voice command recognition systems, microphones, and other types of input devices. For example, user interface input devices may include motion sensing and / or gesture recognition devices, such as the Microsoft Kinect® motion sensor, which allows users to control and interact with input devices (such as the Microsoft Xbox® 360 game controller) using gestures and spoken commands through a natural user interface. User interface input devices may also include eye gesture recognition devices, such as the Google Glass® blink detector, which can detect user eye movements (such as “blinking” when taking photos and / or making menu selections) and translate eye gestures into input devices (such as Google Glass®). Furthermore, user interface input devices may also include voice recognition sensing devices, enabling users to interact with voice recognition systems (such as the Siri® navigator) via voice commands.

[0071] User interface input devices may also include, but are not limited to, 3D mice, joysticks or pointing sticks, game controllers, and graphics tablets, as well as audio / video devices such as speakers, digital cameras, digital camcorders, portable media players, webcams, image scanners, fingerprint scanners, barcode readers, 3D scanners, 3D printers, laser rangefinders, and eye-tracking devices. Furthermore, user interface input devices may also include, for example, medical imaging input devices such as computed tomography (CT), magnetic resonance imaging (MRI), positional emission computed tomography (PECT), and medical ultrasound imaging devices. User interface input devices may also include audio input devices such as MIDI keyboards and digital musical instruments.

[0072] User interface output devices may include display subsystems, indicator lights, or non-visual display devices such as audio output devices. Display subsystems may be cathode ray tubes (CRTs), flat panel displays (e.g., flat panel displays using liquid crystal displays (LCDs) or plasma displays), projection devices, touchscreens, etc. Generally, the term "output device" is used to encompass all possible types of devices and mechanisms for outputting information from computer system 500 to the user or other computers. For example, user interface output devices may include, but are not limited to, various display devices that visually convey text, graphics, and audio / video information, such as monitors, printers, speakers, headphones, car navigation systems, plotters, voice output devices, and modems.

[0073] Computer system 500 may include a storage subsystem 518, which contains software elements, currently located within system memory 510 as shown. System memory 510 may store program instructions that can be loaded and executed on processing unit 504, as well as data that occurs during the execution of these programs.

[0074] Depending on the configuration and type of computer system 500, system memory 510 may be volatile (e.g., random access memory (RAM)) and / or non-volatile (e.g., read-only memory (ROM)), flash memory, etc. RAM typically contains data and / or program modules that the processing unit 504 can immediately access and / or is currently operating and executing. In some embodiments, system memory 510 may include various types of memory, such as static random access memory (SRAM) or dynamic random access memory (DRAM). In some embodiments, the basic input / output system (BIOS) may typically be stored in ROM, which contains basic routines that facilitate the transfer of information between elements in computer system 500 (e.g., during startup). By way of example and not limitation, system memory 510 also illustrates application programs 512, which may include client applications, web browsers, mid-level applications, relational database management systems (RDBMS), program data 514, and operating system 516. For example, operating system 516 may include various versions of Microsoft Windows®, Apple Macintosh® and / or Linux operating systems, various commercially available UNIX® or UNIX-like operating systems (including but not limited to various GNU / Linux operating systems, Google Chrome® operating system, etc.) and / or mobile operating systems such as iOS, Windows® Phone, Android® operating system, BlackBerry® 10 operating system and Palm® operating system.

[0075] Storage subsystem 518 may also provide a tangible computer-readable storage medium for storing basic programming and data structures that provide functionality for some specific implementations. Software (programs, code modules, instructions) that provides the aforementioned functionality when executed by a processor may be stored in storage subsystem 518. These software modules or instructions may be executed by processing unit 504. Storage subsystem 518 may also provide a repository for storing data used according to some specific implementations.

[0076] The storage subsystem 500 may also include a computer-readable storage medium reader 520, which may be further connected to a computer-readable storage medium 522. The computer-readable storage medium 522 may collectively represent remote, local, fixed and / or removable storage devices, plus storage media for temporarily and / or more permanently containing, storing, transmitting and retrieving computer-readable information, and may optionally be combined with system memory 510.

[0077] The computer-readable storage medium 522 containing code or code portions may also include any suitable medium, including storage media and communication media, such as, but not limited to, volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing and / or transmitting information. This may include tangible computer-readable storage media such as RAM, ROM, electronically erasable programmable ROM (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile disk (DVD) or other optical storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or other tangible computer-readable media. This may also include non-tangible computer-readable media such as data signals, data transmissions, or any other medium that can be used to transmit the desired information and is accessible to the computing system 500.

[0078] For example, computer-readable storage medium 522 may include hard disk drives that read from or write to non-removable, non-volatile magnetic media, disk drives that read from or write to removable, non-volatile magnetic disks, and optical drives that read from or write to removable, non-volatile optical discs such as CD-ROMs, DVDs, and Blu-ray® discs or other optical media. Computer-readable storage medium 522 may include, but is not limited to, Zip® drives, flash memory cards, Universal Serial Bus (USB) flash drives, Secure Digital (SD) cards, DVD disks, digital videotapes, etc. Computer-readable storage medium 522 may also include solid-state drives (SSDs) based on non-volatile memory, such as flash-based SSDs, enterprise-class flash drives, solid-state ROMs, etc.; solid-state drives based on volatile memory, such as solid-state RAM, dynamic RAM, static RAM, DRAM-based SSDs, magnetoresistive RAM (MRAM) SSDs; and hybrid SSDs using a combination of DRAM-based and flash-based SSDs. Disk drives and their associated computer-readable media provide non-volatile memory for computer system 500 to store computer-readable instructions, data structures, program modules and other data.

[0079] The communication subsystem 524 provides an interface to other computer systems and networks. The communication subsystem 524 acts as an interface for receiving data from the computer system 500 and transmitting data to other systems. For example, the communication subsystem 524 can enable the computer system 500 to connect to one or more devices via the Internet. In some embodiments, the communication subsystem 524 may include radio frequency (RF) transceiver components, GPS receiver components, and / or other components for accessing wireless voice and / or data networks (e.g., using cellular telephone technology, advanced data network technologies such as 3G, 4G, or EDGE (Global Evolution Enhanced Data Rate), WiFi (IEEE 802.11 series standards, or other mobile communication technologies, or any combination thereof). In some embodiments, the communication subsystem 524 may provide a wired network connection (e.g., Ethernet) as an additional supplement to or replacement of the wireless interface.

[0080] In some implementations, the communication subsystem 524 may also receive input communications in the form of structured and / or unstructured data feeds 526, event streams 528, event updates 530, etc., on behalf of one or more users who may use the computer system 500.

[0081] For example, the communication subsystem 524 can be configured to receive real-time updates from data sources 526 of users of social networks and / or other communication services (such as Twitter® feeds, Facebook® updates, rich website summary (RSS) feeds, etc.) and / or from one or more third-party information sources.

[0082] Additionally, the communication subsystem 524 can also be configured to receive data in the form of a continuous data stream, which may include an event stream 528 of real-time events and / or event updates 530, and may be continuous or unrestricted in nature, without a definite endpoint. Examples of applications that generate continuous data may include, for example, sensor data applications, financial market quotes, network performance measurement tools (e.g., network monitoring and traffic management applications), point-and-click flow analysis tools, vehicle traffic monitoring, etc.

[0083] The communication subsystem 524 can also be configured to output structured and / or unstructured data sources 526, event streams 528, event updates 530, etc., to one or more databases that can communicate with one or more streaming data source computers coupled to the computer system 500.

[0084] The computer system 500 can be of a variety of types, including handheld portable devices (such as iPhone® mobile phones, iPad® computing tablets, PDAs), wearable devices (such as Google Glass® head-mounted displays), PCs, workstations, mainframes, kiosks, server racks, or any other data processing systems.

[0085] Because the nature of computers and networks is constantly evolving, the computer system 500 depicted in the figure is merely one specific example. Many other configurations with more or fewer components than the system depicted in the figure are possible. For example, specific elements may be implemented using custom hardware and / or in hardware, firmware, software (including applets), or a combination thereof. Furthermore, connections to other computing devices, such as network input / output devices, may be employed. Other ways and / or methods for implementing various specific embodiments should be readily apparent from the disclosure and teachings provided herein.

[0086] The terms “approximately”, “about”, or “substantially” as used herein are to be interpreted as within the range that a person skilled in the art would expect from the specification.

[0087] In the foregoing description, numerous specific details have been listed for ease of explanation, in order to provide a thorough understanding of the various specific embodiments. However, it will be apparent that some embodiments can be implemented without some of these specific details. In other instances, well-known structures and apparatuses are represented in block diagram form.

[0088] The foregoing description provides specific embodiments only and is not intended to limit the scope, applicability, or configuration of this disclosure. Rather, the foregoing description of various embodiments will provide an advantageous disclosure for implementing at least one specific embodiment. It should be understood that various changes can be made to the function and arrangement of the elements without departing from the spirit and scope of some of the specific embodiments set forth in the appended claims.

[0089] Specific details have been provided in the foregoing description to provide a thorough understanding of the specific implementation. However, it is to be understood that this implementation can be practiced without these specific details. For example, circuits, systems, networks, processes, and other components may have been shown as components in block diagram form to avoid obscuring the specific implementation with unnecessary details. In other cases, well-known circuits, processes, algorithms, structures, and techniques may have been shown without unnecessary details to avoid obscuring the specific implementation.

[0090] Furthermore, it should be noted that a specific implementation may be described as a process, which can be represented as a flowchart, data flow diagram, structural diagram, or block diagram. While a flowchart may describe operations as a sequential process, many operations can be performed in parallel or simultaneously. Moreover, the order of operations can be rearranged. When the operations of a process are completed, the process terminates, but there may be additional steps not included in the diagram. A process can correspond to a method, a function, a procedure, a subroutine, etc. When a procedure corresponds to a function, its termination can correspond to the function returning to the calling function or the main function.

[0091] The term "computer-readable medium" includes, but is not limited to, portable or fixed storage devices, optical devices, wireless channels, and other media capable of storing, containing, or carrying instructions and / or data. A code segment or machine-executable instruction can represent any combination of programs, functions, subroutines, routines, modules, software packages, classes, or instructions, data structures, or program statements. A code segment can be coupled to another code segment or hardware circuitry by passing and / or receiving information, data, parameters, or memory contents. Information, parameters, data, etc., can be passed, forwarded, or transmitted in any suitable manner, including memory sharing, message passing, token passing, network transmission, etc.

[0092] Furthermore, specific implementations can be achieved through hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof. When implemented through software, firmware, middleware, or microcode, the program code or code segments that perform the necessary tasks can be stored in a machine-readable medium. The processor can then perform the necessary tasks.

[0093] In the foregoing specification, features have been described with reference to specific embodiments thereof, but it should be recognized that not all embodiments are limited thereto. Various features and aspects of some specific embodiments may be used alone or in combination. Furthermore, the specific embodiments may be used in any number of environments and applications beyond those described herein without departing from the broader spirit and scope of this specification. Therefore, the specification and drawings should be regarded as illustrative rather than restrictive.

[0094] Furthermore, for illustrative purposes, the methods are described in a specific order. It should be understood that in alternative embodiments, the methods may be performed in a different order. It should also be understood that the above methods can be executed by hardware components or embodied as a sequence of machine-executable instructions that can be used to cause a machine, such as a general-purpose or special-purpose processor or logic circuit programmed with the instructions, to execute these methods. These machine-executable instructions may be stored on one or more machine-readable media, such as optical discs or other types of optical discs, floppy disks, ROM, RAM, EPROM, EEPROM, magnetic cards or optical cards, flash memory, or other types of machine-readable media suitable for storing electronic instructions. Additionally, these methods can also be executed through a combination of hardware and software.

Claims

1. A semiconductor processing chamber, the semiconductor processing chamber comprising: A base configured to support a substrate in a plasma-enhanced chemical vapor deposition (PECVD) process, wherein the PECVD process forms a film on the surface of the substrate; One or more internal mesh openings are embedded in the base, wherein the one or more internal mesh openings are configured to deliver radio frequency (RF) power to the plasma in the semiconductor processing chamber during the PECVD process; A radio frequency (RF) source configured to provide the RF power to the one or more internal mesh openings; as well as One or more variable capacitors are coupled between the radio frequency source and the one or more internal meshes, wherein adjusting the capacitance value of the one or more variable capacitors adjusts the amount of radio frequency power supplied to the one or more internal meshes.

2. The semiconductor processing chamber of claim 1, wherein the one or more internal meshes comprise a plurality of internal meshes.

3. The semiconductor processing chamber of claim 1, wherein the one or more internal meshes comprise a single internal mesh.

4. The semiconductor processing chamber of claim 1, wherein the one or more internal meshes comprise two hemispherical meshes.

5. The semiconductor processing chamber of claim 1, wherein the semiconductor processing chamber further comprises: An outer mesh, wherein the outer mesh is annular and the annulus surrounds the one or more inner meshes; as well as A variable capacitor coupled between the radio frequency source and the external mesh, wherein adjusting the capacitance value of the variable capacitor adjusts the amount of radio frequency power supplied to the external mesh.

6. The semiconductor processing chamber of claim 5, wherein the semiconductor processing chamber further comprises: A computer system programmed to adjust the variable capacitor and the one or more variable capacitors during the PECVD process to adjust the amount of radio frequency power delivered to the one or more inner meshes and the amount of radio frequency power delivered to the outer meshes.

7. The semiconductor processing chamber of claim 6, wherein the capacitance value of the variable capacitor is increased until the cracking of the film on the periphery of the substrate is less than 5%.

8. The semiconductor processing chamber of claim 1, wherein the diameter of the one or more internal mesh openings is smaller than the diameter of the substrate, such that the substrate completely covers the one or more internal mesh openings when supported by the base.

9. The semiconductor processing chamber of claim 1, wherein the outer diameter of one or more internal mesh openings is smaller than the diameter of the substrate.

10. A method for reducing cracking in a film formed around a substrate during a deposition process, the method comprising: A substrate is supported on a base of a semiconductor processing chamber, wherein the semiconductor processing chamber is configured to perform a plasma-enhanced chemical vapor deposition (PECVD) process, the PECVD process forming a film on the surface of the substrate. A precursor is provided to a semiconductor processing chamber, wherein the precursor comprises a material for forming the film on the substrate; Plasma is formed from the precursor in the semiconductor processing chamber; as well as Radio frequency (RF) power is delivered to the plasma through one or more internal meshes embedded in the base, wherein the RF power generates an electric field containing a horizontal component that guides ions in the plasma to the periphery of the substrate during the formation of the membrane.

11. The method of claim 10, further comprising: The film is formed on the substrate by delivering radio frequency power to the plasma, wherein the film comprises one or more alternating oxide layers and nitride layers.

12. The method of claim 10, further comprising: The film is formed on the substrate by delivering the radio frequency power to the plasma, wherein the film includes an oxide layer with a thickness greater than 25 µm.

13. The method of claim 10, wherein the outer diameter of one or more internal mesh openings is smaller than the diameter of the substrate.

14. The method of claim 10, further comprising: Adjust the capacitance value of one or more variable capacitors to adjust the amount of radio frequency power supplied to the one or more internal meshes and generating the horizontal component of the electric field.

15. A semiconductor processing chamber, the semiconductor processing chamber comprising: A base configured to support a substrate in a plasma-enhanced chemical vapor deposition (PECVD) process, wherein the PECVD process forms a film on the surface of the substrate; One or more internal mesh openings are embedded in the substrate, wherein the one or more internal mesh openings are configured to provide radio frequency (RF) power to the plasma in the semiconductor processing chamber during the PECVD process, and the outer diameter of the one or more internal mesh openings is smaller than the diameter of the substrate. as well as A radio frequency (RF) source configured to provide the RF power to the one or more internal mesh openings.

16. The semiconductor processing chamber of claim 15, wherein the diameter of the substrate is between 0 mm and 5 mm larger than the outer diameter of the one or more mesh openings.

17. The semiconductor processing chamber of claim 15, wherein the outer diameter of the one or more mesh openings is 95% to 99% of the diameter of the substrate.

18. The semiconductor processing chamber of claim 15, further comprising an external mesh, the external mesh being annular and surrounding the one or more internal meshes, and the inner diameter of the external mesh being larger than the diameter of the substrate.

19. The semiconductor processing chamber of claim 15, wherein the difference between the outer diameter of the one or more internal mesh apertures and the diameter of the substrate is sufficient to reduce the arcing from the one or more internal mesh apertures during the PECVD process.

20. The semiconductor processing chamber of claim 15, wherein the base does not include an external mesh surrounding the one or more internal meshes, such that any mesh that supplies the radio frequency power to the plasma is covered by the substrate on the base.

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