Substrate etching using vapor adsorption
By employing low-temperature vapor adsorption and ion shock dissociation technologies, the formation problem of etching byproducts in high aspect ratio features was solved, achieving efficient etching processing and ensuring substrate processing quality and precision.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- APPLIED MATERIALS INC
- Filing Date
- 2024-12-12
- Publication Date
- 2026-07-14
AI Technical Summary
Existing etching techniques are prone to forming etching byproducts in high aspect ratio features, leading to opening blockage and tapered profiles, which affect etching performance and substrate processing quality.
Low-temperature vapor adsorption technology is used to form an adsorption layer on the substrate surface through the physical adsorption of etchant gas molecules, and to achieve etching of the substrate by means of ion bombardment dissociation or desorption, thereby reducing or eliminating the formation of etching byproducts.
It effectively reduces or eliminates etching byproducts, ensures the integrity of high aspect ratio features, and improves etching accuracy and substrate processing quality.
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Figure CN122397362A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention are generally related to the manufacture of electronic devices. Specifically, the embodiments of the present invention relate to etching processes that mitigate the formation of etching byproducts. Background Technology
[0002] An electronic device manufacturing apparatus may include multiple chambers, such as processing chambers and device gate chambers. This electronic device manufacturing apparatus may utilize robotic devices in transfer chambers configured to transfer substrates between the multiple chambers. In some examples, multiple substrates are transferred together. Processing chambers may be used in the electronic device manufacturing apparatus to perform one or more processes on the substrate, such as deposition and etching processes. A number of processing gases flow into the processing chamber. Electronic devices, such as semiconductor devices, are manufactured by performing a series of operations, including deposition, oxidation, photolithography, ion implantation, etching, etc., to form a number of patterned layers. For example, the electronic device may include a dielectric layer formed of a dielectric material, a conductive layer formed of a conductive material, and a semiconductor layer formed of a semiconductor material. Electronic device processing techniques may involve performing patterning (e.g., photolithography) to create device structures. For example, patterning may include multiple and repeated processes of deposition and etching. Summary of the Invention
[0003] According to one embodiment, a method is provided. The method includes obtaining a substrate and etching a portion of the substrate using an etching process performed at a temperature less than or equal to about 0°C. Etching the portion of the substrate involves forming an etchant on the substrate using vapor adsorption.
[0004] According to another embodiment, a method is provided. The method includes forming an adsorption layer on a substrate by physical adsorption at a temperature less than or equal to about 0°C, the adsorption layer containing molecules of etchant gas, and ion bombardment dissociation of adsorbed species or ion bombardment desorption of a non-volatile reactive layer of the adsorption layer to remove a portion of the substrate.
[0005] According to yet another embodiment, a method is provided. The method includes forming a non-volatile reactive layer based on a native oxide formed on a substrate by physical adsorption of molecules of an etchant gas on a substrate at a temperature less than or equal to about 0°C, and initiating ion bombardment desorption of the non-volatile reactive layer to remove a portion of the substrate. Attached Figure Description
[0006] This specification uses the illustrations in the accompanying drawings as examples and not as limitations, in which the same reference numerals indicate similar elements. It should be noted that different embodiments referred to as "an" or "one" in this specification are not necessarily the same embodiments, and such references mean at least one.
[0007] Figure 1 This is a cross-sectional view of a processing chamber according to some embodiments.
[0008] Figure 2 This is a diagram illustrating an example method of isotropically etching a substrate using dissociative adsorption according to some embodiments to mitigate the formation of etching byproducts.
[0009] Figure 3 This is a diagram illustrating an example method of anisotropically etching a substrate to mitigate the formation of etching byproducts, based on some embodiments of the method, using ion shock dissociation of adsorbed species or ion shock desorption of a non-volatile reactive layer.
[0010] Figure 4 This is a diagram illustrating an example method of using ion bombardment desorption of a non-volatile reactive layer to etch native oxides on a substrate surface to mitigate the formation of etching byproducts, according to some embodiments.
[0011] Figure 5 This is a timing diagram of an example method for etching a substrate using vapor adsorption to mitigate the formation of etching byproducts, according to some embodiments.
[0012] Figures 6A-6C This is a flowchart of an example method for etching a substrate using vapor adsorption to mitigate the formation of etching byproducts, according to some embodiments. Detailed Implementation
[0013] The embodiments described herein relate to etching a substrate using vapor adsorption at temperatures below or approximately 0 degrees Celsius (0 °C). Furthermore, the embodiments described herein relate to etching a substrate using a byproduct-free etching process or a near-byproduct-free etching process. Generally, etching refers to the process of removing material from a substrate structure comprising a substrate or one or more layers formed on a substrate. An example of etching is dry etching. Examples of dry etching include vapor phase etching and plasma phase etching. Vapor phase etching uses gas to remove material from the substrate.
[0014] Plasma phase (“plasma”) etching uses plasma to remove materials. Examples of plasma etching include isotropic plasma etching, ion beam abrasion or sputtering etching, reactive ion etching (RIE), and so on. Plasma can be generated from a process gas. Plasma can include reactive species, such as charged particles (e.g., ions) and / or neutral particles (e.g., atoms and / or free radicals). The surface of at least one exposed area of the substrate reacts with the plasma, causing etching of the exposed portion of the substrate. The type of process gas within the gas mixture depends on the material of the substrate to be etched. The reaction between the substrate (or one or more layers on the substrate) and the reactive species can produce volatile etching byproducts (e.g., smaller molecules) that can be removed by a vacuum system. In some embodiments, the process gas is delivered within a gas mixture that further includes a carrier gas. More specifically, the carrier gas can be an inert gas. For example, the carrier gas can be a rare gas, such as helium (He), argon (Ar), neon (Ne), xenon (Xe), krypton (Kr), radon (Rn), and so on. In some embodiments, the gas mixture can include a carrier gas mixture. Carrier gas (or carrier gas mixture) can be used to dilute the gas mixture to control the etching rate or improve etching performance. In some embodiments, the process gas is delivered without a carrier gas. For example, the process gas can be delivered via a heated gas line.
[0015] Following a dry etching pulse or cycle, etching byproducts or residues may form on the sidewalls of the etching mask and / or the sidewalls of features within the substrate. More specifically, etching byproducts may form within openings formed between features. These openings may be formed in at least one top surface of the substrate and / or in the bottom surface of the substrate. In some embodiments, the openings are through-holes. Etching byproducts may be formed at least partially due to sputtering of a mask material (e.g., silicon (Si)). For example, etching byproducts may include silicon oxide material (e.g., SiO2). More specifically, sputtered material may be recombined on the surfaces of the sidewalls of the etching mask and / or the substrate during the bias power-off period of dry etching.
[0016] In cases where openings and / or features have sufficiently small widths (e.g., critical dimensions), etching byproducts can cause obstruction or clogging of the openings after an etching cycle. For example, etching byproducts can cause clogging of openings with critical dimensions less than or equal to about 10 nanometers (nm). Clogging prevents the execution of additional dry etching processes (e.g., pulse / cycle) and reduces the accessibility of corners of high aspect ratio features, resulting in a tapered profile. Aspect ratio refers to the ratio of the height of a feature to the width (e.g., critical dimension) of the feature. According to the embodiments described herein, features can have any suitable aspect ratio. In some embodiments, high aspect ratio features can have a height-to-width ratio greater than or equal to about 30:1. In some embodiments, high aspect ratio features can have a height-to-width ratio greater than or equal to about 40:1. In some embodiments, high aspect ratio features can have a height-to-width ratio greater than or equal to about 50:1. In some embodiments, high aspect ratio features can have a height-to-width ratio greater than or equal to about 60:1. For example, the length of a feature can be about 1000 nanometers (nm) and the width of a feature can be about 16 nm (e.g., an aspect ratio of about 62.5:1).
[0017] In some implementations, etching byproducts can be removed by performing a cleaning process after each etch pulse, also known as a "flash" process. Etching pulses and flash processes can be repeated alternately until sufficient material is removed from the substrate (e.g., the feature reaches a target height). One method to eliminate byproduct redeposition involves cyclic etching of the substrate using chemisorption of halogens such as chlorine (Cl). However, chemisorption is limited to one or two monolayers, so the etch rate per cycle is limited (e.g., a few angstroms per cycle).
[0018] To address these and other drawbacks, the embodiments described herein can be used to etch a substrate using vapor adsorption to mitigate the formation of etching byproducts. More specifically, the etching process described herein can be used to reduce or eliminate etching byproducts that would result from other etching processes. At a suitable temperature, molecules of the etchant gas adsorb onto the surface of the substrate to form an adsorption layer. In some embodiments, the substrate comprises a silicon (Si) substrate and the etchant gas comprises at least one fluorine (F) gas. Examples of F-containing gases include fluorine (F2), hydrogen fluoride (HF), xenon difluoride (XeF2), chlorine trifluoride (ClF3), bromine trifluoride (BrF3), bromine pentafluoride (BrF5), iodine pentafluoride (IF5), and so on. In some embodiments, the substrate comprises one or more silicon layers or silicon-containing layers, such as a silicon mask, to be etched thereon. In some embodiments, the temperature at which the etching process is performed is less than or equal to 0°C (i.e., below zero degrees Celsius). For example, the etching process can be performed at a temperature less than about 0°C. As another example, the etching process can be performed at a temperature less than or equal to about -10°C. As another example, the etching process can be performed at a temperature less than or equal to about -20 °C. As another example, the etching process can be performed at a temperature less than or equal to about -30 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -40 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -50 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -60 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -70 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -80 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -90 °C.
[0019] In some embodiments, the etching process is a single-step etching process in which the adsorbed layer spontaneously etches the substrate at a suitable temperature. For example, the etchant gas undergoes dissociation adsorption into individual atoms, which release free radicals that can etch the substrate. Further details regarding these embodiments will be referred to later. Figure 2 and Figure 6A To illustrate.
[0020] In some embodiments, the etching process is a first multi-step etching process. For example, the first multi-step etching process may include a first step to form an adsorbed layer, similar to the process described above. The first multi-step etching process may further include a second step in which ion dissociation of the adsorbed layer is performed to release neutral particles (“neutrals”) onto the surface of the substrate (or one or more layers on the substrate). Neutrals are species without any charge (e.g., free radicals). Ion bombardment can be performed by bombarding the surface of the substrate with ions. Ion bombardment can cause the molecules of the adsorbed layer to split into individual atoms that can etch the substrate. Performing ion bombardment may include using any suitable gas to generate plasma. In some embodiments, an inert gas is used to generate plasma. For example, Ar can be used to generate plasma. In some embodiments, an ion energy greater than or equal to about 25 electron volts (eV) is used to generate plasma. In some embodiments, the etching step of the multi-step etching process is performed at a temperature below zero degrees Celsius. Further details regarding these embodiments will be referred to later. Figure 3 and Figure 6B To illustrate.
[0021] In some embodiments, the etching process is a second multi-step etching process that can be performed to overcome the native oxide formed on the substrate (or one or more layers on the substrate). For example, the second multi-step etching process may include a first step to form a non-volatile reactive layer on the surface of the substrate (or one or more layers on the substrate). More specifically, as described above, molecules of the gas introduced into the processing chamber may adsorb onto the native oxide formed on the substrate. In some embodiments, the substrate (or upper layer on the substrate) is Si, and the native oxide includes silicon dioxide (SiO2) formed on or on the substrate. The second multi-step etching process may further include a second step in which ion bombardment desorption of the non-volatile reactive layer is performed to release neutral substances onto the surface of the substrate. Ion bombardment desorption can be performed by bombarding the surface of the substrate with ions. Ion bombardment can cause the desorption of the non-volatile reactive layer, which etches the substrate. Performing ion bombardment desorption may include using any suitable gas to generate plasma. In some embodiments, an inert gas is used to generate plasma. For example, Ar can be used to generate plasma. In some embodiments, plasma is generated using ion energies greater than or equal to about 25 eV. In some embodiments, a multi-step etching process is performed at sub-zero temperatures. Further details regarding these embodiments will be provided later. Figure 4 and Figure 6C To illustrate.
[0022] Figure 1This is a cross-sectional view of a processing chamber 100 according to some embodiments. For example, the processing chamber 100 may be used for etching processes, wherein an aggressive plasma environment and / or aggressive chemicals are provided. For example, the processing chamber 100 may be a chamber for a plasma etching reactor (also known as a plasma etcher). Examples of chamber components that can be exposed to plasma in the processing chamber 100 are a substrate support assembly 148, an electrostatic chuck (ESC), a ring (e.g., a processing kit ring or a single ring), a chamber wall, a substrate, a spray head 130, a gas distribution plate, a liner, a liner sleeve, a shield, a plasma curtain, a flow equalizer, a cooling substrate, a chamber port, a chamber cover, a nozzle, a processing kit ring, and so on.
[0023] In one embodiment, the processing chamber 100 includes a chamber body 102 surrounding an internal volume 106 and a spray head 130. The spray head 130 may or may not include a gas distribution plate. For example, the spray head may be a multi-plate spray head, including a spray head base and a spray head gas distribution plate coupled to the spray head base. Alternatively, in some embodiments, the spray head 130 may be replaced by a cover or nozzle, or in other embodiments by a plurality of disc-shaped spray head compartments and a plasma generation unit. The processing chamber body 102 may be made of aluminum, stainless steel, or other suitable materials. The processing chamber body 102 generally includes sidewalls 108 and a bottom 110. Any of the spray head 130 (or cover and / or nozzle), sidewalls 108, and / or bottom 110 may include a multilayer anti-plasma coating.
[0024] The outer liner 116 may be positioned adjacent to the sidewall 108 to protect the processing chamber body 102. The outer liner 116 may be a halogen-resistant gas-containing material, such as Al2O3 or Y2O3. In some embodiments, the outer liner 116 may be coated with a multilayer anti-plasma ceramic coating.
[0025] A discharge port 126 may be defined within the processing chamber body 102 and may be coupled to a pump system 128. The pump system 128 may include one or more pumps and throttle valves for evacuating and regulating the pressure of the internal volume 106 of the processing chamber 100.
[0026] The spray head 130 may be supported on the side wall 108 of the processing chamber body 102 and / or on the top portion of the processing chamber body. The spray head 130 (or cover) may be opened to allow access to the internal volume 106 of the processing chamber 100, and when closed, it may provide a seal for the processing chamber 100. A gas panel 158 may be coupled to the processing chamber 100 to provide a gas mixture comprising at least one processing gas and / or at least one carrier gas through the spray head 130 or cover and nozzle to the internal volume 106. Examples of processing gases that may be delivered via the gas panel 158 and used for processing substrates / samples in the processing chamber 100 include fluorine (F2), hydrogen fluoride (HF), xenon fluoride (XeF2), chlorine trifluoride (ClF3), bromine trifluoride (BrF3), bromine pentafluoride (BrF5), iodine pentafluoride (IF5), hydrogen bromide (HBr), nitrogen trifluoride (NF3), and the like. Examples of carrier gases (e.g., diluents) include inert gases (e.g., rare gases). The spray head 130 includes a plurality of gas delivery orifices 132 extending through the spray head 130. The spray head 130 may be or may include aluminum, anodized aluminum, an aluminum alloy (e.g., Al 6061), or anodized aluminum alloy. In some embodiments, the spray head 130 includes a gas distribution plate coupled to the spray head. The gas distribution plate may be, for example, Si or SiC. The gas distribution plate may additionally include a plurality of orifices aligned with the orifices in the spray head 130.
[0027] In some embodiments, the plasma is capacitively coupled plasma (CCP) generated by capacitively coupling power to the processing chamber 100. In some embodiments, the plasma is inductively coupled plasma (ICP) generated by inductively coupling power to the processing chamber 100. For example, in some embodiments, inductors including inductors 160-1 and 160-2 are located on the spray head 130. Inductors 160-1 and 160-2 may be powered by a power supply 162 coupled to a matching circuit 164. In some embodiments, power supply 162 includes a radio frequency (RF) generator. In some embodiments, power supply 162 includes a pulsed direct current (DC) power supply.
[0028] A substrate support assembly 148 is disposed within the internal volume 106 of a processing chamber 100 below the spray head 130. The substrate support assembly 148 holds a substrate 144, including the substrate, during processing. The substrate may be a bare silicon substrate, a substrate having one or more layers formed thereon, a patterned substrate having one or more patterned features formed thereon, or may include a mask (e.g., a mask having areas cured by photolithography), and the like. The substrate support assembly 148 may include an electrostatic chuck for securing the substrate 144 during processing, a metal cooling plate coupled to the electrostatic chuck, and / or one or more additional components. A liner may cover the periphery of the substrate support assembly 148. The liner may be a halogen-resistant material, such as Al₂O₃ or Y₂O₃. In some embodiments, the substrate support assembly 148, portions of the substrate support assembly 148, and / or the liner may be coated with a metal layer and a barrier layer.
[0029] In some embodiments, the substrate support assembly 148 is biased to generate plasma in the processing chamber 100. For example, a power supply 166 may be used to bias the substrate support assembly 148. In some embodiments, the power supply 166 includes an RF generator. In some embodiments, the power supply includes a pulsed DC power supply.
[0030] Processing chamber 100 may be configured to use vapor adsorption to etch substrate 144 to minimize etching product formation. More specifically, an etching process may be performed to etch the substrate of substrate 144. In some embodiments, substrate 144 comprises a Si substrate. In some embodiments, a primary oxide is formed on substrate 144. For example, the primary oxide may comprise SiO2. In some embodiments, the etching process is performed at a temperature below zero degrees Celsius. In some embodiments, the etching process is a single-step etching process. In some embodiments, the etching process is a multi-step etching process. Further details regarding the use of vapor adsorption to etch substrate 144 to minimize etching product formation will now be referred to. Figure 2-6C This will be explained later.
[0031] Figure 2 This is diagram 200 illustrating an example method of etching a substrate using dissociative adsorption according to some embodiments. Initially, in step 210, a substrate 212 is provided. For example, the substrate 212 may be similar to... Figure 1 The substrate 144, and can be such as Figure 1 The substrate support assembly 148 receives the substrate support assembly. In some embodiments, the substrate 212 includes a Si substrate. In some embodiments, the substrate 212 includes a SiN substrate. In some embodiments, the substrate 212 includes one or more layers formed thereon. In some embodiments, the substrate 212 includes a Si layer formed thereon.
[0032] Figure 2 The method shown may include a single-step etching process, which includes step 220. More specifically, in step 220, gas 222 is directed such that molecules of gas 222, comprising atoms 224 and 226, can be adsorbed onto the surface of substrate 212 to form an adsorption layer 228. In some embodiments, physical adsorption is used to form the adsorption layer 228. In some embodiments, gas 222 includes at least one fluorine-containing gas. Examples of fluorine-containing gases include F2, HF, XeF2, ClF3, BrF3, BrF5, IF5, etc. In some embodiments, gas 222 includes HF gas, where atom 224 is hydrogen (H) and atom 226 is fluorine (F). During the single-step etching process, the adsorption layer 228 spontaneously etches substrate 212 by dissociating adsorption, as shown in step 230. In some embodiments, the etching performed during step 220 has isotropic directionality. Step 220 may be repeated any number of times to remove a target amount of material from substrate 212. In some embodiments, approximately 1 nm of material is removed per cycle. In some implementations, each cycle is executed in between approximately 50 seconds (s) and approximately 70 seconds (s).
[0033] The etching in step 220 can be performed at any suitable temperature. In some embodiments, the temperature is less than or equal to 0°C (i.e., below zero degrees Celsius). For example, the etching process can be performed at a temperature less than about 0°C. As another example, the etching process can be performed at a temperature less than or equal to about -10°C. As another example, the etching process can be performed at a temperature less than or equal to about -20°C. As another example, the etching process can be performed at a temperature less than or equal to about -30°C. As yet another example, the etching process can be performed at a temperature less than or equal to about -40°C. As yet another example, the etching process can be performed at a temperature less than or equal to about -50°C. As yet another example, the etching process can be performed at a temperature less than or equal to about -60°C. As yet another example, the etching process can be performed at a temperature less than or equal to about -70°C. As yet another example, the etching process can be performed at a temperature less than or equal to about -80°C. As yet another example, the etching process can be performed at a temperature less than or equal to about -90°C. Regarding Figure 2 Further details of the single-step etching process shown will be provided later. Figure 6A To illustrate.
[0034] Figure 3 This is a diagram 300 illustrating an example method of etching a substrate using ion bombardment dissociation of molecules adsorbed on the substrate surface, according to some embodiments. Initially, in step 310, a substrate 312 is provided. For example, the substrate 312 may be similar to... Figure 1 The substrate 144, and can be such as Figure 1The substrate support assembly 148 receives the substrate support assembly. In some embodiments, the substrate 312 includes a Si substrate.
[0035] Figure 3 The method shown may include a multi-step etching process, comprising steps 320 and 330. More specifically, in step 320, gas 322 is guided and the molecules of gas 322 may be adsorbed onto the surface of substrate 312 to form an adsorption layer 324. Step 320 may be similar to... Figure 2 Step 220. In some embodiments, physical adsorption is used to form the adsorption layer 324. In some embodiments, the gas 322 includes at least one F-containing gas. Examples of F-containing gases include F2, HF, XeF2, ClF3, BrF3, BrF5, IF5, etc.
[0036] In step 330, ion bombardment dissociation is performed on the adsorbed layer 324 to release neutral material used for etching the substrate 312. For example, performing ion bombardment dissociation may include bombarding the surface of the substrate 312 with ions. Performing ion bombardment dissociation may include using any suitable gas to generate plasma 332. In some embodiments, an inert gas is used to generate plasma 332. For example, Ar may be used to generate plasma 332. In some embodiments, an ion energy greater than or equal to about 25 eV is used to generate plasma 332. In some embodiments, the etching performed during step 330 has isotropic directionality. Steps 320 and / or 330 may be repeated any number of times to remove a target amount of material from the substrate 312. In some embodiments, about 1 nm of material is removed per cycle. In some embodiments, each cycle is performed between about 50 s and about 70 s.
[0037] The etching performed in steps 320-330 can be carried out at a suitable temperature. In some embodiments, the temperature is less than or equal to 0 °C (i.e., a temperature below zero degrees Celsius). For example, the etching process can be performed at a temperature less than about 0 °C. As another example, the etching process can be performed at a temperature less than or equal to about -10 °C. As another example, the etching process can be performed at a temperature less than or equal to about -20 °C. As another example, the etching process can be performed at a temperature less than or equal to about -30 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -40 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -50 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -60 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -70 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -80 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -90 °C. Regarding Figure 3 Further details of the multi-step etching process shown will be provided later. Figure 5 and Figure 6B To illustrate.
[0038] Figure 4 This is a diagram 400 illustrating an example method of etching a substrate using ion bombardment desorption of molecules adsorbed on the substrate surface, according to some embodiments. Initially, in step 410, a substrate 412 is provided. For example, the substrate 412 may be similar to... Figure 1 The substrate 144, and can be such as Figure 1 The substrate support assembly 148 receives the substrate support assembly. In some embodiments, the substrate 412 includes a Si substrate. As further shown, a primary oxide 414 may be formed on the surface of the substrate 412. In some embodiments, the primary oxide 414 includes SiO2.
[0039] Figure 4 The method shown may include a multi-step etching process, comprising steps 420 and 430. More specifically, in step 420, gas 422 is guided and the molecules of gas 422 may be adsorbed onto the surface of substrate 412 to form an adsorption layer 424. The adsorption layer 424 may be a non-volatile reactive layer. Step 420 may be similar to... Figure 2 Step 220. In some embodiments, physical adsorption is used to form the adsorption layer 424. In some embodiments, the gas 422 includes at least one F-containing gas. Examples of F-containing gases include F2, HF, XeF2, ClF3, BrF3, BrF5, IF5, etc.
[0040] In step 430, ion bombardment desorption of the adsorption layer 424 is used to etch the substrate 412 by removing a portion of the substrate 412. For example, performing ion bombardment desorption may include bombarding the surface of the substrate 412 with ions. Performing ion bombardment dissociation may include using any suitable gas to generate plasma 432. In some embodiments, an inert gas is used to generate plasma 432. For example, Ar may be used to generate plasma 432. In some embodiments, an ion energy greater than or equal to about 25 eV is used to generate plasma 432. In some embodiments, the etching performed during step 430 has an anisotropic directionality. Steps 420 and / or 430 may be repeated any number of times to remove a target amount of material from the substrate 412. In some embodiments, about 1 nm of material is removed per cycle. In some embodiments, each cycle is performed between about 50 seconds (s) and about 70 seconds (s).
[0041] The etching performed in steps 420-430 can be carried out at a suitable temperature. In some embodiments, the temperature is less than or equal to 0 °C (i.e., below zero degrees Celsius). For example, the etching process can be performed at a temperature less than about 0 °C. As another example, the etching process can be performed at a temperature less than or equal to about -10 °C. As another example, the etching process can be performed at a temperature less than or equal to about -20 °C. As another example, the etching process can be performed at a temperature less than or equal to about -30 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -40 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -50 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -60 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -70 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -80 °C. As yet another example, the etching process can be performed at a temperature less than or equal to about -90 °C. Regarding Figure 4 Further details of the multi-step etching process shown will be provided later. Figure 5 and Figure 6C To illustrate.
[0042] Figure 5 This is a timing diagram (“Graph”) 500 of an example method for etching a substrate using vapor adsorption according to some embodiments. More specifically, Graph 500 shows a cycle of a multi-step etching process including steps 510 and 520. For example, step 510 may correspond to… Figure 3 Steps 310-320 or Figure 4 Steps 410-420, and step 520 can correspond to Figure 3 Step 330 or Figure 4 Step 430. Assume the multi-step etching process cycle begins at start time “t0”. As shown, from t0 to time “t1”, the etchant gas flow (e.g., HF flow), the inert gas flow (e.g., Ar flow), and the plasma power are all off. At t1, the etchant gas flow is turned on to guide the etchant gas into the processing chamber to form, on the substrate, an adsorbed layer comprising molecules of the etchant gas (e.g., HF flow, Ar flow, Ar flow). Figure 3 Layer 324 or Figure 4 (Layer 424). At time "t2", the etchant gas flow is shut off while the inert gas flow is turned on to purge the processing chamber. At time "t3", the plasma power signal is turned on while the inert gas flow remains on to generate plasma for performing a second step of the etching process (e.g., ion bombardment or ion bombardment desorption). At time "t4", the plasma power signal is turned off while the inert gas flow remains on to purge the processing chamber until time "t5". In some embodiments, another cycle of multi-step etching processing may be performed.
[0043] Figure 6A This is a flowchart of an example method 600A for etching a substrate using vapor adsorption according to some embodiments. For example, method 600A can be used as described above. Figure 1 The processing chamber 100 is used to perform the process. In some embodiments, method 600A is a method of etching the substrate using dissociative adsorption, such as the method described above. Figure 2 The method described above. In some embodiments, method 600A is a method of etching a substrate using ion bombardment dissociation, such as the method described above. Figure 3 A-3B and Figure 5 The method described and will be discussed later. Figure 6B To further illustrate the method. In some embodiments, method 600A is a method of etching the native oxide using ion bombardment dissociation, such as the one described above. Figure 4 The method described in A-5 and will be discussed later. Figure 6C The method will be explained further.
[0044] In block 610A, a substrate is obtained. For example, the substrate can be received by a substrate support assembly within a processing chamber. In some embodiments, the substrate comprises a Si substrate.
[0045] In block 620A, an etching process is used to etch a portion of the substrate by adsorbing etchant onto the substrate using vapor. More specifically, a gas may be introduced into a processing chamber, and gas molecules may adsorb onto the surface of the substrate to form an adsorption layer. The type of gas used to form the etchant during the etching process can be selected based on the material of the substrate. In some embodiments, the gas includes at least one fluorine-containing gas. Examples of fluorine-containing gases include F2, HF, XeF2, ClF3, BrF3, BrF5, IF5, and so on.
[0046] In some embodiments, the etching process is a single-step etching process (e.g., a single-step etching formulation). In some embodiments, the single-step etching process has the directionality of isotropic etching. For example, a single-step etching process may be similar to the above regarding... Figure 2 The single-step etching process described above.
[0047] In some embodiments, the etching process is a multi-step etching process (e.g., a two-step etching formulation). In some embodiments, the multi-step etching process has anisotropic etching directionality. For example, a multi-step etching process may be similar to the above regarding... Figure 3 The multi-step etching process described in A-5 and subsequent matters... Figures 6B-6C The multi-step etching process is described in further detail.
[0048] At a suitable temperature, the molecules of the adsorbed layer spontaneously etch the substrate in a manner that reduces or eliminates etching byproducts. The portion of the substrate being etched may include bringing the processing chamber to a target temperature. One or more cooling elements may be used to bring the processing chamber to the target temperature. For example, the cooling elements may include a cooler containing a coolant or refrigerant. In some embodiments, the target temperature is less than or equal to about 0 °C (i.e., a temperature below zero degrees Celsius). For example, the target temperature may be less than about 0 °C. As another example, the target temperature may be less than or equal to about -10 °C. As another example, the target temperature may be less than or equal to about -20 °C. As another example, the target temperature may be less than or equal to about -30 °C. As yet another example, the target temperature may be less than or equal to about -40 °C. As yet another example, the target temperature may be less than or equal to about -50 °C. As yet another example, the target temperature may be less than or equal to about -60 °C. As yet another example, the target temperature may be less than or equal to about -70 °C. As yet another example, the target temperature may be less than or equal to about -80 °C. As yet another example, the target temperature can be less than or equal to approximately -90 °C.
[0049] The portion of the etched substrate may include bringing the processing chamber to a target pressure (e.g., using a pump). In some embodiments, the target pressure ranges from about 0.1 mTorr to about 500 mTorr, from about 1 mTorr to about 400 mTorr, from about 5 mTorr to about 300 mTorr, from about 10 mTorr to about 200 mTorr, from about 25 mTorr to about 100 mTorr, or any subrange or value thereof.
[0050] The total gas supply flow rate for the gas used for vapor adsorption according to the embodiments described herein can be any suitable total gas supply flow rate. In some embodiments, the total gas supply flow rate of the gas mixture ranges from about 50 standard cubic centimeters (sccm) per minute to about 2000 sccm, from about 100 sccm to about 1500 sccm, from about 150 sccm to about 1250 sccm, from about 200 sccm to about 1000 sccm, from about 250 sccm to about 750 sccm, or any subrange or value thereof.
[0051] The total time for introducing gas into the processing chamber can be any suitable amount of time. In some embodiments, the amount of time ranges from about 1 second (s) to about 500 s, from about 30 s to about 300 s, from about 60 s to about 240 s, from about 120 s to about 200 s, or any subrange or value thereof.
[0052] A portion of etching a substrate may include determining whether a target amount of material has been removed from the substrate. If the target amount of material has not been removed from the substrate, another etching cycle or pulse may be performed. If the target amount of material has been removed from the substrate, the etching process is complete. For example, determining whether a target amount of material has been removed from the substrate may include confirming after each etching cycle whether the target amount of material has been removed from the substrate. Additionally or alternatively, determining whether a target amount of material has been removed from the substrate may include determining whether the amount of time for which the etching process has been performed meets a critical condition according to the etching recipe (e.g., greater than or equal to a target amount of time defined by the etching recipe). If the amount of time does not meet the critical condition (e.g., the etching process has not been performed to the target amount of time), then the target amount of material may not have been removed from the substrate. If the amount of time meets the critical condition (e.g., the etching process has been performed to the target amount of time), this means that it is highly likely that the target amount of material has been removed from the substrate.
[0053] In some embodiments, the substrate may have dimensions (e.g., thickness and width) to enable the formation of high aspect ratio features. According to the embodiments described herein, the feature may have any suitable aspect ratio. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 30:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 40:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 50:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 60:1. For example, the length of the feature may be about 1000 nanometers (nm) and the width of the feature may be about 16 nm (e.g., an aspect ratio of about 62.5:1). According to the embodiments described herein, the feature formed from the substrate may include any suitable width. In some embodiments, the width of the feature may be less than or equal to about 50 nm. In some embodiments, the width of the feature may be less than or equal to about 40 nm. In some embodiments, the width of the feature may be less than or equal to about 30 nm. In some implementations, the width of the feature may be less than or equal to about 20 nm.
[0054] Figure 6B This is a flowchart of an example method 600B for etching a substrate using ion bombardment dissociation of molecules adsorbed on the substrate surface, according to some embodiments. For example, method 600B can be used as described above regarding... Figure 1 The processing chamber 100 is used to perform the process. In some embodiments, method 600B is a method of etching the substrate using ion bombardment dissociation, as described above. Figure 3 and Figure 5 The method described.
[0055] In block 610B, a substrate is obtained. For example, the substrate can be received by a substrate support assembly within the processing chamber. In some embodiments, the substrate is a Si substrate.
[0056] In block 620B, a portion of the substrate is etched. In some embodiments, the etching process is a multi-step etching process (e.g., a multi-step etching formulation). In some embodiments, the etching process has anisotropic etching directionality. For example, using an etching process to etch a portion of the substrate may include using vapor adsorption to form an etchant on the substrate in block 622. Block 622 may be similar to... Figure 6A The 620A cube.
[0057] The total gas supply flow rate for the gas used for gas adsorption according to the embodiments described herein can be any suitable total gas supply flow rate. In some embodiments, the total gas supply flow rate of the gas mixture ranges from about 50 standard cubic centimeters (sccm) per minute to about 2000 sccm, from about 100 sccm to about 1500 sccm, from about 150 sccm to about 1250 sccm, from about 200 sccm to about 1000 sccm, from about 250 sccm to about 750 sccm, or any subrange or value thereof.
[0058] The etching process used to etch portions of the substrate may further include ion bombardment dissociation of the etchant starting at block 624. Ion bombardment dissociation releases a neutral substance that can be used to etch the substrate material. Ion bombardment dissociation may be performed at a target temperature. In some embodiments, the target temperature is less than or equal to about 0 °C (i.e., a temperature below zero degrees). For example, the target temperature may be less than about 0 °C. As another example, the target temperature may be less than or equal to about -10 °C. As another example, the target temperature may be less than or equal to about -20 °C. As another example, the target temperature may be less than or equal to about -30 °C. As yet another example, the target temperature may be less than or equal to about -40 °C. As yet another example, the target temperature may be less than or equal to about -50 °C. As yet another example, the target temperature may be less than or equal to about -60 °C. As yet another example, the target temperature may be less than or equal to about -70 °C. As yet another example, the target temperature may be less than or equal to about -80 °C. As yet another example, the target temperature may be less than or equal to about -90 °C. Ion bombardment dissociation can be performed at a target pressure. In some embodiments, the target pressure ranges from about 0.1 mTorr to about 500 mTorr, from about 1 mTorr to about 400 mTorr, from about 5 mTorr to about 300 mTorr, from about 10 mTorr to about 200 mTorr, from about 25 mTorr to about 100 mTorr, or from about 1 mTorr to about 100 mTorr, or any subrange or value thereof.
[0059] Initiating ion bombardment dissociation at block 624 may include applying a bias power to achieve a biased state. Any suitable bias power may be applied according to the embodiments described herein. In some embodiments, the bias power ranges from about 10 watts (W) to about 5,000 W, from about 200 W to about 2,000 W, from about 300 W to about 3,000 W, from about 400 W to about 2,500 W, from about 500 W to about 2,000 W, from about 600 W to about 1,500 W, or from about 750 W to about 1,250 W, or any subrange or value thereof. Higher bias power can result in a more straight profile (e.g., a more vertical profile on the trench sidewalls) with reduced profile curvature and lower selectivity for patterned masks. The bias power may be a time-averaged power. According to the embodiments described herein, the bias frequency may be any suitable frequency. In some implementations, the bias frequency ranges from about 400 kHz to about 60 MHz, from about 400 kHz to about 40 MHz, from about 400 kHz to about 35 MHz, from about 400 kHz to about 27 MHz, from about 400 kHz to about 20 MHz, or from about 800 kHz to about 10 MHz, or any subrange or value thereof. According to the implementations described herein, bias power can be applied for any suitable time. In some implementations, bias power is applied from about 10 microseconds (µs) to about 1 ms, from about 30 µs to about 1 ms, from about 50 µs to about 1 ms, from about 70 µs to about 1 ms, or from about 85 µs to about 1 ms, or any subrange or value thereof.
[0060] Initiating ion bombardment dissociation at block 624 may further include applying source power after the bias power to achieve a source state. Any suitable source power may be applied according to the embodiments described herein. In some embodiments, the source power ranges from about 10 W to about 5000 W, from about 200 W to about 2000 W, from about 300 W to about 3000 W, from about 400 W to about 2500 W, from about 500 W to about 2000 W, from about 600 W to about 1500 W, or from about 750 W to about 1250 W, or any subrange or value thereof. The source power may be an hourly source power (e.g., source power multiplied by the duty cycle). According to the embodiments described herein, the source frequency may be any suitable frequency. In some embodiments, the source frequency is from about 10 MHz to about 15 MHz, or about 13 MHz, or any subrange or value thereof. According to the embodiments described herein, the source power may be applied for any suitable time. In some implementations, the source power may be applied for a period of about 10 µs to about 1 ms, about 30 µs to about 1 ms, about 50 µs to about 1 ms, about 70 µs to about 1 ms, or about 85 µs to about 1 ms, or any subrange or value thereof.
[0061] In some implementations, the ratio of the first time period to the second time period is from about 1:10 to about 10:1, from about 1:9 to about 9:1, from about 1:8 to about 8:1, from about 1:7 to about 7:1, from about 1:6 to about 6:1, from about 1:5 to about 5:1, from about 1:4 to about 4:1, from about 1:3 to about 3:1, from about 1:2 to about 2:1, or about 1:1, or any subrange or value thereof.
[0062] A portion of etching a substrate may include determining whether a target amount of material has been removed from the substrate. If the target amount of material has not been removed from the substrate, another etching cycle or pulse may be performed. If the target amount of material has been removed from the substrate, the etching process is complete. For example, determining whether a target amount of material has been removed from the substrate may include confirming after each etching cycle or pulse whether the target amount of material has been removed from the substrate. Additionally or alternatively, determining whether a target amount of material has been removed from the substrate may include determining whether the amount of time for which the etching process has been performed meets a critical condition according to the etching recipe (e.g., greater than or equal to a target amount of time defined by the etching recipe). If the amount of time does not meet the critical condition (e.g., the etching process has not been performed to the target amount of time), then the target amount of material may not have been removed from the substrate. If the amount of time meets the critical condition (e.g., the etching process has been performed to the target amount of time), this means that it is highly likely that the target amount of material has been removed from the substrate.
[0063] In some embodiments, the substrate may have dimensions (e.g., thickness and width) to enable the formation of high aspect ratio features. According to the embodiments described herein, the feature may have any suitable aspect ratio. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 30:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 40:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 50:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 60:1. For example, the length of the feature may be about 1000 nanometers (nm) and the width of the feature may be about 16 nm (e.g., an aspect ratio of about 62.5:1). According to the embodiments described herein, the feature formed from the substrate may include any suitable width. In some embodiments, the width of the feature may be less than or equal to about 50 nm. In some embodiments, the width of the feature may be less than or equal to about 40 nm. In some embodiments, the width of the feature may be less than or equal to about 30 nm. In some implementations, the width of the feature may be less than or equal to about 20 nm.
[0064] Figure 6C This is a flowchart of an example method 600C for etching a substrate using ion bombardment desorption of molecules adsorbed on the substrate surface, according to some embodiments. For example, method 600C can be used as described above. Figure 1 The processing chamber 100 is used to perform the process. In some embodiments, method 600C is a method of etching a substrate using ion bombardment desorption, as described above. Figure 4-5 The method described herein. In some embodiments, the etching process is a multi-step etching process (e.g., a multi-step etching formulation). In some embodiments, the etching process has anisotropic etching directionality.
[0065] In block 610C, a substrate is obtained. For example, the substrate can be received by a substrate support assembly within the processing chamber. In some embodiments, the substrate is a Si substrate.
[0066] In block 620C, a non-volatile reactive layer is formed on the substrate. For example, a primary oxide may be formed on the surface of the substrate, and forming the non-volatile reactive layer may include a guiding gas to form an etchant using vapor adsorption. In some embodiments, the primary oxide includes SiO2. In some embodiments, the gas includes at least one fluorine-containing gas. Examples of fluorine-containing gases include F2, HF, XeF2, ClF3, BrF3, BrF5, IF5, etc.
[0067] The total gas supply flow rate for the gas used for vapor adsorption according to the embodiments described herein can be any suitable total gas supply flow rate. In some embodiments, the total gas supply flow rate of the gas mixture ranges from about 50 sccm to about 2000 sccm, from about 100 sccm to about 1500 sccm, from about 150 sccm to about 1250 sccm, from about 200 sccm to about 1000 sccm, from about 250 sccm to about 750 sccm, or any subrange or value thereof.
[0068] At block 630C, ion bombardment desorption of the non-volatile reactive layer is initiated to remove a portion of the substrate. Ion bombardment desorption can be performed at a target temperature. In some embodiments, the target temperature is less than or equal to about 0 °C (i.e., a temperature below zero degrees Celsius). For example, the target temperature may be less than or about 0 °C. As another example, the target temperature may be less than or equal to about -10 °C. As another example, the target temperature may be less than or equal to about -20 °C. As another example, the target temperature may be less than or equal to about -30 °C. As yet another example, the target temperature may be less than or equal to about -40 °C. As yet another example, the target temperature may be less than or equal to about -50 °C. As yet another example, the target temperature may be less than or equal to about -60 °C. As yet another example, the target temperature may be less than or equal to about -70 °C. As yet another example, the target temperature may be less than or equal to about -80 °C. As yet another example, the target temperature may be less than or equal to about -90 °C.
[0069] Ion bombardment desorption can be performed at a target pressure. In some embodiments, the target pressure ranges from about 0.1 mTorr to about 500 mTorr, from about 1 mTorr to about 400 mTorr, from about 5 mTorr to about 300 mTorr, from about 10 mTorr to about 200 mTorr, from about 25 mTorr to about 100 mTorr, or from about 1 mTorr to about 100 mTorr, or any subrange or value thereof.
[0070] Initiating ion bombardment desorption at block 630C may include applying a bias power to achieve a bias state. Any suitable bias power may be applied according to the embodiments described herein. In some embodiments, the bias power ranges from about 10 watts (W) to about 5,000 W, from about 200 W to about 2,000 W, from about 300 W to about 3,000 W, from about 400 W to about 2,500 W, from about 500 W to about 2,000 W, from about 600 W to about 1,500 W, or from about 750 W to about 1,250 W, or any subrange or value thereof. Higher bias power can result in a more straight profile (e.g., a more vertical profile on the trench sidewalls) with reduced profile curvature and lower selectivity for patterned masks. The bias power may be a time-averaged power. According to the embodiments described herein, the bias frequency may be any suitable frequency. In some implementations, the bias frequency ranges from about 400 kHz to about 60 MHz, from about 400 kHz to about 40 MHz, from about 400 kHz to about 35 MHz, from about 400 kHz to about 27 MHz, from about 400 kHz to about 20 MHz, or from about 800 kHz to about 10 MHz, or any subrange or value thereof. According to the implementations described herein, bias power can be applied for any suitable time. In some implementations, bias power is applied for a duration ranging from about 10 µs to about 1 ms, from about 30 µs to about 1 ms, from about 50 µs to about 1 ms, from about 70 µs to about 1 ms, or from about 85 µs to about 1 ms, or any subrange or value thereof.
[0071] Initiating ion bombardment desorption at block 630C may further include applying a source power after a bias power to achieve a source state. Any suitable source power may be applied according to the embodiments described herein. In some embodiments, the source power ranges from about 10 W to about 5000 W, from about 200 W to about 2000 W, from about 300 W to about 3000 W, from about 400 W to about 2500 W, from about 500 W to about 2000 W, from about 600 W to about 1500 W, or from about 750 W to about 1250 W, or any subrange or value thereof. The source power may be an hourly averaged source power (e.g., source power multiplied by the duty cycle). According to the embodiments described herein, the source frequency may be any suitable frequency. In some embodiments, the source frequency is from about 10 MHz to about 15 MHz, or about 13 MHz, or any subrange or value thereof. According to the embodiments described herein, the source power may be applied for any suitable duration. In some implementations, the source power may be applied for a period of about 10 µs to about 1 ms, about 30 µs to about 1 ms, about 50 µs to about 1 ms, about 70 µs to about 1 ms, or about 85 µs to about 1 ms, or any subrange or value thereof.
[0072] In some implementations, the ratio of the first time period to the second time period is from about 1:10 to about 10:1, from about 1:9 to about 9:1, from about 1:8 to about 8:1, from about 1:7 to about 7:1, from about 1:6 to about 6:1, from about 1:5 to about 5:1, from about 1:4 to about 4:1, from about 1:3 to about 3:1, from about 1:2 to about 2:1, or about 1:1, or any subrange or value thereof.
[0073] A portion of etching a substrate may include determining whether a target amount of material has been removed from the substrate. If the target amount of material has not been removed from the substrate, another etching cycle or pulse may be performed. If the target amount of material has been removed from the substrate, the etching process is complete. For example, determining whether a target amount of material has been removed from the substrate may include confirming after each etching cycle or pulse whether the target amount of material has been removed from the substrate. Additionally or alternatively, determining whether a target amount of material has been removed from the substrate may include determining whether the amount of time for which the etching process has been performed meets a critical condition according to the etching recipe (e.g., greater than or equal to a target amount of time defined by the etching recipe). If the amount of time does not meet the critical condition (e.g., the etching process has not been performed to the target amount of time), then the target amount of material may not have been removed from the substrate. If the amount of time meets the critical condition (e.g., the etching process has been performed to the target amount of time), this means that it is highly likely that the target amount of material has been removed from the substrate.
[0074] In some embodiments, the substrate may have dimensions (e.g., thickness and width) to enable the formation of high aspect ratio features. According to the embodiments described herein, the feature may have any suitable aspect ratio. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 30:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 40:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 50:1. In some embodiments, a high aspect ratio feature may have a height-to-width ratio greater than or equal to about 60:1. For example, the length of the feature may be about 1000 nanometers (nm) and the width of the feature may be about 16 nm (e.g., an aspect ratio of about 62.5:1). According to the embodiments described herein, the feature formed from the substrate may include any suitable width. In some embodiments, the width of the feature may be less than or equal to about 50 nm. In some embodiments, the width of the feature may be less than or equal to about 40 nm. In some embodiments, the width of the feature may be less than or equal to about 30 nm. In some implementations, the width of the feature may be less than or equal to about 20 nm.
[0075] The foregoing description illustrates numerous specific details, such as examples of particular systems, components, methods, etc., to provide a good understanding of several embodiments of the invention. However, it will be apparent to those skilled in the art that at least some embodiments of the invention can be practiced without these specific details. In other instances, well-known components or methods have not been described in detail or presented in simple block diagram form to avoid unnecessarily obscuring the invention. Therefore, the specific details described are merely exemplary. Specific embodiments may vary from these exemplary details and are still contemplated as being within the scope of the invention.
[0076] Throughout this specification, the reference to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment. Therefore, the phrases "in one embodiment" or "in an embodiment" appearing throughout this specification do not necessarily all refer to the same embodiment. Furthermore, the term "or" is intended to mean inclusive rather than exclusive. When the terms "about" or "approximately" are used herein, this means that the accuracy of the presented nominal value is within ±10%.
[0077] Although the operations of the methods described herein are shown and illustrated in a specific order, the order of the operations can be changed so that some operations can be performed in reverse order or that some operations can be performed at least partially concurrently with other operations. In another embodiment, the instructions or sub-operations of different operations can be performed intermittently and / or alternately.
[0078] It will be understood that the above description is illustrative and not restrictive. Many other embodiments will be apparent to those skilled in the art after reading and understanding the above description. Therefore, the scope of the invention should be determined by reference to the appended claims and the full scope of their equivalents.
Claims
1. A method, the method comprising: Obtaining a substrate; and An etching process is used to etch a portion of the substrate, the etching process being performed at a temperature less than or equal to about 0°C, wherein etching the portion of the substrate involves forming an etchant by adsorbing vapor onto the substrate.
2. The method of claim 1, wherein the substrate comprises a silicon (Si) substrate.
3. The method of claim 1, wherein the etchant comprises molecules containing fluorine (F) gas.
4. The method of claim 1, wherein the etching process is a single-step etching process, and wherein the etchant spontaneously etches the material of the substrate at the temperature.
5. The method of claim 1, wherein the etching process is a multi-step etching process, and wherein etching the portion of the substrate further comprises initiating ion bombardment dissociation of the etchant to remove the portion of the substrate.
6. The method of claim 5, wherein initiating the ion bombardment dissociation comprises generating plasma using an inert gas.
7. The method of claim 1, wherein the etching process is a multi-step etching process, and wherein etching the portion of the substrate further comprises forming a non-volatile reactive layer on the substrate based on the etchant and the native oxide formed on the substrate, and initiating ion bombardment desorption of the non-volatile reactive layer to remove the portion of the substrate.
8. The method of claim 7, wherein initiating the ion bombardment desorption further comprises generating plasma using an inert gas.
9. The method of claim 8, wherein the inert gas comprises argon.
10. The method of claim 1, wherein the etchant is formed using physical adsorption.
11. A method comprising: An adsorption layer is formed on a substrate by physical adsorption at a temperature less than or equal to about 0°C, the adsorption layer containing molecules of etchant gas; and Initiate ion bombardment dissociation of the adsorption layer to remove the portion of the substrate.
12. The method of claim 11, wherein the substrate comprises a silicon (Si) substrate.
13. The method of claim 11, wherein the etchant gas comprises a fluorine (F) gas.
14. The method of claim 11, wherein initiating the ion shock dissociation further comprises generating plasma using an inert gas.
15. The method of claim 14, wherein the inert gas comprises argon.
16. A method comprising: A non-volatile reactive layer based on the native oxide formed on the substrate is formed on the substrate by the physical adsorption of etchant gas molecules at a temperature less than or equal to about 0°C; and Ion bombardment desorption of the non-volatile reactive layer is initiated to remove the portion of the substrate.
17. The method of claim 16, wherein the substrate comprises a silicon (Si) substrate.
18. The method of claim 16, wherein the etchant gas comprises a fluorine (F) gas.
19. The method of claim 16, wherein initiating the ion bombardment desorption further comprises generating plasma using an inert gas.
20. The method of claim 19, wherein the inert gas comprises argon.