A Ku-band wideband signal instantaneous frequency measurement system and method

CN122410120BActive Publication Date: 2026-10-09QINGDAO GUOSHU INFORMATION TECH CO LTD
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Patent Information

Application Number
CN202610864216.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-06-16
Publication Date
2026-10-09
Estimated Expiration
2046-06-16

AI Technical Summary

Technical Problem

[0005]本发明的目的在于提供一种Ku波段宽带信号瞬时测频系统及方法,以解决现有瞬时测频方案在Ku波段宽带信号处理中存在的本振混频链路复杂度高、多路延迟线通道一致性调试困难、温度补偿适应性不足以及数字信道化资源消耗大等问题

Benefits of technology

1、本发明在12GHz至18GHzKu波段输入端采用射频分频预处理模块,通过固定比例分频器直接将高频输入信号按比例映射至较低频段,无需设置本振源和混频器,避免了传统超外差方案中本振泄漏、镜像响应、混频杂散和本振相位噪声对测频精度的影响,同时省去了镜像抑制滤波器、本振泄漏校准链路等复杂电路,显著降低了Ku波段高频链路的体积、功耗和调试复杂度,有利于实现小型化、低成本的嵌入式瞬时测频模块。

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Abstract

The application provides a Ku-band broadband signal instantaneous frequency measurement system and method, and relates to the microwave and electronic information technical field.The system comprises a radio frequency frequency division pre-processing module, a double-channel delay phase discrimination module, a data sampling and processing module and a temperature detection and address correction module.The radio frequency input signal is directly sent into the double-channel delay phase discrimination module after fixed proportion frequency division, without a local oscillator source and a frequency mixer;two-way phase discriminator outputs short baseline and long baseline phase correlation voltage, which is converted into analog-digital after the FPGA constructs two-dimensional table address, and combines temperature real-time correction address offset, and through table look-up, the frequency is quickly recovered from ambiguity.The application avoids the local oscillator leakage and frequency mixing spurious in the traditional superheterodyne scheme, reduces the consistency debugging difficulty of multiple delay lines, does not need high-speed ADC and complex digital signal processing, and at the same time, the temperature compensation depth is integrated into the table look-up process, so that the frequency measurement precision and environmental adaptability in the whole temperature range are effectively improved.
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Description

Technical Field

[0001] This invention relates to the field of microwave and electronic information technology, and more specifically to a Ku-band broadband signal instantaneous frequency measurement system and method. Background Technology

[0002] With the development of radar target simulation and electromagnetic environment monitoring technologies, radar signal forms are becoming increasingly complex. Wideband linear frequency modulation, frequency agility, frequency hopping, and short-pulse systems are widely used, placing higher demands on the instantaneous intercept probability, frequency measurement response time, broadband consistency, and full-temperature stability of receiving systems. Instantaneous frequency measurement (IFM) technology can provide carrier frequency information when a single pulse arrives, thus becoming one of the key technologies in wideband microwave signal reconnaissance, simulation, and monitoring systems.

[0003] Existing instantaneous frequency measurement schemes mainly include analog phase comparison, digital channelization, and superheterodyne digital reception. Analog phase comparison typically converts the frequency to be measured into the phase difference between different transmission paths, then uses the phase detector's output voltage and digital processing to deduce the frequency. This type of scheme has short hardware links and fast response, but suffers from problems such as phase period ambiguity, delay line temperature drift, and difficulties in multi-path consistency debugging. Digital channelization schemes often employ high-speed ADCs, FFT / polyphase filtering, CORDIC phase measurement, and phase differential frequency measurement. They offer strong instantaneous bandwidth and subsequent signal analysis capabilities, but have high requirements for sampling rate, FPGA logic resources, channel synchronization, and heat dissipation, making them unsuitable for all miniaturized embedded microwave frequency measurement modules. Superheterodyne schemes require the introduction of a local oscillator, mixer, image rejection filter, and local oscillator leakage calibration link. In high-frequency broadband applications such as the Ku band, the local oscillator source has high performance requirements and the link is complex, easily introducing mixing spurious signals and phase drift, which is detrimental to achieving low power consumption, miniaturization, and low debugging costs.

[0004] Furthermore, traditional multi-channel delay line coding deambiguity schemes require multiple power dividers, delay units, phase detectors, and AD sampling links, making consistency debugging of each channel difficult and prone to gross errors at phase period boundaries. Temperature compensation often employs discrete temperature files or external isothermal measures, which are insufficiently adaptable to continuous temperature variations and broadband nonlinear drift. Existing schemes lack an engineering implementation path that fully integrates fixed-ratio frequency division, dual-baseline phase detection, two-dimensional lookup tables, and real-time temperature correction. Summary of the Invention

[0005] The purpose of this invention is to provide a Ku-band broadband signal instantaneous frequency measurement system and method to solve the problems of high local oscillator mixing link complexity, difficulty in debugging the consistency of multiple delay line channels, insufficient temperature compensation adaptability, and large digital channelization resource consumption in existing instantaneous frequency measurement schemes for Ku-band broadband signal processing.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: A Ku-band broadband signal instantaneous frequency measurement system includes: The radio frequency division preprocessing module has its input end connected to the radio frequency input port. It performs fixed-ratio frequency division processing on the 12GHz to 18GHz broadband microwave signal input from the radio frequency input port and outputs the divided intermediate frequency signal to the dual-channel delay phase detection module. A dual-channel delayed phase detection module, connected to the radio frequency division preprocessing module, includes a short delay line channel and a matching phase detector, and a long delay line channel and a matching phase detector, for outputting short baseline phase correlation voltage and long baseline phase correlation voltage respectively. The data sampling and processing module includes two analog-to-digital converters and an FPGA device, which are used to convert two phase-correlated voltages into digital sampled values. The FPGA device then constructs a two-dimensional lookup table address based on the digital sampled values ​​to perform lookup table defuzzification and frequency recovery. The temperature detection and address correction module detects the current operating temperature of the system and inputs it into the FPGA device. The FPGA device then corrects the two-dimensional lookup table address in real time based on the temperature.

[0007] A method for instantaneous frequency measurement of Ku-band broadband signals, using the aforementioned Ku-band broadband signal instantaneous frequency measurement system, includes the following steps: S1. Calibration and table establishment; At the reference temperature and multiple calibration temperature points T K Below, a standard signal of known frequency is input to the RF input port. After processing by the RF frequency division preprocessing module, the dual-channel delay phase detection module, and two analog-to-digital converters, the short baseline channel sample value D is obtained. s Long baseline channel sample value D l and corresponding temperature T K And combined with the actual radio frequency f of the standard signal RF Establish a two-dimensional frequency lookup table Short delay line address offset table, long delay line address offset table, and frequency division ratio M or equivalent frequency recovery mapping; S2, Radio frequency division preprocessing; The 12GHz to 18GHz broadband microwave signal input from the RF input port undergoes amplitude protection and front-end amplification by a low-noise amplification / limiting protection unit to obtain an amplitude-controlled RF signal S. RF And input a fixed-ratio frequency divider; the radio frequency signal S is divided by the fixed-ratio frequency divider. RF By performing a fixed-ratio frequency division, the intermediate frequency signal S is obtained. IF And input to the filter; the intermediate frequency signal S after frequency division is processed by the filter. IF Harmonic, out-of-band spurious, and irrelevant frequency components are suppressed to obtain the filtered signal S.F And input to the power divider network; the filtered signal S is then processed by the power divider network. F The short delay line channel, long delay line channel, power detector, and reference branch of the dual-channel delay phase detector module are respectively assigned; local oscillator and mixer are not introduced in this process. S3, Dual-channel delayed phase detection; The power-divided intermediate frequency signal is input into the short-delay line channel and the long-delay line channel respectively, and is compared with the reference branch signal by a phase detector to determine phase, and the corresponding short-baseline phase correlation voltage V is output. s Phase-correlated voltage V with long baseline l ; S4. Temperature detection and address correction; The temperature detection and address correction module detects the current operating temperature T of the system. The FPGA device then reads the short delay line address offset table and the long delay line address offset table based on the temperature T to obtain the short delay line address offset. and long delay line address offset And the digital sampled values ​​D obtained by sampling the two analog-to-digital converters. s and D l Perform address correction and generate the corrected two-dimensional lookup table address. ; S5. Defuzzy lookup and frequency recovery; FPGA devices use the corrected two-dimensional lookup table address Query the two-dimensional frequency lookup table First, the short-delay line address components determine the candidate frequency range. Then, the long-delay line address components are used for matching and deambiguation within the candidate range to finally recover the radio frequency f. RF ; S6. Output the results; The recovered radio frequency f RF Encapsulate it as a frequency word or PDW data and output it.

[0008] Compared with the prior art, the Ku-band broadband signal instantaneous frequency measurement system and method of the present invention have achieved the following significant technical effects: 1. This invention employs an RF frequency division preprocessing module at the input end of the 12GHz to 18GHz Ku-band. It directly maps the high-frequency input signal to a lower frequency band proportionally through a fixed-ratio frequency divider, eliminating the need for a local oscillator and mixer. This avoids the impact of local oscillator leakage, image response, mixing spurious signals, and local oscillator phase noise on frequency measurement accuracy, which is common in traditional superheterodyne schemes. It also eliminates complex circuits such as image suppression filters and local oscillator leakage calibration links, significantly reducing the size, power consumption, and debugging complexity of the Ku-band high-frequency link. This facilitates the realization of a miniaturized, low-cost embedded instantaneous frequency measurement module.

[0009] 2. This invention abandons the traditional multi-channel delay line encoding deambiguation scheme, setting only a coarse measurement channel for short delay lines and a fine measurement channel for long delay lines. Two phase-correlated voltages are output through two phase detectors, and the FPGA combines the two sampled values ​​into a two-dimensional lookup table address to complete frequency deambiguation and rapid reconstruction. This structure significantly reduces the number of delay line channels and analog-to-digital converters, lowers the difficulty of consistent debugging of amplitude, phase, zero-point, temperature drift, and quantization errors among multiple channels, and can utilize a pre-calibrated two-dimensional lookup table to absorb the non-ideal characteristics of delay lines, phase detector nonlinearity, and analog-to-digital converter quantization errors, avoiding period code jumps and gross errors at phase period boundaries caused by single-channel errors.

[0010] 3. Compared with purely digital channelized frequency measurement schemes, this invention first completes fixed-ratio frequency division and dual-channel delayed phase detection at the analog front end, transforming the Ku-band broadband high-speed frequency measurement problem into a sampling problem of two low-frequency phase-correlated voltages and an FPGA table lookup problem. This eliminates the need for high-speed analog-to-digital converters at gigahertz levels or higher, and avoids complex digital signal processing such as broadband I / Q data processing, polyphase filtering, fast Fourier transform, CORDIC iterative phase measurement, and cross-channel fusion. Therefore, this invention can achieve instantaneous frequency measurement with relatively small FPGA logic resources, low power consumption, and extremely short processing latency, making it particularly suitable for resource-constrained miniaturized embedded platforms.

[0011] 4. This invention integrates a temperature detection and address correction module, directly applying temperature compensation to the two-dimensional lookup table address generation process. The FPGA obtains the address offsets of the short and long delay lines based on the current real-time temperature reading or interpolation, dynamically correcting the sampling address and deeply integrating temperature compensation with the lookup table defuzzification process. Compared to traditional discrete temperature compensation files or external temperature control measures, this method can respond in real-time to rapid temperature changes and on-board temperature gradients, and allows for setting independent offset parameters for the short and long baseline channels. This effectively compensates for the non-uniform drift of delay line electrical length, phase detector zero point, and filter amplitude and phase characteristics with temperature, improving the system's frequency measurement accuracy and stability across the entire temperature range, while avoiding the additional volume, power consumption, and thermal response hysteresis problems caused by external temperature control measures.

[0012] In summary, this invention has achieved significant benefits in terms of hardware simplification, channel consistency requirements, temperature adaptability, digital resource consumption, and engineering integration in the application of Ku-band broadband signal instantaneous frequency measurement. It effectively solves the problems of high complexity of local oscillator mixing links, difficulty in debugging multiple delay lines, insufficient temperature compensation adaptability, and large digital channelization resource consumption in the prior art. Attached Figure Description

[0013] Figure 1 This is a perspective view of the product corresponding to the Ku-band broadband signal instantaneous frequency measurement system of this invention. Figure 2 This is a motherboard layout diagram corresponding to the Ku-band broadband signal instantaneous frequency measurement system of this invention. Figure 3 This is a structural block diagram of the Ku-band broadband signal instantaneous frequency measurement system according to an embodiment of the present invention; Figure 4 This is a flowchart of the instantaneous frequency measurement method for Ku-band broadband signals according to an embodiment of the present invention; in, 1. RF input port, 2. Low-noise amplification / limiting protection unit, 3. Fixed ratio frequency divider, 4. Filter, 5. Dual-channel delay phase detector module, 6. Two-way analog-to-digital converter, 7. FPGA device, 8. Data control interface, 9. Power supply circuit, 91. Power interface. Detailed Implementation

[0014] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. Certain embodiments of the invention will be described more fully below with reference to the accompanying drawings, and some, but not all, of these embodiments will be shown. In fact, various embodiments of the invention can be implemented in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to enable the invention to meet applicable legal requirements.

[0015] In the description of this invention, it should be noted that the terms "inner," "outer," "upper," "lower," "front," and "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0016] In this embodiment of the invention, a Ku-band broadband signal instantaneous frequency measurement system and method are provided. Please refer to [reference needed]. Figures 1 to 4 As shown.

[0017] A Ku-band broadband signal instantaneous frequency measurement system includes an RF frequency division preprocessing module, a dual-channel delay phase detection module 5, a data sampling and processing module, and a temperature detection and address correction module. The power interface 91 connects to an external DC power supply, which is then converted by the power circuit 9 into multiple voltages required by the aforementioned modules. Additionally, the RF input port 1 is used to input 12GHz to 18GHz broadband microwave signals; the data control interface 8 is used to output frequency words or PDW data, and to receive calibration, self-test, and lookup table update commands from the host computer.

[0018] The input terminal of the RF frequency division preprocessing module is connected to RF input port 1. It performs fixed-ratio frequency division processing on the 12GHz to 18GHz broadband microwave signal input from RF input port 1 and outputs the divided intermediate frequency signal to the dual-channel delay phase detector module.

[0019] The RF frequency division preprocessing module includes a low-noise amplification / limiting protection unit 2, a fixed ratio frequency divider 3, a filter 4, and a power divider network connected in sequence, and does not include a local oscillator or mixer.

[0020] The input terminal of the low-noise amplification / limiting protection unit 2 is connected to the radio frequency input port 1. The low-noise amplification / limiting protection unit 2 performs amplitude protection and front-end amplification on the 12GHz to 18GHz broadband microwave signal to obtain an amplitude-controlled radio frequency signal S. RF And input the fixed ratio frequency divider 3.

[0021] Fixed ratio frequency divider 3 pairs of radio frequency signals S RF By performing a fixed-ratio frequency division, the intermediate frequency signal S is obtained. IF And input filter 4. RF signal S RF The corresponding radio frequency f RF With the frequency-divided intermediate frequency signal S IF The corresponding frequency after frequency division f IF Satisfy the following relation: f RF =M×f IF Where M is the frequency division ratio.

[0022] Filter 4 divides the intermediate frequency signal S IF Harmonic, out-of-band spurious, and irrelevant frequency components are suppressed to obtain the filtered signal S. F And input the power distribution network.

[0023] The power divider network will filter the signal S F The short delay line channel, long delay line channel, power detector, and reference branch are respectively assigned to the dual-channel delay phase detector module 5.

[0024] The dual-channel delayed phase detector module 5 is connected to the RF frequency division preprocessing module, including a short delay line channel and a matching phase detector, and a long delay line channel and a matching phase detector, for outputting short baseline phase correlation voltage and long baseline phase correlation voltage respectively.

[0025] Specifically, the short delay line channel introduces a smaller delay, and the short delay line channel outputs a short-delay signal S. s Reference branch signal and short-delay signal S s Input to the phase detector to obtain the short-baseline phase-correlated voltage V s The long delay line channel introduces a larger delay, and the long delay line channel outputs a long-delay signal S. lReference branch signal and long-delay signal S l Input to the phase detector to obtain the long baseline phase correlation voltage V l Short delay lines provide a wider, unambiguous range, while long delay lines provide higher resolution within the candidate frequency range. The power detector outputs an amplitude or threshold signal P, which is then input to the FPGA device for pulse validity determination, amplitude recording, or low-confidence assessment.

[0026] The data sampling and processing module includes a two-channel analog-to-digital converter 6 and an FPGA device 7. The two-channel analog-to-digital converter 6 is used to convert two phase-correlated voltages into digital sample values, and the FPGA device 7 constructs a two-dimensional lookup table address based on the digital sample values ​​to perform lookup table defuzzification and frequency recovery.

[0027] Among them, the two analog-to-digital converters convert the short-baseline phase-correlated voltage V under the sampling clock provided by the FPGA device 7. s Phase-correlated voltage V with long baseline l The conversion yields the digital sample value D. s and D l .

[0028] The temperature detection and address correction module detects the current operating temperature of the system and inputs it into FPGA device 7. FPGA device 7 then corrects the two-dimensional lookup table address in real time based on the temperature.

[0029] FPGA device 7 based on digital sampled value D s and D l Constructing a two-dimensional lookup table address FPGA device 7 reads the temperature T. and The FPGA device 7 corrects the two-dimensional lookup table address to obtain the corrected two-dimensional lookup table address. ;in, This is the short delay line address offset. This is the address offset of the long delay line.

[0030] The FPGA device 7 or the host computer connected to the FPGA device 7 stores a two-dimensional frequency lookup table. Short delay line address offset table, long delay line address offset table, and frequency division ratio M or equivalent frequency recovery mapping.

[0031] A method for instantaneous frequency measurement of Ku-band broadband signals, using the aforementioned Ku-band broadband signal instantaneous frequency measurement system, includes the following steps: S1. Calibration and table establishment; At the reference temperature and multiple calibration temperature points, a standard signal of known frequency is input to RF input port 1. After processing by the RF frequency division preprocessing module, the dual-channel delay phase detection module 5, and the two-way analog-to-digital converter 6, the short baseline channel sample value D is obtained. s Long baseline channel sample value D l And the corresponding temperature T, combined with the actual radio frequency f of the standard signal. RF Establish a two-dimensional frequency lookup table Short delay line address offset table, long delay line address offset table, and frequency division ratio M or equivalent frequency recovery mapping.

[0032] Among them, the standard signal source covers the target frequency band from 12GHz to 18GHz in preset frequency steps at the standard signal input RF input port 1, and is respectively at the reference temperature and multiple calibration temperature points T. K Repeated measurements are performed, and each calibration frequency point is processed by the system and then determined by the FPGA device 7 or a host computer connected to the FPGA device 7 based on the current D. s D l T K and the actual radio frequency f RF Establish the above two-dimensional frequency lookup table The short delay line address offset table and the long delay line address offset table are written into the FPGA device 7.

[0033] S2, Radio frequency division preprocessing; The 12GHz to 18GHz broadband microwave signal input from RF input port 1 is subjected to amplitude protection and front-end amplification by low-noise amplification / limiting protection unit 2 to obtain an amplitude-controlled RF signal S. RF And input to fixed ratio divider 3; through fixed ratio divider 3, the radio frequency signal S RF By performing a fixed-ratio frequency division, the intermediate frequency signal S is obtained. IF And input to filter 4; the intermediate frequency signal S after frequency division is processed by filter 4. IF Harmonic, out-of-band spurious, and irrelevant frequency components are suppressed to obtain the filtered signal S. F And input to the power divider network; the filtered signal S is then processed by the power divider network. F The short delay line channel, long delay line channel, power detector, and reference branch of the dual-channel delay phase detector module 5 are respectively assigned; in this process, no local oscillator and mixer are introduced, and the image suppression, local oscillator leakage suppression, and mixing spurious calibration links are not passed.

[0034] S3, Dual-channel delayed phase detection; The power-divided intermediate frequency signal is input into the short-delay line channel and the long-delay line channel respectively, and is compared with the reference branch signal by a phase detector to determine phase, and the corresponding short-baseline phase correlation voltage V is output. sPhase-correlated voltage V with long baseline l .

[0035] S4. Temperature detection and address correction; The temperature detection and address correction module detects the current operating temperature T of the system. The FPGA device 7 reads the short delay line address offset table and the long delay line address offset table based on the temperature T to obtain the short delay line address offset. and long delay line address offset And the digital sampled values ​​D obtained by sampling the two analog-to-digital converters. s and D l Perform address correction and generate the corrected two-dimensional lookup table address. .

[0036] S5. Defuzzy lookup and frequency recovery; FPGA devices use the corrected two-dimensional lookup table address Query the two-dimensional frequency lookup table First, one or more coarse candidate frequency ranges are determined by the address components of the short delay line. Then, the address components of the long delay line are used for fine matching and deambiguation within the candidate ranges to finally recover the radio frequency f. RF .

[0037] Specifically, when the short delay line address component is near the phase period boundary, FPGA device 7 simultaneously retains adjacent candidate frequency intervals to avoid misjudgment from a single coarsely measured candidate frequency interval; FPGA device 7 calculates the current sampled value and the two-dimensional frequency lookup table. The comprehensive matching error E of the candidate entries is used to select the entry with the smallest E and that meets the threshold condition as the frequency measurement entry; if E exceeds the preset threshold or the sampled value falls into the unreliable boundary region, a low confidence flag is output or resampling is triggered.

[0038] The specific method for frequency recovery is as follows: if a two-dimensional frequency lookup table is used... The value stored in the middle is the frequency f after frequency division. IF Then FPGA device 7 according to f RF =M×f IF Alternatively, the equivalent recovery map obtained from calibration can be used to calculate the radio frequency f. RF If a two-dimensional frequency lookup table Directly storing radio frequency f RF Then FPGA device 7 directly reads f RF As a result of frequency measurement.

[0039] S6. Output the results; The recovered radio frequency f RFThe data is packaged as frequency words or PDW data and output through the data control interface 8. The FPGA device 7 sends the frequency word / PDW data to the driver, which then outputs it to the subsequent processing device; on the other hand, it communicates bidirectionally with the host computer through the interface chip for calibration mode switching, lookup table updates, temperature correction parameter writing, status reading, and system self-test.

[0040] The present invention has been described in detail above with reference to the accompanying drawings. Based on the above description, those skilled in the art should have a clear understanding of the Ku-band broadband signal instantaneous frequency measurement system and method of the present invention. Of course, the specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A Ku-band broadband signal instantaneous frequency measurement system, characterized in that, include: The radio frequency division preprocessing module has its input end connected to the radio frequency input port. It performs fixed-ratio frequency division processing on the 12GHz to 18GHz broadband microwave signal input from the radio frequency input port and outputs the divided intermediate frequency signal to the dual-channel delay phase detection module. The radio frequency division preprocessing module includes a low-noise amplification / limiting protection unit, a fixed ratio divider, a filter, and a power divider network connected in sequence, and does not include a local oscillator or a mixer; The low-noise amplification / limiting protection unit performs amplitude protection and front-end amplification on the 12GHz to 18GHz broadband microwave signal to obtain an amplitude-controlled radio frequency signal S. RF And input a fixed ratio frequency divider; Fixed ratio frequency divider for radio frequency signal S RF By performing a fixed-ratio frequency division, the intermediate frequency signal S is obtained. IF And input filter; RF signal S RF The corresponding radio frequency f RF With the frequency-divided intermediate frequency signal S IF The corresponding frequency after frequency division f IF The following relationship must be satisfied: f RF =M×f IF Where M is the frequency division ratio; The filter divides the intermediate frequency signal S. IF Harmonic, out-of-band spurious, and irrelevant frequency components are suppressed to obtain the filtered signal S. F And input the power splitter network; The power divider network will filter the signal S F The short delay line channel, long delay line channel, power detector, and reference branch of the dual-channel delay phase detector module are respectively assigned; A dual-channel delayed phase detection module, connected to the radio frequency division preprocessing module, includes a short delay line channel and a matching phase detector, and a long delay line channel and a matching phase detector, for outputting short baseline phase correlation voltage and long baseline phase correlation voltage respectively. Short delay line channel outputs short delay signal S s Reference branch signal and short-delay signal S s Input to the phase detector to obtain the short-baseline phase-correlated voltage V s ; Long delay line channel outputs long delay signal S l Reference branch signal and long-delay signal S l Input to the phase detector to obtain the long baseline phase correlation voltage V l ; The power detector outputs an amplitude or threshold signal P and inputs it into the FPGA device so that the FPGA device can perform pulse validity judgment, amplitude recording, or low confidence judgment. The data sampling and processing module includes two analog-to-digital converters and an FPGA device, which are used to convert two phase-correlated voltages into digital sampled values. The FPGA device then constructs a two-dimensional lookup table address based on the digital sampled values ​​to perform lookup table defuzzification and frequency recovery. The two analog-to-digital converters convert the short-baseline phase-correlated voltage V under the sampling clock provided by the FPGA device. s Phase-correlated voltage V with long baseline l The conversion yields the digital sample value D. s and D l; FPGA devices based on digital sampled values ​​D s and D l Constructing a two-dimensional lookup table address ; The FPGA device reads the temperature T. and The FPGA device corrects the two-dimensional lookup table address to obtain the corrected two-dimensional lookup table address. ; in, This is the short delay line address offset. This is the address offset of the long delay line; The temperature detection and address correction module detects the current operating temperature of the system and inputs it into the FPGA device. The FPGA device then corrects the two-dimensional lookup table address in real time based on the temperature.

2. The Ku-band broadband signal instantaneous frequency measurement system according to claim 1, characterized in that, The FPGA device or the host computer connected to the FPGA device stores a two-dimensional frequency lookup table. Short delay line address offset table, long delay line address offset table, and frequency division ratio M.

3. A method for instantaneous frequency measurement of Ku-band broadband signals, using the Ku-band broadband signal instantaneous frequency measurement system described in claim 1 or 2, characterized in that, The method includes the following steps: S1. Calibration and table establishment; At the reference temperature and multiple calibration temperature points T K Below, a standard signal of known frequency is input to the RF input port. After processing by the RF frequency division preprocessing module, the dual-channel delay phase detection module, and two analog-to-digital converters, the short baseline channel sample value D is obtained. s Long baseline channel sample value D l and corresponding temperature T K And combined with the actual radio frequency f of the standard signal RF Establish a two-dimensional frequency lookup table Short delay line address offset table, long delay line address offset table, and frequency division ratio M; S2, Radio frequency division preprocessing; The 12GHz to 18GHz broadband microwave signal input from the RF input port undergoes amplitude protection and front-end amplification by a low-noise amplification / limiting protection unit to obtain an amplitude-controlled RF signal S. RF And input a fixed-ratio frequency divider; the radio frequency signal S is divided by the fixed-ratio frequency divider. RF By performing a fixed-ratio frequency division, the intermediate frequency signal S is obtained. IF And input to the filter; the intermediate frequency signal S after frequency division is processed by the filter. IF Harmonic, out-of-band spurious, and irrelevant frequency components are suppressed to obtain the filtered signal S. F And input to the power divider network; the filtered signal S is then processed by the power divider network. F The short delay line channel, long delay line channel, power detector, and reference branch of the dual-channel delay phase detector module are respectively assigned; local oscillator and mixer are not introduced in this process. S3, Dual-channel delayed phase detection; The power-divided intermediate frequency signal is input into the short-delay line channel and the long-delay line channel respectively, and is compared with the reference branch signal by a phase detector to determine phase, and the corresponding short-baseline phase correlation voltage V is output. s Phase-correlated voltage V with long baseline l ; S4. Temperature detection and address correction; The temperature detection and address correction module detects the current operating temperature T of the system. The FPGA device then reads the short delay line address offset table and the long delay line address offset table based on the temperature T to obtain the short delay line address offset. and long delay line address offset And the digital sampled values ​​D obtained by sampling the two analog-to-digital converters. s and D l Perform address correction and generate the corrected two-dimensional lookup table address. ; S5. Defuzzy lookup and frequency recovery; FPGA devices use the corrected two-dimensional lookup table address Query the two-dimensional frequency lookup table First, the short-delay line address components determine the candidate frequency range. Then, the long-delay line address components are used for matching and deambiguation within the candidate range to finally recover the radio frequency f. RF ; S6. Output the results; The recovered radio frequency f RF Encapsulate it as a frequency word or PDW data and output it.

4. The instantaneous frequency measurement method for Ku-band broadband signals according to claim 3, characterized in that, In S5, when the short delay line address component is near the phase period boundary, the FPGA device simultaneously retains adjacent candidate frequency ranges to avoid misjudgment of a single candidate frequency range; the FPGA device calculates the current sampled value and the two-dimensional frequency lookup table. The comprehensive matching error E of the candidate entries is used to select the entry with the smallest E and that meets the threshold condition as the frequency measurement entry; if E exceeds the preset threshold or the sampled value falls into the unreliable boundary region, a low confidence flag is output.

5. The instantaneous frequency measurement method for Ku-band broadband signals according to claim 3, characterized in that, The specific method for frequency recovery in S5 is as follows: If a two-dimensional frequency lookup table... The value stored in the middle is the frequency f after frequency division. IF Then the FPGA device is configured according to f RF =M×f IF Alternatively, the equivalent recovery map obtained from calibration can be used to calculate the radio frequency f. RF If a two-dimensional frequency lookup table Directly storing radio frequency f RF Then the FPGA device directly reads f RF As a result of frequency measurement.

6. The instantaneous frequency measurement method for Ku-band broadband signals according to claim 3, characterized in that, In S1, a standard signal source, covering the target frequency band from 12GHz to 18GHz in preset frequency steps, is input to the RF input port. Measurements are repeatedly taken at a reference temperature and multiple calibration temperature points. Each calibration frequency point is processed by the system, and then the FPGA device or a host computer connected to the FPGA determines the current D... s D l T and actual radio frequency f RF Establish the two-dimensional frequency lookup table The short delay line address offset table and the long delay line address offset table are written into the FPGA device.

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