Graphics processors, resource management methods, electronic devices and storage media

Abstract

This invention discloses a graphics processor, a resource management method, an electronic device, and a storage medium. The graphics processor includes: a shader execution unit, used to store the current shader's current data and release the first thread beam execution resources after the current shader's ray emission command has been executed; a ray tracing unit, used to perform intersection tests based on the ray information of each ray to obtain ray intersection attribute information; a thread grouping unit, used to organize the ray intersection attribute information into attribute information groups according to shader identifiers and send a thread beam start request to the shader execution unit; the shader execution unit is also used to, when all shaders triggered by the historically terminated shader have been executed, obtain the current data of the historically terminated shader and load it into a second thread beam to continue executing the historically terminated shader. The technical solution of this invention can effectively improve the overall computing performance in the graphics rendering process.

Description

Technical Field

[0001] This invention relates to the field of ray tracing technology, and more particularly to a graphics processing unit (GPU), a resource management method, an electronic device, and a storage medium. Background Technology

[0002] Ray tracing is a graphics rendering technique that uses a graphics processor to simulate the behavior of light rays. It renders graphics based on the intersection of light rays with objects in the scene, producing more vivid and realistic images compared to traditional rasterization techniques.

[0003] The specific operation is as follows: First, based on the scene, a top-down BVH (Bounding Volume Hierarchy) tree structure is constructed. Then, the ray generation shader emits a main ray pixel by pixel, based on the screen pixels. The main ray traverses each node in the BVH tree structure to complete the intersection test. During the traversal, different types of shaders are scheduled to perform rendering operations based on the differences in primitive attributes. The scheduled shader may also iteratively emit secondary rays during the execution phase. Secondary rays can also schedule new shader tasks and continue to emit new secondary rays, forming a recursive ray scheduling and execution chain.

[0004] In existing technologies, to ensure that the main ray and all its secondary rays can occupy computing resources and ray cache space, hardware resources are typically pre-allocated for a single main ray and all its derived secondary rays (also known as second-level rays) according to a preset maximum recursion depth. This prevents new rays from preempting resources and causing interruptions to the computation of existing rays. However, this resource pre-allocation mode restricts the number of main rays that can be processed in parallel at the same time (i.e., it limits the number of main rays that enter the field), significantly reducing the processing efficiency of the entire set of main rays and presenting a significant performance bottleneck. Summary of the Invention

[0005] This invention provides a graphics processor, a resource management method, an electronic device, and a storage medium to effectively improve the overall computing performance during the graphics rendering process.

[0006] According to one aspect of the present invention, a graphics processor is provided, the graphics processor comprising: a shader execution unit, a ray tracing unit, a thread grouping unit, and a memory;

[0007] The shader execution unit is used to execute the current shader through the first thread beam after obtaining the first thread beam execution resources for the current shader. After the current shader's ray emission command is completed, the current shader's state data is stored in the memory, the first thread beam is terminated and the first thread beam execution resources are released to stop the continued execution of the current shader.

[0008] The ray tracing unit is used to perform intersection tests on each ray based on the ray information of each ray issued by the shader execution unit, and obtain the ray intersection attribute information that matches each ray respectively. The ray intersection attribute information includes: ray information, primitive information hit by the ray, and shader identifier.

[0009] The thread grouping unit is used to organize the intersection attribute information of each ray output by the ray tracing unit into attribute information groups according to the shader identifier, and then send a thread bundle start request to the shader execution unit to trigger the shader execution unit to execute a new current shader for the attribute information group.

[0010] The shader execution unit is also used to, after all shaders triggered by all rays emitted by the historical aborted shader have finished executing, retrieve the field data of the historical aborted shader from memory and load it into the second thread bundle after re-applying for the second thread bundle execution resources for the historical aborted shader, and continue to execute the historical aborted shader through the second thread bundle.

[0011] According to another aspect of the present invention, a resource management method is provided, applied in a graphics processor, the method comprising:

[0012] The current shader is executed using thread bundle runtime resources;

[0013] After the current shader finishes executing its ray emission instructions, store the current shader's current state data and release the thread bundle runtime resources used by the current shader to terminate the current shader's continued execution.

[0014] When all shaders triggered by all rays emitted by the current shader have finished executing, request new thread beam execution resources for the current shader and obtain the current state data stored in the history of the current shader.

[0015] Based on the current shader's context data, continue executing the current shader using the newly allocated thread bundle runtime resources.

[0016] According to another aspect of the present invention, a resource management method is provided, applied in a graphics processor, the method comprising:

[0017] The current shader is executed using thread bundle runtime resources;

[0018] After the current shader finishes executing its ray emission instructions, store the current shader's current state data and release the thread bundle runtime resources used by the current shader to terminate the current shader's continued execution.

[0019] When all shaders triggered by all rays emitted by the current shader have finished executing, request new thread beam execution resources for the current shader and obtain the current state data stored in the history of the current shader.

[0020] Based on the current shader's context data, continue executing the current shader using the newly allocated thread bundle runtime resources.

[0021] According to another aspect of the present invention, a resource management apparatus is also provided, applied in a graphics processor, the apparatus comprising:

[0022] The shader regular execution module is used to execute the current shader using thread bundle runtime resources;

[0023] The on-site data storage and resource release module is used to store the on-site data of the current shader after the current shader has finished executing the ray emission command, and release the thread bundle execution resources used by the current shader to stop the continued execution of the current shader.

[0024] The resource request and field data recovery module is used to request new thread beam running resources for the current shader and obtain the field data stored in the history of the current shader after all shaders triggered by all rays emitted by the current shader have finished executing.

[0025] The shader execution resumption module is used to continue the execution of the current shader using newly allocated thread bundle runtime resources, based on the acquired current shader's current state data.

[0026] According to another aspect of the present invention, an electronic device is also provided, the electronic device comprising:

[0027] At least one graphics processor; and a memory communicatively connected to said at least one graphics processor; wherein...

[0028] The memory stores a computer program that can be executed by the at least one graphics processor, the computer program being executed by the at least one graphics processor to enable the at least one graphics processor to perform the resource management method described in any embodiment of the present invention.

[0029] According to another aspect of the present invention, a computer-readable storage medium is also provided, the computer-readable storage medium storing computer instructions for causing a graphics processor to execute and implement the resource management method described in any embodiment of the present invention.

[0030] According to another aspect of the present invention, a computer program product is also provided, including a computer program that, when executed by a graphics processor, implements the steps of the resource management method as described in any embodiment of the present invention.

[0031] The technical solution of this invention dynamically requests and releases thread bundle execution resources through the shader execution unit, and combines it with the ray tracing unit to complete ray intersection detection and the thread grouping unit to group attribute information according to shader identifiers. It adopts a scheduling mechanism of shader execution suspension, temporary storage of on-site data, and resumption of execution after all tasks are completed. This solves the problems of constrained main ray concurrent processing and insufficient ray tracing rendering efficiency caused by the pre-allocation of resources in traditional ray tracing schemes. It achieves the technical effect of flexibly scheduling hardware running resources and improving the parallel processing capability of multi-level recursive ray tasks. This allows a single main ray and all its derived secondary rays to share the hardware resources of the main ray, so that the number of main rays entering the field is no longer affected by the recursion level. This greatly increases the full load of GPU hardware rays, greatly improves the main ray processing speed, and brings about an overall system performance improvement. Ultimately, it can effectively improve the overall computing performance in the graphics rendering process. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of the structure of a graphics processor according to an embodiment of the present invention;

[0034] Figure 2 This is a schematic diagram of the structure of another graphics processor provided according to an embodiment of the present invention;

[0035] Figure 3 This is a flowchart of a resource management method provided according to an embodiment of the present invention;

[0036] Figure 4 This is a flowchart of another resource management method provided according to an embodiment of the present invention;

[0037] Figure 5 This is a functional block diagram of a specific application scenario for implementing nested execution logic for ray tracing, applicable to an embodiment of the present invention.

[0038] Figure 6 This is a schematic diagram of the structure of a resource management device according to an embodiment of the present invention;

[0039] Figure 7 This is a schematic diagram of the structure of an electronic device that implements the resource management method of this invention. Detailed Implementation

[0040] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0041] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0042] Figure 1 This is a structural diagram of a graphics processor provided in an embodiment of the present invention, such as... Figure 1 As shown, the graphics processor includes: a shader execution unit 110, a ray tracing unit 120, a thread grouping unit 130, and a memory 140.

[0043] The shader execution unit 110 is used to execute the current shader through the first thread beam after obtaining the first thread beam execution resources for the current shader. After the current shader completes the execution of the ray emission command, it stores the current shader's context data in the memory 140, terminates the first thread beam and releases the first thread beam execution resources, thereby terminating the continued execution of the current shader.

[0044] The shader execution unit 110 is the core functional module in the graphics processor (GPU) that carries out the operation of various shaders. A shader (also called a shader program) is the functional code in the GPU used to perform ray rendering calculations. The shader used to emit the master ray is the ray generation shader. Each master ray traverses each node (or geometric primitive) in the BVH tree structure, determining whether it hits a geometric primitive. Regardless of whether it hits, the master ray restarts and runs a new shader. If this newly started shader is the most recently clicked shader or a previously missed shader, it can further emit secondary rays. These secondary rays also need to traverse each geometric primitive in the BVH tree structure, and so on.

[0045] At this point, the ray-generating shader, or the recently clicked or missed shader triggered by the ray-generating shader, has not finished executing. It needs to wait for all the secondary rays it emits to be processed before it can continue executing the subsequent code of its own shader. This results in a situation where different programs are nested in execution.

[0046] In this embodiment, the current shader refers to a piece of program code currently being executed within the shader execution unit 110, used to emit rays (primary rays or secondary rays). To distinguish it from the following text, the current shader specifically refers to a shader that has not yet been terminated, or in other words, a shader that is about to emit rays. The current shader can be a ray-generating shader, a recently clicked shader, or a shader that has not been hit.

[0047] As mentioned earlier, before the current shader can execute, it needs to acquire hardware computing resources, namely, the resources for running the first thread bundle. These resources specifically include the first thread bundle (also called a warp) and various registers required for its execution. These registers include the control register (CRF), the scalar register (SRF), and the predicate register (PRF), among others.

[0048] The current shader's context data refers to all runtime context information temporarily stored in various hardware registers during the execution of the current shader by the first thread bundle, including computational parameters, instruction execution status, ray traversal information, program jump flags, and temporary computation results. In a specific example, the current shader's context data may include: the number of rays emitted, the effective ray mask, the number of various registers required, the data stored in each register, the current shader's program base address, and the program counter.

[0049] The number of rays emitted specifically refers to the total number of rays emitted in a single execution of the ray emission command by the current shader. This value serves as a counting benchmark to determine the volume of the shading task corresponding to the derived rays. The effective ray mask can be understood as the identification information of the specific thread emitting rays within the first thread bundle. It's understood that the first thread bundle can include multiple threads, such as 32, while the current renderer may not need to emit 32 rays, for example, only 16. In this case, the effective ray mask is needed to mark which threads emitted rays. For example, a 32-bit binary field can be used as the effective ray mask, with each bit in the binary field marked as 0 or 1 to indicate whether the thread at the corresponding position emitted a ray.

[0050] In an optional embodiment of this example, the shader execution unit 110 may further be used for:

[0051] By configuring and executing ray tracing-specific movement instructions, the program base address of the current shader is obtained from the underlying hardware of the graphics processor as a piece of current shader's context data;

[0052] The ray tracing-specific movement command includes: a dedicated movement command identifier, a movement mode configuration identifier to be configured, and a third register to be configured. The third register is used to store the data obtained after the ray tracing-specific movement command is executed. Multiple movement modes are pre-set for the ray tracing-specific movement command. Different movement modes correspond to different movement mode configuration identifiers. Different movement mode definitions obtain different types of data from the underlying hardware of the graphics processor.

[0053] In a specific example, a ray tracing-specific movement instruction of the form `ray mov.mode_4 sr7, void` can be constructed. Here, `ray mov` is the identifier for the specific movement instruction, and `mode_4` is the movement mode configuration identifier. `mode_4` specifies that the program base address of the current shader should be obtained from the underlying hardware of the graphics processor and provided to the current shader. Of course, `mode_1` can be specified to obtain the warp identifier from the underlying hardware of the graphics processor and provide it to the current shader, and `mode_2` can be specified to obtain the compute core identifier from the underlying hardware of the graphics processor and provide it to the current shader, etc. This embodiment does not impose any limitations on this. `sr7` represents the third register, and `void` indicates that there is no source operand.

[0054] With the above settings, the program base address of the current shader can be obtained directly from the underlying hardware of the graphics processor using only a single ray tracing-specific movement instruction, so that the current shader can use it directly, thereby improving the instruction execution efficiency of the shader.

[0055] Furthermore, the shader execution unit 110 can also be used to: obtain the program counter obtained by the compiler's current count, and use it as the program counter for the current shader. Since the program counter obtained directly from the graphics processor's underlying hardware cannot accurately describe the instruction following the ray emission instruction, the program counter obtained by the compiler's current count can be directly obtained to ensure that the resume execution of the historically aborted shader can be accurately performed subsequently.

[0056] The ray tracing unit 120 is used to perform intersection tests on each ray according to the ray information of each ray issued by the shader execution unit 110, and obtain ray intersection attribute information that matches each ray respectively. The ray intersection attribute information includes: ray information, primitive information hit by the ray and shader identifier.

[0057] The ray tracing unit 120, specifically a dedicated computing module within the graphics processor responsible for completing ray traversal and hardware intersection testing, is the core hardware unit for implementing ray tracing rendering. The ray tracing unit 120 primarily receives various ray information from the shader execution unit 110. This ray information is generated by the current shader when executing ray emission commands and includes complete parameters such as the ray origin, ray direction, effective ray range, and the thread identifier corresponding to the ray for the primary or secondary ray, providing the raw data foundation for subsequent hardware-level intersection traversal calculations.

[0058] In this embodiment, the ray tracing unit 120 relies on the pre-constructed BVH tree structure of the scene to perform top-down node traversal operations on each received ray, sequentially completing the intersection test between the ray and the bounding box, and the intersection test between the ray and geometric primitives, accurately determining the propagation trajectory and intersection state of the ray in the scene. Unlike the software logic operations of the shader program, the ray tracing unit 120 uses a dedicated hardware pipeline to complete the parallel intersection calculation of batches of rays, which can efficiently handle the traversal and detection tasks of a large number of rays, significantly improving the computational efficiency of ray intersection testing.

[0059] After the ray tracing unit 120 completes the traversal and intersection determination of all BVH nodes for a single ray, it combines the actual intersection results of the ray, scene primitive attributes, and preset rendering rules to generate ray intersection attribute information that uniquely matches each ray. In this embodiment, the ray intersection attribute information is structured hardware data that encapsulates all intersection results and scheduling criteria for a single ray, uniformly containing three types of core information: ray information, primitive information hit by the ray, and shader identifier, which can fully cover all ray rendering scenes.

[0060] The ray information refers to the original ray parameters to be scheduled and processed, which fully inherit the core data when the shader emits the ray. It is used for parameter backfilling and logical calculation in subsequent shader operations. The primitive information hit by the ray is the attribute data corresponding to the geometric primitives that actually intersect during the ray traversal. If the ray does not intersect with any primitive in the scene, this part of the information is empty or marked as invalid. The shader identifier is a unique identifier obtained by matching the ray intersection result and primitive attributes. It is used to accurately locate the target shader type that the current ray needs to be scheduled and executed. Specifically, it can correspond to different types of shader programs such as the non-hit shader, the most recently hit shader, any hit shader, and custom intersecting shader.

[0061] Understandably, the intersection results of different rays differ, and the corresponding shader identifiers also vary: when a ray does not hit any geometric primitive in the scene, it matches the "missed" shader identifier; when a ray hits an opaque scene primitive, it matches the "most recently hit" shader identifier; when a ray hits a primitive with special attributes such as transparent or semi-transparent, it matches the "any hit" shader identifier; and when a ray hits a custom surface or a non-triangle procedural primitive, it matches the custom intersection shader identifier. The ray tracing unit 120 achieves hardware-level ray result classification and precise matching of shading tasks by binding a unique shader identifier to each ray, providing standardized and groupable hardware data for the subsequent task grouping and batch scheduling of the thread grouping unit 130.

[0062] The thread grouping unit 130 is used to organize the intersection attribute information of each ray output by the ray tracing unit 120 into attribute information groups according to the shader identifier, and then send a thread bundle start request to the shader execution unit 110 to trigger the shader execution unit 110 to execute a new current shader for the attribute information group.

[0063] The thread grouping unit 130 is a dedicated hardware grouping module in the graphics processor responsible for ray shading task organization, thread bundle task aggregation, and scheduling triggering. It receives the output data from the ray tracing unit 120 and is the core scheduling unit for converting single-ray discrete tasks into batch thread bundle tasks. The intersection attribute information of each ray output by the ray tracing unit 120 is the independent rendering data corresponding to a single ray. A single ray only matches one corresponding target shader. If it is directly scheduled and executed thread by thread, a large number of fragmented thread tasks will be generated, resulting in wasted GPU thread bundle resources, excessive scheduling overhead, and low parallel execution efficiency.

[0064] Based on this, the thread grouping unit 130 is specifically used to receive all discrete ray intersection attribute information, and uses the shader identifier carried in the ray intersection attribute information as the sole grouping criterion to classify and aggregate massive discrete single-ray tasks. Multiple ray intersection attribute information corresponding to the same shader identifier are uniformly collected and organized into corresponding attribute information groups. All ray tasks within the same attribute information group need to call the same shader program to perform rendering calculations, possessing completely consistent execution logic and program entry points, thus satisfying the hardware characteristics of GPU thread bundle batch parallel execution.

[0065] In this embodiment, the thread grouping unit 130 continuously collects ray tasks corresponding to the same type of shader. Once the attribute information grouping meets the execution specifications of the GPU thread bundle, the normalized attribute information grouping is encapsulated into thread bundle tasks that can be recognized by hardware and executed in batches. Based on this, the thread grouping unit 130 actively sends a thread bundle start request to the shader execution unit 110 to complete the issuance of the hardware scheduling trigger instruction.

[0066] The thread beam initiation request carries core scheduling parameters such as the target shader identifier corresponding to the current attribute information group, the number of rays in the group, and the intersection attribute information of the associated rays. These parameters are used to notify the shader execution unit 110 to request the corresponding thread beam execution resources and wake up the hardware execution pipeline. Ultimately, the shader execution unit 110 is triggered to use the normalized attribute information group as the new execution object, start a brand new current shader, and batch complete the shading and rendering calculations for the entire group of rays. This achieves batch parallel processing of discrete ray tasks, significantly reducing the hardware overhead of a single shading schedule and improving the overall ray tracing rendering efficiency.

[0067] In an optional embodiment of this example, the thread grouping unit 130 includes multiple thread grouping slots (not shown in the figure). Accordingly, the thread grouping unit 130 is further configured to:

[0068] The ray intersection attribute information with the same shader identifier output by the ray tracing unit 120 is stored in the same thread group slot, and the number of rays currently stored in each thread group slot is updated in real time. When it is determined that the number of rays currently stored in the target thread group slot reaches the upper limit of the GPU's thread bundle resource specification (e.g., 32), or the duration of the target thread group slot since the storage of the first ray intersection attribute information is greater than a preset time threshold, a thread bundle start request for the target thread group slot is sent to the shader execution unit 110.

[0069] The shader execution unit 110 is also used to, after all shaders triggered by all rays emitted by the history abort shader have finished executing, obtain the field data of the history abort shader from the memory 140 and load it into the second thread bundle after re-applying for the second thread bundle execution resources for the history abort shader, and continue to execute the history abort shader through the second thread bundle.

[0070] In this embodiment, in addition to having the aforementioned functions of executing, suspending and releasing resources of the current shader, the shader execution unit 110 also undertakes the functions of restoring and continuing the execution of historically suspended shaders, thereby realizing the closed-loop scheduling of ray recursive nested rendering tasks.

[0071] In the aforementioned process, after executing the ray emission command, the current shader will actively suspend and release the thread bundle resources, switch to a historical aborted shader, and continuously wait for all the shading tasks derived from all the primary rays or secondary rays emitted by itself to be completed. This waiting mechanism is the core of adapting to the ray tracing recursive rendering logic.

[0072] Specifically, the shader execution unit 110 monitors the execution status of all derived ray tasks corresponding to the historically terminated shader in real time until all shader tasks triggered by all rays emitted by the historically terminated shader have been completed and there are no remaining unfinished rendering tasks. At this point, it is determined that the historically terminated shader meets the conditions for resuming execution. After the tasks are cleared, the shader execution unit 110 will re-initiate a hardware resource request to match and obtain new second thread bundle execution resources for the historically terminated shader. These resources include new thread bundles and corresponding register resources, providing hardware support for the shader to resume operation.

[0073] After successfully acquiring the execution resources for the second thread bundle, the shader execution unit 110 immediately and accurately reads the complete context data of the pre-stored historical aborted shader from the memory 140. This context data includes all context information such as the program counter, register data, number of rays emitted, effective ray mask, and program execution base address at the moment of suspension. Subsequently, the read context data is completely loaded and filled back into the hardware registers and execution context space corresponding to the second thread bundle, accurately restoring the entire running state of the historical aborted shader at the moment of suspension, ensuring that the program execution state is unbiased and that no data is lost.

[0074] After the context is restored, the shader execution unit 110, through the initialized second thread bundle, starts from the instruction position where the historical shader suspension interruption occurred, continues to execute the remaining program code of the shader that was not completed, and completes the subsequent rendering operation logic.

[0075] In this embodiment, the shader execution unit 110 can be specifically used for:

[0076] After re-allocating the second thread bundle runtime resources for the history abort shader, the target context data is obtained from the context data storage space that matches the history abort shader.

[0077] Configure the newly acquired registers based on the number of registers of various types included in the target site data and the data stored in each register.

[0078] Configure the newly acquired second thread beam resources based on the effective ray mask included in the target site data;

[0079] The current program counter is updated based on the shader's program base address and program counter in the target field data, and the instructions in the history aborted shader are executed from the current program counter starting from the second thread bundle.

[0080] Based on the above embodiments, the shader execution unit 110 can update the current program counter according to the shader's program base address and program counter in the target field data by configuring and executing ray tracing dedicated jump instructions;

[0081] The ray tracing-specific jump instruction includes: a specific jump instruction identifier, a first operand to be configured, a second operand to be configured, and a third operand to be configured; the first operand is used to fill the program base address in the current shader's context data, the second operand is used to fill the program counter in the current shader's context data, and the third operand is used to fill the current program counter.

[0082] Correspondingly, ray tracing-specific jump instructions are used to assign a value to the third operand using the sum of the first and second operands. In a specific example, a ray tracing-specific jump instruction of the form `ray jmp src3, src1, src2` can be constructed. Here, `ray jmp` is the identifier of the specific jump instruction, `src3` is the third operand, `src1` is the first operand, and `src2` is the second operand.

[0083] With the above settings, a single dedicated ray tracing jump instruction can be used to directly jump to the next instruction following the ray emission instruction executed at the time of the previous interruption of the restarted historical shader, thereby improving the instruction execution efficiency of the shader.

[0084] The technical solution of this invention dynamically requests and releases thread bundle execution resources through the shader execution unit, and combines it with the ray tracing unit to complete ray intersection detection and the thread grouping unit to group attribute information according to shader identifiers. It adopts a scheduling mechanism of shader execution suspension, temporary storage of on-site data, and resumption of execution after all tasks are completed. This solves the problems of constrained main ray concurrent processing and insufficient ray tracing rendering efficiency caused by the pre-allocation of resources in traditional ray tracing schemes. It achieves the technical effect of flexibly scheduling hardware running resources and improving the parallel processing capability of multi-level recursive ray tasks. This allows a single main ray and all its derived secondary rays to share the hardware resources of the main ray, so that the number of main rays entering the field is no longer affected by the recursion level. This greatly increases the full load of GPU hardware rays, greatly improves the main ray processing speed, and brings about an overall system performance improvement. Ultimately, it can effectively improve the overall computing performance in the graphics rendering process.

[0085] Furthermore, in Figure 2 A structural diagram of another graphics processor provided in an embodiment of the present invention is shown. Figure 2 As shown, the graphics processor also includes a shader runtime resource manager 210, wherein:

[0086] Shader runtime resource manager 210 is used to allocate thread bundle resources to shader execution units in response to resource request requests from shader execution units, and to reclaim idle thread bundle resources in response to resource release requests from shader execution units, so as to reallocate thread bundle resources; wherein, thread bundle runtime resources include thread bundles and various registers.

[0087] The Shader Runtime Resource Manager 210 is responsible for scheduling global thread bundle runtime resources in the graphics processor, as well as allocating and reclaiming dedicated hardware management modules. It is the core control unit for realizing dynamic resource allocation, release, and reuse of shaders, providing hardware resource scheduling support for the entire process of suspending, exiting, restarting, and resuming execution of shader execution units. Unlike the fixed pre-allocated resources management method of traditional ray tracing architectures, this embodiment of the invention achieves dynamic on-demand allocation and immediate reclamation and reuse of thread bundle runtime resources by independently setting the Shader Runtime Resource Manager 210, thus solving the technical defects of limited concurrency and resource waste in traditional solutions from the hardware scheduling level.

[0088] Specifically, in scenarios where the shader execution unit executes any current shader or resumes an aborted shader from its execution history, it needs to rely on hardware thread bundle runtime resources to complete instruction computation. In this case, the shader execution unit actively initiates a resource request to the shader runtime resource manager 210. The shader runtime resource manager 210 listens for the resource request from the shader execution unit in real time. After responding to the resource request, it dynamically matches and allocates thread bundle runtime resources of the corresponding specifications according to the execution requirements of the current shader. This includes the adapted thread bundle (or thread bundle instance) and various register resources required for computation, providing hardware computing power support for the normal execution of the shader program.

[0089] Meanwhile, the shader runtime resource manager 210 also listens for resource release requests issued by the shader execution unit in real time. After the current shader finishes executing the ray emission instruction and enters the suspended state, the shader execution unit will release the corresponding thread bundle runtime resources and initiate a resource release request. After receiving the request, the shader runtime resource manager 210 will immediately reclaim the batch of idle thread bundles and various register resources, clear the temporary computation data and context information in the resources, and put the reclaimed resources back into the global schedulable resource pool, waiting for the next resource allocation call.

[0090] In this embodiment, the thread bundle runtime resources specifically include the thread bundle (warp) and various hardware registers required for shader execution. These registers may specifically include dedicated arithmetic registers such as control registers, scalar registers, and predicate registers, which are the fundamental hardware resources ensuring shader instruction parsing, ray tracing, state storage, and program jumps. The shader runtime resource manager 210 achieves cyclical redistribution and utilization of these hardware resources through unified management, dynamic allocation, and immediate reclamation.

[0091] It is understood that this resource scheduling mode is fully compatible with the shader suspension and resumption mechanism of this invention: resources are dynamically requested when a new shader starts, resources are released immediately when a shader is suspended, and resources are re-requested when a historical shader resumes. Throughout the process, there is no need to pre-allocate fixed hardware resources based on the ray recursion depth, resulting in extremely high resource scheduling flexibility. This maximizes the utilization of the GPU's limited thread bundles and register resources, effectively increasing the number of concurrent main rays and fundamentally optimizing ray tracing rendering performance.

[0092] Furthermore, the ray tracing unit may further include a ray buffer 220; correspondingly, the shader execution unit may be specifically used for:

[0093] When the ray emission command of the current shader is executed, a buffer space is allocated in the ray buffer 220 of the ray tracing unit, and the ray information of all rays emitted by the current shader is stored in the allocated buffer space;

[0094] Furthermore, when the current shader is a recently hit shader or a recently missed shader, the shader execution unit is further configured to:

[0095] Before the current shader's ray emission command is executed, the ray information stored in the parent ray information buffer space that matches the parent shader of the current shader is obtained in the ray tracing unit. After the obtained ray information is used as the current shader's field data, the ray tracing unit is instructed to release the parent ray information buffer space to reallocate the buffer resources.

[0096] In this embodiment, the ray tracing unit has a built-in ray buffer 220, which is a dedicated hardware cache space used to dynamically cache ray information emitted by the shaders. Since there are nested call relationships between shaders during ray tracing, a parent shader is defined. That is, in the ray recursion execution chain, if shader A actively emits a ray and triggers the execution of a new shader B, then shader A is determined as the parent shader of shader B, and shader B is determined as the child shader of shader A. Accordingly, the ray emitted by the parent shader to trigger the execution of the new shader is defined as the parent ray, and the ray emitted by the child shader is defined as the child ray.

[0097] In a specific example, a ray-generating shader emits a primary ray, triggering the execution of the most recently hit shader X. This ray-generating shader is the parent shader of the most recently hit shader X. If a secondary ray emitted by the most recently hit shader X triggers the execution of a new most recently hit shader Y, then the most recently hit shader X becomes the parent shader of the most recently hit shader Y. Throughout the entire recursive rendering chain, each newly generated shader uniquely corresponds to a parent shader that initiated the ray-generating process, forming a hierarchical relationship of nested parent and child shaders.

[0098] In this embodiment, when the current shader executes the ray emission command and emits primary or secondary rays in batches, it first dynamically requests a buffer space of the corresponding size in the ray buffer 220 of the ray tracing unit, and writes and stores the complete ray information of all rays emitted this time into the dedicated buffer space obtained by the request, so as to realize the hardware cache solidification of ray data and ensure the reliable reading of data for subsequent BVH tree structure traversal, intersection test and shading scheduling.

[0099] Specifically, when the current shader is an iteratively recursive most recently hit shader or a most recently missed shader, this type of shader is either triggered by the main ray emitted by the ray generator shader, or by the secondary ray emitted by the next higher-level most recently hit shader or most recently missed shader in the nested procedure. Before the current shader formally executes the ray emission instruction and generates the next-level ray task, the shader execution unit will first read all the historical ray information stored in the parent ray information buffer space that matches the parent shader of the current shader from the ray buffer 220, and incorporate this part of the parent ray information into the current shader's live data to support the rendering operation logic of this level of shader.

[0100] After completing the reading of the parent ray information and the integration of on-site data, the shader execution unit will proactively instruct the ray tracing unit to release the corresponding parent ray information buffer space and reclaim this idle buffer resource. The reclaimed buffer space can be reintegrated into the global resource pool of the ray buffer 220 for subsequent allocation of buffer space for new rays and new shader tasks, realizing the dynamic release and cyclical reallocation of ray buffer resources. In other words, the management of the valuable hardware resource, the ray buffer 220, also follows the principle of "child inheriting parent business".

[0101] In this embodiment, the ray buffer 220 may further include multiple ray buffer slots, each ray buffer slot being used to store information for one ray. Correspondingly, releasing the buffer space for the parent ray information means releasing the ray buffer slots occupied by the parent ray information.

[0102] Optionally, the shader execution unit can be used for:

[0103] Allocate a target storage space in the memory to store the current shader's context data, obtain a target pointer pointing to the target storage space, and store the target pointer and the current shader's context data into the target storage space in a preset storage order.

[0104] Specifically, when executing a ray emission command in the current shader, the shader execution unit can allocate target storage space in memory to store the current shader's context data and obtain a target pointer pointing to the target storage space. After the current shader's ray emission command is executed, the target pointer and the current shader's context data are stored sequentially in the target storage space according to a preset storage order. It is important to note that if the current shader is the most recently hit shader or a recently missed shader, the current shader's context data also includes ray information matching the current shader's parent shader.

[0105] Specifically, the shader execution unit can request target storage space in memory to store the current shader's context data through a dedicated ray tracing dedicated space allocation instruction, and obtain a target pointer pointing to the target storage space. The ray tracing dedicated space allocation instruction includes: a dedicated space allocation instruction identifier, a first register to be configured, and a second register to be configured. The first register stores a preset storage space size, and the second register stores a preset pointer.

[0106] Ray tracing dedicated space allocation instructions are used to request a target memory space in the graphics processor's memory that matches the size of the memory space in the first register, and write a target pointer pointing to the target memory space into the second register.

[0107] As an example and not a limitation, the data format of this ray tracing dedicated space allocation instruction can be: rayappend sr2, sr5, where ray append is the identifier of the dedicated space allocation instruction, sr5 is the first register, and sr2 is the second register.

[0108] Based on this dedicated ray tracing space allocation instruction, a single assembly instruction can allocate a matching target memory space in memory according to the size of the current shader's required memory space, and write the target pointer of the target memory space back to the second register for use by the current shader. This new ray tracing dedicated space allocation instruction can greatly improve the code execution efficiency of the shader.

[0109] Based on the above embodiments, when the history aborted shader is a recently hit shader or a missed shader, the shader execution unit can further be used to:

[0110] After determining that the last instruction in the history abort shader has been executed, obtain the current field data storage space corresponding to each ray information in the current attribute information group that matches the history abort shader, and perform an atomic decrement operation on the number of rays emitted in each current field data storage space.

[0111] Accordingly, the shader execution unit can further be used for:

[0112] When the number of target ray emissions stored in the target site data storage space is determined to be zero, the history abort shader, which matches the target site data storage space, determines that all shaders triggered by all emitted rays have completed execution.

[0113] In this embodiment, since the current shader is specifically defined as a shader capable of emitting light rays, its execution is first suspended after executing the light emitting instruction. Then, after all shaders triggered by all the light rays emitted by the current shader have completed their execution, the current shader is awakened and executed again as a previously suspended shader. At this point, the previously suspended shader can continue execution until the last instruction.

[0114] When a history-terminating shader is either the most recently hit shader or a recently missed shader, its corresponding ray task is generated by the parent ray emitted by the parent shader above it. Therefore, this type of history-terminating shader necessarily corresponds to one or more parent shaders above it. Since a single attribute information group can contain the intersection results of multiple rays from different parent shaders, after each child shader finishes execution, it is necessary to accurately locate and obtain the current state data storage space of the parent shader corresponding to each ray information, and perform an atomic decrement operation on the number of ray emissions recorded in each current state data storage space to progressively count the completion status of the derived tasks of each parent shader.

[0115] Furthermore, when the history abort shader generates ray shaders, when the history abort shader executes the last instruction, it means that the entire ray tracing process has been completed. At this point, the calculated rendered image can be directly output.

[0116] It should be further explained that the embodiment of the present invention employs an atomic decrement operation on the number of light rays emitted, which is a key design for adapting to GPU multi-threaded parallel rendering scenarios. During the ray tracing recursive rendering process, the same parent shader will emit multiple secondary rays in batches. Each of these rays will trigger its corresponding child shader task, and a large number of child shader tasks will be executed and terminated synchronously in a multi-threaded parallel manner.

[0117] If a normal subtraction operation is used, when multiple threads simultaneously perform subtraction updates on the same parent shader's ray emission count register, data read / write conflicts, value overwriting, and count update loss may occur. However, the atomic decrement operation has hardware-level exclusive read / write characteristics, which can ensure that only one thread completes the ray emission count decrement update operation at any given time. All parallel-completed lower-level shader tasks will be counted and verified one by one, in an orderly and accurate manner, completely avoiding the data competition problem caused by multi-threaded concurrent updates. This allows for accurate statistics on the completion status of all secondary ray tasks derived from the parent shader.

[0118] Furthermore, after each atomic decrement operation is completed by the shader execution unit, the number of light emitted in the corresponding field data storage space can be detected. When it is determined that the number of target light emitted in the target field data storage space is zero, the history abort shader that is matched with the target field data storage space and has been executed by all shaders triggered by all emitted light rays can be stopped.

[0119] Figure 3 This is a flowchart illustrating a resource management method provided in an embodiment of the present invention. This embodiment is applicable to situations where ray tracing programs are executed in a graphics processor. The method can be executed by a resource management device, which can be implemented in hardware and / or software and is generally configured within the graphics processor. Figure 3 As shown, the method includes:

[0120] S310, Execute the current shader using thread bundle runtime resources.

[0121] S320. After the current shader finishes executing the ray emission command, store the current shader's state data and release the thread bundle runtime resources used by the current shader to terminate the continued execution of the current shader.

[0122] In an optional implementation of this embodiment, storing the current shader's context data may include:

[0123] S3201. Allocate target storage space in the graphics processor's memory to store the current shader's context data, and obtain a target pointer pointing to the target storage space.

[0124] Specifically, allocating target storage space in the graphics processor's memory to store the current shader's context data and obtaining a target pointer to the target storage space may include:

[0125] Obtain the storage space size that matches the current shader's field data and write the storage space size into the first register; specify a second register for storing the target pointer pointing to the requested target storage space; configure the ray tracing dedicated space allocation instruction according to the first register and the second register, execute the ray tracing dedicated space allocation instruction, and after the instruction execution is completed, obtain the target pointer pointing to the target storage space from the second register.

[0126] S3202. Store the target pointer and the current shader's context data into the target storage space in a preset storage order.

[0127] The current shader's field data includes: the number of rays emitted, the effective ray mask, the number of various registers required, the data stored in each register, the current shader's program base address, and the program counter.

[0128] Furthermore, as shown in Table 1, the arrangement order of the data items in the target storage space includes:

[0129] The target pointer to the target storage space, the number of rays emitted, the number of control registers used, the number of control register specifications, the number of scalar register specifications, the valid ray mask, the number of predicate register specifications, the base address of the current shader, the program counter of the current shader, the data stored in the control registers, the data stored in the scalar registers, and the data stored in the predicate registers; among them, each type of data has a reserved storage space size.

[0130] Table 1

[0131]

[0132] As shown in Table 1, the reason for introducing blank placeholders is to ensure 8-bit alignment of various field data during storage and retrieval. This meets the standard read / write specifications of GPU hardware storage, avoids problems such as hardware read anomalies, data parsing misalignment, and reduced read / write efficiency caused by non-aligned storage, and ensures the stability and efficiency of shader field data access.

[0133] In this embodiment, a target pointer is added as an index field at the beginning of the target storage space, which has several key technical advantages. First, the target pointer can uniquely identify each independent shader context data storage space, enabling accurate location and differentiation of historical suspended shader context data in different suspended states. This effectively avoids the problems of data confusion and read / write crosstalk among multiple sets of context data in multi-level recursive shader nested execution scenarios. Second, through direct index addressing of the target pointer, the shader execution unit does not need to traverse all storage blocks to quickly locate the complete context data of the corresponding historical suspended shader. This significantly shortens the addressing time for context data reading, loading, and restoration, improves the scheduling efficiency of shader suspension storage and resumption, and adapts to the computational requirements of GPU high-speed parallel rendering. Finally, the target pointer can match the multi-threaded parallel rewrite and atomic count update operation mechanism, establishing an independent index for the context storage block corresponding to each secondary ray, further improving the overall operational stability of the multi-level recursive ray tracing rendering architecture.

[0134] S330. When all shaders triggered by all rays emitted by the current shader have finished executing, request new thread bundle execution resources for the current shader and obtain the historical data stored for the current shader.

[0135] In an optional implementation of this embodiment, all shaders triggered by all rays emitted by the current shader have completed execution, specifically including:

[0136] When the number of target ray emissions stored in the target site data storage space is determined to be zero, it is determined that all shaders triggered by all rays emitted by the current shader have been executed.

[0137] S340. Based on the obtained current shader's context data, continue executing the current shader using the newly allocated thread bundle runtime resources.

[0138] In an optional implementation of this embodiment, continuing the execution of the current shader using newly allocated thread bundle runtime resources, based on the acquired current shader's context data, may include:

[0139] S3401. Configure the newly requested registers according to the number of registers and the data stored in the current shader's field data.

[0140] S3402. Configure the newly requested thread bundle based on the valid ray mask included in the current shader's field data.

[0141] S3403. Update the current program counter according to the current shader's program base address and program counter included in the current shader's context data, so that the instructions in the current shader can be executed from the current program counter through the newly requested thread bundle.

[0142] In an optional implementation of this embodiment, updating the current program counter based on the current shader's program base address and program counter included in the current shader's context data may include:

[0143] Based on the program base address of the current shader, the storage offset of the program counter in the current shader's context data, and the target pointer of the target memory space, a first operand and a second operand are constructed, and a third operand is set as the current program counter. After configuring the ray tracing-specific jump instruction according to the first operand and the second operand, the ray tracing-specific jump instruction is executed. The ray tracing-specific jump instruction is used to assign a value to the third operand using the sum of the first operand and the second operand, so as to realize the instruction jump.

[0144] Furthermore, after a currently suspended shader is restarted, it can continue execution until the last instruction. If the current shader is the most recently hit shader or the most recently missed shader, it needs to retrieve the current context data storage space (the context data storage space of each parent shader of the current shader) corresponding to each ray information in the current attribute information group that matches the current shader, and then perform an atomic decrement operation on the ray emission count in each current context data storage space. If the current shader is a ray-generating shader, it can directly output the calculated rendered image.

[0145] It should be emphasized again that although both the shader before execution was stopped and the shader after execution continued are named the current shader in this embodiment, the two current shaders are not actually the same shader. They use different thread bundle runtime resources. However, because they share the same context data, the two shaders are given the same name for ease of description.

[0146] The technical solution of this invention solves the problems of constrained concurrent processing capacity of main rays and insufficient ray tracing rendering efficiency caused by traditional ray tracing schemes when pre-allocating resources by dynamically applying for and releasing thread bundle execution resources and adopting a scheduling mechanism of shader execution suspension, temporary storage of on-site data, and resumption of execution after all tasks are completed. It achieves the technical effect of flexibly scheduling hardware running resources and improving the parallel processing capability of multi-level recursive ray tasks. This allows a single main ray and all its derived secondary rays to share the hardware resources of the main ray, so that the number of main rays entering the field is no longer affected by the recursion level, which greatly increases the full load capacity of GPU hardware rays, greatly improves the processing speed of main rays, and brings about an overall performance improvement in the system. Ultimately, it can effectively improve the overall computing performance in the graphics rendering process.

[0147] Based on the above embodiments, the method may further include:

[0148] While storing the ray information of all rays emitted by the current shader into the allocated buffer space, the target pointer pointing to the target storage space is written as an item in the ray information into the buffer space allocated in the ray buffer of the ray tracing unit in the graphics processor.

[0149] The ray tracing unit is configured to perform intersection tests on each ray based on the ray information of each ray issued by the current shader execution unit, obtain ray intersection attribute information that matches each ray, add the target pointer pointing to the target storage space to the ray intersection attribute information, and provide the ray intersection attribute information to the thread grouping unit in the graphics processor. The thread grouping unit then organizes each ray intersection attribute information into at least one attribute information group according to the shader identifier, and adds the target pointer pointing to the target storage space to the new shader triggered for execution based on the attribute information group.

[0150] Figure 4 This is a flowchart of another resource management method provided according to an embodiment of the present invention. This embodiment is a refinement based on the above embodiments, and correspondingly, as shown in... Figure 4 As shown, the method may include:

[0151] S410, Execute the current shader using thread bundle runtime resources.

[0152] S420. When the current shader is the most recently hit shader or the most recently missed shader, the ray information stored in the parent ray information buffer space that matches the parent shader of the current shader is obtained in the ray tracing unit. After obtaining the ray information as the current shader's field data, the ray tracing unit is instructed to release the parent ray information buffer space to reallocate the buffer resources.

[0153] In an optional implementation of this embodiment, after obtaining the ray information stored in the parent ray information buffer space that matches the parent shader of the current shader in the ray tracing unit, and using it as the current shader's field data, the ray tracing unit is instructed to release the parent ray information buffer space. Specifically, this may include:

[0154] The system obtains a second operating mode for reading the ray buffer of the ray tracing unit, and specifies the storage index information of the ray information to be read and a fourth register for storing the ray information in the parent ray information buffer space; after configuring the ray tracing-specific loading instruction according to the second operating mode, the storage index information and the fourth register, the system executes the ray tracing-specific loading instruction.

[0155] The ray tracing-specific loading instruction is used to locate the parent ray information buffer space of the current shader's parent shader in the ray buffer according to the current shader's identification information, store the ray information stored in the parent ray information buffer space into the fourth register according to the ray information storage index information, and send a loading end signal when reading the last piece of data to instruct the ray tracing unit to release the parent ray information buffer space.

[0156] In a specific example, a ray tracing-specific load instruction can be constructed in the form of: ray_ild.rb r5, sr2 (c0~c15), where ray_ild is the identifier of the specific tracing instruction, rb is the second working mode used to read the ray buffer of the ray tracing unit, r5 is the fourth register, and sr2 (c0~c15) is the storage index information of the ray information to be read.

[0157] S430: Send a resource request to the Shader Runtime Resource Manager in the graphics processor and obtain the thread bundle runtime resources allocated by the Shader Runtime Resource Manager for the current shader. The thread bundle runtime resources include the thread bundle and various registers.

[0158] S420 and S430 can occur before or during the execution of the current shader's ray emission command, as long as they are executed earlier than S440.

[0159] S440. When the ray emission command of the current shader is executed, allocate buffer space in the ray buffer of the ray tracing unit in the graphics processor, and store the ray information of all rays emitted by the current shader into the allocated buffer space.

[0160] In an optional implementation of this embodiment, before storing the current shader's context data, the following may also be included:

[0161] A first operating mode is obtained for executing the program base address of the current shader obtained from the underlying hardware of the graphics processor, and a third register is specified for storing the program base address of the current shader; the ray tracing dedicated movement instruction is configured according to the first operating mode and the third register, and then the ray tracing dedicated movement instruction is executed; after the instruction execution is completed, the program base address of the current shader is obtained from the third register; the program counter obtained by the compiler's current count is obtained as the program counter of the current shader.

[0162] S450. After the current shader's ray emission command is executed, store the current shader's state data and release the thread bundle runtime resources used by the current shader to terminate the continued execution of the current shader.

[0163] S460. Send a resource release request to the shader runtime resource manager to instruct the shader runtime resource manager to reclaim idle thread bundle resources.

[0164] S470. When all shaders triggered by all rays emitted by the current shader have finished executing, request new thread bundle execution resources for the current shader and obtain the historical data stored for the current shader.

[0165] S480. Based on the obtained current shader's context data, continue executing the current shader using the newly allocated thread bundle runtime resources.

[0166] The technical solution of this invention, while inheriting dynamic thread bundle resource scheduling and shader suspension and resumption, adds a dynamic recycling and reuse mechanism for hierarchical ray buffer resources. By reading the parent ray buffer data before the child shader executes and immediately releasing the parent buffer space, the problem of ray buffer resources being stacked and occupied for a long time during multi-level ray recursive rendering is avoided, significantly improving the utilization rate of ray buffer resources. At the same time, by accurately reading the parent ray data through dedicated ray loading instructions and automatically triggering buffer release, the hardware scheduling logic is simplified, and invalid resource occupation and storage redundancy are reduced. Combined with pointer index management and atomic counting and cancellation mechanisms, while ensuring the accurate and stable execution of multi-level recursive ray tracing rendering logic, the GPU hardware resource overhead is further reduced, effectively improving the overall rendering efficiency in multi-level ray nesting rendering scenarios.

[0167] Figure 5 This is a functional block diagram of a specific application scenario for implementing nested execution logic for ray tracing, applicable to an embodiment of the present invention.

[0168] In this application scenario, the innovative concept of "inheritance" is proposed, where secondary rays emitted by the main ray and subsequent recursively emitted secondary rays at each level share the main ray's computational resources and the buffer space in the ray buffer. The main ray and its emitted secondary rays share only one set of resources and are completely independent of recursion depth. This ensures that the number of main rays entering the field is unaffected by secondary rays or recursion depth, and is only related to the number of warp resources in the GPU and the size of the ray buffer. This significantly improves the processing speed of the entire set of main rays and brings about a major improvement in the overall performance of the ray tracing system.

[0169] like Figure 5 As shown, the ray generation shader (RGS) emits a set of master rays via ray emission commands, specifically the `traceray()` function. For example, RGS warp0 emits 32 master rays, and RGS warp1 emits 28 master rays. It's evident that the RGS currently occupies the runtime resources of two warps and the storage space for 32 + 28 = 60 ray information entries in the ray buffer. When a master ray or secondary ray is emitted by the shader execution unit, the ray tracing unit stores the ray information in the ray buffer and traverses the accelerated BVH tree structure to find the nearest geometric element hit by the ray (or no geometric element hit). Then, it returns to the shader execution unit to start the warp execution of the most recently hit shader (CHS) or the least hit shader (MIS).

[0170] Regarding shader runtime resources, in reality, after RGS emits the main ray via the traceray() function, the compiler will actively allocate memory space. Figure 5 (Not shown in the image), and store the RGS warp's runtime environment and working data into the newly allocated memory space. Then, the RGS warp can be terminated, releasing its runtime resources. In this way, the main ray's CHS warp or MIS warp can request runtime resources, thus achieving the goal of sharing runtime resources.

[0171] Similarly, such as Figure 5As shown, when a secondary ray is emitted via the `traceray()` function in the CHS or MIS of the main ray, the compiler allocates another memory space to store the working context data of the CHS warp or MIS warp (such as shader base address, shader program counter, valid ray mask, number of CRFs, number of SRFs, number of PRFs, CRF data, SRF data, PRF data, the number of rays emitted this time, and pointers to the storage space for the working context). After the execution of the CHS warp or MIS warp ends, the runtime resources are released for use by the ray tracing shaders of subsequent secondary rays, i.e., new CHS or MIS allocations. Furthermore, the same process is applied to recursively tracing secondary rays at each level.

[0172] Furthermore, the embodiments of this invention creatively construct a wake-up mechanism. When the ray tracing shader of a secondary ray finishes running and releases its runtime resources, the compiler performs an atomic decrement operation on the number of light emission lines in the working state data of the parent shader that emitted the secondary ray (the decrement corresponds to the number of ray tracing shaders that completed the secondary ray). When the number of light emission lines reaches 0, the GPU hardware requests runtime resources from the shader runtime resource manager based on the number of CRFs and effective ray masks stored in the aforementioned working state, thereby waking up the warp that was previously terminated to free up runtime resources for the secondary ray.

[0173] The wake-up shader (i.e., the history abort shader mentioned earlier) is a newly customized shader. It mainly loads and initializes the working data in the working context storage space (such as various CRF data, SRF data, and PRF data) through memory loading instructions. Then, a special jump instruction is designed, which can directly jump the program to the first instruction after traceray() based on the loaded shader base address and shader program counter, and then continue execution.

[0174] For ray buffer space management, this embodiment of the invention also follows the parent-child inheritance principle. Before the main ray's CHS or MIS executes the `traceray()` function, the compiler reads the ray information of the parent shader to be used for subsequent wake-ups via ray loading instructions and stores it in memory as CRF data in the working context data. After the last ray information from the parent shader is read, a ray loading end signal (e.g., `ray_Id.end`) can be sent to notify the ray tracing unit to release the ray buffer space occupied by the main ray. Then, the CHS or MIS executes the `traceray()` function to emit the secondary ray, and the ray tracing unit allocates ray buffer space for the secondary ray. Subsequent recursive emission of secondary rays at each level is handled similarly.

[0175] It is important to emphasize that the shared ray buffer space here is not limited to the parent shader and child shader using the same location. They can be stored in the same location or in different locations. What is shared is the size or number of spaces.

[0176] By setting up the above, the parent ray and its generated secondary rays (as well as the secondary rays emitted in subsequent recursive layers) can share shader runtime resources and ray buffer space. The number of primary rays entering the field is no longer affected by the number of recursive layers, which greatly increases the full load capacity of the GPU hardware ray, greatly improves the processing speed of the primary ray, and brings about an overall performance improvement to the system.

[0177] Figure 6 This is a schematic diagram of a resource management device provided in an embodiment of the present invention. This resource management device is applied in a graphics processor, such as... Figure 6 As shown, the device includes: a shader routine execution module 610, a field data storage and resource release module 620, a resource request and field data recovery module 630, and a shader recovery execution module 640, wherein:

[0178] Shader regular execution module 610 is used to execute the current shader through thread bundle runtime resources.

[0179] The on-site data storage and resource release module 620 is used to store the on-site data of the current shader and release the thread bundle execution resources used by the current shader after the current shader's ray emission command has been executed, so as to stop the continued execution of the current shader.

[0180] The resource request and field data recovery module 630 is used to request new thread bundle running resources for the current shader and obtain the field data stored in the history of the current shader after all shaders triggered by all rays emitted by the current shader have finished executing.

[0181] The shader execution resumption module 640 is used to continue the execution of the current shader using newly allocated thread bundle runtime resources based on the acquired current shader's current state data.

[0182] The technical solution of this invention solves the problems of constrained concurrent processing capacity of master rays and insufficient ray tracing rendering efficiency caused by traditional ray tracing schemes when pre-allocating resources by dynamically applying for and releasing thread bundle execution resources and adopting a scheduling mechanism of shader execution suspension, temporary storage of on-site data, and resumption of execution after all tasks are completed. This achieves the technical effect of flexibly scheduling hardware execution resources and improving the parallel processing capability of multi-level recursive ray tasks. It enables a single master ray and all its derived secondary rays to share the hardware resources of the master ray, thereby making the number of master rays no longer affected by the recursion level. This significantly increases the full load capacity of GPU hardware rays, greatly improves the processing speed of master rays, and brings about an overall performance improvement in the system, ultimately effectively improving the overall computing performance in the graphics rendering process.

[0183] Based on the above embodiments, it may further include: a resource request module, used to send a resource request to the shader runtime resource manager in the graphics processor before executing the current shader through the thread bundle runtime resource, and to obtain the thread bundle runtime resource allocated by the shader runtime resource manager for the current shader; wherein, the thread bundle runtime resource includes a thread bundle and various registers;

[0184] Correspondingly, it may also include a resource release module, which, after releasing the thread bundle runtime resources used by the current shader, sends a resource release request to the shader runtime resource manager to instruct the shader runtime resource manager to reclaim the idle thread bundle resources.

[0185] Based on the above embodiments, it may further include: a light buffer space allocation module, used for:

[0186] When the ray emission command of the current shader is executed, a buffer space is allocated in the ray buffer of the ray tracing unit in the graphics processor, and the ray information of all rays emitted by the current shader is stored in the allocated buffer space;

[0187] Furthermore, the device also includes a father's light information acquisition module, used for:

[0188] When the current shader is the most recently hit shader or the most recently missed shader, after executing the current shader through the thread bundle runtime resource, the ray information stored in the parent ray information buffer space that matches the parent shader of the current shader is obtained in the ray tracing unit. After using the obtained ray information as the current shader's field data, the ray tracing unit is instructed to release the parent ray information buffer space to reallocate the buffer resources.

[0189] Based on the above embodiments, the on-site data storage and resource release module 620 can be specifically used for:

[0190] Allocate target storage space in the graphics processor's memory to store the current shader's context data, and obtain a target pointer pointing to the target storage space;

[0191] Store the target pointer and the current shader's context data into the target storage space in a pre-defined storage order;

[0192] The current shader's field data includes: the number of rays emitted, the effective ray mask, the number of various registers required, the data stored in each register, the current shader's program base address, and the program counter.

[0193] Based on the above embodiments, the arrangement order of various data items in the target storage space includes:

[0194] The target pointer to the target memory space, the number of rays emitted, the number of control registers used, the number of control register specifications, the number of scalar register specifications, the valid ray mask, the number of predicate register specifications, the base address of the current shader, the program counter of the current shader, the data stored in the control registers, the data stored in the scalar registers, and the data stored in the predicate registers;

[0195] Each type of data has a set amount of reserved storage space.

[0196] Based on the above embodiments, the device further includes: a subtraction processing module, used for:

[0197] When the current shader is the most recently hit shader or the most recently missed shader, after determining that the last instruction in the current shader has been executed, obtain the current field data storage space corresponding to each ray information in the current attribute information group that matches the current shader, and perform an atomic decrement operation on the number of rays emitted in each current field data storage space.

[0198] Based on the above embodiments, the resource application and on-site data recovery module 630 can be further used for:

[0199] When the number of target ray emissions stored in the target site data storage space is determined to be zero, it is determined that all shaders triggered by all rays emitted by the current shader have been executed.

[0200] Based on the above embodiments, the shader recovery execution module 640 can be further used for:

[0201] Configure the newly requested registers based on the number of registers and the data stored in the current shader field data;

[0202] Configure the newly requested thread bundle based on the valid ray mask included in the current shader's field data;

[0203] Based on the current shader's program base address and program counter included in the current shader's context data, update the current program counter so that the instructions in the current shader can be executed from the current program counter starting from the newly requested thread bundle.

[0204] Based on the above embodiments, the on-site data storage and resource release module 620 can be further used for:

[0205] Obtain the size of the storage space that matches the current shader's context data, and write the storage space size into the first register;

[0206] Specify a second register for storing a target pointer to the requested target memory space;

[0207] After configuring the ray tracing dedicated space allocation instruction according to the first register and the second register, the ray tracing dedicated space allocation instruction is executed.

[0208] After the instruction is executed, the target pointer pointing to the target memory space is obtained from the second register.

[0209] Based on the above embodiments, the device may further include: a program base address and counter acquisition module, used for:

[0210] Before storing the current shader's context data, obtain a first operating mode for executing the program base address of the current shader from the graphics processor's underlying hardware, and specify a third register for storing the program base address of the current shader;

[0211] Based on the first operating mode and the third register, the ray tracing-specific movement instruction is configured and then executed.

[0212] After the instruction execution is completed, the program base address of the current shader is obtained from the third register;

[0213] Get the program counter obtained from the compiler's current count, and use it as the program counter for the current shader.

[0214] Based on the above embodiments, the father's light information acquisition module can be further used for:

[0215] Obtain the second operating mode for reading the ray buffer of the ray tracing unit, and specify the storage index information of the ray information to be read and the fourth register for storing the ray information in the parent ray information buffer space;

[0216] After configuring the ray tracing-specific loading instruction according to the second working mode, storage index information, and the fourth register, the ray tracing-specific loading instruction is executed.

[0217] The ray tracing-specific loading instruction is used to locate the parent ray information buffer space of the current shader's parent shader in the ray buffer according to the current shader's identification information, store the ray information stored in the parent ray information buffer space into the fourth register according to the ray information storage index information, and send a loading end signal when reading the last piece of data to instruct the ray tracing unit to release the parent ray information buffer space.

[0218] Based on the above embodiments, the device further includes a target pointer storage module, used for:

[0219] While storing the ray information of all rays emitted by the current shader into the allocated buffer space, the target pointer pointing to the target storage space is written as an item in the ray information into the buffer space allocated in the ray buffer of the ray tracing unit in the graphics processor;

[0220] The ray tracing unit is configured to perform intersection tests on each ray based on the ray information of each ray issued by the current shader execution unit, obtain ray intersection attribute information that matches each ray, add the target pointer pointing to the target storage space to the ray intersection attribute information, and provide the ray intersection attribute information to the thread grouping unit in the graphics processor. The thread grouping unit then organizes each ray intersection attribute information into at least one attribute information group according to the shader identifier, and adds the target pointer pointing to the target storage space to the new shader triggered for execution based on the attribute information group.

[0221] Based on the above embodiments, the shader recovery execution module 640 can be further used for:

[0222] Based on the program base address of the current shader, the storage offset of the program counter in the current shader's context data, and the target pointer of the target memory space, construct the first operand and the second operand, and set the third operand as the current program counter;

[0223] After configuring the ray tracing-specific jump instruction according to the first operand and the second operand, the ray tracing-specific jump instruction is executed.

[0224] Among them, the ray tracing-specific jump instruction is used to assign a value to the third operand by summing the first and second operands, so as to achieve instruction jump.

[0225] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0226] Figure 7 A schematic diagram of an electronic device 10, which can be used to implement embodiments of the present invention, is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0227] like Figure 7 As shown, the electronic device 10 includes at least one graphics processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one graphics processor 11. The memory stores computer programs executable by the at least one graphics processor. The graphics processor 11 can perform various appropriate actions and processes based on the computer programs stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The graphics processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0228] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0229] The graphics processor 11 can be various general-purpose and / or special-purpose processing components with processing and computing capabilities. The graphics processor 11 executes the various methods and processes described above, such as the resource management method as described in any embodiment of the present invention. That is:

[0230] The current shader is executed using thread beam runtime resources. After the current shader's ray emission instructions are completed, the current shader's context data is stored, and the thread beam runtime resources used by the current shader are released to terminate the current shader's continued execution. When all shaders triggered by all rays emitted by the current shader have completed execution, new thread beam runtime resources are requested for the current shader, and the context data stored for the current shader's history is retrieved. Based on the retrieved context data of the current shader, the current shader continues to execute using the newly requested thread beam runtime resources.

[0231] In some embodiments, the resource management method as described in any embodiment of the present invention may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by graphics processor 11, one or more steps of the resource management method as described above in any embodiment of the present invention may be performed. Alternatively, in other embodiments, graphics processor 11 may be configured to perform the resource management method as described in any embodiment of the present invention by any other suitable means (e.g., by means of firmware).

[0232] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable graphics processor, which may be a dedicated or general-purpose programmable graphics processor, capable of receiving data and instructions from a memory system, at least one input device, and at least one output device, and transferring data and instructions to the memory system, the at least one input device, and the at least one output device.

[0233] Computer programs used to implement the methods of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to the graphics processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the graphics processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The computer programs can be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0234] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0235] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0236] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0237] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0238] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0239] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A graphics processor, characterized in that, The graphics processor includes: a shader execution unit, a ray tracing unit, a thread grouping unit, and a memory; The shader execution unit is used to execute the current shader through the first thread beam after obtaining the first thread beam execution resources for the current shader. After the current shader's ray emission command is completed, the current shader's state data is stored in the memory, the first thread beam is terminated and the first thread beam execution resources are released to stop the continued execution of the current shader. The ray tracing unit is used to perform intersection tests on each ray based on the ray information of each ray issued by the shader execution unit, and obtain the ray intersection attribute information that matches each ray respectively. The ray intersection attribute information includes: ray information, primitive information hit by the ray, and shader identifier. The thread grouping unit is used to organize the intersection attribute information of each ray output by the ray tracing unit into attribute information groups according to the shader identifier, and then send a thread bundle start request to the shader execution unit to trigger the shader execution unit to execute a new current shader for the attribute information group. The shader execution unit is also used to, after all shaders triggered by all rays emitted by the historical aborted shader have finished executing, retrieve the field data of the historical aborted shader from memory and load it into the second thread bundle after re-applying for the second thread bundle execution resources for the historical aborted shader, and continue to execute the historical aborted shader through the second thread bundle.

2. The graphics processor according to claim 1, characterized in that, The graphics processor also includes a shader runtime resource manager, wherein: The shader runtime resource manager is used to allocate thread bundle resources to the shader execution unit in response to the shader execution unit's resource request, and to reclaim idle thread bundle resources in response to the shader execution unit's resource release request, so as to reallocate the thread bundle resources. The thread bundle runtime resources include the thread bundle itself and various registers.

3. The graphics processor according to claim 1, characterized in that, The ray tracing unit further includes a ray buffer; and a shader execution unit, specifically used for: When the ray emission command of the current shader is executed, a buffer space is allocated in the ray buffer of the ray tracing unit, and the ray information of all rays emitted by the current shader is stored in the allocated buffer space; Furthermore, when the current shader is a recently hit shader or a recently missed shader, the shader execution unit is further configured to: Before the current shader's ray emission command is executed, the ray information stored in the parent ray information buffer space that matches the parent shader of the current shader is obtained in the ray tracing unit. After the obtained ray information is used as the current shader's field data, the ray tracing unit is instructed to release the parent ray information buffer space to reallocate the buffer resources.

4. The graphics processor according to any one of claims 1-3, characterized in that, The current shader's field data includes: the number of rays emitted, the effective ray mask, the number of various registers required, the data stored in each register, the current shader's program base address, and the program counter; Accordingly, the shader execution unit is specifically used for: Allocate a target storage space in the memory to store the current shader's context data, obtain a target pointer pointing to the target storage space, and store the target pointer and the current shader's context data into the target storage space in a preset storage order.

5. The graphics processor according to claim 4, characterized in that, The shader execution unit is further configured to: By configuring and executing ray tracing dedicated space allocation instructions, a target storage space is requested in memory to store the current shader's field data, and a target pointer pointing to the target storage space is obtained; The ray tracing dedicated space allocation instruction includes: a dedicated space allocation instruction identifier, a first register to be configured, and a second register to be configured. The first register is used to store a preset storage space size, and the second register is used to store a preset pointer. Ray tracing dedicated space allocation instructions are used to request a target memory space in the graphics processor's memory that matches the size of the memory space in the first register, and write a target pointer pointing to the target memory space into the second register.

6. The graphics processor according to claim 4, characterized in that, The shader execution unit is further configured to: By configuring and executing ray tracing-specific movement instructions, the program base address of the current shader is obtained from the underlying hardware of the graphics processor as a piece of current shader's context data; The ray tracing-specific movement command includes: a dedicated movement command identifier, a movement mode configuration identifier to be configured, and a third register to be configured. The third register is used to store the data obtained after the ray tracing-specific movement command is executed. Multiple movement modes are pre-set for the ray tracing-specific movement command. Different movement modes correspond to different movement mode configuration identifiers. Different movement mode definitions obtain different types of data from the underlying hardware of the graphics processor.

7. The graphics processor according to claim 4, characterized in that, When the history-aborted shader is a recently hit shader or a recently missed shader, the shader execution unit is further configured to: After determining that the last instruction in the history abort shader has been executed, obtain the current field data storage space corresponding to each ray information in the current attribute information group that matches the history abort shader, and perform an atomic decrement operation on the number of rays emitted in each current field data storage space. Accordingly, the shader execution unit is further configured to: When the number of target ray emissions stored in the target site data storage space is determined to be zero, the history abort shader, which matches the target site data storage space, determines that all shaders triggered by all emitted rays have completed execution.

8. The graphics processor according to claim 4, characterized in that, The shader execution unit is specifically used for: After re-allocating the second thread bundle runtime resources for the history abort shader, the target context data is obtained from the context data storage space that matches the history abort shader. Configure the newly acquired registers based on the number of registers of various types included in the target site data and the data stored in each register. Configure the newly acquired second thread beam resources based on the effective ray mask included in the target site data; The current program counter is updated based on the shader's program base address and program counter in the target field data, and the instructions in the history aborted shader are executed from the current program counter starting from the second thread bundle.

9. The graphics processor according to claim 8, characterized in that, The shader execution unit is further configured to: By configuring and executing ray tracing-specific jump instructions, the current program counter is updated based on the shader's program base address and program counter in the target context data; The ray tracing-specific jump instruction includes: a specific jump instruction identifier, a first operand to be configured, a second operand to be configured, and a third operand to be configured; the first operand is used to fill the program base address in the current shader's context data, the second operand is used to fill the program counter in the current shader's context data, and the third operand is used to fill the current program counter. A jump instruction specifically for ray tracing, used to assign a value to a third operand by summing the first and second operands.

10. A resource management method, characterized in that, When applied to a graphics processor, the method includes: The current shader is executed using thread bundle runtime resources; After the current shader finishes executing its ray emission instructions, store the current shader's current state data and release the thread bundle runtime resources used by the current shader to terminate the current shader's continued execution. When all shaders triggered by all rays emitted by the current shader have finished executing, request new thread beam execution resources for the current shader and obtain the current state data stored in the history of the current shader. Based on the current shader's context data, continue executing the current shader using the newly allocated thread bundle runtime resources.

11. The method according to claim 10, characterized in that, Before executing the current shader via thread bundle execution resources, the following is also included: Send a resource request to the shader runtime resource manager in the graphics processor and obtain the thread bundle runtime resources allocated by the shader runtime resource manager for the current shader; wherein, the thread bundle runtime resources include the thread bundle and various registers; After releasing the thread bundle runtime resources used by the current shader, the following also applies: Send a resource release request to the shader runtime resource manager to instruct the shader runtime resource manager to reclaim idle thread bundle resources.

12. The method according to claim 10, characterized in that, After executing the current shader via thread bundle runtime resources, the method further includes: When the ray emission command of the current shader is executed, a buffer space is allocated in the ray buffer of the ray tracing unit in the graphics processor, and the ray information of all rays emitted by the current shader is stored in the allocated buffer space; Furthermore, when the current shader is a recently hit shader or a recently missed shader, after executing the current shader using thread bundle runtime resources, the method further includes: The ray tracing unit obtains the ray information stored in the parent ray information buffer space that matches the parent shader of the current shader, and uses the obtained ray information as the current shader's field data. Then, it instructs the ray tracing unit to release the parent ray information buffer space to reallocate the buffer resources.

13. The method according to claim 10, characterized in that, Stores the current shader's context data, including: Allocate target storage space in the graphics processor's memory to store the current shader's context data, and obtain a target pointer pointing to the target storage space; Store the target pointer and the current shader's context data into the target storage space in a pre-defined storage order; The current shader's field data includes: the number of rays emitted, the effective ray mask, the number of various registers required, the data stored in each register, the current shader's program base address, and the program counter.

14. The method according to claim 13, characterized in that, When the current shader is a recently hit shader or a recently missed shader, the method further includes: After determining that the last instruction in the current shader has been executed, obtain the current field data storage space corresponding to each ray information in the current attribute information group that matches the current shader, and perform an atomic decrement operation on the number of rays emitted in each current field data storage space.

15. The method according to claim 13, characterized in that, Based on the current shader's current context data, continue executing the current shader using the newly allocated thread bundle runtime resources, including: Configure the newly requested registers based on the number of registers and the data stored in the current shader field data; Configure the newly requested thread bundle based on the valid ray mask included in the current shader's field data; Based on the current shader's program base address and program counter included in the current shader's context data, update the current program counter so that the instructions in the current shader can be executed from the current program counter starting from the newly requested thread bundle.

16. The method according to claim 13, characterized in that, Allocate target memory space in the graphics processor's memory to store the current shader's context data, and obtain a target pointer pointing to the target memory space, specifically including: Obtain the size of the storage space that matches the current shader's context data, and write the storage space size into the first register; Specify a second register for storing a target pointer to the requested target memory space; After configuring the ray tracing dedicated space allocation instruction according to the first register and the second register, the ray tracing dedicated space allocation instruction is executed. After the instruction is executed, the target pointer pointing to the target memory space is obtained from the second register.

17. The method according to claim 13, characterized in that, Before storing the current shader's context data, the following is also included: Get a first operating mode for executing the program base address of the current shader from the underlying hardware of the graphics processor, and specify a third register for storing the program base address of the current shader; Based on the first operating mode and the third register, the ray tracing-specific movement instruction is configured and then executed. After the instruction execution is completed, the program base address of the current shader is obtained from the third register; Get the program counter obtained from the compiler's current count, and use it as the program counter for the current shader.

18. The method according to claim 15, characterized in that, Update the current program counter based on the current shader's program base address and program counter, which are included in the current shader's context data. Based on the program base address of the current shader, the storage offset of the program counter in the current shader's context data, and the target pointer of the target memory space, construct the first operand and the second operand, and set the third operand as the current program counter; After configuring the ray tracing-specific jump instruction according to the first operand and the second operand, the ray tracing-specific jump instruction is executed. Among them, the ray tracing-specific jump instruction is used to assign a value to the third operand by summing the first and second operands, so as to achieve instruction jump.

19. An electronic device, characterized in that, The electronic device includes: At least one graphics processor; and a memory communicatively connected to said at least one graphics processor; wherein... The memory stores a computer program that can be executed by the at least one graphics processor, the computer program being executed by the at least one graphics processor to enable the at least one graphics processor to perform the resource management method according to any one of claims 10-18.

20. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that cause a processor to execute the resource management method according to any one of claims 10-18.

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