Direct current protection circuit and overcurrent protection method
Patent Information
- Application Number
- CN202610847504.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-12
- Publication Date
- 2026-10-23
- Estimated Expiration
- 2046-06-12
AI Technical Summary
[0003]其中,浪涌控制电路主要由压敏电阻和TVS(Transient Voltage Suppressor,瞬态电压抑制二极管)构成,浪涌防护模块长期使用后,容易因能量累积而失效
[0047]上述直流保护电路和过流保护方法,先通过采集的输入电流判断是否存在过流事件,在判定为存在过流事件的情况下,再基于输入电压和压敏电阻的运行参数,判断过流事件的类型,根据过流事件的不同类型,执行不同的过流保护策略,改善误触发保护或漏保护的情况,提升了直流保护电路对过流响应的智能性。
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Figure CN122418564B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of DC protection circuit technology, and in particular to a DC protection circuit and overcurrent protection method. Background Technology
[0002] 24V DC power supplies have become the mainstream power supply method in industrial control fields due to their moderate voltage and high safety. For example... Figure 1 As shown, the related technology (patent number CN222531327U) provides a DC surge protection module, which uses a surge control circuit in conjunction with transistors M1 and M2 and sampling resistor R to complete surge over- and under-voltage control, and realize reverse connection protection function and overcurrent protection output.
[0003] The surge control circuit mainly consists of a varistor and a TVS (Transient Voltage Suppressor). After prolonged use, surge protection modules are prone to failure due to energy accumulation. Following a surge failure, the overcurrent risk increases dramatically while the protection parameters remain unchanged, potentially damaging downstream components. Given the current limitations of overcurrent detection methods, it's impossible to determine whether the overcurrent is caused by a surge or a general overload, leading to false triggering or leakage of protection.
[0004] Currently, no effective solution has been proposed to address the lack of intelligent response to overcurrent events in DC protection circuits in related technologies. Summary of the Invention
[0005] Therefore, it is necessary to provide a DC protection circuit and overcurrent protection method that intelligently responds to overcurrent events to address the above-mentioned technical problems.
[0006] In a first aspect, this application provides a DC protection circuit, comprising: a sampling module, a control module, an execution module, and a surge protection module, wherein the sampling module and the execution module are respectively connected to the control module, and the sampling module and the execution module are also respectively connected to the surge protection module;
[0007] The surge protection module includes a varistor, and the surge protection module is used to discharge instantaneous overcurrent;
[0008] The sampling module is used to collect the input current and input voltage of the main circuit in the DC protection circuit, as well as the operating parameters of the varistor.
[0009] The control module is used to determine whether an overcurrent event exists based on the input current, and to determine the type of the overcurrent event based on the input voltage and the operating parameters of the varistor; the overcurrent event includes a surge overcurrent event or a general overload overcurrent event;
[0010] The execution module, controlled by the control module, disconnects the power supply circuit of the load and prevents the automatic restoration of the power supply circuit of the load if a surge-type overcurrent event occurs; if a normal overcurrent event occurs, the execution module disconnects the power supply circuit of the load and restores the power supply circuit of the load after the overcurrent is resolved.
[0011] In one embodiment, the sampling module includes: a bus sampling resistor and a varistor status sampling unit;
[0012] The bus sampling resistor is connected in series at the input terminal of the main circuit to collect the input current and input voltage of the main circuit.
[0013] The varistor status sampling unit is connected to the varistor and is used to collect the operating parameters of the varistor, including the voltage of the varistor, the leakage current of the varistor, and the temperature of the varistor.
[0014] In one embodiment, the control module includes: a power monitor and a control unit;
[0015] The power monitor is connected in parallel with the bus sampling resistor to store the input current and the input voltage, and to compare the input current with an overcurrent threshold. If the input current is not lower than the overcurrent threshold, an overcurrent signal is triggered and sent to the control unit to indicate that an overcurrent event has occurred.
[0016] The control unit is used to respond to the overcurrent signal and determine the type of the overcurrent event based on the input voltage and the operating parameters of the varistor: if the input voltage is accompanied by a sudden increase in the overcurrent peak and the varistor fails, it is determined to be a surge-type overcurrent event; if the input voltage is not accompanied by a sudden increase in the overcurrent peak and the varistor operates normally, it is determined to be a normal overload overcurrent event.
[0017] In one embodiment, the control module further includes a reference source, and the execution module includes a transistor and a MOSFET;
[0018] The reference terminal of the reference source is connected to the bus sampling resistor, the cathode of the reference source is connected to the positive terminal of the main circuit, and the anode of the reference source is connected to the negative terminal of the main circuit. When the input voltage is not lower than the voltage threshold, the reference source is turned on to trigger the MOS transistor to turn off.
[0019] The base of the transistor is connected to the control unit, the emitter of the transistor is connected to the reference ground, and the collector of the transistor is connected to the cathode of the reference source. The transistor is controlled by the power control signal issued by the control unit. When the transistor is turned off, the power supply circuit of the load is disconnected.
[0020] The gate of the MOS transistor is connected to the cathode of the reference source, the drain of the MOS transistor is connected to the anode of the reference source, and the source of the MOS transistor is connected to the reference ground. When the MOS transistor is turned off, the power supply circuit of the load is disconnected.
[0021] Secondly, this embodiment provides an overcurrent protection method applied to the DC protection circuit described in the first aspect above, the method comprising:
[0022] The input current, input voltage, and operating parameters of the varistor in the main circuit of the DC protection circuit are collected.
[0023] Determine whether an overcurrent event exists based on the input current;
[0024] If an overcurrent event is determined to exist, the type of the overcurrent event is determined based on the input voltage and the operating parameters of the varistor.
[0025] If a surge-type overcurrent event is detected, the power supply circuit of the load is disconnected, and automatic restoration of the power supply circuit of the load is prohibited.
[0026] If a common overload overcurrent event is determined to exist, the power supply circuit of the load is disconnected, and the power supply circuit of the load is turned on after the overcurrent is resolved.
[0027] In one embodiment, if an overcurrent event is determined to exist, the type of the overcurrent event is determined based on the input voltage and the operating parameters of the varistor, including:
[0028] If the input voltage is accompanied by a sudden increase in the overcurrent peak, and the varistor is identified as malfunctioning based on its operating parameters, then the surge-type overcurrent event is determined to exist.
[0029] If the input voltage is not accompanied by a sudden increase in the overcurrent peak, and the varistor is identified as operating normally based on its operating parameters, then it is determined that the ordinary overload overcurrent event exists.
[0030] The operating parameters of the varistor include the voltage of the varistor, the leakage current of the varistor, and the temperature of the varistor.
[0031] In one embodiment, if a surge-type overcurrent event is determined to exist, the method further includes:
[0032] Reduce the overcurrent threshold and shorten the response time;
[0033] The response time is the time from when the control module detects the overcurrent event to when the control module issues a control command to the execution module.
[0034] In one embodiment, if a surge-type overcurrent event is determined to exist, the method further includes:
[0035] Calculate the surge absorption energy of the current surge-type overcurrent event;
[0036] Based on the surge absorbed energy, calculate the first lifetime decay equivalent number of times for the varistor;
[0037] Based on the current ambient temperature, determine the temperature correction coefficient of the varistor, and correct the first equivalent number of lifetime decays based on the temperature correction coefficient to obtain the second equivalent number of lifetime decays.
[0038] Add the second equivalent lifetime decay count to the total equivalent lifetime decay count in history to obtain the current total equivalent lifetime decay count;
[0039] Based on the total equivalent number of times the varistor has decayed over its current lifespan, determine whether to replace the varistor.
[0040] In one embodiment, determining whether to replace the varistor based on the current total equivalent number of lifetime decays of the varistor includes:
[0041] If the current total equivalent number of lifetime decays of the varistor is not less than the first equivalent number of lifetime decays threshold, an early warning is triggered to indicate that the varistor is about to fail.
[0042] If the current lifetime decay total equivalent number of times of the varistor is not less than the second lifetime decay equivalent number of times threshold, then the varistor is determined to be faulty and the backup surge protection branch is activated.
[0043] Wherein, the first lifetime decay equivalent number threshold is less than the second lifetime decay equivalent number threshold.
[0044] In one embodiment, if a surge-type overcurrent event is determined to exist, the method further includes:
[0045] If the voltage of the varistor or the leakage current of the varistor is detected to meet the first preset condition, the remaining lifetime percentage of the varistor is reduced.
[0046] If the leakage current and temperature of the varistor are detected to meet the second preset condition, the total equivalent number of lifetime decay cycles of the varistor are periodically calibrated.
[0047] The aforementioned DC protection circuit and overcurrent protection method first determine whether an overcurrent event exists by collecting the input current. If an overcurrent event is determined to exist, the type of overcurrent event is then determined based on the input voltage and the operating parameters of the varistor. Different overcurrent protection strategies are executed according to the different types of overcurrent events, improving the situation of false triggering protection or leakage protection, and enhancing the intelligence of the DC protection circuit in responding to overcurrent. Attached Figure Description
[0048] Figure 1 This is a structural schematic diagram of a DC surge protection module in a related technology;
[0049] Figure 2 This is a schematic diagram of the DC protection circuit in one embodiment of this application;
[0050] Figure 3 This is a partial structural diagram of a DC protection circuit in one embodiment of this application. Figure 1 ;
[0051] Figure 4 This is a partial structural diagram of a DC protection circuit in one embodiment of this application. Figure 2 ;
[0052] Figure 5 This is a partial structural diagram of a DC protection circuit in one embodiment of this application. Figure 3 ;
[0053] Figure 6 This is a flowchart illustrating an overcurrent protection method in one embodiment of this application;
[0054] Figure 7 This is a flowchart illustrating an overcurrent protection method in another embodiment of this application. Detailed Implementation
[0055] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0056] Unless otherwise defined, the technical or scientific terms used in this application shall have the general meaning understood by one of ordinary skill in the art to which this application pertains. Words such as “a,” “an,” “an,” “the,” “the,” and “these” used in this application do not indicate quantitative limitation and may be singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that comprises a series of steps or modules (units) is not limited to the listed steps or modules (units) but may include steps or modules (units) not listed, or may include other steps or modules (units) inherent to these processes, methods, products, or devices. Words such as “connected,” “linked,” and “coupled” used in this application are not limited to physical or mechanical connections but may include electrical connections, whether direct or indirect. “Multiple” used in this application refers to two or more. “And / or” describes the relationship between related objects, indicating that three relationships may exist; for example, “A and / or B” can represent: A alone, A and B simultaneously, and B alone. Normally, the character " / " indicates that the objects before and after it are in an "or" relationship. The terms "first," "second," "third," etc., used in this application are merely to distinguish similar objects and do not represent a specific order of objects.
[0057] In one embodiment, a DC protection circuit is provided. This DC protection circuit can be a 24VDC power supply protection circuit, applicable to industrial automation equipment, automotive manufacturing lines, 3C electronics manufacturing, and other scenarios. Figure 2 This is a schematic diagram of the DC protection circuit in this embodiment, as shown below. Figure 2 As shown, it includes: a sampling module 100, a control module 200, an execution module 300, and a surge protection module 400. The sampling module 100 and the execution module 300 are respectively connected to the control module 200, and the sampling module 100 and the execution module 300 are also respectively connected to the surge protection module 400.
[0058] The surge protection module 400 includes a varistor, which is used to discharge transient overcurrent. Specifically, when the voltage across the varistor exceeds a threshold, the resistance drops sharply, absorbing a large current through instantaneous conduction and clamping the overvoltage within a safe range. In some embodiments, the surge protection module 400 also includes a TVS diode. The TVS diode has an extremely fast response speed, rapidly switching from high resistance to low resistance when encountering a surge, clamping the voltage at a lower level through avalanche breakdown. Therefore, by absorbing large energy through the varistor and quickly clamping the voltage through the TVS diode, the surge can be further discharged and the downstream circuitry protected.
[0059] The sampling module 100 is used to collect the input current and input voltage of the main circuit in the DC protection circuit, as well as the operating parameters of the varistor.
[0060] The control module 200 is used to determine whether an overcurrent event exists based on the input current, and to determine the type of overcurrent event based on the input voltage and the operating parameters of the varistor. Overcurrent events include surge-type overcurrent events or ordinary overload overcurrent events. Surge-type overcurrent events are caused by surges. Ordinary overload overcurrent events are caused by load overloads.
[0061] The execution module 300, controlled by the control module 200, disconnects the power supply circuit of the load and prevents the automatic restoration of the power supply circuit of the load if a surge-type overcurrent event occurs; if a normal overcurrent event occurs, the execution module 300 disconnects the power supply circuit of the load and restores the power supply circuit of the load after the overcurrent is resolved.
[0062] The DC protection circuit provided in this embodiment first determines whether an overcurrent event exists by collecting the input current. If an overcurrent event is determined to exist, it then determines the type of overcurrent event based on the input voltage and the operating parameters of the varistor. According to the different types of overcurrent events, different overcurrent protection strategies are executed to improve the situation of false triggering protection or leakage protection, thereby enhancing the intelligence of the DC protection circuit in responding to overcurrent.
[0063] In one embodiment, another DC protection circuit is provided. Figure 3 This is a partial structural diagram of the DC protection circuit. Figure 1 , Figure 4 This is a partial structural diagram of the DC protection circuit. Figure 2 .
[0064] like Figure 3 As shown, the sampling module 100 includes a bus sampling resistor R1 and a varistor status sampling unit.
[0065] A bus sampling resistor R1 is connected in series at the input terminal of the main circuit to collect the input current and input voltage of the main circuit. The bus sampling resistor R1 can be 2mΩ. The current flowing through the bus sampling resistor R1 is the input current of the main circuit, and the voltage across the bus sampling resistor R1 is the input voltage of the main circuit. As one implementation, the sampling frequency of the bus sampling resistor R1 can reach 3.57kHz to ensure the capture of surge peaks.
[0066] The varistor status sampling unit is connected to varistor R3 and is used to collect the operating parameters of varistor R3. These parameters include the voltage across varistor R3, its leakage current, and its temperature. The varistor status sampling unit includes a first voltage divider circuit, a surge leakage current sampling resistor R9, and a temperature sampling circuit. Optionally, a capacitor C1 can be connected in parallel across varistor R3 for filtering.
[0067] The first voltage divider circuit includes resistors R6 and R10 with a voltage division ratio of 1:10, connected in parallel across the varistor R3. The sampling signal is input to the MOV_ADC pin of the control unit U4 (reference). Figure 4 This is used to collect the voltage of varistor R3, so that control unit U4 can determine whether varistor R3 has failed. Under normal conditions, the sampling voltage of varistor R3 is ≈0V; when varistor R3 fails, the sampling voltage is >2V.
[0068] The surge leakage current sampling resistor R9 can be 10Ω and is connected in series between the varistor R3 and the reference ground GND. It is used to collect the leakage current of the varistor R3 to help determine its failure status. Under normal conditions, the leakage current of the varistor R3 is <10μA, and when the varistor R3 fails, the leakage current is >100mA.
[0069] The temperature sampling circuit includes a thermistor U2, such as an MF52A NTC thermistor. Thermistor U2 is mounted close to the varistor R3 to collect the ambient temperature and the temperature of the varistor R3. The signal generated by thermistor U2 is divided by resistor R11 from pin 1 and then connected to the NTC_ADC pin of control unit U4. Its temperature measurement range is -20℃ to 125℃, with an accuracy of ±1℃. Pin 2 of thermistor U2 is connected to the reference ground GND. Optionally, capacitor C2 is connected to pin 1 of the thermistor for filtering.
[0070] like Figure 4 As shown, the control module 200 includes a power monitor U3 and a control unit U4. The power monitor U3 is connected in parallel with the bus sampling resistor R1 and is used to register the input current and input voltage, and to compare the input current with an overcurrent threshold. If the input current is not lower than the overcurrent threshold, an overcurrent signal is triggered and sent to the control unit U4 to indicate that an overcurrent event has occurred.
[0071] In one implementation, the power monitor U3 uses the INA226 model. Pin 1 is the INA226_SDA pin, used to transmit INA226 data signals; pin 2 is the INA226_SCL pin, used to transmit INA226 clock signals; pin 3 is the ALERT pin, used to send the ALERT signal (overcurrent signal); pin 4 is connected to the reference ground GND; pins 5 and 6 are connected in parallel across the bus sampling resistor R1. The power monitor U3 communicates with the control unit U4 through the INA226_SDA and INA226_SCL pins. The control unit U4 can obtain input current data by reading the CURRENT_REG (04h) register and input voltage data by reading the VOLTAGE_REG (02h) register. The control unit U4 can also set the overcurrent threshold through the Alert Limit Reg (07h) register. When the input current is not lower than the overcurrent threshold, the ALERT pin of the power monitor U3 is pulled low, triggering the overcurrent signal.
[0072] Control unit U4 responds to overcurrent signals and determines the type of overcurrent event based on the input voltage and the operating parameters of varistor R3: if the input voltage is accompanied by a sudden increase in the overcurrent peak value and varistor R3 fails, it is determined to be a surge-type overcurrent event; if the input voltage is not accompanied by a sudden increase in the overcurrent peak value and varistor R3 operates normally, it is determined to be a normal overload overcurrent event. This embodiment accurately distinguishes between surge-type overcurrent and normal overload overcurrent based on triple data of overcurrent peak value, voltage surge characteristics, and varistor status, reducing the misclassification rate of overcurrent event types.
[0073] In one implementation, the control unit U4 is an STM32F103C8T6, which has communication interfaces such as I2C and UART and supports simplified floating-point operations. Pin 1 is connected to the INA226_SDA pin of the power monitor U3; pin 2 is connected to the INA226_SCL pin of the power monitor U3; pin 3 is connected to the ALERT pin of the power monitor U3; pin 4 is connected to the first voltage divider circuit for receiving the sampling signal; pin 5 is connected to the thermistor U2 for receiving the sampling signal; pin 6 is connected to the base of transistor Q1 through resistor R5 for sending the Power_Control signal; and pin 7 is connected to the reference ground GND.
[0074] In some embodiments, reference Figure 5In control unit U4: pin 8 is connected to the Eeprom_SDA pin of non-volatile memory U7; pin 9 is connected to the Eeprom_SCL pin of non-volatile memory U7; pin 10 is connected to buzzer U6 for sending the BEEP signal; pin 11 is connected to the UART4_RX pin of RS485 unit U5; pin 12 is connected to the UART4_TX pin of RS485 unit U5; and pin 13 is connected to the UART4_EN pin of RS485 unit U5. Control unit U4 can perform any of the following functions:
[0075] Optionally, the communication interfaces (UART4_RX, UART4_TX, UART4_EN) of the control unit U4 communicate with the RS485 module to transmit monitoring data, control commands and fault information.
[0076] Optionally, the control unit U4 acquires the voltage signal of the varistor R3 through pin 4, acquires the temperature signal of the varistor R3 through pin 5, and controls the switching on and off of the transistor Q1 through pin 6, thereby controlling the start and stop of the power supply circuit of the load.
[0077] Optionally, the control unit U4 outputs a BEEP signal through pin 10 to drive the transistor Q3, triggering the buzzer U6 to sound an alarm.
[0078] Optionally, the control unit U4 has a built-in life prediction algorithm, overcurrent type identification logic and cooperative control strategy, and maintains a fault count register. The fault count register can store the number of surge impacts, overload and overcurrent times, and overvoltage and undervoltage times of the DC protection circuit.
[0079] Continue to refer to Figure 3 The control module 200 also includes a reference source U1, and the execution module 300 includes a transistor Q1 and a MOSFET Q2. The reference terminal R of the reference source U1 is connected to the bus sampling resistor R1 via a second voltage divider circuit. The cathode K of the reference source U1 is connected to the positive terminal of the main circuit via a resistor R2, and the anode A of the reference source U1 is connected to the negative terminal of the main circuit. When the input voltage is not lower than a voltage threshold, the reference source U1 is turned on, triggering the MOSFET Q2 to turn off. The second voltage divider circuit includes resistors R4 and R7, and is used to track the voltage across the bus sampling resistor R1.
[0080] In one implementation, the reference source U1 is selected as a TL431, which can be used as a reference voltage source and comparator. The voltage at the reference terminal R of the reference source U1 is determined by the voltage division of the second voltage divider circuit. When the input current is too large, causing the voltage difference across the bus sampling resistor R1 (i.e., the input voltage) to increase, the voltage at the cathode K of the reference source U1 changes and turns on, while the auxiliary MOSFET Q2 turns off.
[0081] The base B of transistor Q1 is connected to control unit U4, the emitter E of transistor is connected to reference ground GND, and the collector C of transistor is connected to the cathode K of reference source U1. Transistor Q1 is controlled by the power control signal issued by control unit U4. When transistor Q1 is turned off, the power supply circuit of the load is disconnected.
[0082] In one implementation, transistor Q1 can be an S8050 type transistor, controlled by the Power_Control signal of control unit U4, which can actively cut off the power supply circuit (supporting remote control). Resistors R5 and R8 are bias resistors used to control the conduction or cutoff of transistor Q1.
[0083] The gate G of MOSFET Q2 is connected to the cathode K of reference source U1, the drain D of MOSFET Q2 is connected to the anode A of reference source U1, and the source S of MOSFET Q2 is connected to the reference ground GND. When MOSFET Q2 is turned off, the power supply circuit of the load is disconnected.
[0084] In one implementation, MOSFET Q2 can be an IRF740 NMOS transistor, which is controlled by the reference source U1 and the control unit U4. It disconnects during overcurrent to cut off the power supply circuit of the subsequent stage, and restores power supply according to the strategy after the overcurrent is released.
[0085] In one embodiment, another DC protection circuit is provided. Figure 5 This is a partial structural diagram of the DC protection circuit. Figure 3 ,like Figure 5 As shown, the DC protection circuit also includes a communication alarm module, which includes an RS485 unit U5 and a buzzer U6.
[0086] In one implementation, the RS485 unit U5 can be a MAX485 chip. Pin 1 of the RS485 unit U5 is connected to pin 13 of the control unit U4, pin 2 of the RS485 unit U5 is connected to pin 12 of the control unit U4, and pin 3 of the RS485 unit U5 is connected to pin 11 of the control unit U4. The RS485 unit U5 is used to realize bidirectional communication between the host computer and the circuit, supporting remote adjustment of overcurrent / overvoltage / undervoltage thresholds and response time, uploading fault data and component life status, and remote fault reset.
[0087] Pin 1 of buzzer U6 is connected to the reference ground GND via capacitors C3 and C4. Pin 2 of buzzer U6 is connected to diode D1, and pin 2 of buzzer U6 is also connected to pin 10 of control unit U4 via transistor Q3. The base of transistor Q3 is connected to pin 10 of control unit U4 via resistor R12, the collector of transistor Q3 is connected to pin 2 of buzzer U6, and the emitter of transistor Q3 is connected to the reference ground GND. Resistor R13 is connected in series between the base of transistor Q3 and the reference ground GND. When the DC protection circuit fails, control unit U4 sends a BEEP signal to buzzer U6, causing buzzer U6 to emit an audible and visual alarm. Different faults (overcurrent, surge failure, insufficient component life) correspond to different alarm frequencies for easy on-site identification.
[0088] Continue to refer to Figure 5 In one embodiment, the DC protection circuit further includes a fault tracing module, which comprises a non-volatile memory U7. The non-volatile memory U7 can serve as a logic add-on component of the control unit U4, recording the operating data of the DC protection circuit. In the non-volatile memory U7, pin 1 is used to transmit the Eeprom_SCL signal, pin 2 is used to transmit the Eeprom_SDA signal, and pin 3 is connected to the reference ground GND.
[0089] Optionally, the non-volatile memory U7 stores fault type data, such as surge impact, overload overcurrent, overvoltage, undervoltage, and surge protection failure.
[0090] Optionally, the non-volatile memory U7 stores fault parameter data, such as the peak current / voltage, duration, and timestamp of the corresponding fault.
[0091] Optionally, the non-volatile memory U7 stores cumulative count data, such as surge impact counts, overload and overcurrent counts, overvoltage and undervoltage counts, and protection failure counts.
[0092] If the storage time of the DC protection circuit's operating data reaches a certain period (e.g., 1 year), it can be exported through RS485 unit U5 to assist in troubleshooting power grid or load problems.
[0093] In one embodiment, an overcurrent protection method is also provided, applied to the DC protection circuit in any of the above embodiments. Figure 6 This is a flowchart illustrating the overcurrent protection method, as shown below. Figure 6 As shown, the process includes the following steps:
[0094] Step S101: Collect the input current, input voltage, and operating parameters of the varistor in the main circuit of the DC protection circuit.
[0095] Step S102: Determine whether an overcurrent event exists based on the input current.
[0096] Step S103: If an overcurrent event is determined to exist, the type of overcurrent event is determined based on the input voltage and the operating parameters of the varistor.
[0097] If the input voltage is accompanied by a sudden surge in overcurrent peak value, and the varistor is identified as malfunctioning based on its operating parameters, then a surge-type overcurrent event is determined to exist. If the input voltage is not accompanied by a sudden surge in overcurrent peak value, and the varistor is identified as operating normally based on its operating parameters, then a general overload overcurrent event is determined to exist. The varistor's operating parameters include its voltage, leakage current, and temperature. This embodiment accurately distinguishes between surge-type and general overload overcurrent based on triple data: overcurrent peak value, voltage surge characteristics, and varistor status, reducing the misclassification rate of overcurrent event types.
[0098] Step S104: If a surge-type overcurrent event is determined to exist, disconnect the power supply circuit of the load and prevent automatic restoration of the power supply circuit of the load.
[0099] Step S105: If it is determined that a common overload overcurrent event exists, disconnect the power supply circuit of the load and turn on the power supply circuit of the load after the overcurrent is resolved.
[0100] In one implementation, when the power monitor U3 detects an overcurrent, the control unit U4 simultaneously analyzes the type of the overcurrent event, i.e., whether the overcurrent peak is accompanied by a voltage surge (surge characteristic), and whether the voltage, leakage current, and temperature of the varistor are normal. If there is a voltage surge and the varistor fails, it is determined to be a surge-type overcurrent. In this case, the MOSFET Q2 is immediately turned off, and the buzzer and RS485 unit U5 are triggered to alarm, locking the DC protection circuit. If there is no voltage surge and the varistor is normal, it is determined to be a general overload overcurrent. In this case, the MOSFET Q2 is immediately turned off, and power supply is automatically restored after the overcurrent is resolved (e.g., within 1 second).
[0101] The overcurrent protection method provided in this embodiment first determines whether an overcurrent event exists by collecting the input current. If an overcurrent event is determined to exist, the type of overcurrent event is determined based on the input voltage and the operating parameters of the varistor. Different overcurrent protection strategies are executed according to the different types of overcurrent events, which improves the situation of false triggering protection or leakage protection and enhances the intelligence of DC protection circuit in response to overcurrent.
[0102] In related technologies, overcurrent protection and surge failure detection operate independently. After a surge failure, the overcurrent risk increases dramatically, but the protection parameters remain unchanged, which can easily lead to damage to downstream devices. To address this issue, in one embodiment, if a surge-type overcurrent event is determined to exist, the method further includes: reducing the overcurrent threshold and shortening the response time; wherein, the response time is the time from when the control module identifies the overcurrent event to when the control module issues a control command to the execution module.
[0103] As one implementation method, based on whether the voltage, leakage current and temperature of the varistor R3 are normal, when the triple detection determines that the varistor has failed, the control unit U4 immediately sends a command to the power monitor U3 to reduce the overcurrent threshold by 30%-50% (e.g., from 3A to 1.5~2A) and shorten the response time to 5ms, so as to reduce the probability of a surge in overcurrent risk after a surge failure.
[0104] This embodiment automatically lowers the overcurrent threshold and shortens the response time when surge protection fails, thus achieving adaptive adjustment of overcurrent protection parameters based on the surge protection status and solving the problem of a surge in overcurrent risk after surge failure.
[0105] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.
[0106] In one embodiment, Figure 7 A flowchart illustrating another overcurrent protection method is provided, such as... Figure 7 As shown, if a surge-type overcurrent event is determined to exist, the method further includes the following steps:
[0107] Step S201: Calculate the surge absorption energy of the current surge-type overcurrent event.
[0108] Specifically, calculation During a surge, the peak voltage Vsurge, peak current Isurge, and duration tsurge are collected. Based on the peak voltage Vsurge, peak current Isurge, and duration tsurge, the surge absorption energy Esingle of the current surge-type overcurrent event is calculated, which is the energy absorbed in a single surge, in J.
[0109] Step S202: Calculate the first lifetime decay equivalent number of times for the varistor based on the surge absorbed energy.
[0110] Specifically, calculate Kintensity = Single / Erated. Here, Erated is the rated surge energy of the varistor, such as 0.6J for SMBJ36CA. Kintensity is a proportionality coefficient, which can be obtained from a preset table as the first lifetime decay equivalent number of times, Ndecay. For example, when Kintensity ≥ 1.5, Ndecay = 20, to correct for impact strength.
[0111] Step S203: Determine the temperature correction coefficient of the varistor based on the current ambient temperature, and correct the first lifetime decay equivalent number of times based on the temperature correction coefficient to obtain the second lifetime decay equivalent number of times.
[0112] The current ambient temperature T is collected, and the temperature correction coefficient Ktemp is obtained through a piecewise linear fitting table. For example, when the ambient temperature reaches 85℃, Ktemp = 4.0, and Ndecay_temp = Ndecay × Ktemp is calculated for temperature correction. Here, Ndecay_temp represents the second lifetime decay equivalent number of times.
[0113] Step S204: Add the second equivalent lifetime decay count to the total equivalent lifetime decay count in history to obtain the current total equivalent lifetime decay count.
[0114] Calculate Naccum = Naccum + Ndecay_temp to maintain the total equivalent decay count. Here, Naccum represents the total equivalent decay count for the historical lifetime.
[0115] Step S205: Determine whether to replace the varistor based on the total equivalent number of times the varistor's current lifespan has decayed.
[0116] For example, if the current equivalent number of lifetime decay cycles of the varistor is not lower than the first equivalent number of lifetime decay cycles threshold, an early warning is triggered to indicate that the varistor is about to fail; if the current equivalent number of lifetime decay cycles of the varistor is not lower than the second equivalent number of lifetime decay cycles threshold, the varistor is determined to have failed, and the backup surge protection branch is activated; wherein, the first equivalent number of lifetime decay cycles threshold is less than the second equivalent number of lifetime decay cycles threshold.
[0117] As one implementation method, a lifespan warning is triggered when Naccum ≥ 80% × Nrated (Nrated is the rated number of withstand cycles, such as 500 cycles for TVS and SMBJ36CA). When Naccum ≥ Nrated, it is determined that failure is imminent, the backup branch is activated, and a forced alarm is triggered.
[0118] This embodiment combines surge energy accumulation, impact intensity, and ambient temperature to achieve accurate prediction of the remaining life of core components, supporting predictive maintenance.
[0119] In one embodiment, if a surge-type overcurrent event is determined to exist, the method further includes:
[0120] If the voltage or leakage current of the varistor is detected to meet the first preset condition, the remaining lifetime percentage of the varistor is reduced; if the leakage current and temperature of the varistor are detected to meet the second preset condition, the total equivalent number of lifetime decay cycles of the varistor is periodically calibrated.
[0121] As one implementation, the first preset condition can be that the leakage current of the varistor is >100μA or the sampling voltage is >2V, in which case the remaining lifetime of the varistor is reduced by 30%. The second preset condition can be that the leakage current of the varistor is <10μA and the temperature is stable, in which case the total equivalent number of lifetime decays of the varistor, Naccum, is calibrated every 30 days, for example, by multiplying Naccum by a preset coefficient (e.g., 0.95).
[0122] This embodiment analyzes the operating parameters of the varistor to further calibrate its lifespan, making the lifespan prediction of the varistor more accurate.
[0123] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.
[0124] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0125] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A DC protection circuit, characterized in that, include: The system includes a sampling module, a control module, an execution module, and a surge protection module. The sampling module and the execution module are respectively connected to the control module, and the sampling module and the execution module are also respectively connected to the surge protection module. The surge protection module includes a varistor, and the surge protection module is used to discharge instantaneous overcurrent; The sampling module is used to collect the input current and input voltage of the main circuit in the DC protection circuit, as well as the operating parameters of the varistor. The control module is used to determine whether an overcurrent event exists based on the input current, and to determine the type of the overcurrent event based on the input voltage and the operating parameters of the varistor; the overcurrent event includes a surge overcurrent event or a general overload overcurrent event; wherein, the operating parameters of the varistor include the voltage of the varistor, the leakage current of the varistor, and the temperature of the varistor; The execution module, controlled by the control module, disconnects the power supply circuit of the load and prevents the automatic restoration of the power supply circuit of the load if a surge-type overcurrent event occurs; if a normal overcurrent event occurs, the execution module disconnects the power supply circuit of the load and restores the power supply circuit of the load after the overcurrent is resolved.
2. The DC protection circuit according to claim 1, characterized in that, The sampling module includes: a bus sampling resistor and a varistor status sampling unit; The bus sampling resistor is connected in series at the input terminal of the main circuit to collect the input current and input voltage of the main circuit. The varistor status sampling unit is connected to the varistor and is used to collect the operating parameters of the varistor, including the voltage of the varistor, the leakage current of the varistor, and the temperature of the varistor.
3. The DC protection circuit according to claim 2, characterized in that, The control module includes: a power monitor and a control unit; The power monitor is connected in parallel with the bus sampling resistor to store the input current and the input voltage, and to compare the input current with an overcurrent threshold. If the input current is not lower than the overcurrent threshold, an overcurrent signal is triggered and sent to the control unit to indicate that an overcurrent event has occurred. The control unit is used to respond to the overcurrent signal and determine the type of the overcurrent event based on the input voltage and the operating parameters of the varistor: if the input voltage is accompanied by a sudden increase in the overcurrent peak and the varistor fails, it is determined to be a surge-type overcurrent event; if the input voltage is not accompanied by a sudden increase in the overcurrent peak and the varistor operates normally, it is determined to be a normal overload overcurrent event.
4. The DC protection circuit according to claim 3, characterized in that, The control module also includes a reference source, and the execution module includes a transistor and a MOSFET. The reference terminal of the reference source is connected to the bus sampling resistor, the cathode of the reference source is connected to the positive terminal of the main circuit, and the anode of the reference source is connected to the negative terminal of the main circuit. When the input voltage is not lower than the voltage threshold, the reference source is turned on to trigger the MOS transistor to turn off. The base of the transistor is connected to the control unit, the emitter of the transistor is connected to the reference ground, and the collector of the transistor is connected to the cathode of the reference source. The transistor is controlled by the power control signal issued by the control unit. When the transistor is turned off, the power supply circuit of the load is disconnected. The gate of the MOS transistor is connected to the cathode of the reference source, the drain of the MOS transistor is connected to the anode of the reference source, and the source of the MOS transistor is connected to the reference ground. When the MOS transistor is turned off, the power supply circuit of the load is disconnected.
5. An overcurrent protection method, characterized in that, The method is applied to the DC protection circuit according to any one of claims 1 to 4, characterized in that the method comprises: The input current, input voltage, and operating parameters of the varistor in the main circuit of the DC protection circuit are collected. Determine whether an overcurrent event exists based on the input current; If an overcurrent event is determined to exist, the type of the overcurrent event is determined based on the input voltage and the operating parameters of the varistor. If a surge-type overcurrent event is detected, the power supply circuit of the load is disconnected, and automatic restoration of the power supply circuit of the load is prohibited. If a common overload overcurrent event is determined to exist, the power supply circuit of the load is disconnected, and the power supply circuit of the load is turned on after the overcurrent is resolved.
6. The overcurrent protection method according to claim 5, characterized in that, If an overcurrent event is determined, the type of the overcurrent event is determined based on the input voltage and the operating parameters of the varistor, including: If the input voltage is accompanied by a sudden increase in the overcurrent peak, and the varistor is identified as malfunctioning based on its operating parameters, then the surge-type overcurrent event is determined to exist. If the input voltage is not accompanied by a sudden increase in the overcurrent peak, and the varistor is identified as operating normally based on its operating parameters, then it is determined that the ordinary overload overcurrent event exists. The operating parameters of the varistor include the voltage of the varistor, the leakage current of the varistor, and the temperature of the varistor.
7. The overcurrent protection method according to claim 5, characterized in that, If a surge-type overcurrent event is determined to exist, the method further includes: Reduce the overcurrent threshold and shorten the response time; The response time is the time from when the control module detects the overcurrent event to when the control module issues a control command to the execution module.
8. The overcurrent protection method according to claim 5, characterized in that, If a surge-type overcurrent event is determined to exist, the method further includes: Calculate the surge absorption energy of the current surge-type overcurrent event; Based on the surge absorbed energy, calculate the first lifetime decay equivalent number of times for the varistor; Based on the current ambient temperature, determine the temperature correction coefficient of the varistor, and correct the first equivalent number of lifetime decays based on the temperature correction coefficient to obtain the second equivalent number of lifetime decays. Add the second equivalent lifetime decay count to the total equivalent lifetime decay count in history to obtain the current total equivalent lifetime decay count; Based on the total equivalent number of times the varistor has decayed over its current lifespan, determine whether to replace the varistor.
9. The overcurrent protection method according to claim 8, characterized in that, Based on the current total equivalent number of lifespan decay cycles of the varistor, determine whether to replace the varistor, including: If the current total equivalent number of lifetime decays of the varistor is not less than the first equivalent number of lifetime decays threshold, an early warning is triggered to indicate that the varistor is about to fail. If the current lifetime decay total equivalent number of times of the varistor is not less than the second lifetime decay equivalent number of times threshold, then the varistor is determined to be faulty and the backup surge protection branch is activated. Wherein, the first lifetime decay equivalent number threshold is less than the second lifetime decay equivalent number threshold.
10. The overcurrent protection method according to claim 8, characterized in that, If a surge-type overcurrent event is determined to exist, the method further includes: If the voltage of the varistor or the leakage current of the varistor is detected to meet the first preset condition, the remaining lifetime percentage of the varistor is reduced. If the leakage current and temperature of the varistor are detected to meet the second preset condition, the total equivalent number of lifetime decay cycles of the varistor are periodically calibrated.
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