A power supply switching control method based on artificial intelligence
Patent Information
- Application Number
- CN202610839200.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-11
- Publication Date
- 2026-10-20
- Estimated Expiration
- 2046-06-11
AI Technical Summary
[0005]针对现有技术的不足,本发明提供了一种基于人工智能的供电切换控制方法,解决了传统供电切换机制因依赖固定阈值导致响应滞后,以及在主备接管过程中因缺乏供需瞬态协同与接管涌流抑制机制,从而引发负载侧电压深度暂降与开关器件过流受损的问题
[0026]1、本发明通过利用时序推断模型输出的电网崩溃概率指数触发前期预警,随后计算主干电压跌落触底时间变量,并将其与系统的物理响应时间常数进行数值对比,据此自适应进入正常协同模式或极速旁路降阶模式,进而克服传统单一固定电压阈值判定存在的死板与滞后问题,使供电系统能够依据实际故障演化速率量身分配对应的处理流程,提高判定效率与动作的针对性。
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Abstract
Description
Technical Field
[0001] This invention relates to the field of power supply switching control technology, specifically to a power supply switching control method based on artificial intelligence. Background Technology
[0002] In modern power supply systems with high reliability requirements, two sets of power lines are typically configured—a main branch and a backup branch—to ensure the continuous operation of electrical equipment such as server clusters. When the main power grid fails or the power quality deteriorates, the system needs to control relevant switching elements to disconnect the main power supply and quickly switch to the backup branch to maintain system operation.
[0003] Existing power supply switching control strategies largely rely on a single fixed voltage threshold for judgment. This passive response mechanism has significant limitations in practical engineering applications. Because the voltage sag rates vary for different types of grid faults, a simple fixed threshold cannot identify potential fault trends in advance. This results in the system being unable to distinguish between slow grid fluctuations and rapid grid collapses, making it difficult to tailor the corresponding processing flow according to the actual sag rate. Consequently, the judgment of switching actions is not only rigid but also severely delayed.
[0004] During the physical takeover phase of power supply switching, existing control mechanisms generally lack transient coordination between the primary / backup power supply side and the power consumption side. Because the switching action is not aligned with the real-time energy consumption status of the load side, the backup power supply often directly faces a sudden surge in load upon switching in. This directly causes the backup power supply's output voltage to drop instantaneously in the initial stage of switching, triggering a deep voltage sag on the DC bus at the load end. Furthermore, under extreme conditions of a rapid drop in the mains voltage, high residual voltage often remains on the power modules and lines inside the server. Traditional methods typically directly control the backup switch to full-wave conduction after detecting that the conditions are met. At this time, the uncontrolled instantaneous voltage difference between the primary and backup sides will generate extremely high initial surge currents. Excessive takeover surge currents can easily exceed the current-carrying limits of semiconductor switching devices such as thyristors, causing thermal breakdown damage to the devices, and even triggering false tripping of upstream protection circuit breakers, leading to a complete system power outage. Summary of the Invention
[0005] To address the shortcomings of existing technologies, this invention provides an artificial intelligence-based power supply switching control method. This method solves the problems of delayed response caused by the reliance on fixed thresholds in traditional power supply switching mechanisms, and the lack of transient supply and demand coordination and inrush current suppression mechanisms during the main / standby takeover process, which leads to deep voltage sags on the load side and overcurrent damage to switching devices.
[0006] To achieve the above objectives, the present invention provides the following technical solution: a power supply switching control method based on artificial intelligence, comprising the following steps:
[0007] The switching controller collects voltage and current sampling sequences from the main branch and reads the total power consumption telemetry data sequence from the server cluster, storing the collected data in a sliding window buffer. The voltage and current sampling sequences are then input into a preset time-series inference model, outputting a grid collapse probability index. When the grid collapse probability index exceeds a set probability warning threshold, the switching controller calculates the main voltage sag gradient, combines the current main voltage amplitude, the main voltage sag gradient, and the lower limit of the safe voltage to obtain the sag bottoming-out time variable, and compares this time variable with a preset physical response time constant. When the sag bottoming-out time variable is greater than or equal to the physical response time constant, the system enters normal collaborative mode. The switching controller sends a power consumption limit signal to the server cluster's management controller, calculates the load power decrease response gradient, and, with the goal of minimizing transient power consumption, optimizes the physical switching time point by combining the aforementioned voltage and power gradients. While waiting for the optimal physical switching time point, phasor pre-compensation parameters are sent to the standby inverter to adjust its output state, and electrical switching is performed when the optimization time point is reached and the main current is detected to be zero. When the time variable for bottoming out is less than the physical response time constant, the system enters a rapid bypass reduction mode. The switching controller blocks the main circuit breaker trigger signal and asynchronously sends a power consumption limit signal. It calculates the instantaneous voltage difference between the backup branch and the load side, and calculates the initial trigger delay angle of the backup switch accordingly. The switching controller controls this trigger delay angle to decrease nonlinearly within a continuous AC half-wave cycle. This, combined with the current demand reduction caused by the server side's load reduction, forms a power transition between the supply and demand sides, and maintains full conduction after the delay angle returns to zero.
[0008] Preferably, when storing the acquired data into the sliding window buffer, a fixed sliding window length is set for the buffer. For total power telemetry data sequences acquired at low frequencies, a zero-order hold logic is used for upsampling and alignment along the time axis. Before the next valid communication data is returned, the power sequence value corresponding to the high-frequency timestamp within the sliding window is assigned the value of the most recent valid read result.
[0009] Preferably, before inputting the voltage and current sequences into the preset timing inference model, the voltage sampling sequence and the current sampling sequence in the sliding window buffer are subjected to maximum and minimum value normalization processing, respectively. The processed sequences are reconstructed into an input matrix with fixed row dimensions and column dimensions corresponding to the sliding window length according to the timing correspondence, and this input matrix is then imported into the timing inference model.
[0010] Preferably, the temporal inference model is constructed by cascading a one-dimensional convolutional network and a long short-term memory network. Internally, it sequentially includes a one-dimensional convolutional feature extraction layer, a temporal correlation extraction layer, a fully connected mapping layer, and a probability output layer. The one-dimensional convolutional feature extraction layer extracts local temporal distortion features of the voltage and current sequences; the temporal correlation extraction layer uses internal units to extract the dependencies and evolution trends of these features along the time axis; the fully connected mapping layer and the probability output layer output scalar values representing the instability probability based on activation functions.
[0011] Preferably, the method for obtaining the voltage drop bottoming time variable is to subtract the lower limit of the safe voltage from the amplitude of the main voltage envelope at the current triggering time to obtain the voltage drop margin, and then divide the voltage drop margin by the absolute value of the main voltage drop gradient at the triggering time to calculate the voltage drop margin.
[0012] Preferably, the physical response time constant is the lower limit of the time taken for the system to execute control actions. Its value is composed of the hardware delay time of the underlying communication network of the power supply system and the inherent internal time taken for the server's internal management controller to execute the underlying microcode unloading instruction.
[0013] Preferably, the load power decrease response gradient is calculated by extracting multiple sets of continuous power consumption data points recorded in the previous communication update cycle before the current triggering time, performing linear regression fitting calculation using the least squares method, and using the slope value of the obtained fitted line as the transient power consumption change gradient in the discretized scenario.
[0014] Preferably, the solution for the optimal physical switching time point relies on the constructed bidirectional state prediction equations. The predicted voltage envelope is obtained by summing the integrals of the actual voltage at the trigger time and the voltage gradient; the predicted load power consumption is obtained by summing the integrals of the actual power consumption at the trigger time and the load power consumption gradient. A parameter trend model in the prediction time domain is constructed using the above equations.
[0015] Preferably, the optimal physical switching time needs to satisfy multiple conditions. The time domain constraint requires the solution point to be no later than the hardware hold-up time limit for the internal capacitors of the power module to maintain DC output; the voltage domain constraint requires the predicted voltage corresponding to the solution point to be no lower than the safe voltage lower limit. Based on satisfying the above constraints, the search range is discretized into a sequence of predicted zero-crossing points, and the zero-crossing point that minimizes the predicted load power consumption is found as the optimal physical switching time.
[0016] Preferably, the grid waveform status is monitored before sending phasor pre-compensation parameters to the backup inverter. When the determined drop-to-bottom time variable is lower than the set unlock tolerance time, or when the phase jump of the main waveform is detected to be greater than the set phase angle threshold, a command is sent to the backup inverter to release the native phase-locked loop following mechanism, so that it switches to the reference waveform transmission mode of the internal independent clock.
[0017] Preferably, the expected voltage amplitude in the phasor pre-compensation parameters includes a feedforward cancellation amount. This value is set based on the rated reference voltage amplitude of the standby inverter, superimposed with the product of the predicted voltage offset and the compensation ratio coefficient, and further superimposed with the predicted voltage drop attenuation amount generated on the inverter's equivalent internal resistance according to the expected minimum load power consumption.
[0018] Preferably, the expected voltage phase angle in the phasor pre-compensation parameters includes an anti-offset amount. This phase angle value is calculated based on the locked phase angle reference at the trigger time, combined with the estimated angular frequency displacement at the optimal switching time point, and superimposed with the pre-calibrated advance compensation phase based on the load-side inductive reactance characteristics.
[0019] Preferably, a hardware anti-short-through mechanism is incorporated into the electrical execution timing. The switching controller continuously monitors the input current sequence. Once it confirms that the main circuit current amplitude has dropped to zero and remains above a preset discrimination window, it determines that the main circuit thyristor is completely blocked. Subsequently, a preset microsecond-level anti-short-through dead time timer is started, and the backup switch is activated after the timer expires.
[0020] Preferably, when entering the ultra-fast bypass reduction mode, the AC / DC side voltage difference assessment method is as follows: the residual voltage of the server's DC bus, which is read, is converted to the AC input side using a fixed efficiency parameter to obtain an equivalent converted voltage. Then, the converted voltage is subtracted from the effective value of the no-load rated output voltage of the standby inverter to obtain the instantaneous voltage difference value reflecting the potential difference between the two ends.
[0021] Preferably, the initial trigger delay angle of the standby switch is determined through adaptive mapping logic. When the instantaneous voltage difference is not greater than zero, the initial trigger delay angle is directly set to zero; when the instantaneous voltage difference is greater than zero, based on the three physical parameters of instantaneous voltage difference, equivalent series impedance of the main and standby circuits, and the thyristor's non-repetitive surge current withstand limit, a nonlinear decay model containing a natural exponent term is substituted to calculate the safe trigger phase angle that limits the transient takeover current.
[0022] Preferably, the trigger delay angle adjustment in subsequent consecutive AC half-wave cycles is performed according to the discrete exponential decay model. The trigger delay angle value of each half-wave cycle is equal to the initial trigger delay angle multiplied by a specific power of the decay coefficient. The power of the decay coefficient increases with the number of AC half-waves experienced, thereby smoothly reducing the phase angle.
[0023] Preferably, the stable energy transfer mechanism on both the supply and demand sides is characterized by the server side responding to the load reduction signaling by reducing the core power supply and operating frequency to quickly reduce the total power consumption demand, resulting in a falling edge in the current drawn from the load side. Simultaneously, the power supply side widens the conduction integral area based on the smoothly reduced latency competition band, resulting in a rising edge in the injected energy. Demand decay and supply enhancement are matched in parallel within the same physical time window.
[0024] Preferably, after determining that the backup switch trigger delay angle value has decreased to zero, thus achieving full-wave conduction, the switching controller initiates the steady-state recovery state machine. A power recovery signal is sent to the server management controller via the communication network, instructing the server to gradually revert to its operating performance state based on the current backup power capacity margin, thereby restoring computing power output.
[0025] This invention provides a power supply switching control method based on artificial intelligence. It has the following beneficial effects:
[0026] 1. This invention triggers early warning by using the power grid collapse probability index output by the time-series inference model. Then, it calculates the bottoming time variable of the main voltage drop and compares it with the physical response time constant of the system. Based on this, it adaptively enters the normal cooperative mode or the ultra-fast bypass reduction mode, thereby overcoming the rigidity and lag of the traditional single fixed voltage threshold judgment. This allows the power supply system to allocate the corresponding processing flow according to the actual fault evolution rate, improving the judgment efficiency and the pertinence of the action.
[0027] 2. When the present invention determines that it has entered the normal cooperative mode, it constructs a bidirectional state prediction equation by using the voltage drop gradient and the load power consumption decrease gradient. Within the hardware hold time constraint of the power module, it solves the current zero crossover point that makes the predicted power consumption reach the minimum value as the physical switching time. During the waiting period, it adjusts the output amplitude and phase angle of the standby inverter for pre-compensation. This can accurately align the takeover action of the electrical switch with the power consumption trough of the load on the power consumption side, directly offsetting the voltage drop caused by the sudden load increase at the initial stage of the standby power supply switching, and maintaining the voltage stability of the DC bus at the load end.
[0028] 3. This invention addresses the issue of rapid voltage drops in power grids by introducing an AC / DC residual voltage conversion mechanism under rapid bypass reduction mode. Based on the calculated instantaneous voltage difference between the primary and backup power supplies, the initial trigger delay angle of the backup switch is dynamically set. The backup switch gradually widens its conduction phase angle according to a nonlinear attenuation model, performing progressive energy injection. Simultaneously, it coordinates with the server's asynchronous execution of the underlying load reduction command, causing a decrease in current demand and forming a dynamic match between supply and demand. This effectively limits the initial inrush current during switching to within the thyristor's current-carrying limit, preventing thermal breakdown of devices and tripping of upstream circuit breakers caused by direct full-wave conduction. Attached Figure Description
[0029] Figure 1 This is a schematic diagram of the system architecture of the present invention;
[0030] Figure 2 This is a schematic diagram of the method flow of the present invention;
[0031] Figure 3 This is a schematic diagram illustrating the working principle of the multi-dimensional time-series data synchronous acquisition and inference calculation of the present invention;
[0032] Figure 4 This is a schematic diagram of the fall boundary time calculation and adaptive mode diversion process of the present invention;
[0033] Figure 5 This is the normal collaborative mode control logic diagram of the present invention;
[0034] Figure 6 This is a timing diagram of phasor precompensation and physical switching in this invention;
[0035] Figure 7 This is the control logic and timing diagram for the ultra-fast bypass reduction mode of the present invention;
[0036] Figure 8 This is a timing diagram of the phase-controlled soft closure and spatiotemporal relay control logic of the present invention;
[0037] Figure 9 The waveforms of surge current and bus voltage under extreme drop conditions are shown in the figure. (a) is a comparison of switching transient current under extreme drop conditions, and (b) is a comparison of server DC bus voltage under extreme drop conditions.
[0038] Figure 10 This is a comparison diagram of the seamless switching AC phasor waveforms under the gradual drop condition of the present invention.
[0039] Among them, 11. Main branch; 12. Backup branch; 13. Backup power supply; 14. Backup inverter; 20. Server cluster; 21. Server motherboard; 22. Power module; 23. Management controller; 24. Processor; 30. Switching controller; 31. Main switch; 32. Backup switch; 33. Sampling circuit; 34. Communication network. Detailed Implementation
[0040] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0041] See attached document Figure 1 , Figure 1 This is a schematic diagram of the system architecture of an artificial intelligence-based power switching control system according to an embodiment of the present invention. The present invention provides an artificial intelligence-based power switching control system, which may include a main branch 11, a backup branch 12, a backup power supply 13, a backup inverter 14, a server cluster 20, a main switch 31, a backup switch 32, and a switching controller 30.
[0042] The input terminal of the main branch 11 is connected to the external power distribution network. The input terminal of the backup branch 12 is connected to the backup power supply 13. The backup power supply 13 is equipped with a backup inverter 14. The backup inverter 14 is provided with a communication interface for receiving external phasor injection commands.
[0043] The server cluster 20 contains multiple server motherboards 21 and power modules 22. The server motherboards 21 integrate a management controller 23 and a processor 24. The management controller 23 and the processor 24 are electrically connected by their underlying hardware control pins.
[0044] The switching controller 30 is positioned between the power supply side and the power consumption side. The main circuit switch 31 is connected in series with the main circuit branch 11. The standby switch 32 is connected in series with the standby branch 12. The output of the switching controller 30 is connected to the trigger pins of the main circuit switch 31 and the standby switch 32, respectively. Both the main circuit switch 31 and the standby switch 32 utilize bidirectional thyristor assemblies.
[0045] The power supply system also includes a sampling circuit 33 and a communication network 34. The acquisition probe of the sampling circuit 33 is connected to the bus of the main branch 11, and its data output terminal is connected to the analog signal input port of the switching controller 30. The two ends of the communication network 34 are respectively connected to the network port of the switching controller 30 and the management port of the management controller 23.
[0046] See attached document Figure 2 , Figure 2 This is a schematic flowchart of a power supply switching control method based on artificial intelligence according to an embodiment of the present invention. The present invention provides a power supply switching control method based on artificial intelligence, comprising the following steps:
[0047] S10, the switching controller 30 collects the voltage sampling sequence and current sampling sequence of the main branch 11 through the sampling circuit 33, reads the total power consumption telemetry data sequence of the server cluster 20 through the communication network 34, stores the collected data in the internal sliding window buffer, and inputs the voltage sampling sequence and current sampling sequence into the preset time series inference model to output the power grid collapse probability index.
[0048] S20 When the probability index of power grid collapse is greater than the set probability warning threshold, the switching controller 30 calculates the main voltage drop gradient, calculates the drop bottoming time variable based on the current main voltage amplitude, the main voltage drop gradient and the safe voltage lower limit, and extracts the physical response time constant of the system, and compares the drop bottoming time variable with the physical response time constant.
[0049] S30, when the drop-to-bottom time variable is greater than or equal to the physical response time constant, the switching controller 30 enters the normal cooperative mode, sends a power consumption limit signal to the management controller 23 through the communication network 34, calculates the load power drop response gradient of the server cluster 20, and aims to minimize transient power consumption. Based on the trunk voltage drop gradient and the load power drop response gradient, the optimal physical switching time point is solved.
[0050] S40, while waiting for the optimal physical switching time, the switching controller 30 sends phasor pre-compensation parameters to the standby inverter 14. The standby inverter 14 adjusts the amplitude and phase angle of the output voltage according to the phasor pre-compensation parameters. When the system clock reaches the optimal physical switching time and the switching controller 30 detects the zero crossover point of the main current waveform, the switching controller 30 controls the main switch 31 to open and controls the standby switch 32 to close.
[0051] S50, when the drop-to-bottom time variable is less than the physical response time constant, the switching controller 30 enters the rapid bypass reduction mode, stops outputting trigger pulses to the main switch 31, and the main switch 31 turns off naturally when the current crosses zero. At the same time, it sends a power consumption limit signal to the management controller 23, obtains the effective value of the rated AC voltage of the backup inverter 14 and the residual voltage of the power module 22 converted to the AC side, calculates the instantaneous voltage difference between the backup branch 12 and the load side, and calculates the initial trigger delay angle of the backup switch 32 based on the instantaneous voltage difference.
[0052] S60, the switching controller 30 controls the backup switch 32 to smoothly decrease the trigger delay angle according to a non-linear decreasing function within a continuous AC half-wave period. During the period when the trigger delay angle decreases, the management controller 23 receives and executes power consumption limiting signaling to reduce the current demand of the server cluster 20. The switching controller 30 maintains the backup switch 32 fully on when the trigger delay angle decreases to zero.
[0053] To further clarify the implementation of each technical aspect of the present invention, the following will provide a detailed description of the implementation of each functional module involved above and its internal processing flow.
[0054] See attached document Figure 3 Since the acquisition of multi-dimensional time-series data and model-based feature inference are prerequisites for achieving subsequent adaptive control, step S10 may include the following sub-steps:
[0055] S101, the switching controller 30 samples the voltage and current of the main branch 11 through the sampling circuit 33 to obtain voltage and current sampling sequences. As a preferred method, the sampling rate of the sampling circuit 33 is set to no less than 10kHz. Transient voltage drops in the power grid typically occur on the order of milliseconds or even microseconds. Using the aforementioned higher sampling rate allows for timely capture of higher harmonic characteristics, transient waveforms, and slope changes at the edge of voltage drops, thus providing sufficient data for subsequent gradient calculations. The sampled data are used to generate discrete voltage sampling sequences using a unified timestamp. With current sampling sequence ,in For the sequence index of discrete time steps, and The value is a positive integer. For the specific structure of the high-frequency sampling circuit, those skilled in the art can use a conventional signal conditioning circuit with an isolation amplifier and a high-precision analog-to-digital converter. The hardware circuit construction is well-known in this field and will not be elaborated upon here.
[0056] S102, the switching controller 30 reads the total power consumption telemetry data sequence of the server cluster 20 through the communication network 34. The communication network 34 can typically use an integrated circuit bus or system management bus as the underlying hardware communication interface. The communication pins of the switching controller 30 are directly connected to the register pins of the management controller 23 via hardwired connections. The switching controller 30 reads the power consumption register values of each node in the server cluster 20 directly through this hardware interface at fixed time intervals, and sums the power consumption values of each node to generate the total power consumption telemetry data sequence. .
[0057] S103, the switching controller 30 stores the acquired voltage sampling sequence, current sampling sequence, and total power consumption telemetry data sequence into an internal sliding window buffer using a time synchronization mechanism. The sliding window buffer adopts a first-in, first-out (FIFO) memory queue structure. The sliding window length of the buffer is set to... Since the communication acquisition frequency of the total power consumption telemetry data sequence is much lower than the hardware sampling rate of voltage and current, the switching controller 30 uses zero-order hold logic to perform time axis upsampling alignment on the total power consumption telemetry data sequence before storing it in the buffer. That is, before the next valid power consumption communication data is returned, the power consumption sequence value corresponding to the high-frequency timestamp in the sliding window is assigned the most recent valid read value.
[0058] Specifically, the sliding window length of the buffer is set to... Typically, to cover at least one complete power grid frequency cycle, the sliding window length is... The value can be set to match the sampling rate with the power grid base frequency. For example, under the condition that the base frequency of the main branch 11 is 50Hz and the sampling rate is 10kHz, It can be set to 200. When new time-node data is stored in the sliding window buffer, the oldest historical data point in the buffer is removed and overwritten. The sliding window buffer always maintains a certain number of timestamps. The time series of the latest continuous data points.
[0059] S104, the switching controller 30 retains the total power consumption telemetry data sequence in the sliding window buffer for subsequent load reduction calculations in the switching mode, and simultaneously extracts and reconstructs the voltage and current sampling sequences from it into the input matrix of the timing inference model. To avoid interference from differences in the dimensions of different physical quantities in the model calculations, the system performs maximum and minimum value normalization on the voltage and current sequences within the sliding window before constructing the input matrix. The processed input matrix... The structural formula can be expressed as:
[0060] ;
[0061] In the formula, This represents the voltage sample value at the current moment. This represents the voltage sample value with the oldest timestamp within the sliding window buffer; This represents the current sample value at the current moment. This represents the current sample value with the oldest timestamp within the sliding window buffer. The row dimension of the above matrix is fixed at 2, and the column dimension is the same as the sliding window length. Maintain consistency. After reconstruction is complete, the system will input the matrix. Input into the preset time series inference model.
[0062] S105, Time-series inference model for input matrix Feature extraction and classification calculations are performed to output a power grid collapse probability index. In this embodiment, the temporal inference model adopts a hybrid network structure of cascaded one-dimensional convolutional and long short-term memory networks. Specifically, the internal layers of the temporal inference model include sequentially connected one-dimensional convolutional layers, long short-term memory layers, and fully connected layers. Input matrix First, the data enters a one-dimensional convolutional layer, where a predefined one-dimensional convolutional kernel extracts local transient distortion features from the voltage and current sequences. Then, the extracted feature mapping sequence flows into a long short-term memory (LSTM) layer, where its internal gating mechanism extracts the dependencies and trends in the time-series data. Finally, the data enters a fully connected layer for dimensionality reduction and is processed by a sigmoid activation function, outputting a scalar value between 0 and 1, representing the power grid collapse probability index. This power grid collapse probability index is used to quantify the probability that a substantial power grid failure will occur at main branch 11 within a set future time window.
[0063] To ensure the time-series inference model accurately outputs probability values, the system performs offline training on the model before formal operation. Training samples are derived from historical real power grid operation data or waveform data generated by power simulation software. The labeling rule for samples is as follows: if a voltage drop causing equipment shutdown occurs within a set time window for a certain sliding window waveform, the label for that waveform is set to 1; if it remains stable, the label is set to 0. During training, the system inputs the labeled samples into the model, uses the cross-entropy loss function to calculate the error between the model's predicted probability and the true label, and uses an adaptive moment estimation optimization algorithm combined with backpropagation to update the connection weights in the network. Through multiple iterations until the loss function converges, the construction of the time-series inference model is completed.
[0064] In one specific embodiment, the temporal inference model employs a binary classification temporal prediction model composed of a one-dimensional convolutional network and a long short-term memory network connected in series. Internally, it includes a one-dimensional convolutional feature extraction layer, a temporal correlation extraction layer, a fully connected mapping layer, and a probability output layer connected in sequence. Specifically, the one-dimensional convolutional feature extraction layer extracts local temporal distortion features from the voltage and current sampling sequences within the sliding window; the temporal correlation extraction layer extracts the dependencies between local features on the continuous time axis; the fully connected mapping layer maps the extracted temporal features to the fault discrimination space; and the probability output layer outputs the probability value representing the risk of substantial instability in the main branch 11 within a preset prediction time.
[0065] In this embodiment, the input data for the timing inference model consists of a time-synchronized voltage sampling sequence and a current sampling sequence within a sliding window buffer. The sliding window length is set to... Then the dimension of the input tensor is The first row corresponds to the voltage sampling sequence, and the second row corresponds to the current sampling sequence. To reduce the impact of differences in the dimensions of different physical quantities on the stability of model training, the switching controller 30 performs normalization processing on the voltage sampling sequence and the current sampling sequence respectively before inputting the data into the model. As an optional implementation method, the normalization processing can adopt the maximum-minimum normalization method, so that the input data is constrained to a preset numerical range.
[0066] As a specific and feasible network configuration, the one-dimensional convolutional feature extraction layer includes at least one one-dimensional convolutional sub-layer. Preferably, two cascaded one-dimensional convolutional sub-layers can be set, with the first-level convolutional sub-layer having 16 to 64 convolutional kernels and a kernel length of 3 to 7, and the second-level convolutional sub-layer having 32 to 128 convolutional kernels and a kernel length of 3 to 5. The activation function of each convolutional sub-layer can be a linear rectified function. To suppress local noise interference and enhance training stability, pooling layers, batch normalization layers, and / or random deactivation layers can also be set after the convolutional sub-layers. The temporal correlation extraction layer preferably uses at least one long short-term memory network layer, with the number of hidden units set to 32 to 128, to extract the drop trend of the input sequence in the time dimension, the persistence of waveform perturbation, and the dynamic evolution relationship between adjacent sampling intervals. The fully connected mapping layer is connected to the output of the long short-term memory network layer. The number of output nodes is preferably set to one, and a probability value between 0 and 1 is output through the sigmoid activation function, serving as a power grid collapse probability index. .
[0067] In one specific embodiment, the preset prediction duration is a time interval of 1 millisecond to 20 milliseconds from the current sliding window end point, preferably covering the time length of at least one early evolution stage of a power grid fault. The power grid collapse probability index output by the time-series inference model... This output is used to characterize the probability that the main branch 11 will cause instability in the power supply capacity of the load side within a preset prediction time. This output does not directly control the on / off state of the main switch 31 or the backup switch 32, but serves as the basis for the switching controller 30 to perform subsequent warning threshold judgment, drop boundary calculation, and mode shunt control.
[0068] During the construction of training samples, continuous samples are used within the sliding window buffer. The voltage and current sampling sequences corresponding to each sampling point are used as one input sample. Adjacent samples can be generated by sliding along the time axis with a step size of one or more sampling points. The sample label is marked according to the actual operation result of the main branch 11 within the preset prediction time after the end of the sliding window. Specifically, if a voltage drop event causing power instability of server cluster 20 occurs within the preset prediction time after the corresponding sample, the sample is marked as a positive sample and the label value is set to 1; if the main branch 11 maintains normal power supply within the preset prediction time, the sample is marked as a negative sample and the label value is set to 0. As an optional determination method, the voltage drop event causing power instability of server cluster 20 can be determined based on the main voltage envelope falling below the lower limit of the safe voltage. The system will determine whether the event continues for more than the set judgment time, and / or whether the power module 22 in the server cluster 20 experiences undervoltage maintenance failure, abnormal output drop, or shutdown.
[0069] Regarding the sources of training data, samples can be derived from historical real power grid operation data or from fault waveform data generated by a power system simulation platform. Historical real power grid operation data is used to reflect natural disturbances, load fluctuations, and real fault characteristics under actual operating conditions; simulated fault waveform data is used to supplement low-frequency but critical fault scenarios such as deep voltage drops, phase abrupt changes, harmonic distortion, and short-circuit impacts, thereby improving the model's coverage of abnormal operating conditions. During training, all samples can be divided into training and validation sets, and model parameters can be updated through iterative optimization. After the prediction effect on the validation set meets the set conditions, the trained model parameters are stored in the local memory of the switching controller 30 for online runtime access.
[0070] During the online operation phase of the system, the switching controller 30 only performs the forward inference process of the timing inference model and does not update the weights online. When the sliding window buffer is updated to a new time node, the switching controller 30 extracts the latest voltage and current sampling sequences to form the model input and outputs the grid collapse probability index. Compare with a preset probability warning threshold. When the power grid collapse probability index... When the probability exceeds the warning threshold, controller 30 triggers subsequent drop gradient calculation and mode shunting determination; when the power grid collapse probability index When the value is less than or equal to the probability warning threshold, the switching controller 30 maintains its monitoring state and continues to update the sliding window data. Therefore, the timing inference model in this invention provides advance trend judgment information for power supply switching control, thereby providing advance support for subsequent switching control processes based on physical quantity constraints.
[0071] See attached document Figure 4 After completing the model inference, the system needs to further quantify the severity of the voltage drop and match the corresponding action strategy. Therefore, step S20 may include the following sub-steps:
[0072] In step S201, the switching controller 30 compares the output power grid collapse probability index with the set probability warning threshold. As a preferred method, the probability warning threshold can be set to a fixed value based on the system's fault tolerance requirements and historical false alarm rate statistics, typically within the range of 0.8 to 0.9. If the comparison result shows that the power grid collapse probability index is less than or equal to the probability warning threshold, the switching controller 30 determines that the power grid is in a safe state and directly returns to step S10 to maintain cyclic monitoring; if the power grid collapse probability index is greater than the probability warning threshold, the switching controller 30 triggers the subsequent quantization calculation process.
[0073] To accurately obtain the transient voltage change trend, the switching controller 30 extracts the main voltage envelope function based on the voltage sampling sequence in the buffer. For the voltage waveform envelope extraction algorithm, those skilled in the art can use the root mean square calculation method based on a sliding window or the Hilbert transform algorithm. The underlying data processing logic is well-known in the field and will not be elaborated here. Based on the acquired envelope data, the switching controller 30 switches at the current trigger time... Determine the main voltage drop gradient The main grid voltage sag gradient is used to characterize the instantaneous rate of decrease in the grid voltage amplitude, and its calculation formula is as follows:
[0074] ;
[0075] In the formula, For the differential component of the voltage envelope function, This is a time-dependent component. To avoid dead zones in the algorithm caused by minor grid disturbances, the switching controller 30 determines the main voltage sag gradient after calculating the sag gradient. If the absolute value is greater than the set drop rate threshold, the power grid is considered to be at the falling edge of a substantial drop, and the subsequent time division calculation process is then executed.
[0076] S202, the switching controller 30 calculates the voltage drop bottoming time variable based on the current main line voltage amplitude, the main line voltage drop gradient, and the safe voltage lower limit. (Safe voltage lower limit) These are boundary parameters set based on the physical tolerance of the power-side equipment. In this embodiment, the lower limit of the safe voltage represents the lowest input AC voltage amplitude allowed by the power module 22 inside the server to maintain a stable DC bus output. As an optional implementation, this value is typically set to 70% to 80% of the nominal grid voltage. Drop-to-bottom time variable. This is the time window remaining from the current moment for the physically quantified system to fall to the failure boundary. The formula for calculating this time variable is:
[0077] ;
[0078] In the formula, Indicates the current trigger time The amplitude of the main voltage envelope. This represents the absolute value of the main voltage drop gradient at the current moment. Through the above formula logic, the system transforms the abstract slope of the voltage drop curve into a specific time-dimensional indicator, providing a physical benchmark for subsequent action scheduling.
[0079] S203, Switch controller 30 extracts the physical response time constant of the system. Physical response time constant This represents the minimum time required for cross-domain collaboration between the power supply system and electrical equipment. This constant is pre-set within the switching controller 30 during the system initialization phase, and its specific components encompass the inherent hardware latency at the information layer, primarily including the transmission hardware delay of the communication network 34 and the inherent latency of the management controller 23 executing microcode.
[0080] Transmission hardware latency refers to the physical time required for an electrical signal to complete level rise and parasitic capacitance charging and discharging in the underlying bus physical link. The inherent execution time of microcode refers to the total internal clock cycles required for the underlying processor 24 to switch from normal operation to power-limited state after the management controller 23 receives the frequency-limiting command. The combination of these two time factors constitutes an insurmountable time barrier when the system actively reduces load through the information layer.
[0081] S204, the switching controller 30 compares the drop-to-bottom time variable with the physical response time constant, executing dual-mode adaptive shunt determination logic based on the comparison relationship between the time variable and the time constant. This comparison process is used to evaluate the time matching degree between the power supply descent time and the system information control delay. Regarding the drop-to-bottom time variable... Greater than or equal to the physical response time constant When this occurs, it indicates that the power grid is in a gradual voltage drop state, and the system has a sufficient time window to wait for the load on the demand side to complete the active load reduction operation. Based on this state determination, the switching controller 30 determines that the system has entered the normal cooperative mode. The voltage drop bottoming time variable... Less than the physical response time constant This indicates a rapid drop in power supply due to a severe short circuit on the main network side, leaving insufficient time for cross-domain signaling round trips and the execution of closed-loop underlying hardware. If the system continues to wait for the load reduction command to take effect, it may cause undervoltage shutdown of electrical equipment. Under this condition, the switching controller 30 determines that the system has entered a rapid bypass reduction mode, abandoning the wait for power supply side coordination and instead directly implementing physical fallback actions on the power supply side.
[0082] See attached document Figure 5 After confirming that the system has a sufficient coordination time window, the system uses the state parameters of both the supply and demand sides to predict a smooth switching opportunity. Therefore, step S30 may include the following sub-steps:
[0083] S301, the switching controller 30 enters normal collaborative mode and sends a power consumption limit signaling message to the management controller 23 via the communication network 34. As a preferred method, this signaling message can be built based on underlying hardware control protocols such as the intelligent platform management interface, and internally encapsulates a power consumption capping instruction with the highest interrupt priority. Upon receiving this signaling message, the management controller 23 directly accesses the machine status register of the processor 24 via the underlying bus, forcibly reducing the operating performance state of the processor 24. This process is achieved by synchronously reducing the processor 24's operating frequency and core power supply voltage, thereby triggering a decrease in physical power consumption on the power-consuming side in a very short time. For the specific underlying microarchitectural actions of the processor's dynamic voltage and frequency adjustment, those skilled in the art can refer to the power management specifications published by the processor manufacturer, which are well-known technologies in the field and will not be elaborated upon here.
[0084] S302, during the period when the power consumption limiting signaling is in effect, the system needs to quantify the attenuation rate of power consumption on the power consumption side in real time to provide feedforward parameters. The switching controller 30 continues to monitor the power consumption change trend of the server cluster 20 through the communication network 34 to obtain the real-time total power consumption telemetry data sequence. Based on this timing data, the switching controller 30 switches at the current trigger time. Calculate the load power decrease response gradient This gradient reflects the rate at which energy consumption decreases after the load responds to a frequency reduction command, and its mathematical quantification formula is expressed as:
[0085] ;
[0086] In the formula, This represents a small component of the real-time total power consumption sequence of server cluster 20. This is the time differential component. Since the data processed by the digital controller is discrete sampling points, and the total power consumption telemetry data exhibits a step-like update characteristic, in actual calculations, this differential process is not obtained by subtracting a single adjacent point. Instead, the switching controller 30 extracts multiple sets of power consumption data points from the previous communication update cycle before the current trigger time, performs linear regression fitting using the least squares method, and uses the slope of the fitted line as the gradient of the discretized load power decrease response. This processing mechanism effectively filters out the step dead zone of digital sampling, ensuring the effectiveness of the decreasing trend quantization.
[0087] S303, in order to assess future supply and demand trends, switches controller 30 in conjunction with previously obtained backbone voltage sag gradient data. With load power decrease response gradient A bidirectional state prediction equation is constructed for the future time domain. Considering that the time window for physical switching of the system is typically on the order of milliseconds, the inertia of changes in physical quantities is large within such a short time interval. Therefore, it is assumed that voltage and power consumption change continuously according to the existing gradient. The prediction equation consists of two parts: voltage dimension and power consumption dimension. In the voltage dimension, the predicted voltage envelope equation is used to estimate the amplitude trend of the residual voltage of the main path at future times, which can be expressed as:
[0088] ;
[0089] In terms of power consumption, the load power consumption prediction equation is used to infer the trend of total current demand at future times after the load reduction command is executed, and is expressed as:
[0090] ;
[0091] In the two integral equations above, For the future The predicted voltage envelope amplitude, For the future Predicted load power consumption and These represent the actual voltage envelope amplitude and the actual total power consumption at the trigger moment, respectively. Let be the continuous integration variable used to represent the integration time interval.
[0092] Based on the above state prediction equation, the switching controller 30 performs dynamic optimization calculations aimed at minimizing transient power consumption to solve for the optimal physical switching time. To ensure that the thyristors can be turned off instantly without delay at the physical execution level at the algorithm's optimization point, the switching controller 30 extracts the fundamental frequency phase of the main circuit by combining the current sampling sequence, and calculates the predicted zero-crossing point sequence of the main circuit current waveform in the future time domain. During this process, the system introduces a hardware hold time. As a hard time-domain constraint boundary. Hardware hold time. This refers to the physical duration during which the power module 22 can maintain its nominal DC output without interruption, relying solely on its internal large-capacity capacitors, after the loss of AC input. This duration is obtained by the switching controller 30 during system initialization from the underlying firmware read-only memory of the power module 22 via the communication network 34, or pre-written by the configuration program. To ensure power takeover is completed before the mains voltage completely fails, and to minimize the load impact on the standby branch at the moment of switching, the optimization function must simultaneously satisfy dual constraints. The time-domain constraint is set as follows:
[0093] ;
[0094] The voltage constraint is set as follows:
[0095] ;
[0096] Under the premise of simultaneously satisfying the time domain constraints and voltage constraints, the switching controller 30 discretizes the search space obtained by traversing the solution and constrains it to the time set corresponding to the above-mentioned predicted zero-crossing point sequence, and finds the time that makes the predicted load power consumption reach the minimum value as the optimal physical switching time point. The formula for calculating the objective optimization is expressed as follows:
[0097] ;
[0098] During the calculation process, if the load power decrease response gradient is predicted during the time period... If the value is always greater than or equal to zero, it indicates that the power consumption has not yet shown a substantial decreasing trend. At this time, in order to prevent the optimization algorithm from getting stuck in an infinitely delayed dead zone, the switching controller 30 will directly extract the closest and no later than the voltage constraint critical point from the above predicted zero-crossing point sequence. The zero-crossing moment is taken as the optimal physical switching time point Through this multi-constraint cross-layer objective optimization logic, the system precisely aligns the physical closing action of electrical switches with the moment when the load power drops to a relatively low point, while ensuring that the underlying hardware remains uninterrupted, thereby mitigating the load impact on the backup power supply during the initial takeover period.
[0099] See attached document Figure 6 After confirming the optimal physical switching time, the system needs to adjust the backup power output state and perform a precise electrical switch during the waiting period. Therefore, step S40 may include the following sub-steps:
[0100] S401, while waiting for the optimal physical switching time, the switching controller 30 issues a phasor pre-compensation preparation command to the standby inverter 14. Under normal conditions, the standby inverter 14 follows the voltage phasor of the main branch 11 via its internal native phase-locked loop (PLL). To prevent waveform distortion in the later stages of grid dips from causing output instability in the standby inverter 14, the system sets trigger conditions for releasing the native PLL following mechanism. Specifically, when the dip bottoming time variable determined by the switching controller 30 is less than the set unlock tolerance time, or when the phase jump angle of the main voltage waveform is detected to be greater than the set phase angle threshold, the standby inverter 14 releases the native PLL following mechanism and enters a clock reference mode based on its internal independent high-precision crystal oscillator, preparing to receive custom phasor pre-compensation parameters.
[0101] As an optional parameter configuration method, the aforementioned loss-of-lock tolerance time is typically set within the range of 10 to 20 milliseconds, and the phase angle threshold is typically set between 15 and 30 degrees to balance the fault tolerance rate of normal power grid disturbances and the timely response to severe faults. Regarding the phase locking and tracking principle of the native phase-locked loop, those skilled in the art can employ a phase-locked algorithm based on a synchronous rotating coordinate system, which is a well-known technology in the field and will not be elaborated upon here.
[0102] S402, the switching controller 30 calculates the phasor pre-compensation parameters and sends them to the standby inverter 14. To compensate for the voltage dip in the standby inverter 14 caused by the sudden increase in transient load during switching, the switching controller 30 performs pre-compensation based on the predicted voltage offset. The switching controller 30 calculates the predicted voltage offset between the trigger time and the optimal physical switching time. The formula is:
[0103] ;
[0104] In the formula, The rated reference voltage amplitude of the power supply system. To predict the magnitude of the main voltage envelope at the optimal physical switching time. Based on this offset, the expected voltage magnitude is... The calculation formula is expressed as follows:
[0105] ;
[0106] In the formula, The set amplitude compensation ratio coefficient is usually between 1.05 and 1.15, and is used to compensate for nonlinear voltage drop factors such as line parasitic impedance. The equivalent output internal resistance of the backup inverter 14, To predict load power consumption at the optimal physical switching time, this formula, while compensating for base voltage shift, feeds forward the expected voltage drop across the inverter's internal resistance caused by the instantaneous load power consumption. Expected voltage phase angle. The calculation formula is expressed as follows:
[0107] ;
[0108] In the formula, Triggering time The actual locked phase angle of the main power grid, The rated angular frequency, This is a lead compensation angle set based on the load reactance characteristics. In practical engineering, electrical equipment such as servers often incorporate inductive filtering components, causing current changes to lag behind voltage changes. The lead compensation angle is introduced to address this. It can establish a phase margin in advance at the moment of switching. This parameter can be pre-calibrated according to the inductive reactance parameter of the power consumption side line, and is usually between 2 and 5 degrees. After receiving the phasor pre-compensation parameters containing the expected voltage amplitude and the expected voltage phase angle, the standby inverter 14 adjusts its output pulse width modulation signal so that the standby power supply establishes the compensated output voltage in advance under internal no-load conditions.
[0109] S403, when the system's internal clock reaches the optimal physical switching time point. When the pre-set trigger advance (e.g., one-tenth of a cycle of the grid base frequency) is reached, the switching controller 30 initiates the physical action timing. The underlying high-precision timer of the switching controller 30 triggers a hardware interrupt signal, prematurely blocking the drive signal of the trigger pin of the main switch 31. This is because the optimal physical switching time... The predicted zero-crossing point, due to the use of thyristor components in the main circuit switch 31, cannot be forcibly cut off the moment a blocking command is issued. Instead, it will remain in the conducting state until the actual zero-crossing point of the main circuit current waveform arrives, at which point the main circuit switch 31 will naturally turn off. By combining the predicted zero-crossing point time domain interval with actual hardware zero-crossing detection, the risk of turn-off delay caused by transient phase shifts due to grid dips is eliminated.
[0110] To accurately confirm the physical turn-off state of the main circuit thyristor, the switching controller 30 continuously monitors the current sampling sequence input by the sampling circuit 33. When it determines that the amplitude of the main circuit current drops to zero and remains there for more than a set turn-off determination time window (the span of which is larger than the extremely narrow zero-crossing interval of the normal AC waveform), it confirms that the main circuit switch 31 has been substantially turned off. After confirming that the main circuit switch 31 is turned off, the switching controller 30 initiates a set microsecond-level dead time.
[0111] As a preferred approach, the dead time is typically set to 100 to 200 microseconds to ensure complete recombination of charge carriers inside the main thyristor and prevent direct short circuits between the main and backup buses. After the dead time expires, the switching controller 30 sends a high-level conduction pulse to the trigger pin of the backup switch 32, controlling the backup switch 32 to close, thus completing a smooth electrical takeover from the main branch 11 to the backup branch 12.
[0112] See attached document Figure 7 When it is determined that the grid's bottoming-out time is insufficient to support the system's cross-domain coordination, the system must abandon waiting for the load on the power consumption side to decrease and switch to a rapid bypass reduction mode to implement physical actions. Therefore, step S50 may include the following sub-steps:
[0113] S501, the switching controller 30 initiates the concurrent operation timing of main circuit separation and asynchronous communication. The switching controller 30 blocks the trigger pin pulse of the main circuit switch 31. The main circuit switch 31 uses anti-parallel thyristor devices. After the trigger pulse is blocked, when the AC current flowing through the thyristor crosses zero, the internal charge carriers naturally recombine, realizing the physical shutdown of the circuit.
[0114] As a preferred approach, when a deep short circuit occurs on the grid side causing a drop in grid-side impedance, timely blocking of the main path can prevent the energy output from the backup power supply 13 from flowing back to the grid-side fault point through the main branch when the backup switch 32 is subsequently closed, thus avoiding the backup system being dragged down by the grid-side short circuit fault. Simultaneously with the electrical blocking, the switching controller 30 sends a power consumption limiting signaling command to the management controller 23 in parallel via the communication network 34. Unlike the normal cooperative mode, in this concurrent operation sequence, the switching controller 30 does not wait for a return response to this signaling command and directly executes the subsequent electrical switching command. This asynchronous concurrent mechanism helps reduce the delay impact of the host-side software response on the electrical switching action.
[0115] S502, to assess the potential transient current surge caused by direct backup power supply switching, the switching controller 30 reads the real-time residual voltage on the DC bus side of the power module 22 via the communication network 34. Considering potential communication network delays or congestion during severe grid faults, the system can incorporate communication timeout protection logic. If the value is not successfully read within a set very short decision window (typically 1 to 2 milliseconds), the system will directly set the residual voltage to zero and continue subsequent calculations under the most stringent operating conditions. After obtaining the valid value, the switching controller 30 uses an AC / DC conversion method to equivalently map the DC residual voltage to the converted voltage on the AC input side. The conversion formula is expressed as:
[0116] ;
[0117] In the formula, This is the effective value of the converted voltage on the AC input side of power module 22. This refers to the residual voltage of the DC bus inside power module 22. This refers to the voltage conversion efficiency parameter of the front-end rectifier inside the power module 22. Typically, this efficiency parameter can be obtained from the nameplate of the electrical equipment, and its value is between 0.92 and 0.96.
[0118] Based on the above calculations, the switching controller 30 extracts the instantaneous pressure difference at the moment of switching. The calculation formula is as follows:
[0119] ;
[0120] In the formula, This is the effective value of the stable rated output AC voltage of the standby inverter 14 under no-load conditions. This voltage difference parameter reflects the degree of potential imbalance between the main and standby sides, providing a calculation basis for subsequent control of the conduction phase.
[0121] S503. Under conditions with a large instantaneous pressure difference, directly and completely closing the standby switch 32 may trigger a surge current, increasing the risk of damage to power electronic devices. Therefore, the switching controller 30 establishes an adaptive mapping function for the initial trigger delay angle based on the instantaneous pressure difference and the thyristor's safe current carrying limit. This function dynamically adjusts the conduction phase of the standby switch 32 within the first half-wave of the AC circuit, utilizing phase control characteristics to limit the initial surge current. Before performing the mapping calculation, the switching controller 30 determines the instantaneous pressure difference. Is it greater than zero? If so, determine... This indicates that the standby voltage does not exceed the load-side residual voltage, and there is no risk of a positive surge. The switching controller 30 directly sets the initial trigger delay angle to zero to execute full-wave conduction. If determined... Then, the following mapping calculation is performed, and its mathematical quantification formula is expressed as follows:
[0122] ;
[0123] In the formula, The initial trigger delay angle calculated by adaptive solution is used to characterize the delayed trigger phase starting from the zero-crossing point of the AC voltage; The maximum safe delay angle limit is preset, and its value is usually between 150 degrees and 165 degrees to avoid a shoot-through short circuit. The equivalent series impedance of the main and backup circuits is a hardware parameter that is calibrated by actual measurement through current injection during the system debugging phase and preset in the switching controller 30. The non-repetitive surge current withstand limit of the internal thyristor of the backup switch 32 is derived from the device's physical datasheet.
[0124] Using the above adaptive mapping function, when the instantaneous pressure difference... When the value is large, the exponent calculation term approaches zero, and the calculated initial trigger delay angle... Close That is, the backup switch 32 is turned on in a very short time at the end of the AC half-wave, and the first wave of impact current is limited by compressing the voltage time integral area; conversely, if the voltage difference is in a small range, the conduction angle is adaptively shifted forward, so that the system can achieve a smooth energy transition under the premise of meeting the current limit.
[0125] See attached document Figure 8After completing the mapping calculation of the initial trigger delay angle of the backup switch 32, the system needs to control the backup power supply 13 to smoothly inject energy into the load, and coordinate with the frequency reduction action on the power consumption side to achieve dynamic balance between supply and demand. Therefore, step S60 may include the following sub-steps:
[0126] S601, to prevent backflow and short circuit from the backup power supply to the main grid, the switching controller 30 continuously monitors the main current sequence through a sampling circuit before switching to the backup branch. When the main current amplitude drops to zero and remains at that level, it confirms that the main switch 31 has been substantially turned off, and then initiates a set microsecond-level anti-straight-through dead time. After the dead time ends, the switching controller 30 controls the trigger delay angle of the backup switch 32 to decrease smoothly according to a nonlinear decreasing function within consecutive AC half-wave cycles. To avoid a current surge caused by the linear expansion of the conduction angle in the later stages of startup, the system uses a discrete exponential decay model as this nonlinear decreasing function. Therefore, in the first... One half-wave cycle of AC, trigger delay angle The calculation formula is expressed as follows:
[0127] ;
[0128] In the formula, The initial trigger delay angle calculated in step S50; This is the index of the continuous AC half-wave sequence starting from the start of the phase-controlled take-off from the standby switch 32, and It is a positive integer; This is a pre-set attenuation coefficient. Typically, the attenuation coefficient... The value of is between 0.7 and 0.9, used to determine the expansion slope of the conduction phase. A larger value corresponds to a smoother energy injection process. The switching controller 30 updates the numerical calculation at each zero-crossing point of the AC waveform detected by the hardware circuit, and adjusts the pulse triggering time of the output to the trigger pin of the backup switch 32 accordingly, so that the voltage conduction integral area of the backup power supply gradually expands in each half-wave.
[0129] In S602, during the period when the trigger delay angle decreases, the asynchronous response mechanism on the power-consuming side begins to generate physical electrical changes. The management controller 23 receives and executes the previously issued power consumption limit signaling, directly reducing the core power supply voltage and operating frequency of the processor 24 through the underlying hardware pins. In the physical operation of microelectronic circuits, the dynamic power consumption of the CMOS transistor array inside the chip is proportional to its operating frequency and the square of the voltage. When the voltage and frequency are reduced synchronously, the total charge transfer of the transistors in a unit clock cycle is significantly reduced, causing the current demand of the server cluster 20 on the external DC bus to decrease rapidly.
[0130] The decreasing current trend on the demand side and the increasing phase-controlled injection current trend on the power supply side form a relay cancellation mechanism on the time axis. Specifically, the cycle-by-cycle expansion of the conduction angle of the standby switch 32 causes the effective energy injected by the standby branch 12 to steadily increase; at the same time, the load-side computing power reduction operation causes the energy consumed by the actual load to gradually shrink. The switching controller 30 uses the gradually rising output supply curve on the power supply side to accurately fill the gradually falling demand consumption curve on the power consumption side, causing the physical quantities on both sides to smoothly converge within the dynamic transition range. Therefore, the risk of circuit breaker tripping caused by the direct full-wave switching of the standby branch is avoided, and a stable energy transfer under an extremely short fault window is achieved.
[0131] S603, the switching controller 30 monitors the iterative decay value of the trigger delay angle in real time within the aforementioned AC half-wave cycle. When the trigger delay angle... When the value decreases to zero, or is less than the minimum tolerance threshold for the trigger delay angle set by the internal microprocessor (e.g., 2 degrees), the switching controller 30 determines that the transition period of the phase-controlled soft start has ended. After the full-wave conduction determination condition is met, the switching controller 30 continuously outputs a high-level drive signal to the trigger pin of the backup switch 32 to maintain the backup switch 32 in a fully conducting state, so that the backup branch 12 completely takes over the power supply circuit of the server cluster 20.
[0132] As a preferred approach, after the power supply steady-state takeover is completed and the grid-side fault is isolated, the system will initiate the closed-loop recovery logic for the power supply steady-state. The switching controller 30 sends a power recovery signal to the management controller 23 via the communication network 34. The management controller 23, based on the actual load capacity of the backup power supply, gradually raises the operating performance state level of the processor 24, prompting the server cluster 20 to resume normal computing power output. For the step-back control algorithm and state machine recovery logic of the microprocessor's underlying clock frequency, those skilled in the art can use conventional dynamic voltage and frequency adjustment recovery mechanisms. The underlying microarchitecture control is a well-known technology in the field and will not be elaborated upon here.
[0133] To enable those skilled in the art to more clearly understand the purpose, technical solution, and advantages of this invention, the present invention will be further described in detail below with reference to specific application embodiments, real experimental test data, and corresponding drawings. It should be noted that the embodiments described herein are only for explaining the present invention and are not intended to limit the scope of protection of the present invention.
[0134] I. Specific Application Examples
[0135] In this embodiment, the power supply system is set to be used in a large data center, and the rated reference voltage amplitude of the main distribution network is... The rated voltage is 311V (corresponding to the peak phase voltage of a three-phase 380V AC power supply), and the rated fundamental frequency is 50Hz. This is the lower limit of the safe voltage for the server's internal power module 22. The system is calibrated to 220V. The physical response time constant was measured during the system initialization phase. The maximum safe delay angle limit for the standby switch 32 thyristor is 6.5 milliseconds. Set to 160 degrees.
[0136] When the system is running smoothly until a certain point (set as the trigger point) is reached... A severe three-phase short-circuit fault occurred on the main power grid side. The latest voltage and current sampling sequences acquired at a sampling rate of 10kHz in the sliding window buffer of the switching controller 30 showed severe distortion. After inputting this reconstructed matrix into the time series inference model, the grid collapse probability index output by the model's forward inference... The value jumped to 0.92, far exceeding the set probability warning threshold of 0.85, thus triggering the system to calculate the fall boundary.
[0137] Switch controller 30 extracts the main voltage envelope and differentiates it to obtain the current main voltage sag gradient. The value is -25V / ms. Combined with the current voltage envelope amplitude of 305V, using the formula... The calculation yielded the variable of the time it takes for the fall to bottom out. It takes 3.4 milliseconds. Because... (3.4 milliseconds) is significantly smaller than the physical response time constant. (6.5 milliseconds) indicates that the power grid will completely collapse before the signaling loop is closed. Switch controller 30 adaptively determines that the system abandons the normal cooperative mode and directly triggers the ultra-fast bypass downgrade mode (step S50).
[0138] In this mode, the switching controller 30 immediately blocks the trigger pulse of the main switch 31 and sends a power consumption limit signal to the management controller 23. To limit the inrush surge, the switching controller 30 extracts the residual voltage on the DC side of the power module 22 and calculates the equivalent AC input voltage using a formula. The voltage is 180V, from which the instantaneous voltage difference is derived. The voltage is 131V. After determining that the voltage difference is greater than zero, the controller substitutes this voltage difference and the calibrated impedance into the adaptive mapping function to calculate the initial trigger delay angle. It is 138 degrees.
[0139] After confirming that the main circuit current has crossed zero and the dead time has passed, the switching controller 30 controls the standby switch 32 to be triggered to conduct at the 138-degree phase of the first AC half-wave, and continues to conduct according to the attenuation coefficient in subsequent consecutive half-waves. The discrete exponential decay model (i.e., 138 degrees, 110.4 degrees, 88.3 degrees, etc.) smoothly advances the trigger phase angle cycle by cycle. During this period, the server load receives concurrent frequency reduction signaling, and the power consumption demand decreases synchronously. The phase-controlled progressive energy injection on the power supply side and the power consumption contraction on the power consumption side form a smooth convergence, and the system completes ultra-fast physical fallback without circuit breaker tripping.
[0140] II. To verify the effectiveness of the above control architecture under real power grid disturbances, this embodiment uses MATLAB software to build a hardware-in-the-loop simulation model that includes the main power grid, backup inverters, thyristor switching switches, and a server cluster with dynamic load response. The experiment compares the traditional hard switching scheme (control group, represented by gray dashed lines in the attached figure) with the adaptive shunt control scheme of this invention (experimental group, represented by black solid lines in the attached figure). The test results are as follows:
[0141] according to Figure 9 As can be seen from the comparison of the current waveforms in (a), under the simulated extreme-speed deep short-circuit drop condition (trigger point at 20ms in the figure), when the control group performs a hard switchover with the standby switch fully on, a surge current of up to approximately 850A is instantaneously generated in the circuit due to the huge voltage difference between the rated output of the inverter and the calculated residual voltage on the load side. This surge is very likely to exceed the non-repetitive surge withstand limit of conventional power electronic devices. In contrast, the experimental group adopted the extreme-speed bypass reduction mode of this invention, calculated the initial trigger delay angle through an adaptive mapping function, and performed phase-controlled soft start in the subsequent AC cycle. The solid line trajectory in the figure clearly reflects that the first surge current of the experimental group was strictly contained within the safety boundary of 210A, and the subsequent current envelope exhibited a smooth expansion characteristic that conformed to the discrete exponential decay model, which greatly reduced the electrical impact on the hardware layer.
[0142] according to Figure 9 A comparison of the voltage waveforms in (b) shows that during the rapid voltage drop in the transient range, the control group experienced a severe secondary voltage drop on the server's DC bus due to the high load momentary drawdown encountered when the backup power supply was hard-switched in. The lowest voltage dropped to approximately 55% of the nominal value, a depth that reached the undervoltage shutdown threshold for most server power modules. In contrast, the experimental group, thanks to the dynamic supply and demand relay mechanism formed by the phase-controlled progressive energy injection on the power supply side and the concurrent frequency and load reduction on the power consumption side, saw its DC bus voltage stabilize smoothly after buffering the drop to 78% of the rated value, effectively maintaining it above the safe lower voltage limit and successfully ensuring the continuous operation of critical loads in the data center.
[0143] according to Figure 10 The AC phasor waveforms show that, under the simulated grid slow-down condition, the system has a sufficient time window to switch to normal cooperative mode. The optimal physical switching time point (as shown in the figure) is determined through optimization. When the control group (ms) performed the takeover action, it experienced a voltage amplitude drop of approximately 18% and significant phase jump flutter at the moment of takeover because it did not intervene in the standby inverter. However, the experimental group, while waiting for cross-domain coordination, issued phasor pre-compensation parameters, using the expected voltage amplitude feedforward to offset the transient voltage drop of the load, and established a 4.5-degree lead compensation angle in advance. As shown by the solid black line in the figure... As shown by the time travel trajectory, the sinusoidal waveforms of the experimental group before and after the electrical connection are smoothly connected. The transient voltage drop is reduced to less than 3.2% of the nominal value and recovers to the ideal steady state in a very short time, achieving seamless switching under high load requirements.
[0144] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A power supply switching control method based on artificial intelligence, characterized in that, Includes the following steps: Obtain the voltage and current sampling sequences of the main branch, as well as the total power consumption telemetry data of the server cluster; The voltage and current sampling sequences are used to predict risks using a pre-set time-series inference model, and a power grid collapse probability index is output. When the power grid collapse probability index is greater than a predetermined threshold, the main voltage drop gradient is extracted, and the voltage drop bottoming time variable is calculated by combining the main voltage characteristics and the lower limit of the safe voltage. The drop-to-bottom time variable is logically compared with the system's physical response time constant, and the normal collaborative mode or the ultra-fast bypass reduction mode is executed based on the comparison result: When the drop-to-bottom time variable is greater than or equal to the system physical response time constant, the system enters the normal coordination mode. When the normal coordination mode is executed, a power consumption limit signal is issued. The optimal physical switching time point is determined by bidirectional prediction based on the main voltage drop gradient and the load power drop response gradient on the load side. After outputting the phasor pre-compensation parameters, the backup switch is turned on at the optimal physical switching time point. When the time variable of the fall to the bottom is less than the physical response time constant of the system, the system enters the rapid bypass reduction mode. When the rapid bypass reduction mode is executed, the main circuit switch is controlled to open and the power consumption limit signal is sent asynchronously. The instantaneous voltage difference is calculated based on the backup power supply voltage and the residual voltage on the load side. The initial trigger delay angle of the backup switch is calculated based on the instantaneous voltage difference. Then, the trigger delay angle is controlled to decrease smoothly from the initial trigger delay angle according to the nonlinear decreasing function to complete the soft takeover. The steps of extracting the main voltage sag gradient and calculating the sag bottoming time variable by combining the main voltage characteristics and the lower limit of the safe voltage include: The trunk voltage envelope function is extracted based on the voltage sampling sequence. The derivative of the trunk voltage envelope function at the current triggering time is calculated to obtain the trunk voltage drop gradient. Determine whether the absolute value of the main voltage drop gradient is greater than the set drop rate threshold. If it is greater, obtain the main voltage envelope amplitude at the current trigger moment as the main voltage feature. The difference between the main voltage characteristic and the lower limit of the safe voltage is used as the divisor, and the absolute value of the main voltage drop gradient is used as the divisor. The two values are divided to calculate the drop bottoming time variable. The step of finding the optimal physical switching time point based on the bidirectional prediction optimization of the main voltage drop gradient and the load power decrease response gradient on the load side includes: By combining the current sampling sequence to extract the fundamental frequency phase of the main road, the predicted zero-crossing point sequence of the AC waveform of the main power grid in the future time domain is calculated; By combining the main voltage drop gradient and the load power decrease response gradient, a bidirectional state prediction equation is constructed, consisting of the predicted voltage envelope equation and the predicted load power consumption equation. The time-domain constraint boundary is constructed by introducing the hardware hold-up time of the power module inside the server cluster that relies on capacitors to maintain the output after the loss of AC input, and the voltage constraint is constructed by introducing the lower limit value of the safe voltage. Under the premise of simultaneously satisfying the time domain constraint boundary and voltage constraint, the optimization search space is discretized and constrained to the time set corresponding to the predicted zero crossover point sequence using the bidirectional state prediction equation, and the time that makes the predicted load power consumption reach the minimum value is found as the optimal physical switching time point. The step of calculating the initial trigger delay angle of the standby switch based on the instantaneous pressure difference includes: Determine whether the instantaneous pressure difference is greater than zero; If the instantaneous pressure difference is less than or equal to zero, the initial trigger delay angle is directly set to a zero-level angle to perform full-wave conduction; If the instantaneous voltage difference is greater than zero, a negative exponential decay calculation term is constructed based on the instantaneous voltage difference, the preset equivalent series impedance of the main and backup circuits, and the non-repetitive surge current withstand limit of the thyristor inside the backup switch. The initial trigger delay angle is calculated by using a preset maximum safe delay angle limit combined with an adaptive mapping function that includes the negative exponential decay calculation term, so as to control the standby switch to delay triggering within the first AC half-wave.
2. The power supply switching control method based on artificial intelligence according to claim 1, characterized in that, The step of performing risk prediction on the voltage sampling sequence and current sampling sequence using a preset time-series inference model and outputting a power grid collapse probability index includes: The acquired voltage sampling sequence, current sampling sequence, and total power consumption telemetry data are stored in an internal sliding window buffer. The total power telemetry data within the sliding window buffer is upsampled and aligned along the time axis using zero-order hold logic; After extracting the voltage and current sampling sequences from the sliding window buffer and performing maximum and minimum value normalization, they are reconstructed into an input matrix that serves as the input to the time series inference model. The time-series inference model is used to extract features and perform classification calculations on the input matrix, and outputs the power grid collapse probability index, which represents the probability of a substantial power grid failure occurring in the main branch within a set future time window.
3. The power supply switching control method based on artificial intelligence according to claim 2, characterized in that, The time-series inference model is a time-series prediction model composed of a one-dimensional convolutional network and a long short-term memory network connected in series. The time-series inference model includes a one-dimensional convolutional feature extraction layer, a time-series correlation extraction layer, a fully connected mapping layer, and a probability output layer connected in sequence. The one-dimensional convolutional feature extraction layer is used to extract local transient distortion features from the input matrix; the temporal correlation extraction layer is used to extract the sequential dependencies and drop trends of the feature sequence in the time dimension; the fully connected mapping layer is used to reduce the dimension of the extracted temporal features and map them to the fault discrimination space. The probability output layer uses an activation function to output the power grid collapse probability index in scalar form.
4. The power supply switching control method based on artificial intelligence according to claim 1, characterized in that, The steps for outputting phasor precompensation parameters include: The predicted voltage offset is calculated based on the difference between the system's rated reference voltage amplitude and the predicted main voltage envelope amplitude at the optimal physical switching time. Based on the rated reference voltage amplitude, the product of the predicted voltage offset and the amplitude compensation ratio is added, and the expected voltage drop calculated based on the transient load power consumption and the inverter internal resistance is added to calculate the expected voltage amplitude. The expected voltage phase angle is calculated by summing the actual grid phase angle locked at the trigger time, the phase increment term calculated based on the time difference between the system rated angular frequency and the current time to the optimal physical switching time point, and the advance compensation angle pre-set based on the load reactance characteristics. A command is issued to the standby inverter to release the native phase-locked loop following mechanism, and the phasor pre-compensation parameters, including the expected voltage amplitude and the expected voltage phase angle, are sent to the standby inverter.
5. The power supply switching control method based on artificial intelligence according to claim 1, characterized in that, The step of calculating the instantaneous voltage difference based on the backup power supply voltage and the residual voltage on the load side includes: The effective value of the rated AC voltage of the standby inverter is extracted as the standby power supply voltage; The real-time residual voltage on the DC bus side of the power module inside the server cluster is read through the communication network. The AC / DC equivalent calculation is performed using the real-time residual voltage and the voltage conversion efficiency parameters of the front-end rectifier inside the power module to obtain the residual voltage of the server cluster converted to the AC side as the load-side residual voltage. The instantaneous voltage difference, which characterizes the degree of potential imbalance between the main and backup power supplies, is obtained by subtracting the residual voltage on the load side from the backup power supply voltage.
6. The power supply switching control method based on artificial intelligence according to claim 1, characterized in that, The step of smoothly decreasing the control trigger delay angle from the initial trigger delay angle according to a non-linear decreasing function to complete the soft takeover includes: The nonlinear decreasing function adopts a discrete exponential decay model that includes a preset decay coefficient; After detecting that the main current amplitude drops to zero and passes the anti-straight-through dead time, the calculation of the delay trigger value is updated at each zero-crossing point of the AC waveform detected by the hardware circuit, starting from the initial trigger delay angle and combined with the discrete exponential decay model. This causes the pulse triggering time of the output to the backup switch trigger pin to advance cycle by cycle as the AC half-wave sequence index increases, so that the voltage conduction integral area of the backup branch in each half-wave shows an exponential expansion trend, so as to form a smooth handover with the current demand of the power consumption side that is synchronously decaying under the power consumption limiting signaling.
7. The power supply switching control method based on artificial intelligence according to claim 1, characterized in that, The calculation steps for the load power decrease response gradient include: During the issuance of the power consumption limiting signaling, acquire the real-time total power consumption telemetry data sequence; Extract multiple sets of power consumption data points within the communication update cycle preceding the trigger calculation time; The extracted multiple sets of power consumption data points are fitted using linear regression using the least squares method, and the slope of the resulting fitted line is used as the load power decrease response gradient obtained by discretization.
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