High-voltage off-line voltage regulator circuit and DC power supply

CN122419200BActive Publication Date: 2026-08-18CHENGDU ARK MICROELECTRONICS CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202610886785.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-06-18
Publication Date
2026-08-18
Estimated Expiration
2046-06-18

AI Technical Summary

Technical Problem

1、线性稳压器的调整管工作在线性区,效率低(尤其是压差大时)

Benefits of technology

1、本发明不使用电感、以较低开关频率、直接在整流后的高压AC电路中以相对较低的功耗实现AC-DC电压转换。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122419200B_ABST
    Figure CN122419200B_ABST
Patent Text Reader

Abstract

The application discloses a high-voltage offline voltage regulator circuit and a direct-current power supply, which are composed of high-voltage N-channel enhancement-mode MOSFET Q1 (or NPN BJT), high-voltage N-channel depletion-mode MOSFET Q2 (or N-type JFET), low-voltage N-channel enhancement-mode MOSFET Q3, low-voltage N-channel enhancement-mode MOSFET Q4, a voltage regulator module (such as LDO), resistors R1, R2, R3, R4, R5, R6, R7, R8, an energy storage capacitor C1 and the like. The application further discloses a direct-current power supply adopting the high-voltage offline voltage regulator circuit. The application does not use an inductor, directly realizes AC-DC voltage conversion in a rectified high-voltage AC circuit at a relatively low power consumption and at a low switching frequency.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and in particular to a high-voltage offline voltage regulator circuit and a DC power supply. Background Technology

[0002] A voltage regulator (or simply voltage stabilizer) is a device that can automatically maintain a constant output voltage. Its output remains essentially unchanged when the input fluctuates or the load changes.

[0003] Existing voltage regulators mainly include two types: linear regulators and switching regulators. Each type has the following drawbacks: 1. The regulating tube of a linear voltage regulator operates in the linear region, resulting in low efficiency (especially when the pressure difference is large).

[0004] 2. Existing switching regulators typically use high-speed switching transistors, which require inductors for energy storage. They also usually require a control IC to perform PWM control on the switching transistors, making the circuit more complex and the cost higher. Summary of the Invention

[0005] To overcome the above-mentioned shortcomings, the present invention aims to provide a high-voltage offline voltage regulator circuit and DC power supply that achieves AC-DC voltage conversion directly in the rectified high-voltage AC circuit with relatively low power consumption without using inductors, at a lower switching frequency.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A high-voltage offline voltage regulator circuit includes a high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1. The drain or collector of the high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1 is connected to the drain of a high-voltage N-channel depletion-mode MOSFET or N-type JFET Q2 and one end of resistor R7. The source or emitter of the high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1 is connected to one end of energy storage capacitor C1, one end of resistor R2, one end of resistor R5, and the input terminal of voltage regulation module A1. The gate or base of the high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1 is connected to one end of resistor R1, the other end of resistor R2, and one end of resistor R3. The other end of resistor R1 is connected to the source of the high-voltage N-channel depletion-mode MOSFET or N-type JFET Q2. The other end of resistor R3 is connected to the gate of the high-voltage N-channel depletion-mode MOSFET or N-type JFET Q2 and one end of resistor R4. The other end of resistor R4 is connected to a low-voltage N-channel enhancement-mode MOSFET. The drain of Q3, the drain of the low-voltage N-channel enhancement MOSFET Q4, the other end of resistor R5 is connected to one end of resistor R6 and the gate of the low-voltage N-channel enhancement MOSFET Q3, the other end of resistor R7 is connected to one end of resistor R8 and the gate of the low-voltage N-channel enhancement MOSFET Q4, the other end of energy storage capacitor C1, the common terminal of voltage regulation module A1, the other end of resistor R6, the source of low-voltage N-channel enhancement MOSFET Q3, the source of low-voltage N-channel enhancement MOSFET Q4, and the other end of resistor R8 are all grounded.

[0007] Preferably, the voltage regulation module A1 is a linear voltage regulator module.

[0008] More preferably, the linear voltage regulator module is an LDO.

[0009] More preferably, the linear regulator module includes a BJT or a MOSFET.

[0010] Preferably, the resistance value of resistor R1 is selected so that the current when the high-voltage N-channel depletion-type MOSFET or N-type JFET Q2 is in the microampere range.

[0011] Preferably, the resistance of resistor R1 is less than the resistance of resistor R2, and the resistance of resistor R2 is 10KΩ to 100KΩ.

[0012] The working principle of the high-voltage offline voltage regulator circuit is explained as follows: The drain of the high-voltage N-channel enhancement-mode MOSFET Q1 is the input terminal VIN of the high-voltage offline voltage regulator circuit, and the output of the voltage regulation module A1 is the output terminal VOUT of the high-voltage offline voltage regulator circuit.

[0013] The input is DC power rectified from AC, requiring no filtering, and is input in a waveform. Energy storage capacitor C1 provides the necessary current to the load during the turn-off periods of enhancement-mode MOSFET Q1 and depletion-mode MOSFET Q2. Energy storage capacitor C1 also provides the drive voltage required for the N-channel depletion-mode MOSFET Q2 to turn off. During the turn-on phase of the N-channel depletion-mode MOSFET Q2, the N-channel enhancement-mode MOSFET Q1 also turns on as the voltage across R2 increases, providing charging current to energy storage capacitor C1. During the turn-off phase of the N-channel depletion-mode MOSFET Q2, the N-channel enhancement-mode MOSFET Q1 also turns off synchronously, thereby reducing power consumption.

[0014] When the voltage at the VIN terminal and the voltage across the energy storage capacitor C1 are lower than the set value, the N-channel depletion MOSFET Q2 operates in the on state, but only a very small current flows through it. R1 is used to limit the maximum current that the N-channel depletion MOSFET Q2 can pass through (usually limited to the microamp level). The current through the N-channel depletion MOSFET Q2 will cause the voltage across R2 to rise. When the voltage across R2 rises to the turn-on voltage of the N-channel enhancement MOSFET Q1, the N-channel enhancement MOSFET Q1 turns on, charging the energy storage capacitor C1 and providing the required current to the load. When the voltage at the VIN terminal is higher than the set value, the N-channel enhancement MOSFET Q4 turns on, and the capacitor C1 discharges through R2, R3, R4, and the N-channel enhancement MOSFET Q4, causing the N-channel depletion MOSFET Q2 to turn off. The voltage across R2 decreases and reverses, causing the N-channel enhancement MOSFET Q1 to turn off. The N-channel enhancement-mode MOSFET Q1 and the N-channel depletion-mode MOSFET Q2 simultaneously block the high voltage input at the VIN port. At this time, the energy storage capacitor C1 provides the required current to the load, maintaining the normal output voltage VOUT and driving the load. The capacitor C1 also provides the drive voltage required for the N-channel depletion-mode MOSFET Q2 to turn off.

[0015] The above explanation of the working principle is based on high-voltage N-channel enhancement-mode MOSFET Q1 and N-channel depletion-mode MOSFET Q2 as examples. The working principle is similar for the cases where Q1 is an NPN BJT and Q2 is an N-type JFET, so it will not be described in detail.

[0016] The present invention also discloses a DC power supply implemented using such a high-voltage offline voltage regulator circuit. The DC power supply includes a high-voltage offline voltage regulator circuit and a rectifier. The input terminal of the rectifier is connected to the mains power, and the output terminal is connected to the drain or collector of a high-voltage N-channel enhancement-mode MOSFET or an NPN BJT Q1.

[0017] Preferably, the rectifier is a full-bridge rectifier.

[0018] The beneficial effects of this invention are as follows: 1. This invention achieves AC-DC voltage conversion directly in the rectified high-voltage AC circuit with relatively low power consumption without using inductors and with a lower switching frequency.

[0019] 2. This invention does not require a PWM control IC driver and has the characteristic of adaptive switching adjustment. When the power frequency input is 50Hz, the switching frequency of the power MOSFET is within 200Hz.

[0020] 3. This invention requires no inductor or control IC, has a simple circuit structure, and reduces costs compared to conventional switching power supplies.

[0021] 4. The present invention operates at a low frequency, making it easier to meet EMI requirements. Attached Figure Description

[0022] Figure 1 This is a circuit diagram of the high-voltage offline voltage regulator circuit disclosed in this invention.

[0023] Figure 2 This is a circuit diagram of the DC power supply disclosed in this invention.

[0024] Figure 3 This is a simulation circuit diagram of the high-voltage offline voltage regulator circuit disclosed in this invention.

[0025] Figure 4 The waveform diagram is shown after full-bridge rectification.

[0026] Figure 5 The waveform of the current flowing through the N-channel enhancement-mode MOSFET Q1 is shown.

[0027] Figure 6 for Figure 5 A magnified view of a portion of the image.

[0028] Figure 7 The waveforms are shown for the voltage V2 across the energy storage capacitor C1 and the voltage V3 across the load RL.

[0029] Figure 8 The waveforms are shown for the average total power W(V1) of power supply V1 and the power W(RL) of load RL. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings.

[0031] Example 1: This example discloses a high-voltage offline voltage regulator circuit, specifically as follows... Figure 1As shown, this high-voltage offline voltage regulator circuit consists of a high-voltage N-channel enhancement-mode MOSFET Q1 (or NPN BJT), a high-voltage N-channel depletion-mode MOSFET Q2 (or N-type JFET), a low-voltage N-channel enhancement-mode MOSFET Q3, a low-voltage N-channel enhancement-mode MOSFET Q4, a voltage regulator module (such as an LDO), resistors R1, R2, R3, R4, R5, R6, R7, R8, and an energy storage capacitor C1. Among these components: 1. The input signal at the VIN terminal is DC power after AC rectification. This DC power does not require filtering and is input to the VIN port in the form of a swivel waveform.

[0032] 2. The energy storage capacitor C1 is used to provide the required current to the load during the turn-off of the enhancement-mode MOSFET Q1 and the depletion-mode MOSFET Q2, ensuring that VOUT can output normally to carry the load. The capacitor C1 also provides the drive voltage required for the N-channel depletion-mode MOSFET Q2 to turn off.

[0033] 3. Q1 is an N-channel enhancement-mode MOSFET (or NPN BJT). During the turn-on phase of the N-channel depletion-mode MOSFET Q2, the N-channel enhancement-mode MOSFET Q1 also turns on as the voltage across R2 increases, providing charging current for the energy storage capacitor C1. During the turn-off phase of the N-channel depletion-mode MOSFET Q2, the N-channel enhancement-mode MOSFET Q1 also turns off synchronously, thereby reducing power consumption.

[0034] 4. Q2 is an N-channel depletion-type MOSFET (or N-channel JFET). When the voltage at the VIN terminal and the voltage across the energy storage capacitor C1 are lower than the set value, the N-channel depletion-type MOSFET Q2 operates in the on state, but only a very small current flows through it. R1 is used to limit the maximum current that the N-channel depletion-type MOSFET Q2 can pass through (usually limited to the microamp level). The current through the N-channel depletion-type MOSFET Q2 will cause the voltage across R2 to rise. When the voltage across R2 rises to the turn-on voltage of the N-channel enhancement-type MOSFET Q1, the N-channel enhancement-type MOSFET Q1 turns on, charging the energy storage capacitor C1 and providing the required current to the load. When the voltage at the VIN terminal is higher than the set value, the N-channel enhancement-type MOSFET Q4 turns on, and the capacitor C1 discharges through R2, R3, R4, and the N-channel enhancement-type MOSFET Q4, causing the N-channel depletion-type MOSFET Q2 to turn off. The voltage across R2 decreases and reverses, causing the N-channel enhancement-type MOSFET Q1 to turn off. The N-channel enhancement-mode MOSFET Q1 and the N-channel depletion-mode MOSFET Q2 simultaneously block the high voltage input at the VIN port. At this time, the energy storage capacitor C1 provides the required current to the load, maintaining the normal output voltage VOUT and driving the load. The capacitor C1 also provides the drive voltage required for the N-channel depletion-mode MOSFET Q2 to turn off.

[0035] 5. This operating mode of the N-channel enhancement-mode MOSFET Q1 and the N-channel depletion-mode MOSFET Q2 can reduce power consumption. The turn-on and turn-off of the N-channel enhancement-mode MOSFET Q1 and the N-channel depletion-mode MOSFET Q2 are related to the voltage across the energy storage capacitor C1 and the input voltage after AC rectification. The turn-on and turn-off of the N-channel enhancement-mode MOSFET Q1 and the N-channel depletion-mode MOSFET Q2 are controlled by controlling the turn-on and turn-off of the N-channel enhancement-mode MOSFET Q3 and Q4. The N-channel depletion-mode MOSFET Q2 does not have high current capability requirements; in design and selection, priority should be given to selecting the saturation current (I). DSS Small, turn-off voltage (V) GS(off) The resistor R1 is chosen to be low-voltage so that during the rise of the input voltage VIN, R2 receives more voltage, thus driving the N-channel enhancement-mode MOSFET Q1 to turn on faster. The current flowing through the N-channel depletion-mode MOSFET Q2 is limited by configuring the resistance value of R1. Generally, this current is limited to the microamp (μA) level. The current flowing through the N-channel depletion-mode MOSFET Q2 should be sufficient to drive the N-channel enhancement-mode MOSFET Q1 normally after passing through R2. This low-current design reduces the power consumption of the N-channel depletion-mode MOSFET Q2.

[0036] 6. Q4 is an N-channel enhancement-mode MOSFET. Its function is to control the turn-on and turn-off of the N-channel depletion-mode MOSFET Q2 by detecting the input voltage at the VIN terminal. The energy storage capacitor C1 provides the drive voltage required for the N-channel depletion-mode MOSFET Q2 to turn off. When the N-channel enhancement-mode MOSFET Q4 is turned on, the energy storage capacitor C1 discharges to ground with a small current through R2, R3, R4, and the N-channel enhancement-mode MOSFET Q4, forming a voltage drop across R3. When VIN... R3 >|V GS(OFF)_Q2 When the N-channel depletion MOSFET Q2 is turned off, there is basically no current flowing through R3 (the N-channel enhancement MOSFET Q3 is also turned off). At this time, the N-channel depletion MOSFET Q2 is turned on and can provide the drive current required for the N-channel enhancement MOSFET Q1 to turn on.

[0037] 7. The resistance of R1 is usually much smaller than that of R2 so that R2 mainly bears the voltage during the voltage rise phase, driving the N-channel enhancement-type MOSFET Q1 to turn on more quickly. The recommended resistance of R2 is 10KΩ to 100KΩ. R1 is used to limit the maximum current that the N-channel depletion-type MOSFET Q2 can pass through. The value of R2 must ensure that after current limiting by R1, the voltage V across R2 is... R2(max.) The rated gate-source voltage V of the N-channel enhancement-mode MOSFET Q1 is less than that of the N-channel enhancement-mode MOSFET Q1. GS The value of R3 should be significantly greater than that of R2 so that when capacitor C1 discharges through the path of the N-channel enhancement-mode MOSFET Q4, R3 receives more voltage, allowing the N-channel depletion-mode MOSFET Q2 to turn off quickly, while simultaneously reducing the static bias current and static power consumption. The value of R4 depends on the preset charging voltage of capacitor C1. Through the voltage division of R4, the gate-source voltage V of the N-channel depletion-mode MOSFET Q2 is ensured. GS The voltage should not exceed its rated value. If the preset voltage of the energy storage capacitor C1 is significantly lower than the rated gate-source voltage of the N-channel depletion-type MOSFET Q2, then R4 is not needed for voltage division and can be removed. R7 and R8 form the input voltage detection circuit, used to control the turn-on and turn-off of the N-channel enhancement-type MOSFET Q4. R7 and R8 are connected in series. When the voltage at the VIN port is lower than the set voltage value, the voltage V across R8 will be lower than the set voltage value. R8 The threshold voltage V of the N-channel enhancement-mode MOSFET Q4 is lower than the threshold voltage V. TH_Q4 When the N-channel enhancement-mode MOSFET Q4 is off, the voltage across R8 V is off. R8 The threshold voltage V of the N-channel enhancement-mode MOSFET Q4 is higher than that of the N-channel enhancement-mode MOSFET Q4. TH_Q4Then, the N-channel enhancement-mode MOSFET Q4 switches from the off state to the on state.

[0038] 8. Q3 is an N-channel enhancement-mode MOSFET. The turn-off of the N-channel depletion-mode MOSFET Q2 is controlled by detecting the voltage across the energy storage capacitor C1. Energy storage capacitor C1 provides the drive voltage required for the N-channel depletion-mode MOSFET Q2 to turn off. R5 and R6 are connected in series to form a voltage detection circuit for energy storage capacitor C1. When the voltage across energy storage capacitor C1 reaches a set value, the voltage across R6 exceeds the turn-on voltage V of the N-channel enhancement-mode MOSFET Q3. TH_Q3 After Q3 is turned on, the discharge of capacitor C1 creates a negative voltage across resistor R3, turning off the depletion-mode MOSFET Q2. This keeps the voltage across the energy storage capacitor C1 within an ideal range, reducing the additional power consumption of the voltage regulation circuit. R5 and R6 form a voltage detection circuit for the energy storage capacitor C1, used to control the turn-on and turn-off of the enhancement-mode MOSFET Q3. R5 and R6 are connected in series, dividing the voltage across the energy storage capacitor C1. When the voltage across capacitor C1 is lower than the set voltage value, the voltage V across R6... R6 The threshold voltage V of the N-channel enhancement-mode MOSFET Q3 is lower than that of the N-channel enhancement-mode MOSFET. TH_Q3 When the capacitor voltage is higher than the set voltage value, the voltage V across R6 is [value missing]. R6 The threshold voltage V of the N-channel enhancement-mode MOSFET Q3 is higher than that of the N-channel enhancement-mode MOSFET. TH_Q3 Then Q3 switches from the off state to the on state. By designing the turn-on voltage V of the enhancement-mode MOSFET Q4... TH_Q4 The parameters, and the ratio of the resistance values ​​of R7 and R8, can be used to set the input voltage VIN threshold that switches the N-channel enhancement-mode MOSFET Q4 from off to on. The turn-on voltage V of the enhancement-mode MOSFET Q3 can be designed accordingly. TH_Q3 The parameters, and the ratio of the resistance values ​​of R5 and R6, can be used to set the voltage threshold of the energy storage capacitor C1 corresponding to the switching of the N-channel MOSFET Q3 from the off state to the on state. The resistance values ​​of R5, R6, R7, and R8 should not be too small to avoid generating excessive additional power consumption.

[0039] 9. Depending on the different circuit parameters, TVS diodes can be added to the gate-source of each MOSFET to achieve overvoltage protection.

[0040] 10. The voltage regulator module can be an LDO or other linear voltage regulation scheme composed of BJTs and MOSFETs.

[0041] Example 2, based on Example 1, discloses a DC power supply using this high-voltage offline voltage regulator circuit, specifically as follows: Figure 2As shown, the AC220V / 50Hz mains power is rectified by the full-bridge rectifier BR1 and directly input to the drain of the high-voltage N-channel enhancement-mode MOSFET Q1. The output terminal of the DC power supply is the output terminal of the voltage regulation module A1, which supplies power to the load RL. This high-voltage offline voltage regulator circuit is the same as that in Example 1, so it will not be described in detail.

[0042] Example 3, based on Examples 1 and 2, simulates this type of high-voltage offline voltage regulator circuit. Specifically, the simulation circuit and component parameters used are as follows: Figure 3 As shown, the voltage regulator module uses an N-channel depletion-type MOSFET Q5, a Zener diode ZD1, and a bias resistor R9. The main parameter settings of the MOSFETs in the simulation circuit are shown in the table below:

[0043] The simulation results are as follows: 1) The drain voltage waveforms of the high-voltage N-channel enhancement-mode MOSFET Q1 and the N-channel depletion-mode MOSFET Q2 are as follows: Figure 4 As shown, this is the rectified waveform after full-bridge rectification.

[0044] 2) The current waveform flowing through the high-voltage N-channel enhancement-mode MOSFET Q1 is as follows: Figure 5 , Figure 6 As shown, it is evident that the current flowing through the N-channel enhancement-mode MOSFET Q1 exhibits periodicity, indicating that the enhancement-mode MOSFET Q1 periodically turns on and off, through its interaction with... Figure 4 By comparing the two, it can be seen that by controlling the turn-on and turn-off of the depletion-type MOSFET Q2, the enhancement-type MOSFET Q1 can be turned on when the input voltage is lower than the set value and turned off when the input voltage is higher than the set value, thereby achieving the purpose of energy saving.

[0045] 3) The waveforms of the voltage V2 across the energy storage capacitor C1 and the voltage V3 across the load RL are as follows: Figure 7 As shown, the voltage regulator composed of ZD1 and the N-channel depletion-type MOSFET Q5 stabilizes the output voltage V3 at 8.5V. During the turn-on period of the N-channel enhancement-type MOSFET Q1 and the N-channel depletion-type MOSFET Q2, the input current charges the energy storage capacitor C1 through the N-channel enhancement-type MOSFET Q1, causing the voltage across capacitor C1 to rise to the set maximum value. During the turn-off period of the N-channel enhancement-type MOSFET Q1 and the N-channel depletion-type MOSFET Q2, the energy storage capacitor C1 provides the current required by the load, ensuring the stability of the output voltage.

[0046] 4) The waveforms of the average total power W(V1) of power supply V1 and the power W(RL) of load RL are as follows:Figure 8 As shown, during the initial power-on phase, power supply V1 primarily charges the energy storage capacitor C1, resulting in a significant instantaneous power consumption. As the voltage across capacitor C1 gradually rises to the set value, the power consumption of power supply V1 gradually decreases and stabilizes. Taking 100ms as an example, the average power consumed by the load at this time is approximately 73mW, and the average total power of power supply V1 is approximately 270mW. If a standard high-voltage LDO (inductorless DC-DC scheme) is used under AC 220V input conditions, employing full-bridge rectification and filtering, and a load of 8.5V / 8.5mA, the average power of the high-voltage LDO is approximately: P≈(314V-8.5V)×8.5mA≈2.59W; Therefore, by using the energy-saving offline circuit scheme disclosed in this invention, AC-DC conversion can be achieved with lower power consumption.

[0047] Of course, the present invention may have other various embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and modifications according to the present invention, but these corresponding changes and modifications should all fall within the protection scope of the appended claims.

Claims

1. A high-voltage offline voltage regulator circuit, characterized in that: This includes a high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1. The drain or collector of the high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1 is connected to the drain of a high-voltage N-channel depletion-mode MOSFET or N-type JFET Q2 and one end of resistor R7. The source or emitter of the high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1 is connected to one end of energy storage capacitor C1, one end of resistor R2, one end of resistor R5, and the input terminal of voltage regulation module A1. The gate or base of the high-voltage N-channel enhancement-mode MOSFET or NPN BJT Q1 is connected to one end of resistor R1, the other end of resistor R2, and one end of resistor R3. The other end of resistor R1 is connected to the source of the high-voltage N-channel depletion-mode MOSFET or N-type JFET Q2. The other end of resistor R3 is connected to the gate of the high-voltage N-channel depletion-mode MOSFET or N-type JFET Q2 and one end of resistor R4. The other end of resistor R4 is connected to the drain of a low-voltage N-channel enhancement-mode MOSFET Q3 and a low-voltage N-channel enhancement-mode MOSFET Q4. The drain of Q4, the other end of resistor R5 is connected to one end of resistor R6 and the gate of low-voltage N-channel enhancement MOSFET Q3, the other end of resistor R7 is connected to one end of resistor R8 and the gate of low-voltage N-channel enhancement MOSFET Q4, the other end of energy storage capacitor C1, the common terminal of voltage regulation module A1, the other end of resistor R6, the source of low-voltage N-channel enhancement MOSFET Q3, the source of low-voltage N-channel enhancement MOSFET Q4, and the other end of resistor R8 are all grounded.

2. The high-voltage offline voltage regulator circuit according to claim 1, characterized in that: The voltage regulation module A1 is a linear voltage regulator module.

3. The high-voltage offline voltage regulator circuit according to claim 2, characterized in that: The linear voltage regulator module is an LDO.

4. The high-voltage offline voltage regulator circuit according to claim 2, characterized in that: The linear voltage regulator module includes a BJT or a MOSFET.

5. The high-voltage offline voltage regulator circuit according to claim 1, characterized in that: By selecting the value of resistor R1, the current when the high-voltage N-channel depletion-type MOSFET or N-type JFET Q2 is turned on is in the microampere range.

6. The high-voltage offline voltage regulator circuit according to claim 1, characterized in that: The resistance of resistor R1 is less than the resistance of resistor R2, and the resistance of resistor R2 is 10KΩ to 100KΩ.

7. A DC power supply, characterized in that: The DC power supply includes a high-voltage offline voltage regulator circuit as described in any one of claims 1-6.

8. The DC power supply according to claim 7, characterized in that: It also includes a rectifier, the input of which is connected to the mains power and the output of which is connected to the drain or collector of a high-voltage N-channel enhancement-mode MOSFET or an NPN BJT Q1.

9. The DC power supply according to claim 8, characterized in that: The rectifier is a full-bridge rectifier.

Citation Information

Patent Citations

  • LDO (Low Dropout Regulator) linear transient enhancement circuit, chip and electronic equipment

    CN117590889A

  • Switching shunt regulator circuits

    US20150162833A1