A low complexity soft output equalization method, device and data center interconnection system

Abstract

The application relates to the technical field of optical communication, in particular to a low-complexity soft output equalization method, device and data center interconnection system, the method comprising the following steps: equalization processing is performed through an improved weighted decision feedback equalizer; a received signal is processed in parallel through a soft output maximum likelihood sequence estimation equalizer and the improved weighted decision feedback equalizer, a simplified state space is formed according to a preset number of states closest to equalization output soft values of the weighted decision feedback equalizer; log-likelihood ratio information is calculated through forward iteration and backward iteration according to the simplified state space; when the simplified state space results in missing log-likelihood ratios, a compensation log-likelihood ratio value is calculated; iteration calculation is limited within a preset window length, and a new window is initialized by using state inheritance. Compared with the prior art, the application further realizes complexity reduction and delay reduction while realizing better equalization performance.

Description

Technical Field

[0001] This invention relates to the field of optical communication technology, and in particular to a low-complexity soft output equalization method, apparatus, and data center interconnection system. Background Technology

[0002] With the rise of bandwidth-intensive technologies such as large-scale artificial intelligence models, cloud computing, and 5G / 6G communications, the ever-increasing data traffic and bandwidth demands within data centers have brought new and greater challenges to Data Center Interconnect (DCI). Currently, 400Gb / s Ethernet is widely used in data center interconnect scenarios, and 800Gb / s Ethernet has entered the large-scale deployment stage, steadily progressing towards 1.6Tb / s and even higher speeds. For short-range DCI, low-cost, low-power Intensity-Modulated Direct Detection (IM-DD) systems combined with Pulse Amplitude Modulation (PAM) are commonly used as the mainstream transmission scheme. Among them, PAM-4 modulation has been determined as the standard signal modulation format for 400Gb / s Ethernet due to its low complexity and high spectral efficiency. However, with the ever-increasing data transmission rates, the prominence of channel attenuation and inter-symbol interference further exacerbates signal distortion problems. To address these challenges, existing short-range interconnect scenarios place higher demands on receiver digital signal processing, especially equalization technology.

[0003] Existing equalization techniques include feed-forward equalization (FFE) and decision feedback equalization (DFE), among which maximum likelihood sequence estimation (MLSE) equalization is considered the optimal equalization technique for achieving receiver signal recovery and has begun to receive widespread attention. Traditional MLSE equalization is based on the Viterbi algorithm, recovering the received signal by searching for the maximum likelihood sequence on the signal trellis. However, its complexity increases exponentially with the modulation order and channel impulse response length, making it difficult to apply to practical communication systems. Furthermore, with the increasing demands for information transmission quality from various new technologies, there is a growing preference for using higher-performance soft-decision forward error correction (SD-FEC) codes to improve overall system performance. Traditional MLSE equalization, however, can only provide hard-decision results and lacks soft-output capability, making it incompatible with SD-FEC. Therefore, designing and implementing low-latency, low-complexity soft-output MLSE equalization has become an urgent requirement for modern high-speed IM-DD systems.

[0004] Existing soft-output MLSE equalization schemes generally employ a modified BCJR (MLM) algorithm. This algorithm transforms the BCJR algorithm into the logarithmic domain through a max-log approximation and performs iterative calculations based on the state trellis diagram of the received signal. It eliminates the complex exponential and multiplicative operations with almost no impact on performance and provides the necessary log-likelihood ratio (LLR) information for the soft-decision decoder. The most direct way to achieve low-complexity soft-output MLSE equalization is to reduce the number of states in the signal trellis diagram of the MLM algorithm, simplifying the state space. A typical state simplification method is to provide auxiliary information to the MLSE through a pre-applied FFE, retaining a fixed number of states close to its output soft value. However, the quality of the compensation soft information provided by the FFE is poor, causing significant decoding performance loss when inter-symbol interference is severe. Subsequently, researchers proposed a threshold-based ST-MLM algorithm. By artificially setting a threshold as the boundary value of the state metric, only states whose metric values ​​do not exceed the threshold are retained, while other minor states are ignored, thus achieving state reduction in the MLM algorithm. This method can achieve flexible state simplification by adjusting the threshold, but it relies on fine-grained threshold selection to meet performance requirements, and because the number of retained states is not fixed, it is not hardware-friendly. The current best soft-output MLSE equalization scheme defines an intermediate state, called the DFE-3 state, using the error propagation principle of the pre-DFE (Distributed Error Correction) stage, and theoretically derives the state demapping method for the LLR computation part. Based on the state transition rules corresponding to the DFE-3 state, the state space of the MLM algorithm is restricted to a fixed 3 states to reduce complexity. However, the state demapping part introduces additional computational complexity and causes some decoding performance loss. Summary of the Invention

[0005] To address the aforementioned technical issues, this invention proposes a low-complexity soft-output equalization method, apparatus, and data center interconnection system. By constructing a parallel processing architecture of an improved weighted decision feedback equalizer and a soft-output maximum likelihood sequence estimation equalizer, and combining state simplification, compensated log-likelihood ratio calculation, and sliding window processing mechanisms, low-complexity and low-latency equalization processing of signals is achieved, effectively improving the transmission performance of the data center interconnection system.

[0006] On one hand, embodiments of the present invention provide a low-complexity soft output equalization device, the device comprising:

[0007] An improved weighted decision feedback equalizer includes a threshold mapping module that outputs a weighting factor based on a comparison between the reliability of the input signal and a preset threshold.

[0008] A soft-output maximum likelihood sequence estimation equalizer, connected in parallel with the improved weighted decision feedback equalizer, includes a state selection module. This module selects and retains a preset number of states from the full state set that are closest to the soft-output equalizer, based on the soft-value of the improved weighted decision feedback equalizer, forming a simplified state space. The soft-output maximum likelihood sequence estimation equalizer performs forward and backward iterations based on the simplified state space, calculating the branch metric, forward metric, and backward metric for each state, and calculating the log-likelihood ratio based on the forward and backward metrics.

[0009] The compensated log-likelihood ratio calculation module calculates the compensated log-likelihood ratio value based on the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the constellation point when the simplified state space causes the log-likelihood ratio to be missing.

[0010] The sliding window processing module restricts the iterative calculation process to a limited range of preset window length and uses the termination state information of the previous window to initialize the iteration start value of the new window.

[0011] Optionally, the threshold mapping module determines the weighting factor according to the following formula:

[0012] When the absolute value of the reliability is less than or equal to a preset threshold, the threshold mapping module outputs a first weighting factor;

[0013] When the absolute value of the reliability is greater than the preset threshold, the threshold mapping module outputs a second weighting factor;

[0014] Wherein, the first weighting factor is less than the second weighting factor, and the reliability is determined based on the distance between the received symbol and the hard decision value.

[0015] Optionally, the state selection module selects and retains a preset number of states from the full state set according to the following method:

[0016] The state selection module calculates the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the constellation point soft value corresponding to each state in the full state set, and selects a preset number of states with the smallest distance to form a simplified state set.

[0017] Optionally, the soft-output maximum likelihood sequence estimation equalizer calculates the branch metric according to the following formula:

[0018] The branch metric is determined based on the Euclidean distance between the received symbol and the expected transmission sequence, which is determined based on the convolution operation of the channel impulse response coefficient and the state sequence.

[0019] Optionally, the soft-output maximum likelihood sequence estimation equalizer calculates the forward and backward metrics according to the following formula:

[0020] The forward metric is determined based on the maximum value of the forward metric at the previous time step and the branch metric at the current time step;

[0021] The backward metric is determined based on the maximum value of the backward metric at the next time step and the branch metric at the current time step.

[0022] Optionally, the soft-output maximum likelihood sequence estimation equalizer calculates the log-likelihood ratio information according to the following formula:

[0023] The soft-output maximum likelihood sequence estimation equalizer determines the set of symbols with the j-th bit set to 1 and the set of symbols with the j-th bit set to 0, calculates the maximum posterior probability of each state in the two sets of symbols, and uses the difference between the two maximum values ​​as the log-likelihood ratio corresponding to the j-th bit.

[0024] Optionally, the compensated log-likelihood ratio calculation module calculates the compensated log-likelihood ratio value according to the following formula:

[0025] The compensated log-likelihood ratio calculation module calculates the minimum squared distance between the equalization output soft value of the improved weighted decision feedback equalizer and each constellation point where the j-th bit is 1, and the minimum squared distance between the equalization output soft value and each constellation point where the j-th bit is 0. The difference between the two minimum squared distance values ​​is divided by twice the noise variance to obtain the compensated log-likelihood ratio.

[0026] On the other hand, embodiments of the present invention provide a data center interconnection system, including:

[0027] The transmitter is used to generate a pulse amplitude modulation signal and transmit it via an intensity modulation direct detection channel;

[0028] The receiving end includes the aforementioned low-complexity soft output equalization device. The receiving end is used to receive the pulse amplitude modulation signal and perform equalization processing through the low-complexity soft output equalization device, and output log-likelihood ratio information to the soft-decision forward error correction decoder.

[0029] On the other hand, embodiments of the present invention provide a low-complexity soft output equalization method, the method comprising the following steps:

[0030] The received signal is equalized by an improved weighted decision feedback equalizer. The improved weighted decision feedback equalizer outputs the corresponding weight factor through threshold mapping based on the comparison result between the reliability of the input signal and a preset threshold.

[0031] The received signal is processed in parallel by a soft-output maximum likelihood sequence estimation equalizer and the improved weighted decision feedback equalizer. The soft-output maximum likelihood sequence estimation equalizer selects and retains a preset number of states that are closest to the equalization output soft value from the full state set according to the equalization output soft value of the improved weighted decision feedback equalizer, thus forming a simplified state space.

[0032] Perform forward and backward iterations based on the simplified state space, calculate the branch metric, forward metric, and backward metric for each state, and calculate the log-likelihood ratio information based on the forward and backward metrics.

[0033] When the simplified state space results in the absence of the log-likelihood ratio, the compensation log-likelihood ratio is calculated based on the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the constellation point.

[0034] The iterative calculation process is restricted to a limited range of preset window length, and the iteration start value of the new window is initialized using the termination state information of the previous window.

[0035] Optionally, the equalization processing of the received signal using an improved weighted decision feedback equalizer includes:

[0036] Reliability is calculated based on the distance between the received symbol and the hard decision value;

[0037] When the absolute value of the reliability is less than or equal to a preset threshold, the first weighting factor is output;

[0038] When the absolute value of the reliability is greater than the preset threshold, a second weighting factor is output;

[0039] The weighted feedback value is obtained by weighting the hard judgment value and the equalization output sign of the previous time step according to the weighting factor.

[0040] The equalization output at the current moment is determined based on the difference between the currently received symbol and the weighted feedback value.

[0041] Optionally, selecting and retaining a preset number of states from the full set of states that are closest to the equalization output soft value includes:

[0042] Calculate the distance between the equalization output soft value and the amplitude of the constellation point corresponding to each state in the full state set;

[0043] Select a preset number of states with the smallest distance to form a simplified state set.

[0044] Optionally, performing forward and backward iterations based on the simplified state space includes:

[0045] Calculate the branch metric for each state transition based on the Euclidean distance between the received symbol and the expected transmitted sequence;

[0046] The forward metric at the current time step is iteratively calculated based on the maximum value of the forward metric at the previous time step and the branch metric at the current time step.

[0047] The backward metric at the current time step is calculated iteratively based on the maximum value of the backward metric at the next time step and the branch metric at the current time step.

[0048] Optionally, calculating the log-likelihood ratio information based on the forward metric and the backward metric includes:

[0049] The posterior probability of each state is calculated based on the sum of the forward metric and the backward metric.

[0050] Determine the set of symbols whose j-th bit is 1 and the set of symbols whose j-th bit is 0;

[0051] Calculate the maximum posterior probability for each state in both symbol sets.

[0052] The difference between the two maximum values ​​is used as the log-likelihood ratio corresponding to the j-th bit.

[0053] Optionally, the calculation of the compensated log-likelihood ratio includes:

[0054] Calculate the minimum squared distance between the equalized output soft value and each constellation point where the j-th bit is 1;

[0055] Calculate the minimum squared distance between the equalized output soft value and each constellation point where the j-th bit is 0;

[0056] Divide the difference between the two minimum squared distance values ​​by twice the noise variance to obtain the compensated log-likelihood ratio.

[0057] On the other hand, embodiments of the present invention provide a computer-readable storage medium storing a processor-executable program, which, when executed by a processor, is used to perform the above-described method.

[0058] The embodiments of the present invention have the following beneficial effects:

[0059] This invention improves the threshold mapping module in the weighted decision feedback equalizer by replacing the original complex sigmoid nonlinear mapping with a simplified threshold mapping, effectively mitigating error propagation while introducing almost no additional computational complexity. By combining the improved weighted decision feedback equalizer with a soft-output maximum likelihood sequence estimation equalizer in parallel processing, and utilizing the equalization output information of the improved weighted decision feedback equalizer to assist in state simplification, an exponential reduction in complexity is achieved. The compensated log-likelihood ratio calculation module, combined with the Gray mapping method in pulse amplitude modulation, calculates the compensated log-likelihood ratio, avoiding decoding performance loss caused by oversimplification of states. The sliding window processing module restricts the iterative calculation process to a preset window length and utilizes a state inheritance mechanism, significantly reducing latency while avoiding decoding performance loss caused by window truncation. Compared with existing optimal solutions, this invention achieves better equalization performance while further reducing complexity and latency, making it suitable for real-time signal processing requirements in high-speed data center interconnect scenarios. Attached Figure Description

[0060] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0061] Figure 1 This is a block diagram of the data center interconnection system provided in the embodiments of the present invention;

[0062] Figure 2 This is a block diagram of the communication system provided in an embodiment of the present invention;

[0063] Figure 3 This is a schematic diagram of the RS-MLM algorithm with P=2 provided in an embodiment of the present invention;

[0064] Figure 4 This is a partial state mesh diagram with P=2 provided in an embodiment of the present invention;

[0065] Figure 5 This is a flowchart of the steps of the low-complexity soft output equalization method provided in the embodiments of the present invention;

[0066] Figure 6 This is a comparison chart of the simulation performance of different equalization algorithms provided in the embodiments of the present invention;

[0067] Figure 7 This is a performance comparison chart of different equalization methods under 120Gb / s, PAM-4 transmission provided in the embodiments of the present invention. Detailed Implementation

[0068] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0069] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to limit the invention.

[0070] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a full understanding of embodiments of the invention. However, those skilled in the art will recognize that the technical solutions of the invention can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of the invention.

[0071] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0072] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0073] like Figure 1 As shown, Figure 1 This is a block diagram of a data center interconnection system provided in an embodiment of the present invention. The data center interconnection system includes a transmitter 100 and a receiver 200. The transmitter 100 is used to generate a pulse amplitude modulation (PAM) signal and transmit it via an intensity modulation direct detection (IM-DD) channel 300. The receiver 200 includes a low-complexity soft output equalizer 210 and a soft-decision forward error correction (SD-FEC) decoder 220. The receiver 200 is used to receive the pulse amplitude modulation signal and perform equalization processing through the low-complexity soft output equalizer 210, outputting log-likelihood ratio (LLR) information to the soft-decision forward error correction decoder 220 for soft decoding.

[0074] The low-complexity soft-output equalization device 210 includes: an improved weighted decision feedback equalizer 211, a soft-output maximum likelihood sequence estimation equalizer 212, a compensated log-likelihood ratio calculation module 213, and a sliding window processing module 214.

[0075] The improved weighted decision feedback equalizer 211 includes a threshold mapping module 2111, which outputs a corresponding weight factor based on the comparison result between the reliability of the input signal and a preset threshold.

[0076] The soft-output maximum likelihood sequence estimation equalizer 212 is connected in parallel with the improved weighted decision feedback equalizer 211. The soft-output maximum likelihood sequence estimation equalizer 212 includes a state selection module 2121. The state selection module 2121 selects and retains a preset number of states that are closest to the soft-output equalizer 211 from the full state set based on the soft-output equalizer 211, forming a simplified state space.

[0077] The soft-output maximum likelihood sequence estimation equalizer 212 performs forward and backward iterations based on the simplified state space, calculates the branch metric, forward metric, and backward metric for each state, and calculates the log-likelihood ratio information based on the forward and backward metrics.

[0078] When the simplified state space leads to a missing log-likelihood ratio, the compensated log-likelihood ratio calculation module 213 calculates the compensated log-likelihood ratio value based on the distance between the soft value of the equalization output of the improved weighted decision feedback equalizer 211 and the constellation point.

[0079] The sliding window processing module 214 restricts the iterative calculation process to a limited range of preset window length and initializes the iteration start value of the new window using the termination state information of the previous window.

[0080] The low-complexity soft output equalization device proposed in this invention will be described in detail below:

[0081] In this embodiment, the pulse amplitude modulation signal transmitted through the intensity modulation direct detection channel is first received, and a low-complexity soft output equalization device is constructed based on the signal characteristics.

[0082] In some embodiments, the improved weighted decision feedback equalizer 211 is based on the classic decision feedback equalizer, and introduces a reliability calculation unit 2112 and a threshold mapping module 2111 in the feedback loop to link the soft value of the equalization output with the hard decision result, thus forming a more complete feedback loop.

[0083] For PAM-M modulation, given the transmission sequence length N and the transmission sequence... Then the received signal at time i (i=0,1,...,N-1) It can be represented as:

[0084] ;

[0085] Where h represents the impulse response coefficient of the channel. Indicates additive white Gaussian noise (AWGN) and Upon obtaining the currently received symbol and the hard judgment value of the previous moment Then, the equilibrium result of the improved weighted decision feedback equalizer 211 can be expressed as: ; here Indicates the hard-determined value at the previous moment. With equalized output symbols The weighted result can be specifically represented as: ;in, Indicates the hard-determined value at the previous moment. The reliability.

[0086] For PAM-M modulation, the reliability η at time i is... i It can be calculated using the following formula:

[0087] ;

[0088] Where M represents the PAM modulation order, and Δ represents the modulation level amplitude (normalized to Δ=1 in this scheme). Therefore, reliability characterizes the received symbol... With constellation points (hard judgment value) The closer the two are, the more reliable the hard decision value is, and the higher the reliability. The closer the value is to 1, the lower the reliability.

[0089] In some embodiments, the threshold mapping module 2111 determines the weighting factor according to the following formula:

[0090] When the absolute value of the reliability is less than or equal to a preset threshold, the threshold mapping module 2111 outputs a first weighting factor;

[0091] When the absolute value of the reliability is greater than the preset threshold, the threshold mapping module 2111 outputs a second weighting factor;

[0092] Wherein, the first weighting factor is less than the second weighting factor, and the reliability is determined based on the distance between the received symbol and the hard decision value.

[0093] Reliability go through The result of the calculation is the weighting factor in WDFE. For traditional WDFE, The sigmoid nonlinear mapping is used, and its definition is as follows:

[0094] ;

[0095] Here, a (a>0) and b (0≤b≤1) are artificially set compression factors, which need to be optimized to ensure optimal performance.

[0096] As can be seen, the sigmoid nonlinear mapping relationship involves complex exponential and division operations. To reduce computational complexity, this invention proposes an improved weighted decision feedback equalizer. Utilizing the idea of ​​approximate calculation, a simplified threshold mapping relationship is constructed based on the curve characteristics of the sigmoid function, as detailed below:

[0097]

[0098] in, Let T represent the new weighting factor, and T be the threshold. The simplified threshold mapping scheme involves only simple comparisons and selections, simplifying the calculation process of the traditional weighted decision feedback equalizer without affecting the final decoding performance.

[0099] The soft-output maximum likelihood sequence estimation equalizer provided in this embodiment of the invention differs from the traditional serial transmission method. This invention proposes a new parallel processing scheme, in which the improved weighted decision feedback equalizer 211 and the soft-output maximum likelihood sequence estimation equalizer 212 process the received signal simultaneously. The soft output information provided by the improved weighted decision feedback equalizer 211 is used to assist the soft-output maximum likelihood sequence estimation equalizer 212 in reducing complexity. This avoids the additional channel response coefficient calculation after processing by the improved weighted decision feedback equalizer 211. Figure 2 A block diagram of a communication system based on parallel processing is given.

[0100] based on Figure 2 In the parallel processing structure, this invention proposes an improved state simplification method assisted by a weighted decision feedback equalizer. The state selection module 2121 selects and retains a preset number of states from the full state set according to the following method:

[0101] The state selection module 2121 calculates the distance between the equalization output soft value of the improved weighted decision feedback equalizer 211 and the amplitude of the constellation point corresponding to each state in the full state set, and selects a preset number of states with the smallest distance to form a simplified state set.

[0102] For PAM-M modulation, its full-state set is defined as follows: Based on the equalization output of the improved weighted decision feedback equalizer 211 Select and keep from X The P states with the closest soft values ​​are found, thus simplifying the M-state space into a P-state space, as shown below:

[0103] ;

[0104] in, Let P represent the set of P states retained at time i. Depending on the number of retained states, this scheme can achieve a flexible trade-off between complexity and performance, and ultimately realize a 2-state minimal space with P=2. Compared with the full-state case, it can achieve 50% and 75% state reduction under PAM-4 and PAM-8 modulation, respectively.

[0105] Therefore, a simplified state MLM algorithm with high computational efficiency can be implemented. For example... Figure 3 As shown, when P=2, each state transition process only considers the retained 2-state space and ignores minor states, which greatly simplifies the calculation of states and branch metrics.

[0106] The calculation process of the RS-MLM algorithm is explained below from a specific theoretical perspective: For PAM-M modulation, using... Indicates the state at time i. to state Logarithmic domain branch measure, ,but You can use the receiving symbol With the expected transmission sequence The Euclidean distance between them is used for calculation, that is:

[0107] ;

[0108] Where h represents the channel impulse response coefficient vector, and * represents the convolution operation.

[0109] The soft-output maximum likelihood sequence estimation equalizer 212 calculates the branch metric according to the following formula:

[0110] The branch metric is determined based on the Euclidean distance between the received symbol and the expected transmission sequence, which is determined based on the convolution operation of the channel impulse response coefficient and the state sequence.

[0111] In obtaining branch metrics From now on, forward metric and backward metric This can be obtained through iterative calculation:

[0112] ;

[0113] ;

[0114] The soft-output maximum likelihood sequence estimation equalizer 212 calculates the forward and backward metrics according to the following formula:

[0115] The forward metric is determined based on the maximum value of the forward metric at the previous time step and the branch metric at the current time step;

[0116] The backward metric is determined based on the maximum value of the backward metric at the next time step and the branch metric at the current time step.

[0117] like Figure 4 As shown, Figure 4 This is a simplified state mesh diagram provided in an embodiment of the present invention. After simplification, each state metric calculation only requires one addition and one comparison.

[0118] After completing the forward and backward iterations, the logarithmic posterior probability of state s at time i under the condition of receiving sequence y can be calculated as follows:

[0119] ;

[0120] Based on the posterior probability of each state, the LLR corresponding to the j-th (0≤j≤log2M-1) bit in the i-th symbol can be obtained further through the max-log operation:

[0121] ;

[0122] in, Let LLR represent the set of symbols where the j-th bit is b∈{0,1}. The calculated LLR will be provided to the subsequent decoder to complete the soft decoding.

[0123] The soft-output maximum likelihood sequence estimation equalizer 212 calculates the log-likelihood ratio information according to the following formula:

[0124] The soft-output maximum likelihood sequence estimation equalizer 212 determines the symbol set where the j-th bit is 1 and the symbol set where the j-th bit is 0, calculates the maximum posterior probability of each state in the two symbol sets, and uses the difference between the two maximum values ​​as the log-likelihood ratio corresponding to the j-th bit.

[0125] The complexity of the MLM algorithm is mainly determined by the modulation order M and the channel impulse response length L, and is approximately ~ Therefore, after state simplification, the proposed simplified state MLM algorithm can achieve an exponential reduction in complexity, enabling it to exhibit more significant advantages in high-order modulation schemes.

[0126] In this invention, the PAM-M modulation uses a Gray mapping method, meaning that only one bit differs between any two adjacent symbols. For example, the mapping rule between bits and symbols in PAM-4 modulation is: 00→-3, 01→-1, 11→+1, 10→+3.

[0127] According to the LLR calculation formula, when the number of states P≤2, a set will appear at each time step. or The situation where all relevant states are discarded leads to an empty max operation and a missing LLR, which will significantly impact decoding performance. Therefore, the improved weighted decision feedback equalizer 211 is used to equalize the output results. This scheme also proposes a method for calculating the compensated LLR for PAM-M modulation.

[0128] The compensated log-likelihood ratio calculation module 213 calculates the compensated log-likelihood ratio value according to the following formula:

[0129] The compensated log-likelihood ratio calculation module 213 calculates the minimum squared distance between the equalization output soft value of the improved weighted decision feedback equalizer 211 and each constellation point where the j-th bit is 1, and the minimum squared distance between the equalization output soft value and each constellation point where the j-th bit is 0. The difference between the two minimum squared distance values ​​is divided by twice the noise variance to obtain the compensated log-likelihood ratio.

[0130] The specific calculation principle is as follows:

[0131] ;

[0132] Here, bit j can be determined by the set of states. Determined. For example, under P=2, PAM-4 modulation, when At that time, according to Gray's mapping rule, the set All relevant states are discarded, meaning the bit corresponding to j=0 needs to be compensated for LLR. Therefore, the calculation is performed according to the above formula. Finally, the missing LLR bits are used... The replacements are then reassembled into a new LLR set for use by the decoder.

[0133] Traditional MLM and DFE-3 MLM algorithms both perform forward and backward iterations based on a complete received signal trellis frame. This results in high processing latency in long code length transmission scenarios, making them unsuitable for high-speed hardware architectures. To address this issue, this invention proposes a sliding window scheme based on state inheritance. This scheme restricts the iterative calculation process to a finite window length of W, and uses the termination state information of the previous window to initialize the iteration start value of the new window. This effectively reduces processing latency while maintaining the continuity of state information propagation between adjacent windows, avoiding the truncation effect caused by windowing, and ensuring that decoding performance is not affected. For transmission methods with a code length of N and a modulation order of M, compared with the traditional iterative process, the sliding window scheme can achieve… The proportion of delay is reduced.

[0134] like Figure 1 As shown, this embodiment provides a data center interconnection system, including a transmitter 100 and a receiver 200.

[0135] The transmitter 100 includes a pulse amplitude modulation signal generation unit, used to map the data bit stream to be transmitted into PAM modulation symbols and transmit them via intensity modulation direct detection (IM-DD) channel 300. The IM-DD channel 300 includes a laser, a modulator, an optical fiber transmission link, and a photodetector, used to convert the PAM modulation signal in the electrical domain into an optical signal for transmission and convert it back into an electrical signal at the receiving end.

[0136] The receiver 200 includes a low-complexity soft-output equalizer 210 and a soft-decision forward error correction decoder 220. The specific structure and working principle of the low-complexity soft-output equalizer 210 are as described in the first embodiment and will not be repeated here. The soft-decision forward error correction decoder 220 receives the log-likelihood ratio information output by the low-complexity soft-output equalizer 210 and performs soft-decision decoding to recover the original transmitted data.

[0137] In one specific implementation, the data center interconnect system adopts the 400Gb / s Ethernet transmission standard, uses the PAM-4 modulation format, and has a transmission distance of 5km. The sliding window processing module 214 in the low-complexity soft output equalizer 210 sets the window length W to 192 symbols, and the parameters δ and T of the improved weighted decision feedback equalizer 211 are set to 0.8 and 0.2, respectively. Testing shows that compared to a receiver using a traditional MLM algorithm, this system achieves the same bit error rate performance while reducing complexity by 82% and processing latency by 98%.

[0138] It should be noted that the parameters δ, T, and W in this invention are adjustable by humans, and changes in these parameters still constitute a description of this invention.

[0139] like Figure 5 As shown, Figure 5 A flowchart illustrating the steps of a low-complexity soft output equalization method provided in an embodiment of the present invention. The method includes the following steps:

[0140] S100, the received signal is equalized by an improved weighted decision feedback equalizer. The improved weighted decision feedback equalizer outputs the corresponding weight factor through threshold mapping based on the comparison result between the reliability of the input signal and a preset threshold.

[0141] S200, the received signal is processed in parallel by the soft output maximum likelihood sequence estimation equalizer and the improved weighted decision feedback equalizer. The soft output maximum likelihood sequence estimation equalizer selects and retains a preset number of states that are closest to the equalization output soft value from the full state set according to the equalization output soft value of the improved weighted decision feedback equalizer, forming a simplified state space.

[0142] S300, perform forward iteration and backward iteration according to the simplified state space, calculate the branch metric, forward metric and backward metric of each state, and calculate the log-likelihood ratio information according to the forward metric and the backward metric;

[0143] S400, when the simplified state space results in the absence of the log-likelihood ratio, the compensation log-likelihood ratio is calculated based on the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the constellation point.

[0144] S500 restricts the iterative calculation process to a limited range of a preset window length and initializes the iteration start value of the new window using the termination state information of the previous window.

[0145] This invention proposes a low-complexity soft-output equalization method. By constructing a parallel processing architecture of an improved weighted decision feedback equalizer and a soft-output maximum likelihood sequence estimation equalizer, and combining state simplification, compensated log-likelihood ratio calculation, and a sliding window processing mechanism, it achieves low-complexity, low-delay equalization processing for pulse amplitude modulation signals. Specifically, the improved weighted decision feedback equalizer uses a simplified threshold mapping module to replace the original complex sigmoid nonlinear mapping, effectively mitigating error propagation while introducing almost no additional computational complexity. The soft-output maximum likelihood sequence estimation equalizer uses a state selection module to select and retain a preset number of states based on the equalization output soft value of the improved weighted decision feedback equalizer, forming a simplified state space. Utilizing equalization output information to assist state simplification achieves an exponential reduction in complexity. The compensated log-likelihood ratio is calculated using the Gray mapping method in pulse amplitude modulation, avoiding decoding performance loss due to over-simplification. The sliding window processing restricts the iterative calculation process to a preset window length and utilizes a state inheritance mechanism, significantly reducing latency while avoiding decoding performance loss caused by window truncation.

[0146] In step S100, the equalization processing of the received signal using an improved weighted decision feedback equalizer specifically includes:

[0147] S110, calculate the reliability based on the distance between the received symbol and the hard decision value;

[0148] S120, when the absolute value of the reliability is less than or equal to a preset threshold, output a first weighting factor; when the absolute value of the reliability is greater than the preset threshold, output a second weighting factor.

[0149] S130, The hard judgment value and the equalization output symbol of the previous moment are weighted according to the weighting factor to obtain the weighted feedback value;

[0150] S140, determine the equalization output at the current moment based on the difference between the currently received symbol and the weighted feedback value.

[0151] In step S200, selecting and retaining a preset number of states from the full state set that are closest to the equalization output soft value specifically includes:

[0152] S210, Calculate the distance between the equalization output soft value and the amplitude of the constellation point corresponding to each state in the full state set;

[0153] S220: Select a preset number of states with the smallest distance to form a simplified state set.

[0154] In step S300, performing forward and backward iterations based on the simplified state space specifically includes:

[0155] S310, calculate the branch metric for each state transition based on the Euclidean distance between the received symbol and the expected transmitted sequence;

[0156] S320, calculate the forward metric at the current time step iteratively based on the maximum value of the forward metric at the previous time step and the branch metric at the current time step;

[0157] S330: Iteratively calculate the backward metric at the current time step based on the maximum value of the backward metric at the next time step and the branch metric at the current time step.

[0158] In step S300, calculating the log-likelihood ratio information based on the forward metric and the backward metric specifically includes:

[0159] S410, calculate the posterior probability of each state based on the sum of the forward metric and the backward metric;

[0160] S420, determine the set of symbols where the j-th bit is 1 and the set of symbols where the j-th bit is 0;

[0161] S430, calculate the maximum posterior probability of each state in the two symbol sets respectively;

[0162] S440, the difference between the two maximum values ​​is taken as the log-likelihood ratio corresponding to the j-th bit.

[0163] In step S400, calculating the compensated log-likelihood ratio specifically includes:

[0164] S450, calculate the minimum squared distance between the equalized output soft value and each constellation point where the j-th bit is 1;

[0165] S460, Calculate the minimum squared distance between the equalized output soft value and each constellation point where the j-th bit is 0;

[0166] S470, divide the difference between the two minimum squared distance values ​​by twice the noise variance to obtain the compensated log-likelihood ratio.

[0167] Simulation and experimental verification:

[0168] (1) Simulation results;

[0169] Considering both PAM-4 and PAM-8 modulation schemes, the ISI channel is set to 1 + 0.7D, i.e., h = 0.7. The LDPC (17664, 14592) code from the IEEE 802.3ca standard is used as the FEC, and a 6-iteration BP algorithm is used as the decoding algorithm. The sliding window length W = 192. After parameter optimization, the δ and T of the improved weighted decision feedback equalizer are set to 0.8 and 0.2, respectively. A comparison of the pre-FEC BER and post-FEC BER performance of traditional DFE, MLM, DFE-3 MLM, RS-MLM, and hard-output MLSE (HD-MLSE) is shown below. Figure 6 As shown.

[0170] Depend on Figure 6 It can be seen that for pre-FEC BER, the proposed RS-MLM algorithm outperforms the DFE-3 MLM algorithm under both modulation schemes, with a more significant performance advantage under PAM-4. For post-FEC BER, the RS-MLM algorithm achieves performance improvements of approximately 0.2dB and 0.1dB compared to the DFE-3 MLM algorithm under PAM-4 and PAM-8 modulation schemes, respectively. Therefore, the proposed algorithm demonstrates significant advantages in equalization and coordination with SD-FEC.

[0171] To further illustrate the computational complexity of different algorithms, taking PAM-8 modulation as an example, Table 1 lists the number of multiplications, additions, and comparisons in a single state transition phase for each algorithm. It can be seen that compared to the DFE-3 MLM algorithm, the proposed RS-MLM algorithm reduces the number of multiplications, additions, and comparisons by 85%, 79%, and 81%, respectively, achieving an average complexity reduction of 82%. Furthermore, according to the expression... Calculations show that, with code length N=17664 and window size W=192, the proposed scheme can achieve a latency reduction of nearly 98%.

[0172] Table 1: Comparison of the complexity of different algorithms under PAM-8 modulation

[0173]

[0174] (2) Experimental results;

[0175] An IM-DD system combined with PAM-4 modulation was used to conduct 5km fiber optic transmission experiments in the O-band at speeds of 100Gb / s, 112Gb / s, and 120Gb / s. Taking 120Gb / s transmission as an example, the performance comparison of pre-FEC BER and post-FEC BER of each equalization method under different received optical power (ROP) is as follows: Figure 7 As shown.

[0176] Depend on Figure 7 As can be seen, compared with the traditional HD-MLSE and MLM algorithms, the proposed scheme has no performance loss and is significantly better than the DFE-3 MLM algorithm. For post-FEC BER, the proposed RS-MLM algorithm can bring a decoding performance gain of 0.92dB compared with the DFE-3 MLM algorithm, indicating that the soft output information generated by the proposed method is better.

[0177] This embodiment also provides a computer-readable storage medium storing a processor-executable program, which, when executed by a processor, is used to perform the aforementioned low-complexity soft output equalization method.

[0178] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0179] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may, for example, include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: electrical connections having one or more wires, portable disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0180] In one specific implementation, the computer-readable storage medium is the configuration memory of a field-programmable gate array (FPGA), and the processor-executable program is stored in the form of a hardware description language (HDL), and after synthesis, placement and routing, it is downloaded to the FPGA to realize the hardware acceleration processing of the low-complexity soft output equalization method.

[0181] In another specific implementation, the computer-readable storage medium is the program memory of a digital signal processor (DSP). The program executable by the processor is stored in assembly language or C language, compiled and linked, and then loaded into the DSP for execution, thereby realizing the real-time digital signal processing of the low-complexity soft output equalization method.

[0182] Furthermore, embodiments of the present invention also disclose a computer program product or computer program stored in a computer-readable storage medium. A processor of a computer device can read the computer program from the computer-readable storage medium, and the processor executes the computer program, causing the computer device to perform the described method. Similarly, the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0183] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0184] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0185] In the several embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0186] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0187] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0188] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0189] The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and spirit of the present invention should be within the scope of the claims of the present invention.

Claims

1. A low-complexity soft output equalization device, characterized in that, include: An improved weighted decision feedback equalizer includes a threshold mapping module that outputs a weighting factor based on a comparison between the reliability of the input signal and a preset threshold. A soft-output maximum likelihood sequence estimation equalizer, connected in parallel with the improved weighted decision feedback equalizer, includes a state selection module. The state selection module selects and retains a preset number of states that are closest to the soft-output equalizer from the full state set based on the soft-value of the equalizer output of the improved weighted decision feedback equalizer, thus forming a simplified state space. The soft-output maximum likelihood sequence estimation equalizer performs forward and backward iterations based on the simplified state space, calculates the branch metric, forward metric, and backward metric for each state, and calculates the log-likelihood ratio information based on the forward and backward metrics. The compensated log-likelihood ratio calculation module calculates the compensated log-likelihood ratio value based on the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the constellation point when the simplified state space causes the log-likelihood ratio to be missing. The sliding window processing module restricts the iterative calculation process to a limited range of preset window length and uses the termination state information of the previous window to initialize the iteration start value of the new window.

2. The apparatus according to claim 1, characterized in that, The threshold mapping module determines the weighting factor according to the following formula: When the absolute value of the reliability is less than or equal to a preset threshold, the threshold mapping module outputs a first weighting factor; When the absolute value of the reliability is greater than the preset threshold, the threshold mapping module outputs a second weighting factor; Wherein, the first weighting factor is less than the second weighting factor, and the reliability is determined based on the distance between the received symbol and the hard decision value.

3. The apparatus according to claim 1, characterized in that, The state selection module selects and retains a preset number of states from the full state set according to the following method: The state selection module calculates the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the amplitude of the constellation point corresponding to each state in the full state set, and selects a preset number of states with the smallest distance to form a simplified state set.

4. The apparatus according to claim 1, characterized in that, The soft-output maximum likelihood sequence estimation equalizer calculates the branch metric according to the following formula: The branch metric is determined based on the Euclidean distance between the received symbol and the expected transmission sequence, which is determined based on the convolution operation of the channel impulse response coefficient and the state sequence.

5. The apparatus according to claim 1, characterized in that, The soft-output maximum likelihood sequence estimation equalizer calculates the forward and backward metrics according to the following formula: The forward metric is determined based on the maximum value of the forward metric at the previous time step and the branch metric at the current time step; The backward metric is determined based on the maximum value of the backward metric at the next time step and the branch metric at the current time step.

6. The apparatus according to claim 1, characterized in that, The soft-output maximum likelihood sequence estimation equalizer calculates the log-likelihood ratio information according to the following formula: The soft-output maximum likelihood sequence estimation equalizer determines the set of symbols with the j-th bit set to 1 and the set of symbols with the j-th bit set to 0, calculates the maximum posterior probability of each state in the two sets of symbols, and uses the difference between the two maximum values ​​as the log-likelihood ratio corresponding to the j-th bit.

7. The apparatus according to claim 1, characterized in that, The compensated log-likelihood ratio calculation module calculates the compensated log-likelihood ratio value according to the following formula: The compensated log-likelihood ratio calculation module calculates the minimum squared distance between the equalization output soft value of the improved weighted decision feedback equalizer and each constellation point where the j-th bit is 1, and the minimum squared distance between the equalization output soft value and each constellation point where the j-th bit is 0. The difference between the two minimum squared distance values ​​is divided by twice the noise variance to obtain the compensated log-likelihood ratio.

8. A data center interconnection system, characterized in that, include: The transmitter is used to generate a pulse amplitude modulation signal and transmit it via an intensity modulation direct detection channel; The receiving end includes a low-complexity soft output equalization device as described in any one of claims 1 to 7. The receiving end is used to receive the pulse amplitude modulation signal and perform equalization processing through the low-complexity soft output equalization device, and output log-likelihood ratio information to a soft-decision forward error correction decoder.

9. A low-complexity soft output equalization method, characterized in that, The method includes the following steps: The received signal is equalized by an improved weighted decision feedback equalizer. The improved weighted decision feedback equalizer outputs the corresponding weight factor through threshold mapping based on the comparison result between the reliability of the input signal and a preset threshold. The received signal is processed in parallel by a soft-output maximum likelihood sequence estimation equalizer and the improved weighted decision feedback equalizer. The soft-output maximum likelihood sequence estimation equalizer selects and retains a preset number of states that are closest to the equalization output soft value from the full state set according to the equalization output soft value of the improved weighted decision feedback equalizer, thus forming a simplified state space. Perform forward and backward iterations based on the simplified state space, calculate the branch metric, forward metric, and backward metric for each state, and calculate the log-likelihood ratio information based on the forward and backward metrics. When the simplified state space results in the absence of the log-likelihood ratio, the compensation log-likelihood ratio is calculated based on the distance between the equalization output soft value of the improved weighted decision feedback equalizer and the constellation point. The iterative calculation process is restricted to a limited range of preset window length, and the iteration start value of the new window is initialized using the termination state information of the previous window.

10. A computer-readable storage medium storing a processor-executable program, characterized in that, The processor-executable program is used to perform the method as described in claim 9 when executed by the processor.

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