An iterative variable step-size carrier synchronization method and device based on autocorrelation domain compensation

Abstract

This invention discloses an iterative variable step-size carrier synchronization method based on autocorrelation domain compensation. First, a discrete baseband received signal sequence and its corresponding known pilot symbol sequence are obtained. An intermediate signal is constructed by demodulating the received signal sequence and the pilot symbol sequence through conjugate multiplication. Then, based on the demodulated intermediate signal, the original autocorrelation sequence is obtained and stored. The cumulative frequency offset estimate is initialized to zero. The frequency offset estimate is calculated iteratively according to the variable step-size. After the iteration termination condition is met, the target signal is frequency offset compensated using the final cumulative frequency offset estimate. An initial phase estimate is obtained by analytically calculating the compensated signal based on the maximum likelihood criterion. Finally, the received signal sequence is uniformly compensated for frequency and phase using the final cumulative frequency offset estimate and the initial phase estimate, and the synchronized signal is output.

Description

Technical Field

[0001] This invention relates to the field of satellite communication and wireless carrier synchronization technology, specifically an iterative variable step size carrier synchronization method and apparatus based on autocorrelation domain compensation. Background Technology

[0002] In high-dynamic scenarios such as low-Earth orbit (LEO) satellite communications and hypersonic vehicle communications, the extremely high relative speeds and accelerations between the transmitter and receiver cause the received signal to suffer severe Doppler shift, frequency drift, and phase distortion. Meanwhile, to achieve higher data transmission rates with limited spectrum resources, modern communication systems commonly employ high-order modulation methods such as 256APSK. These high-order modulations place extremely stringent requirements on the synchronization accuracy of the carrier frequency and phase; even a small estimation deviation can lead to a drastic deterioration in demodulation performance.

[0003] Existing carrier synchronization schemes face the following main challenges in practical applications:

[0004] Iterative correction suffers from excessive computational complexity: To address large dynamic frequency offsets, existing methods often employ iterative correction architectures. However, these methods typically require full repetitive rotation compensation and reprocessing of the received time-domain signal sequence after each iteration, using the updated frequency offset estimate. The computational complexity of this process is linearly proportional to the signal length and the number of iterations, resulting in enormous computational overhead. When implementing real-time processing on low-power hardware platforms such as FPGAs or DSPs, it consumes significant amounts of logic resources, storage bandwidth, and power, becoming a bottleneck for engineering applications.

[0005] The capture range and estimation accuracy are difficult to balance: Traditional non-iterative algorithms (such as the L&R algorithm and its variants) essentially rely on autocorrelation calculations with a fixed step size. When attempting to expand the frequency offset capture range by decreasing the correlation step size, estimation accuracy inevitably decreases; conversely, increasing the step size can improve accuracy, but the linear estimation range will narrow drastically. This inherent contradiction makes it impossible for fixed-parameter algorithms to provide high-precision estimates across the entire dynamic range.

[0006] Phase tracking loops are complex to implement: After frequency offset estimation, the remaining phase offset usually requires an additional phase-locked loop (PLL) for tracking and compensation. To simultaneously handle frequency steps and frequency change rates, complex second- or third-order PLLs are often required. This introduces challenges such as loop filter parameter tuning, convergence speed versus stability tradeoffs, and under high-order modulation and low signal-to-noise ratio conditions, the loop is prone to loss of lock, reducing receiver robustness.

[0007] Therefore, designing a scheme that can meet the requirements of large acquisition range and high estimation accuracy, fundamentally reduce iterative computation overhead and hardware implementation complexity, and concisely complete joint carrier synchronization has become a key technical challenge in the design of current high dynamic communication receivers. Summary of the Invention

[0008] The technical problem to be solved by this invention is to address the shortcomings of existing carrier synchronization schemes, such as the high computational complexity of iterative correction leading to difficulties in hardware implementation, and the inability of fixed parameter algorithms to simultaneously achieve a large acquisition range and high estimation accuracy. This invention provides a method and apparatus that can significantly reduce computational overhead and hardware resource consumption, while achieving high-precision joint carrier synchronization across the entire dynamic range.

[0009] To achieve the above objectives, the technical solution specifically adopted by the present invention is as follows:

[0010] This invention provides an iterative variable step-size carrier synchronization method based on autocorrelation domain compensation, comprising the following steps:

[0011] Obtain the discrete baseband received signal sequence and the corresponding known pilot symbol sequence, and construct the demodulation intermediate signal by multiplying the received signal sequence with the conjugate of the pilot symbol sequence;

[0012] Based on the demodulated intermediate signal, a one-time autocorrelation operation is performed according to the preset maximum correlation step size M to obtain the original autocorrelation sequence and store it, wherein the elements of the original autocorrelation sequence correspond to the correlation step size indices m from 1 to M.

[0013] Set the initial correlation step size, growth factor and iteration termination condition, and initialize the cumulative frequency offset estimate to zero;

[0014] The iterative frequency offset estimation process is initiated, and the following operations are performed in each iteration: The correlation step size for the current iteration is determined based on the growth factor and the correlation step size of the previous iteration, ensuring that this correlation step size does not exceed the maximum correlation step size; a complex exponential rotation factor is constructed using the cumulative frequency offset estimate obtained from the previous iteration; the elements corresponding to each correlation step size index m in the stored original autocorrelation sequence are multiplied by the rotation factor to obtain the compensated autocorrelation sequence for the current iteration, wherein this multiplication operation is performed directly in the autocorrelation domain, and the received signal sequence or the demodulation intermediate signal is not revisited during the iteration process; the current residual frequency offset is estimated based on the phase information of the compensated autocorrelation sequence; the current residual frequency offset is added to the cumulative frequency offset estimate from the previous iteration to update the cumulative frequency offset estimate.

[0015] After the iteration termination condition is met, the target signal is compensated for frequency offset using the final cumulative frequency offset estimate, and the compensated signal is analyzed based on the maximum likelihood criterion to obtain the initial phase estimate.

[0016] Using the final cumulative frequency offset estimate and the initial phase estimate, the received signal sequence is uniformly compensated for frequency and phase, and a synchronized signal is output.

[0017] Preferably, when constructing the complex exponential twisting factor, the phase offset of the twisting factor is determined by the product of the cumulative frequency offset estimate from the previous iteration, the symbol period, and the relevant step size index m, making the twisting factor independent of the index of the original time sampling point. This feature achieves complete decoupling between the compensation operator and the original time signal.

[0018] Preferably, the step of estimating the current residual frequency offset based on the phase information of the compensated autocorrelation sequence specifically involves: calculating the argument of the sum of all elements in the compensated autocorrelation sequence from m=1 to the current round correlation step length, and dividing the argument by the product of π and the current round correlation step length plus 1, and the symbol period, thereby obtaining the estimated value of the current residual frequency offset.

[0019] Preferably, to reduce storage overhead, when storing the original autocorrelation sequence, the conjugate symmetry of the autocorrelation sequence is utilized to store only the sequence elements corresponding to a subset of indices where m ranges from 1 to no more than M / 2; during the iteration process, when elements corresponding to indices greater than M / 2 are needed, the sequence is reconstructed in real time by taking the conjugate of the elements with the corresponding conjugate indices that have already been stored.

[0020] As a preferred option, in order to ensure iterative convergence and avoid phase ambiguity, the value of the growth factor must meet certain conditions: its value is greater than 1 and does not exceed an upper limit value, which is determined by the signal-to-noise ratio, the square root of the current correlation step size, and a coefficient related to the standard deviation of the frequency offset estimation.

[0021] Preferably, to prevent estimation divergence and further reduce computational overhead in low signal-to-noise ratio environments, the method further includes a dynamic termination determination step after updating the cumulative frequency offset estimate in each iteration: calculating the absolute value of the current residual frequency offset estimate; if the absolute value is less than a preset convergence threshold, terminating the iteration in advance and outputting the current cumulative frequency offset estimate as the final cumulative frequency offset estimate.

[0022] Preferably, the convergence threshold can be flexibly set according to the phase deviation tolerance of the target modulation method.

[0023] Preferably, the iteration termination condition is that the relevant step size of the current round is equal to the maximum relevant step size, thereby ensuring that the algorithm can completely traverse the preset step size sequence.

[0024] The present invention also provides an iterative variable step size carrier synchronization device based on autocorrelation domain compensation, the device comprising:

[0025] The demodulation module is used to acquire the discrete baseband received signal sequence and the corresponding known pilot symbol sequence, and to construct the demodulation intermediate signal by multiplying the received signal sequence with the conjugate of the pilot symbol sequence.

[0026] The autocorrelation pre-calculation module is used to perform a one-time autocorrelation operation based on the demodulated intermediate signal according to a preset maximum correlation step size M, to obtain and store the original autocorrelation sequence, wherein the elements of the original autocorrelation sequence correspond to each correlation step size index m from 1 to M.

[0027] The parameter initialization module is used to set the initial correlation step size, growth factor and iteration termination condition, and initialize the cumulative frequency offset estimate to zero.

[0028] The iterative frequency offset estimation module is used to perform multiple iterations, and further includes: a step size update unit, used to determine the correlation step size of the current iteration based on the growth factor and the correlation step size of the previous iteration, and to ensure that the correlation step size does not exceed the maximum correlation step size; an autocorrelation domain rotation compensation unit, used to construct a complex exponential rotation factor using the cumulative frequency offset estimate obtained from the previous iteration, and to multiply the elements corresponding to each correlation step size index m in the stored original autocorrelation sequence with the rotation factor to obtain the compensated autocorrelation sequence of the current iteration, wherein the multiplication operation is performed directly in the autocorrelation domain, and the received signal sequence or the demodulation intermediate signal is not revisited during the iteration process; and a residual estimation and update unit, used to estimate the current residual frequency offset based on the phase information of the compensated autocorrelation sequence, and to add the current residual frequency offset to the cumulative frequency offset estimate of the previous iteration to update the cumulative frequency offset estimate.

[0029] The phase analysis module is used to compensate the target signal for frequency offset using the final accumulated frequency offset estimate after the iteration termination condition is met, and to perform analytical calculations on the compensated signal based on the maximum likelihood criterion to obtain the initial phase estimate.

[0030] The joint correction module is used to perform unified frequency and phase compensation on the received signal sequence using the final cumulative frequency offset estimate and the initial phase estimate, and output the synchronized signal.

[0031] This invention has the following characteristics and beneficial effects:

[0032] Significantly reduced computational complexity and hardware overhead: This invention employs an innovative "autocorrelation domain compensation" mechanism to pre-calculate and store time-consuming autocorrelation operations in a single step, completely decoupling the iterative process from dependence on the original signal stream. Iterative compensation requires operations on only a small number of autocorrelation sequence points, reducing the total amount of resource-intensive complex multiplication operations by more than 85%. In terms of hardware implementation, this not only eliminates the need for high-performance complex rotators (such as CORDIC modules) in the iterative loop but also significantly reduces storage depth and memory access bandwidth requirements, achieving a low-power, small-area, and high-real-time hardware architecture. This fundamentally solves the engineering implementation challenges caused by the "iteration penalty" of traditional iterative methods.

[0033] Overcoming the trade-off between capture range and accuracy to achieve dynamic optimization: This invention introduces a variable step-size iterative strategy controlled by a growth factor. In the initial iteration phase, a small step size is used to achieve rapid capture over a wide range. Subsequently, a gradually increasing step size is used to perform high-precision estimation within the locked frequency offset region. This dynamic evolution mechanism allows a single algorithm framework to simultaneously achieve capture capabilities approaching the theoretical maximum range and estimation accuracy approaching the Cramér-Rao bound (CRB), perfectly resolving the trade-off dilemma of traditional fixed-step-size algorithms.

[0034] Achieving concise joint synchronization without the need for complex phase-locked loops: This invention utilizes the high-precision total frequency offset estimate obtained after iterative convergence to compensate the signal once, and then directly calculates the initial phase analytically based on the maximum likelihood criterion, realizing open-loop, feedforward joint estimation and correction of frequency offset and phase. This method avoids complex PLL loop design and lengthy convergence processes, has a simple structure, and poses no stability risk, making it particularly suitable for bursty communication modes requiring rapid synchronization.

[0035] Enhancing robustness in complex dynamic environments: Thanks to extremely low computational latency, this invention supports near real-time synchronization processing at high refresh rates, significantly shortening the time window from signal reception to parameter compensation. This enables the algorithm to effectively track and correct non-stationary frequency offsets caused by frequency acceleration (Doppler rate of change) induced by highly dynamic aircraft, maintaining excellent and robust synchronization performance even under high-order modulation and low signal-to-noise ratio conditions. Attached Figure Description

[0036] Figure 1 This is a flowchart illustrating an iterative variable step size carrier synchronization method based on autocorrelation domain compensation according to an embodiment of the present invention.

[0037] Figure 2 This is a receiver constellation diagram under the combined effects of frequency offset and phase.

[0038] Figure 3 This is the receiving constellation diagram after the first iteration compensation.

[0039] Figure 4This is the receiving constellation diagram after intermediate stage iterative compensation.

[0040] Figure 5 This is the receiving constellation diagram after the iteration is completed.

[0041] Figure 6 This is a graph showing the mean square error of frequency estimation compared to the traditional algorithm.

[0042] Figure 7 This is a graph showing the bit error rate of the method of the present invention. Detailed Implementation

[0043] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0044] Example 1

[0045] This invention provides an iterative variable step-size carrier synchronization method based on autocorrelation domain compensation.

[0046] In this embodiment, it is assumed that the discrete baseband signal sequence received by the receiver is as follows: In carrier frequency offset and initial phase Under the combined effect of these factors, the received signal can be expressed as:

[0047]

[0048] in, To send symbols, For carrier frequency offset, For the initial phase, For symbol period, For the length of the observation sequence, It is additive white Gaussian noise.

[0049] The goal of carrier synchronization is to obtain the received signal Accurately estimated and This is used to correct the signal and eliminate the effects of frequency and phase offset on demodulation performance. Specifically, for example... Figure 1 As shown, the method includes the following steps:

[0050] S1, Signal Preprocessing and Demodulation

[0051] First, obtain the discrete baseband received signal sequence. The middle and the corresponding known pilot symbol sequence The demodulation intermediate signal is constructed by multiplying the received signal sequence by the conjugate of the pilot symbol sequence. Its expression is:

[0052]

[0053] in, express The conjugate of the transmitted symbols. The purpose of this step is to remove the modulation information of the transmitted symbols, so that subsequent processing can focus on analyzing the carrier frequency and phase errors introduced by the channel and the radio frequency front end.

[0054] S2, Autocorrelation sequence pre-computation

[0055] Based on demodulation intermediate signal According to the preset maximum correlation step size Perform a one-time autocorrelation operation to obtain the original autocorrelation sequence. , The mathematical expression for this autocorrelation operation is:

[0056]

[0057] in: It is the autocorrelation step size index, representing the autocorrelation delay of the current calculation (in symbol periods). Corresponding delay The original autocorrelation value; Indicates delay The conjugate of the demodulated signal of each symbol.

[0058] After the calculation is completed, the length is... The original autocorrelation sequence is stored once in memory and can be repeatedly accessed in subsequent iterations without having to revisit the original signal sequence. or This pre-computation and storage strategy is one of the core features of the invention. It removes the most computationally intensive operations from the iterative loop, allowing iterations to take place only in the "autocorrelation domain" where the amount of data is significantly reduced.

[0059] To further conserve storage resources, the conjugate symmetry of autocorrelation sequences can also be utilized. Only for The sequence elements within the range are physically stored. When iteration requires... When accessing an element, the stored index can be read. The elements are reconstructed in real time by taking their conjugates, thereby halving the storage resource usage.

[0060] S3, Step Size and Parameter Initialization

[0061] Before starting the iteration, the initial relevant step size needs to be set. growth factors And the iteration termination condition, and initialize the cumulative frequency offset estimate to zero, i.e. 0.

[0062] In this embodiment, the initial correlation step size is set to Growth factors The value of must ensure that phase ambiguity does not occur during the iteration process to guarantee convergence. To ensure the current iteration... Estimated standard deviation of round iteration Satisfy the next round step size The corresponding linear capture interval constraint requires the growth factor to satisfy the following range of values:

[0063]

[0064] in, For signal-to-noise ratio, This is the current iteration step size. The standard deviation coefficient is estimated by the frequency offset, and the calculation formula is as follows: .

[0065] For the 256-APSK system in this embodiment, with a pilot length L=100 and a minimum operating signal-to-noise ratio threshold of 20dB, the theoretical maximum growth factor is calculated to be approximately 4.27. To balance convergence speed and hardware implementation simplicity, this embodiment rounds the growth factor to a fixed value. This forms a step size sequence that doubles according to a rule. The iteration termination condition can be set to the current step size. Reaching the maximum correlation step size In this embodiment, the maximum correlation step size .

[0066] S4, Variable Step Size Iterative Frequency Offset Estimation

[0067] After initialization, the iterative frequency offset estimation stage begins. Let the current stage be the... Round of iterations, cumulative frequency offset estimate It has already been obtained from the previous iteration.

[0068] S41, Step Size Dynamic Update

[0069] Based on growth factors Step size of the previous iteration Calculate the relevant step size for the current round And ensure that it does not exceed the preset maximum relevant step size. The updated formula is:

[0070]

[0071] in Indicates rounding down. When When the step size is 2, the step size sequence increases according to the pattern 1, 2, 4, 8, 16, 32, 50 until it reaches the upper limit. .

[0072] S42, Autocorrelation Domain Rotation Compensation

[0073] Using the previous round of cumulative frequency offset estimates Construct a complex exponential twitch factor directly from the original autocorrelation sequence stored in step S2. Rotation compensation is performed in the autocorrelation domain to obtain the compensated autocorrelation sequence for the current round. Its mathematical expression is:

[0074]

[0075] in: This represents the cumulative frequency offset estimate (Hz) obtained from the previous iteration. Indicates the symbol period (s); Represents the complex exponential twitch factor, whose phase shift is determined solely by... Symbol period and step index The product determines the product.

[0076] It is particularly important to emphasize that this rotation compensation acts directly on the stored original autocorrelation sequence, and is completely decoupled from the sampling point index k of the original received signal. Throughout the entire iteration process, the system does not need to re-access or process the time-domain signal. or This avoids the huge computational overhead caused by repeated phase rotation of time-domain signals in traditional methods.

[0077] S43. Residual Extraction and Overlay

[0078] Based on compensated autocorrelation sequence Phase information is used to estimate the current residual frequency offset. Specifically, the compensated autocorrelation values ​​corresponding to each step size are summed, their argument is taken, and then converted into frequency offset values ​​through coefficient relationships:

[0079]

[0080] in: Indicates from arrive The sum of all compensated autocorrelation sequence elements; — Operations to obtain the argument (phase) of a complex number; Represents the normalization coefficient, determined by the current step size. and symbol period A joint decision.

[0081] Then, update the cumulative frequency offset estimate. The current residual frequency offset is added to the cumulative value from the previous round:

[0082]

[0083] S44, Dynamic Termination Judgment

[0084] To avoid iterative divergence in low signal-to-noise ratio environments and further reduce computational overhead, this invention can add a dynamic termination determination step after each update of the cumulative frequency offset estimate. That is, calculating the absolute value of the current residual frequency offset estimate. If this value is less than the preset convergence threshold If so, the iteration will terminate early, and the current iteration will be reset. Output as the final cumulative frequency offset estimate. Convergence threshold. The phase deviation tolerance can be flexibly set according to the target modulation method. For example, in this embodiment, it can be set to... .

[0085] S45. Iteration Termination Determination

[0086] If dynamic termination is not triggered, continue to check the current step size. Has the preset maximum step size been reached? .like If the condition is met, the iteration terminates and the final cumulative frequency offset estimate is output; otherwise, return to step S41 to continue the next iteration. In this embodiment, when... The iteration ends after the value is multiplied by 1 and eventually reaches 50.

[0087] S5. Analytical solution of joint parameters

[0088] After the iteration terminates, the final cumulative frequency offset estimate is used. Demodulation of intermediate signal Frequency offset compensation is performed to obtain the frequency offset corrected signal. Subsequently, based on the maximum likelihood criterion, analytical calculations are performed on the compensated signal to directly obtain the initial phase estimate. Its analytical calculation formula is as follows:

[0089]

[0090] in: This represents the final total frequency offset estimate after the iteration terminates; This represents the demodulated signal after frequency offset compensation; The argument of the summation is the maximum likelihood estimate of the initial phase.

[0091] This method obtains the phase estimate directly through a single analytical operation, completely avoiding the complex feedback structure and convergence process of traditional phase-locked loops.

[0092] S6, Joint Correction Output

[0093] Finally, the total frequency offset estimate obtained in steps S4 and S5 is used. and initial phase estimate For the original received signal sequence Perform unified compensation and output synchronized signals. :

[0094]

[0095] At this point, the joint synchronization of carrier frequency and phase was completed.

[0096] Based on the above technical solution, this embodiment provides the following specific simulation case:

[0097] In this embodiment, for the 256-APSK system, with a pilot length L=100 and a minimum operating signal-to-noise ratio threshold of 20 dB, the theoretical maximum growth factor is calculated to be approximately 4.27 to effectively avoid estimation failure caused by phase ambiguity. To balance convergence speed and hardware implementation simplicity, this embodiment uses a growth factor... Set to 2 to form a sequence of related step sizes for rule-based doubling.

[0098] Figures 2 to 5 The simulation demonstrates the effectiveness of this invention in restoring the received constellation diagram at different iteration stages. The simulation parameters are: modulation scheme 256APSK, pilot length L=100, maximum correlation step size M=50, normalized frequency offset 0.5, phase offset 8°, and signal-to-noise ratio 46 dB. Figure 2 The diagram shows obvious divergence and rotational distortion before synchronization; Figure 3 The constellation is shown after the first iteration of compensation, indicating that it has begun to converge. Figure 4 The constellation represents the intermediate iteration stage, and its structure continues to recover. Figure 5 After the iteration was completed, the receiving constellation had basically recovered to its ideal distribution state. This indicates that the method of the present invention can effectively suppress the effects of carrier synchronization loss under conditions of large dynamic frequency offset and phase shift.

[0099] Figure 6The figure shows the mean square error (MSE) curves for frequency estimation compared to traditional algorithms. The simulation parameters are as follows: modulation scheme 256APSK, channel additive white Gaussian noise, pilot length L=100, maximum correlation step size M=50, signal-to-noise ratio 35 dB, and normalized frequency offset range [-0.5, 0.5]. Comparison algorithms include the Kay algorithm, Fitz algorithm, M&M algorithm, and L&R algorithms with different step lengths. As can be seen from the figure, traditional algorithms make a significant trade-off between estimation accuracy and acquisition range, while the method of this invention maintains a low MSE across the entire normalized frequency offset range, indicating that the method of this invention can balance a large acquisition range and high estimation accuracy.

[0100] Figure 7 The figure shows the bit error rate (BER) curve of the method of this invention. The simulation parameters are set as follows: modulation scheme is 256APSK, channel is additive white Gaussian noise, pilot length L=100, maximum correlation step size M=50, normalized frequency offset is 0.5, and signal-to-noise ratio range is 20–60 dB. As can be seen from the figure, with the increase of the number of iterations, the BER gradually approaches the performance curve under ideal synchronization conditions, indicating that the method of this invention has good robustness and application value under high-order modulation and large dynamic frequency offset conditions.

[0101] This invention provides a quantitative comparative analysis of the number of complex multipliers consumed during the iterative process. The simulation parameters for this comparative experiment were set as follows: pilot length L = 100, maximum correlation step size M = 50, and growth factor... =2. In traditional time-domain repetitive compensation schemes, since a full time-domain rotation of the sequence of length L is required in each iteration, the computational cost increases exponentially with the number of iterations, with a total complex multiplication cost of approximately 26,775 operations. In contrast, this invention performs only a one-time autocorrelation pre-computation before each iteration and stores the result in a memory of size M; in subsequent iterations, this invention directly performs rotation compensation on the stored M points in the autocorrelation domain. Under the same parameter conditions, the total complex multiplication cost of this invention is only 3,838 operations. Quantitative comparison shows that the multiplier consumption of this invention is significantly reduced, greatly optimizing the hardware implementation efficiency.

[0102] This invention further reduces hardware overhead through optimization of storage and computation logic. In terms of storage, the system only needs to allocate a complex memory of size M to cache the original autocorrelation sequence. Its capacity is determined solely by the maximum correlation step size M, far lower than the resource requirements for storing the entire time-domain signal. In terms of computation, the twitch factor... A lookup table (LUT) approach is used. By leveraging the symmetry of sine and cosine waveforms, a simplified scheme is employed that stores only 1 / 4 of the cycle's values. Combined with coordinate transformation, the full-cycle factor can be obtained. This scheme significantly reduces the footprint of FPGA logic units without sacrificing estimation accuracy, enhancing the algorithm's hardware adaptability in high-dynamic-range scenarios.

[0103] Understandably, this invention, by introducing an iterative variable step-size mechanism, can balance acquisition range and estimation accuracy over a large frequency offset range. Simultaneously, by performing frequency offset compensation in the autocorrelation domain and combining it with the maximum likelihood criterion to analytically solve for phase parameters, it can reduce the complexity of iterative implementation and improve the synchronization performance and demodulation reliability of high-order modulation signals in scenarios with large dynamic frequency offsets. In the accompanying drawings, IVS-JFPE refers to the iterative variable step-size joint frequency offset phase estimation method proposed in this invention.

[0104] Table 1 compares the essential differences between autocorrelation domain compensation and traditional time-domain compensation.

[0105]

[0106] Table 2 is a comparison table of hardware overhead.

[0107]

[0108] As shown in Table 2, the parameter calculations are based on the pilot length. Maximum correlation step size Iterative growth factor .

[0109] Regarding the computational complexity analysis of complex multiplication overhead, traditional methods must perform complex multiplication on numbers of length in each iteration. The time-domain sequence undergoes a full phase rotation calculation, and the correlation is recalculated. The total complex multiplication cost is approximately [missing information]. Under the above parameters, the total overhead of complex multiplication reaches 26,775 times after iterative accumulation. The present invention shifts the computational focus to the preprocessing stage, performing the multiplication only once during the initialization phase. Pre-calculation of autocorrelation of scale, subsequent All iterations are in length of Point-to-point complex multiplication is performed within the feature domain. The total complexity multiplication cost is reduced to... In this embodiment, the total computational cost is only 3838 times, which reduces the computational load by approximately 85.7% compared to the traditional approach.

[0110] Regarding logical resources and bandwidth in storage resource usage analysis, storage depth optimization: traditional iterative methods require real-time caching or frequent retrieval over a long period of time. The original sampling sequence is used for rotation compensation. However, this invention only requires allocating a depth of... Complex memory is used to cache static raw autocorrelation sequences. Due to the fact that M« (as in this example) Only (half of the original amount, and even less in high-order applications), by utilizing the conjugate symmetry of autocorrelation sequences, storage requirements can be further halved, and storage resource usage can be significantly reduced.

[0111] Regarding memory access bandwidth and real-time performance, since the iteration process is completely independent of the original signal stream, the system bus does not need to repeatedly read the original data during iteration, greatly alleviating the memory access bandwidth pressure on the FPGA / DSP. The 1 / 4-cycle symmetric phase factor scheme implemented with a lookup table (LUT) further reduces the footprint of the logic unit (LE / ALM), effectively improving processing efficiency in high-sampling-rate scenarios such as hypersonic vehicles.

[0112] In the high-dynamic application scenarios of this invention (such as hypersonic vehicle communication), due to the extremely large relative acceleration between the receiver and the satellite, the received signal not only exhibits a constant Doppler shift but also a significant frequency drift rate. The variable step-size iterative mechanism employed in this invention, in dynamic environments with rapid Doppler shift (frequency acceleration), possesses a faster acquisition response speed than fixed step-size algorithms, demonstrating a significant advantage in dealing with such non-stationary frequency offsets.

[0113] Dynamic response capture: In the initial stage of iteration, utilize a small correlation step size. It can quickly lock the total frequency offset over a wide range, including frequency acceleration, effectively preventing the phase slip phenomenon that traditional long step size algorithms are prone to when the frequency drifts rapidly.

[0114] Residual bias suppression: increases with iteration step size by a growth factor As the frequency offset is increased progressively, the algorithm's resolution of frequency offset improves linearly. Since each iteration accumulates and compensates for the residual from the previous iteration in the autocorrelation domain, this incremental correction logic can track the phase accumulation changes caused by frequency acceleration in real time, effectively decomposing and absorbing the influence of first-order Doppler drift into the residual frequency offset update amount at each iteration. middle.

[0115] Latency Advantage: Thanks to the low computational latency brought about by autocorrelation domain compensation (more than 85.7% lower than the traditional time-domain method), the algorithm can complete the synchronous calculation of single-frame pilots at an extremely high refresh rate. This near real-time processing capability greatly compresses the time window from sampling to compensation, reducing the risk of frequency acceleration divergence caused by processing latency from an architectural perspective, and ensuring that the system still has extremely high synchronization robustness under high-order modulation.

[0116] Example 2

[0117] Based on the same inventive concept, this embodiment also provides an iterative variable step-size carrier synchronization device based on autocorrelation domain compensation, the device comprising:

[0118] The demodulation module is used to acquire the discrete baseband received signal sequence and the corresponding known pilot symbol sequence, and construct the demodulation intermediate signal by multiplying their conjugates. ;

[0119] The autocorrelation pre-computation module is used for... Based on the maximum correlation step size Calculate the original autocorrelation sequence in one step And store;

[0120] The parameter initialization module is used to set the initial correlation step size. growth factors And the iteration termination condition, and let the cumulative frequency offset estimate be... 0;

[0121] The iterative frequency offset estimation module includes: a step size update unit, which executes... Step size update; autocorrelation domain rotation compensation unit, using the previous round of cumulative frequency offset estimate to construct rotation factor pair Perform autocorrelation domain rotation to generate Residual estimation and update unit, based on The phase information is used to estimate the residual frequency offset and update the cumulative frequency offset estimate;

[0122] The phase analysis module compensates for the target signal using the final frequency offset estimate after the iteration terminates, and obtains the phase estimate analytically based on the maximum likelihood criterion. ;

[0123] The joint correction module uses the total frequency offset estimate and the initial phase estimate to uniformly compensate the received signal and outputs the synchronized signal.

[0124] The specific implementation process of each module and unit is consistent with the steps described in the above method embodiments, and therefore will not be repeated. This device can be implemented based on hardware platforms such as FPGA and DSP. The rotation factor generation can use a 1 / 4 periodic symmetry lookup table to reduce the occupation of logic resources, and the autocorrelation sequence memory can further compress the storage depth by utilizing the conjugate symmetry characteristics.

[0125] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0126] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. An iterative variable step-size carrier synchronization method based on autocorrelation domain compensation, characterized in that, Includes the following steps: Step 1: Obtain the discrete baseband received signal sequence and the corresponding known pilot symbol sequence. Modulate the intermediate signal by constructing the received signal sequence and the pilot symbol sequence through conjugate multiplication. Step 2: Based on the demodulated intermediate signal, perform a one-time autocorrelation operation according to the preset maximum correlation step size M to obtain and store the original autocorrelation sequence; Step 3: Set the initial correlation step size, growth factor and iteration termination condition, and initialize the cumulative frequency offset estimate to zero; Step 4: Calculate the frequency offset estimate based on the variable step size iteration; Step 4, the iterative frequency offset estimation method, includes the following sub-steps: Step 4-1: Determine the relevant step size of the current round based on the growth factor and the relevant step size of the previous iteration, and ensure that the relevant step size of the current round does not exceed the maximum relevant step size; Step 4-2: Construct a complex exponential rotation factor using the cumulative frequency offset estimate obtained in the previous iteration, and perform phase rotation on the stored original autocorrelation sequence to obtain the compensated autocorrelation sequence for the current round. The multiplication operation is performed directly in the autocorrelation domain, and the received signal sequence is not revisited during the iteration process. In step 4-2, the step of constructing the complex exponential twisting factor includes: the phase offset of the twisting factor is determined by the product of the cumulative frequency offset estimate of the previous iteration, the symbol period, and the relevant step size index m, so that the twisting factor is independent of the index of the original time sampling point. Step 4-3: Estimate the current residual frequency offset based on the phase information of the compensated autocorrelation sequence; Step 4-4: Add the current residual frequency offset to the previous round's cumulative frequency offset estimate to update the cumulative frequency offset estimate; Step 5: After the iteration termination condition is met, the target signal is compensated for frequency offset using the final cumulative frequency offset estimate, and the compensated signal is analyzed based on the maximum likelihood criterion to obtain the initial phase estimate. Step 6: Using the final accumulated frequency offset estimate and the initial phase estimate, perform unified frequency and phase compensation on the received signal sequence and output the synchronized signal.

2. The method according to claim 1, characterized in that, In step 2, when storing the original autocorrelation sequence, the conjugate symmetry of the autocorrelation sequence is utilized to store only the sequence elements corresponding to the partial indices where m takes values ​​from 1 to no more than M / 2. During the iteration process, when an element corresponding to an index greater than M / 2 is needed, it is reconstructed in real time by taking the conjugate operation on the element of the corresponding conjugate index that has been stored.

3. The method according to claim 1, characterized in that, In step 4-3, the step of estimating the current residual frequency offset based on the phase information of the compensated autocorrelation sequence includes: calculating the argument of the sum of all elements from m=1 to the current round correlation step length in the compensated autocorrelation sequence, and dividing the argument by the product of π and the current round correlation step length plus 1 and the symbol period to obtain the estimated value of the current residual frequency offset.

4. The method according to claim 1, characterized in that, In step 3, the growth factor is set to be greater than 1 and not exceed an upper limit value, which is determined by the signal-to-noise ratio, the square root of the current relevant step size, and a coefficient related to the standard deviation of the frequency offset estimation.

5. The method according to claim 1, characterized in that, In step 4, after updating the cumulative frequency offset estimate in each iteration, a dynamic termination determination step is also included: calculating the absolute value of the current residual frequency offset estimate; if the absolute value is less than the preset convergence threshold, the iteration is terminated in advance and the current cumulative frequency offset estimate is output as the final cumulative frequency offset estimate.

6. The method according to claim 5, characterized in that, The convergence threshold is set according to the phase deviation tolerance of the target modulation scheme.

7. The method according to claim 1, characterized in that, The iteration termination condition is that the correlation step size of the current round is equal to the maximum correlation step size.

8. An iterative variable step-size carrier synchronization device based on autocorrelation domain compensation for implementing the method described in any one of claims 1-7, characterized in that, include: The demodulation module is used to acquire the discrete baseband received signal sequence and the corresponding known pilot symbol sequence, and to construct the demodulation intermediate signal by multiplying the received signal sequence with the conjugate of the pilot symbol sequence. The autocorrelation pre-calculation module is used to perform a one-time autocorrelation operation based on the demodulated intermediate signal according to a preset maximum correlation step size M, to obtain and store the original autocorrelation sequence, wherein the elements of the original autocorrelation sequence correspond to each correlation step size index m from 1 to M. The parameter initialization module is used to set the initial correlation step size, growth factor and iteration termination condition, and initialize the cumulative frequency offset estimate to zero. The iterative frequency offset estimation module is used to perform multiple iterations, including: The step size update unit is used to determine the relevant step size of the current iteration based on the growth factor and the relevant step size of the previous iteration, and to ensure that the relevant step size does not exceed the maximum relevant step size. The autocorrelation domain rotation compensation unit is used to construct a complex exponential rotation factor using the cumulative frequency offset estimate obtained in the previous iteration, and multiply the elements corresponding to each correlation step size index m in the stored original autocorrelation sequence by the rotation factor to obtain the compensated autocorrelation sequence of the current round. The multiplication operation is performed directly in the autocorrelation domain, and the received signal sequence or the demodulation intermediate signal is not revisited during the iteration process. The residual estimation and update unit is used to estimate the current residual frequency offset based on the phase information of the compensated autocorrelation sequence, and add the current residual frequency offset to the previous round of cumulative frequency offset estimate to update the cumulative frequency offset estimate. The phase analysis module is used to compensate the target signal for frequency offset using the final accumulated frequency offset estimate after the iteration termination condition is met, and to perform analytical calculations on the compensated signal based on the maximum likelihood criterion to obtain the initial phase estimate. The joint correction module is used to perform unified frequency and phase compensation on the received signal sequence using the final cumulative frequency offset estimate and the initial phase estimate, and output the synchronized signal.

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