An embedded half-bridge cell
By placing the power semiconductor chip on two planes and embedding a DC-Link capacitor in the half-bridge unit, the problems of low power density and poor heat dissipation in the prior art are solved by utilizing the interlayer structure and electrical and thermal conductivity, thereby achieving higher circuit performance and thermal management efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CRRC ZHUZHOU ELECTRIC LOCOMOTIVE RESEARCH INSTITUTE CO LTD
- Filing Date
- 2026-04-27
- Publication Date
- 2026-07-17
AI Technical Summary
The large size of the DC-Link capacitor in the existing half-bridge unit results in low power density. The power semiconductor chip located on a single plane leads to large AC line inductance, large temperature difference, high heat loss and poor heat dissipation.
By employing an interlayer structure, the power semiconductor chip is placed on two planes, and the DC-Link capacitor is embedded inside the half-bridge unit. By utilizing the alternating stacking and vertical layout of the DC positive and negative conductive parts, a large capacitor, a small inductor, and a large heat capacity are constructed, thereby improving the conductivity and thermal conductivity.
It significantly improves the power density of the half-bridge unit, reduces inductance and temperature difference, enhances heat dissipation capability, and eliminates contact thermal resistance issues.
Smart Images

Figure CN122421818A_ABST