MEMS-based high-sensitivity super-wideband uncooled infrared detector and preparation method thereof

Abstract

A MEMS-based high-sensitivity super-wide-spectrum uncooled infrared detector and a preparation method thereof, the high-sensitivity super-wide-spectrum uncooled infrared detector comprising: a temperature-sensitive phase change material layer configured to absorb infrared light to realize phase change; a micro-nano heater located below the temperature-sensitive phase change material layer and supporting the temperature-sensitive phase change material layer, configured to provide heat so that the temperature-sensitive phase change material layer is at a phase change critical temperature; and an infrared enhanced absorption layer arranged above the temperature-sensitive phase change material layer and configured to increase the spectral absorption width of infrared light.

Description

Technical Field

[0001] This disclosure relates to the field of infrared detection sensors, and more specifically, to a high-sensitivity ultrawideband uncooled infrared detector based on MEMS and its fabrication method. Background Technology

[0002] Uncooled infrared detection technology is a technology that does not require a cooling system to sense infrared radiation output, and it can be widely used in many fields such as national defense, aerospace, medicine, and production monitoring. Currently, commercial microbolometers or infrared detectors suffer from core bottlenecks in practical applications, such as narrow detection bands and low sensitivity, which limit their large-scale adoption in fields such as security monitoring, industrial temperature measurement, and medical diagnosis. Summary of the Invention

[0003] This disclosure provides a high-sensitivity ultrawideband uncooled infrared detector based on MEMS, the high-sensitivity ultrawideband uncooled infrared detector comprising:

[0004] Thermosensitive phase change material layer, configured to absorb infrared light to achieve phase change;

[0005] A micro / nano heater, located below and supporting the temperature-sensitive phase change material layer, is configured to provide heat to keep the temperature-sensitive phase change material layer at its critical phase change temperature; and

[0006] An infrared enhancement absorption layer is disposed above the temperature-sensitive phase change material layer to increase the spectral absorption width of infrared light.

[0007] In some embodiments, the high-sensitivity ultrawideband uncooled infrared detector further includes:

[0008] Substrate with a hollow region;

[0009] Electrodes are disposed on the substrate and connected to the micro / nano heater via conductive beams, such that the stacked micro / nano heater, the temperature-sensitive phase change material layer, and the infrared enhancement absorption layer are suspended in the hollow region.

[0010] In some embodiments, the micro / nano heater includes a polycrystalline silicon resistance wire, the electrode includes a first electrode and a second electrode, the conductive beam includes a first conductive beam and a second conductive beam, the first electrode is electrically connected to a first end of the polycrystalline silicon resistance wire through the first conductive beam, and the second electrode is electrically connected to a second end of the polycrystalline silicon resistance wire through the second conductive beam, wherein the first electrode and the second electrode are respectively configured as positive and negative terminals connected to an external voltage source.

[0011] In some embodiments, the electrode includes a third electrode and a fourth electrode, the conductive beam includes a third conductive beam and a fourth conductive beam, the third electrode is electrically connected to a first end of the temperature-sensitive phase change material layer through the third conductive beam, and the fourth electrode is electrically connected to a second end of the temperature-sensitive phase change material layer through the fourth conductive beam. The third electrode and the fourth electrode are respectively configured to monitor the resistance change of the temperature-sensitive phase change material layer.

[0012] In some embodiments, the temperature-sensitive phase change material layer includes a vanadium dioxide film layer with a thickness of 180~220 nm.

[0013] In some embodiments, the infrared enhancement absorption layer includes a metasurface made of gold, comprising an array of monolithic structures, including cross structures, cylindrical structures, and square column structures, wherein the characteristic dimensions of the monolithic structures are obtained by parametrically scanning the absorption peaks of infrared radiation.

[0014] This disclosure provides a method for fabricating a high-sensitivity ultrawideband uncooled infrared detector based on MEMS, the method comprising the following steps:

[0015] Fabrication of micro / nano heaters;

[0016] A temperature-sensitive phase change material layer is fabricated on the micro / nano heater; and

[0017] An infrared enhancement absorption layer is prepared on the temperature-sensitive phase change material layer.

[0018] In some embodiments, the fabrication of the micro / nano heater includes the following steps:

[0019] Resistance wires for micro / nano heaters are fabricated on SOI substrates;

[0020] Prepare a conductive beam to connect the resistance wire;

[0021] Performing deep silicon etching suspends the micro / nano heater from the conductive beam.

[0022] In some embodiments, fabricating a temperature-sensitive phase change material layer on the micro / nano heater includes the following steps:

[0023] Photoresist is applied to expose the micro / nano heater area;

[0024] Vanadium dioxide thin films were deposited using reactive magnetron sputtering.

[0025] Remove the photoresist and anneal at high temperature.

[0026] In some embodiments, the preparation of an infrared enhancement absorption layer on the temperature-sensitive phase change material layer includes the following steps:

[0027] Apply photoresist to expose the infrared enhancement absorption layer area;

[0028] Vacuum evaporation of metal thin films;

[0029] Patterning is performed on the metal thin film.

[0030] The above-described solutions in this disclosure can have the following beneficial effects:

[0031] This disclosure discloses a highly sensitive, ultra-wideband uncooled infrared detector designed and fabricated using MEMS micro / nano structures combined with temperature-sensitive phase change materials and metasurface manipulation. The high temperature coefficient of resistance (TCR) generated during the phase transition of the temperature-sensitive phase change material enhances detection sensitivity. Through MEMS technology, the temperature-sensitive phase change material layer is combined with a micro / nano heater with a microbridge structure, introducing electrothermal modulation of the phase transition process. Furthermore, an optical metasurface is used to incorporate localized surface plasmon resonance (LSPR)-based absorption enhancement technology, enabling the detector to achieve spectral broadening and perfect absorption of the incident signal. This results in a novel uncooled infrared detector with high sensitivity, wide spectral response, and high integration. Attached Figure Description

[0032] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. In the drawings:

[0033] Figure 1 A schematic diagram of the structure of a MEMS-based high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure;

[0034] Figure 2 for Figure 1 A schematic diagram of a partial cross-sectional structure of a high-sensitivity ultrawideband uncooled infrared detector;

[0035] Figure 3 for Figure 1 A top view of the structure of a medium-to-high sensitivity ultrawideband uncooled infrared detector;

[0036] Figure 4 This is a schematic diagram of the structure of a metasurface provided in some embodiments of this disclosure;

[0037] Figure 5 A flowchart illustrating a method for fabricating a high-sensitivity ultrawideband uncooled infrared detector based on MEMS, as provided in some embodiments of this disclosure;

[0038] Figure 6 for Figure 5 Detailed flowchart of step S100;

[0039] Figure 7 This is a schematic diagram of the SOI substrate used in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure.

[0040] Figure 8 This is a schematic diagram of the polycrystalline silicon resistance wire forming a micro / nano heater in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure.

[0041] Figure 9 This is a schematic diagram of the structure of the isolation layer formed in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure;

[0042] Figure 10 This is a schematic diagram of the structure forming the conductive beam region pattern in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure;

[0043] Figure 11 This is a schematic diagram of the structure after the metal electrode film is formed in the fabrication process of the high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure;

[0044] Figure 12 This is a schematic diagram illustrating the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure, in which deep silicon etching is performed.

[0045] Figure 13 This is a schematic diagram of the structure release process in the fabrication flow of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure;

[0046] Figure 14 for Figure 5 The detailed flowchart of step S200;

[0047] Figure 15 This is a schematic diagram of the structure of the thermosensitive phase change material layer formed in the fabrication process of the high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure;

[0048] Figure 16 for Figure 5 The detailed flowchart of step S300;

[0049] Figure 17 This is a schematic diagram of the structure of the infrared enhancement absorption layer formed in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this disclosure clearer, the disclosure will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0051] The terminology used in the embodiments of this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure. The singular forms “a,” “the,” and “the” as used in the embodiments of this disclosure and the appended claims are also intended to include the plural forms, and “multiple” generally includes at least two unless the context clearly indicates otherwise.

[0052] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0053] It should be understood that although the terms first, second, third, etc. may be used to describe the embodiments in this disclosure, it should not be limited to these terms.

[0054] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or device. Without further limitation, an element defined by the phrase "comprising one" does not exclude the presence of other identical elements in the article or device that includes said element.

[0055] The following is a brief introduction to the inventive concept of this disclosure:

[0056] Vanadium dioxide (VO2) is a phase transition material with significant metal-insulator phase transition characteristics, and its critical temperature is approximately 68°C. Below the critical temperature, vanadium dioxide exhibits a distorted rutile (monoclinic) structure, which is an insulating state with high infrared transmittance. Above the critical temperature, it transforms into a rutile (tetragonal) structure, becoming metallic with high infrared reflectivity, accompanied by a sharp drop in resistivity of 3-5 orders of magnitude and abrupt changes in optical properties. Vanadium dioxide has a fast phase transition response, and its critical temperature can be tuned by doping with specific elements, making it important for applications in smart windows, infrared stealth, optical switches, and thermal management devices. Current research focuses on reducing phase transition hysteresis, improving cycle stability, and exploring its potential in low-power electronic devices. Its unique electronic correlation effect also makes it a research hotspot in strongly correlated physics.

[0057] Metasurfaces are two-dimensional planar materials composed of subwavelength-scale artificial structural units. Through precisely designed structures, such as periodically arranged cylinders, toroidal cylinders, and three-dimensional crosses, they can flexibly control the amplitude, phase, and polarization of electromagnetic waves. Compared to traditional three-dimensional metamaterials, metasurfaces offer advantages such as ultrathinness, low loss, and ease of integration. Their core principle is to achieve complex optical functions such as anomalous refraction, negative refraction, focusing, or vortex beam generation within a subwavelength thickness through the localized resonance effect of structural units. Applications include superlenses, holographic imaging, structured color displays, polarization converters, and quantum optical manipulation.

[0058] MEMS (Micro-Electro-Mechanical Systems) is a technology that integrates mechanical structures, sensors, actuators, and electronic circuits onto a chip at the micrometer scale. It utilizes semiconductor processes such as photolithography, etching, and deposition to mass-produce miniature devices that combine mechanical motion and electrical signal processing capabilities.

[0059] Currently, commercial microbolometers and infrared detectors face the following technical bottlenecks in practical applications:

[0060] With a narrow detection band, traditional devices often rely on the thermosensitive properties of single materials such as vanadium oxide and amorphous silicon, which can only respond to a single band of mid-wave or long-wave infrared, and cannot cover a wide spectral range from mid-infrared to far-infrared. This makes it difficult to meet the detection needs of multiple scenarios, such as simultaneously identifying target thermal radiation and near-infrared signals.

[0061] Due to low sensitivity and limitations such as high thermal conductivity loss of the substrate and poor phase transition stability of the thermosensitive material, the temperature coefficient (TCR) of commercial devices is generally below -2% / K, and the noise equivalent temperature difference (NETD) is mostly in the range of 50~100mK, making it difficult to accurately capture weak infrared signals such as the low thermal radiation of distant targets.

[0062] To address the aforementioned issues, this disclosure provides a high-sensitivity, ultra-wideband uncooled infrared detector based on MEMS. The high-sensitivity, ultra-wideband uncooled infrared detector includes: a temperature-sensitive phase change material layer configured to absorb infrared light to achieve a phase transition; a micro / nano heater located below and supporting the temperature-sensitive phase change material layer, configured to provide heat to keep the temperature-sensitive phase change material layer at its critical phase transition temperature; and an infrared enhancement absorption layer disposed above the temperature-sensitive phase change material layer to increase the spectral absorption width of infrared light.

[0063] This disclosure utilizes the high temperature resistivity (TCR) value generated during the phase transition of temperature-sensitive phase change materials to improve detection sensitivity. Through MEMS technology, the temperature-sensitive phase change material layer is combined with a micro / nano heater with a microbridge structure, introducing electrothermal modulation of the phase transition process. Furthermore, through optical metasurfaces, a localized surface plasmon resonance (LSPR)-based enhanced absorption technique is employed, enabling the detector to achieve wavelength broadening and perfect absorption of the incident signal. This results in a novel uncooled infrared detector with high sensitivity, broad spectral response, and high integration.

[0064] The optional embodiments of this disclosure are described in detail below with reference to the accompanying drawings.

[0065] Figure 1 This is a schematic diagram of the structure of a MEMS-based high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. Figure 2 for Figure 1 A schematic diagram of a partial cross-sectional structure of a high-sensitivity ultrawideband uncooled infrared detector, i.e. Figure 1 Schematic diagram of the cross-sectional structure of the central circular region. Figure 3 for Figure 1 A top-view schematic diagram of the structure of a medium-to-high sensitivity ultrawideband uncooled infrared detector.

[0066] like Figures 1 to 3 As shown, some embodiments of this disclosure provide a MEMS-based high-sensitivity ultrawideband uncooled infrared detector 100, which includes a temperature-sensitive phase change material layer 10, a micro / nano heater 20, and an infrared enhancement absorption layer 30.

[0067] The temperature-sensitive phase change material layer 10 is configured to absorb infrared light to achieve a phase change. The temperature-sensitive phase change material layer 10 is, for example, a vanadium dioxide thin film, a phase change material. It utilizes the reversible phase change characteristic of vanadium dioxide at a critical temperature of 68°C to achieve infrared detection. Specifically, below the critical temperature, vanadium dioxide exhibits a distorted rutile (monoclinic) structure, which is an insulating state and has high infrared transmittance. Above the critical temperature, it transforms into a rutile (tetragonal) structure, becomes metallic, and has high infrared reflectivity. This is accompanied by a sharp drop in resistivity of 3-5 orders of magnitude and a sudden change in optical properties. Infrared detection is achieved by utilizing the extremely high resistance change during its phase change process. Through the infrared thermal effect of incident light, radiative heat is generated on the vanadium dioxide thin film, which leads to a phase change in vanadium dioxide, resulting in a huge change in the resistivity of the material and generating a drastically changing measurable electrical signal.

[0068] A micro / nano heater 20 is located below and supports the temperature-sensitive phase change material layer 10, configured to provide heat to keep the temperature-sensitive phase change material layer 10 at its critical phase change temperature, for example, 68°C. The micro / nano heater 20 can be powered externally, enabling precise control of its heating temperature. In some embodiments, for every 0.1 kJ increase in the voltage applied to the micro / nano heater 20, its temperature rises by 1°C. A Joule heating source, generated by an externally voltage-controlled current, is introduced through the micro / nano heater 20 and acts on the temperature-sensitive phase change material layer 10. The superposition of the Joule heat provided by the micro / nano heater 20 and the radiative heat generated by the infrared thermal effect of the incident light causes a phase change in the temperature-sensitive phase change material layer 10, thereby improving its infrared detection sensitivity.

[0069] An infrared enhancement absorption layer 30 is disposed above the temperature-sensitive phase change material layer 10 to increase the spectral absorption width of infrared light. The infrared enhancement absorption layer 30, for example, is a metasurface, a subwavelength two-dimensional structure, which can enhance the absorption rate of the temperature-sensitive phase change material layer 10 for incident light in the 3 to 20 μm wavelength range. Specifically, based on surface plasmon resonance, the photothermal conversion efficiency is improved, thereby enhancing the absorption rate of incident light. Surface plasmon resonance enhanced absorption is an important optical phenomenon that mainly occurs at the interface between metal and dielectric. When incident light interacts with a metal surface, localized surface plasmon waves are excited, which propagate at the metal-dielectric interface, exhibiting a collective oscillation characteristic. When the frequency of the light matches the resonant frequency of the plasmons, resonance occurs, thereby enhancing the local electromagnetic field. This enhanced electric field can improve the light absorption of the interacting material.

[0070] The infrared uncooled detector in the above embodiments of this disclosure exhibits high measurement sensitivity and enables multi-band infrared detection across a wide spectrum. Specifically, the drastic resistance change of the pure phase change material vanadium dioxide thin film during the phase transition process results in a high temperature resistivity coefficient during the phase transition stage, thereby improving the sensitivity of infrared detection. To enhance the detector's absorption of broadband signals, a surface plasmon metasurface is introduced, which effectively enhances the sensitivity of the infrared sensor. Furthermore, a micro / nano heater fabricated using MEMS technology provides a bias temperature for detection. This avoids the adverse consequences of uneven heating caused by the several-order-of-magnitude change in resistance of vanadium dioxide during the phase transition when directly transmitting current through the vanadium dioxide thin film, which results in a sudden current change and low-resistance paths in localized areas. Therefore, the design of the micro / nano heater ensures a more uniform thermal field, which is beneficial for improving the performance of the designed device.

[0071] In some embodiments, such as Figures 1 to 3 As shown, the high-sensitivity ultrawideband uncooled infrared detector 100 also includes a substrate 40 and an electrode 50.

[0072] The substrate 40 is, for example, a cuboid structure of 600 μm × 600 μm × 5 μm and has a hollow region HA. In some embodiments, the substrate 40 is, for example, mainly composed of silicon.

[0073] Electrode 50 is disposed on the substrate 40, for example, a metal film layer, specifically gold, and is connected to the micro / nano heater 20 via a conductive beam 60, so that the stacked micro / nano heater 20, the temperature-sensitive phase change material layer 10, and the infrared enhancement absorption layer 30 are suspended in the hollow region. The stacked micro / nano heater 20, the temperature-sensitive phase change material layer 10, and the infrared enhancement absorption layer 30 constitute the core structure of the infrared uncooled detector. The core structure is, for example, circular, with a diameter of, for example, 60~100μm, specifically 80μm. The core structure is suspended in the hollow region, achieving thermal insulation from the substrate 40, reducing heat conduction to the substrate 40, avoiding heat loss due to solid-state heat transfer, improving heating efficiency, and facilitating precise temperature control of the micro / nano heater 20.

[0074] In some embodiments, such as Figures 1 to 3 As shown, the micro / nano heater 20 includes a polycrystalline silicon resistance wire. An external voltage is applied to the polycrystalline silicon resistance wire to generate Joules, thereby controlling the temperature of the micro / nano heater 20 and thus controlling the temperature of the temperature-sensitive phase change material layer 10. In some embodiments, for example, if the external voltage is increased by 0.1V, the temperature of the micro / nano heater 20 increases by 1°C.

[0075] The electrode 50 includes a first electrode 51 and a second electrode 52, and the conductive beam 60 includes a first conductive beam 61 and a second conductive beam 62. The first electrode 51 is electrically connected to the first end of the polycrystalline silicon resistance wire through the first conductive beam 61, and the second electrode 52 is electrically connected to the second end of the polycrystalline silicon resistance wire through the second conductive beam 62. The first electrode 51 and the second electrode 52 are respectively configured as positive and negative terminals connected to an external voltage source to introduce external voltage to the polycrystalline silicon resistance wire of the micro-nano heater 20.

[0076] In some embodiments, such as Figures 1 to 3 As shown, the electrode 50 includes a third electrode 53 and a fourth electrode 54, and the conductive beam 60 includes a third conductive beam 63 and a fourth conductive beam 64. The third electrode 53 is electrically connected to the first end of the temperature-sensitive phase change material layer 10 through the third conductive beam 63, and the fourth electrode 54 is electrically connected to the second end of the temperature-sensitive phase change material layer 10 through the fourth conductive beam 64. The third electrode 53 and the fourth electrode 54 are respectively configured to monitor the resistance change of the temperature-sensitive phase change material layer 10.

[0077] like Figures 1 to 3 As shown, the first electrode 51, the second electrode 52, the third electrode 53, and the fourth electrode 54 are disposed on the fixed surface of the substrate 40, electrically insulated from each other and disposed around the hollow region HA. In some embodiments, the first electrode 51, the second electrode 52, the third electrode 53, and the fourth electrode 54 are, for example, trapezoidal, with a long base side of, for example, 600 μm and a short base side of, for example, 250 μm.

[0078] In some embodiments, the conductive beam 60 includes a release window structure 65, which provides an etchant entry channel for sacrificial layer etching or wet release when a hollow region is formed by deep silicon etching in a MEMS process, thereby enabling the microstructure to be suspended.

[0079] In some embodiments, the temperature-sensitive phase change material layer 10 includes a vanadium dioxide film layer with a thickness of 180~220nm, for example, 200nm.

[0080] Figure 4 These are schematic diagrams of the temperature-sensitive phase change material layer and metasurface provided in some embodiments of this disclosure, such as... Figure 4As shown, in some embodiments, the temperature-sensitive phase change material layer 10 is located on an insulating layer, such as SiO2, which isolates the temperature-sensitive phase change material layer 10 and the micro / nano heater 20 located below it. The infrared enhancement absorption layer 30 includes a metasurface. The metasurface is made of gold and includes an array of monomer structures 31 with an arrangement period of, for example, 0.4 μm to 0.6 μm, specifically, 0.5 μm. The monomer structures include cross structures, cylindrical structures, and square column structures. The characteristic dimensions of the monomer structures are obtained by parametrically scanning their absorption peaks for infrared radiation, ultimately achieving an array structure with an average absorptivity greater than 0.85 for the mid-to-long-wave infrared band with a spectral range of 3-20 μm.

[0081] Figure 5 This is a flowchart illustrating a method for fabricating a high-sensitivity ultrawideband uncooled infrared detector based on MEMS, as provided in some embodiments of this disclosure. Some embodiments of this disclosure provide a method for fabricating a high-sensitivity ultrawideband uncooled infrared detector, such as... Figure 5 As shown, the preparation method includes the following steps:

[0082] S100: Fabrication of micro / nano heaters;

[0083] S200: Prepare a temperature-sensitive phase change material layer on the micro / nano heater;

[0084] S300: An infrared enhancement absorption layer is prepared on the temperature-sensitive phase change material layer.

[0085] Figure 6 for Figure 5 A detailed flowchart of step S100 is provided in some embodiments, such as... Figure 6 As shown, step S100: The fabrication of the micro / nano heater includes the following steps:

[0086] S110: Resistance wire for fabricating micro / nano heaters on an SOI substrate;

[0087] S120: Prepare a conductive beam connecting the resistance wire;

[0088] S130: Perform deep silicon etching to suspend the micro / nano heater from the conductive beam. (Subsequent...) Figures 7 to 13 as well as Figure 15 and Figure 17 The cross-sectional structural diagram corresponds to Figure 3 Mid-section line L.

[0089] Figure 7 This is a schematic diagram of the SOI substrate used in the fabrication process of the high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. Figure 8This is a schematic diagram of the polycrystalline silicon resistance wire forming a micro / nano heater in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure.

[0090] In step S110, combined Figure 7 and Figure 8 As shown, a silicon-on-insulator (SOI) substrate 40 with a special structure is used. Its specific layered structure parameters are as follows: The top layer 41 is a polycrystalline silicon thin film with a precisely controlled thickness of 1 μm to ensure good electrical conductivity and heating performance. The middle insulating layer 42 is a composite structure of silicon nitride (SiN) and silicon oxide (SiO2), where the SiN layer has a thickness of 100~200 nm, serving to isolate moisture and improve structural stability; the SiO2 layer has a thickness of 300~500 nm, mainly providing electrical insulation. The bottom layer is a high-resistivity single-crystal silicon dielectric layer 43 with a thickness greater than 300 μm, providing structural support.

[0091] First, the SOI substrate was cleaned using the RCA standard cleaning method. The specific steps were as follows: first, the substrate was immersed in a mixed solution of H2SO4 / H2O2 / H2O with a volume ratio of 5:1:1 at 120°C for 10 minutes to remove organic contaminants; then, it was treated with a solution of NH4OH / H2O2 / H2O with a volume ratio of 1:1:5 at 80°C for 8 minutes to remove metallic impurities; finally, it was ultrasonically cleaned with 300W deionized water for 3 to 7 minutes, specifically 5 minutes, and then dried with high-purity nitrogen (99.999% purity) to ensure that the surface cleanliness of the substrate met the requirements of subsequent processes.

[0092] The first photolithography step is then performed to define the resistance wire pattern of the micro / nano heater 20: First, positive photoresist is spin-coated at 3000 r / min for 30 to 45 seconds (40 seconds is acceptable). Then, it is soft-baked on a 90°C hot plate for 60 seconds to remove solvent from the photoresist and improve film uniformity. After aligning the substrate with the resistance wire pattern mask, it is exposed in an ultraviolet lithography machine at an exposure dose of approximately 80-100 mJ / cm², transferring the resistance wire pattern from the mask to the photoresist layer. After exposure, it is hard-baked at 110°C for 90 seconds, then immersed in developer for 60 seconds to remove the photoresist from the exposed areas. Finally, it is rinsed with deionized water and dried with nitrogen to complete the first photolithography step. At this point, a photoresist pattern consistent with the resistance wire has formed on the surface of the top polycrystalline silicon film of the substrate. The polycrystalline silicon area not covered by photoresist will serve as the reference for subsequent processing.

[0093] After fabricating the photoresist mask for the resistance wire pattern, reactive ion etching (RIE) is performed to precisely transfer the pattern to a top 1μm thick polysilicon film. Inductively coupled plasma (ICP-PAP) etching is employed to achieve high anisotropy, ensuring steep sidewalls and consistent line widths with the design dimensions. A mixed gas of HBr / Cl2 / O2 is used as the primary etching gas. The active groups of Cl2 and HBr react chemically with the polysilicon to generate volatile products; simultaneously, by precisely controlling the O2 ratio, a thin passivation layer is formed on the etched sidewalls, suppressing lateral etching and thus obtaining a precise pattern contour.

[0094] After etching, residual photoresist mask is first removed by O2 plasma ashing. Then, a brief rinse is performed using dilute hydrofluoric acid solution or buffered oxide etching solution to remove etching byproducts and potentially damaged SiO2. Finally, the substrate is rinsed with deionized water and dried with nitrogen. At this point, the top layer of polysilicon on the substrate has formed a complete resistance wire structure, and the exposed SiN insulating layer area is clearly visible, preparing for subsequent possible insulating layer openings, metal lead fabrication, or other structural processing.

[0095] Figure 9 This is a schematic diagram illustrating the structure of the isolation layer formed during the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. Figure 10 This is a schematic diagram of the structure forming the conductive beam region pattern in the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. Figure 11 This is a schematic diagram of the structure after the metal electrode film is formed in the fabrication process of the high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure.

[0096] In step S120, combined Figures 9 to 11 As shown, the process is specifically divided into three steps: preparation of the isolation layer, preparation of the conductive beam region pattern, and preparation of the metal electrode film.

[0097] In the isolation layer preparation stage, a SiN thin film was first deposited using plasma-enhanced chemical vapor deposition (PECVD). The deposition parameters were as follows: reactant gases were SiH4 and NH3 (volume ratio 1:4), deposition temperature 300℃, working pressure 200Pa, RF power 150W, and film thickness controlled at approximately 150nm. Based on the film stress matching theory (using finite element simulation to ensure that the stress caused by the difference in thermal expansion coefficients between SiN and SiO2 is less than the material's fracture strength), the SiO2 film thickness was determined to be 400nm. A SiO2 thin film was then deposited using the same PECVD process, with reactant gases of SiH4 and O2 (volume ratio 1:10) and a deposition temperature of 350℃. After deposition, excess SiO2 was trimmed using chemical mechanical polishing (CMP). The polishing pressure was 3psi, the polishing pad rotation speed was 60r / min, and the polishing solution was colloidal silica with a particle size of 50nm, until the SiO2 surface smoothness reached Ra≤5nm to ensure subsequent photolithography accuracy.

[0098] During the patterning stage of the conductive beam region, a second photolithography step is performed to pattern the areas where the four conductive beams are located. The process steps are the same as the first photolithography step: spin-coating with the same type of positive photoresist and completing soft baking, exposure, hard baking, and development operations to transfer the shape of the conductive beams on the mask to the photoresist layer. At this point, except for the positions corresponding to the conductive beams, the rest of the sample surface is protected by photoresist, with only the SiO2 / SiN composite insulating layer in the conductive beam region exposed.

[0099] Anisotropic etching is then performed on the exposed conductive beam area until the polysilicon layer is exposed. Specifically, inductively coupled plasma etching (ICP) is used, with CF4 and O2 as the etching gases, in a volume ratio of, for example, 5:1. The etching power is 200W, the working pressure is 10Pa, and the etching rate is approximately 100nm / min. To ensure complete and residue-free etching of the insulating layer, a slight over-etching for 5-10 seconds is allowed. After etching, the substrate is placed on a probe stage, and a semiconductor parameter analyzer is used to measure the resistance value of the contact point between the etched conductive beam area and the polysilicon layer using a probe inserted into the probe. If the resistance value is within the range of 100-500Ω, matching the theoretical resistance of the polysilicon layer, the etching thickness is considered satisfactory. If the resistance value is much greater than this range, it indicates the presence of insulating layer residue, and further etching is required. After etching, routine operations such as resist removal, cleaning, and drying are performed.

[0100] After anisotropic etching of the conductive beam region, the process proceeds to the metal electrode film fabrication stage, specifically the deposition process between the electrode region and the conductive beam region. At this point, only the conductive beam region and the corresponding areas of the four surrounding trapezoidal electrodes are exposed on the substrate surface; the remaining areas are protected by the positive photoresist residue from the second photolithography, creating a precise "patterned masking" effect, allowing for direct metal deposition. An electron beam evaporation deposition machine is used for metal deposition, with the following specific parameter settings: Before deposition, the vacuum chamber is evacuated until the vacuum level reaches 5 × 10⁻⁶. -4 To avoid air impurities affecting film quality, a gold wire with 99.999% purity was selected as the evaporation source. The electron beam power was gradually increased to 800-1000W to prevent gold wire splattering caused by a sudden power increase. The film thickness was monitored in real time using a quartz crystal film thickness monitor in the chamber. When the thickness reached 100nm, electron beam heating was immediately stopped, completing the gold film deposition. This 100nm thick gold film can simultaneously cover the conductive beam region and the trapezoidal electrode region, forming a low-resistance conductive path. Low resistance effectively reduces current transmission loss and meets the low impedance requirements of the electrodes.

[0101] After the coating is completed, a simple preliminary electrical performance test is performed: using a probe station and semiconductor parameter analyzer, the probes are placed in contact with the four trapezoidal electrodes. The left and right electrodes, namely the first electrode 51 and the second electrode 52, correspond to the two ends of the resistance wire, and the conduction resistance between the first electrode 51 and the second electrode 52 is measured. Under normal circumstances, the conduction resistance between the first electrode 51 and the second electrode 52 should be ≤10Ω. If the resistance is too high or it is an open circuit, it indicates that there are defects such as pinholes or breaks in the coating, and the coating needs to be redone. At the same time, the initial resistance between the two electrodes of the resistance wire, namely the first electrode 51 and the second electrode 52, is quickly detected to ensure that it is consistent with the polysilicon layer resistance measured after etching, so as to avoid damage to the resistance wire structure during the coating process. In addition, the upper and lower electrodes, namely the third electrode 53 and the fourth electrode 54, are used for temperature sensing.

[0102] After passing the initial test, a photoresist stripping process is performed to remove the photoresist used for protecting the substrate surface. Specifically, the substrate is immersed in a photoresist stripping solution at 60°C for 15-20 minutes. Heating accelerates the swelling and dissolution of the photoresist while avoiding damage to the gold film at high temperatures. During this process, the stripping solution container is gently shaken every 5 minutes to ensure that any photoresist residue is completely removed from the sample surface. After immersion, the sample is ultrasonically cleaned with deionized water for 2 to 4 minutes, specifically 3 minutes at a power of 200W, to reduce the impact on the gold film. Then, it is dried with high-purity nitrogen gas (99.999% purity). Finally, the sample surface can be observed using an optical microscope to confirm that the photoresist has been completely removed, with no residual light brown adhesive layer, and that there are no issues such as detachment or scratches on the gold film electrodes and conductive beams. This completes the fabrication of the core structure of the MEMS micro / nano heater.

[0103] Figure 12 This diagram illustrates the fabrication process of a high-sensitivity, ultra-wideband uncooled infrared detector, as provided in some embodiments of this disclosure, involving deep silicon etching. Figure 13 This is a schematic diagram illustrating the structure release process in the fabrication flow of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure.

[0104] In step S130, combined Figures 12 to 13 As shown, after the metal electrode film preparation and photoresist stripping are completed, the device structure release stage is entered. The release window needs to be defined by photolithography, and then the micro-nano heater suspension structure is realized by deep silicon etching.

[0105] First, a third photolithography step is performed to define the release window. Specifically, the substrate surface is pretreated by soaking it in a 1:10 dilute hydrochloric acid (HCl) solution for 3 minutes to remove any residual oxides on the gold film surface. It is then rinsed with deionized water and dried with nitrogen. A corrosion-resistant positive photoresist is spin-coated at 2000 rpm for 40 seconds, followed by soft baking on a 95°C hot plate for 2 minutes to ensure sufficient photoresist adhesion and uniform solvent evaporation. The substrate is aligned with the "release window pattern mask," with the release window designed as an opening around the core area of ​​the micro / nano heater to prevent damage to the resistance wires and electrodes during etching. The substrate is then exposed using a UV lithography machine. Due to the thick photoresist layer, the exposure time needs to be extended to ensure sufficient exposure. After exposure, it is hard-baked at 15°C for 3 minutes to enhance the photoresist's corrosion resistance. It is then soaked in a developer solution for 2 to 4 minutes (3 minutes is acceptable) to remove the photoresist from the exposed areas, forming a "protect-expose" pattern for deep silicon etching. Finally, it is dried with nitrogen to complete the photolithography.

[0106] Then, deep silicon etching and structure release are performed. Specifically, inductively coupled plasma deep silicon etching (ICP-DRIE) technology is used to etch the bottom silicon dielectric layer of the SOI substrate. The goal is to penetrate the bottom silicon layer, separating the core region of the micro / nano heater from the substrate to form a suspended structure. The etching parameters are set as follows: SF6 and C4F8 are alternately introduced as etching gases. SF6 is used for anisotropic etching of silicon, and C4F8 is used for sidewall passivation to reduce etching damage. The SF6 flow rate is 80 sccm, the C4F8 flow rate is 40 sccm, the etching power is 300 W, the bias power is 50 W, and the working pressure is 15 Pa. The etching progress is tracked in real time by an etching depth monitoring system. When the etching has penetrated the bottom silicon layer (typically 300 μm thick, with an etching time of about 60-90 minutes) and exposed the intermediate insulating layer, the etching is stopped to avoid damaging the resistance wire by etching into the intermediate insulating layer. After etching, the core area of ​​the heater, including the resistance wire and conductive beam, is completely separated from the underlying silicon by the intermediate insulating layer, achieving thermal isolation, reducing heat conduction to the substrate, improving heating efficiency, and finally removing the resist.

[0107] Figure 14 for Figure 5 The detailed flowchart of step S200 is as follows: Figure 15 This is a schematic diagram illustrating the structure of the temperature-sensitive phase change material layer formed during the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. In some embodiments, such as... Figure 14 and Figure 15 As shown, step S200: Fabricating a temperature-sensitive phase change material layer on the micro / nano heater includes the following steps:

[0108] S210: Coating photoresist to expose the micro / nano heater area;

[0109] S220: Vanadium dioxide thin films are deposited using reactive magnetron sputtering.

[0110] S230: Remove photoresist and anneal at high temperature.

[0111] In step S210, the device with the structure released is surface-cleaned. Specifically, it is ultrasonically cleaned with isopropanol (IPA) for 2 to 5 minutes, specifically 3 minutes, to remove surface dust and residual moisture, followed by drying with high-purity nitrogen. Since VO2 is only present on the upper layer of the micro / nano heater, the remaining areas, including the conductive beams and the four electrodes, do not require coating. Therefore, these areas need to be coated with photoresist for protection.

[0112] In step S220, the device with the completed adhesive coating is placed into a magnetron sputtering coating machine, and a VO2 thin film is deposited using reactive magnetron sputtering. First, a pretreatment is performed under vacuum conditions; specifically, the vacuum chamber is first evacuated to 5 × 10⁻⁻⁻⁶. 5 Below Pa, Ar gas (99.999% purity) is then introduced for backsputter cleaning at a power of 100W for 4 to 7 minutes, specifically 5 minutes. The purpose is to remove the oxide layer and impurities in the target area of ​​the micro / nano heater to ensure film adhesion.

[0113] Then, a high-purity V target (99.95% purity) was used as the sputtering source, and the reaction gases were Ar and O2 in a volume ratio of 8:2. The flow rate was precisely adjusted by a flow controller to ensure the formation of a single-phase O2 structure. The sputtering power was set to 180W, the working pressure to 0.5Pa, and the temperature of the silicon substrate was controlled at 200℃. Preheating the substrate can reduce the internal stress of the thin film. The deposition thickness was monitored in real time by a quartz crystal film thickness gauge. When the thickness reached 200nm, the O2 gas path was first closed, and Ar gas was continued to be sputtered for 30s to form a transition layer and improve the stability of the thin film. Then, sputtering was stopped to complete the preparation of the VO2 thin film.

[0114] In step 230, due to the presence of photoresist, low-temperature photoresist removal is required to protect the VO2 film, electrodes, and conductive beams, preventing direct high-temperature photoresist removal from causing VO2 film cracking. First, the substrate is immersed in 50°C NMP stripping solution for 15 minutes to dissolve most of the photoresist on the surface. Then, it is ultrasonically cleaned with deionized water for 2 to 5 minutes, specifically 3 minutes, to thoroughly remove residual photoresist. During this process, because the electrodes and conductive beams are protected by a thick photoresist layer, no VO2 deposition occurs during the sputtering stage, requiring no additional treatment. The removed device is then placed in a tube annealing furnace and annealed in a nitrogen atmosphere: the temperature is increased to 500°C at a rate of 5°C / min and held for 2 hours to allow the VO2 film grains to grow fully and improve phase transition stability; subsequently, the temperature is reduced to room temperature at a rate of 2°C / min to slowly reduce thermal stress and prevent film cracking. After annealing, the intensity of the characteristic peaks of the VO2 thin film was detected by X-ray diffraction (XRD) to confirm its single-phase nature, and the surface roughness of the thin film was observed by atomic force microscopy (AFM) to ensure that the performance of the thin film meets the application requirements.

[0115] Figure 16 for Figure 5 The detailed flowchart of step S300 is as follows: Figure 17 This is a schematic diagram illustrating the structure of the infrared enhancement absorption layer formed during the fabrication process of a high-sensitivity ultrawideband uncooled infrared detector provided in some embodiments of this disclosure. In some embodiments, such as... Figure 16 and Figure 17 As shown, step S300: Preparing an infrared enhancement absorption layer on the temperature-sensitive phase change material layer includes the following steps:

[0116] S310: Coated with photoresist to expose the infrared enhancement absorption layer area;

[0117] S320: Vacuum evaporation of metal thin film;

[0118] S330: Performs patterning processing on metal thin films.

[0119] In step S310, a photoresist coating is applied to the VO2 region to protect it and define the deposition area. Specifically, the device surface is cleaned by ultrasonic cleaning with isopropanol (IPA) for 2 to 5 minutes, specifically 3 minutes, to remove surface dust and residual moisture, followed by drying with high-purity nitrogen. Since the artificial subwavelength two-dimensional structure exists only on the upper layer of the VO2 film, and the remaining locations contain conductive beams, none of the four electrodes require coating. Photoresist is applied to these locations for protection.

[0120] In step S320, an Au film with a thickness of 80 nm is deposited using electron beam evaporation. Specifically, the equipment is first debugged, and the deposition chamber is subjected to multi-stage vacuum evacuation until the vacuum level reaches 2 × 10⁻⁶. -4To prevent air molecules from affecting the purity and compactness of the Au film, a small amount of Ar gas is then introduced at a flow rate of 3 to 6 sccm, specifically 5 sccm. Backsputtering cleaning is then initiated to gently bombard the O2 surface, removing the oxide layer and adsorbed impurities, and improving the adhesion between the Au film and VO2. Strict control of the backsputtering power is necessary to avoid damaging the phase transition properties of the VO2 film.

[0121] Next, Au film deposition was performed. A high-purity Au block (99.999% purity) was selected as the evaporation source, and the electron beam power was gradually increased to 900-1000W to prevent Au droplet splashing caused by a sudden power increase. The deposition thickness was monitored in real time using a quartz crystal film thickness gauge. According to the metasurface design requirements, the Au film thickness was 80nm, which needed to achieve impedance matching with the VO2 film. When the thickness reached the target value, the electron beam heating was immediately turned off to complete the Au film deposition. During the deposition process, the substrate temperature needed to be kept stable at room temperature to avoid premature phase transition of VO2 due to high temperature, and the Au film deposition rate was controlled at 0.5-1nm / s to ensure a uniform film layer free of pinholes.

[0122] In step S330, resist removal and electron beam exposure photolithography patterning are performed. Specifically, the vapor-deposited device is first immersed in NMP stripping solution for 12 minutes to allow the protective photoresist outside the VO2 region to fully swell; then it is ultrasonically cleaned with deionized water for 2 minutes to completely remove residual resist residue. At this point, only the upper layer of VO2 is covered with an Au film, and there is no Au residue in the other areas, completing the initial metal layer preparation.

[0123] Then, positive electron beam photoresist is spin-coated onto the Au film surface at a spin-coating parameter of 5000 r / min for 40 s, with the thickness of the photoresist layer controlled between 100 nm and 140 nm, specifically 120 nm. Subsequently, the photoresist layer is soft-baked on a hot plate at 180 °C for 3 min to fully cure the photoresist layer and improve its etching resistance.

[0124] Next, the sample is placed in the electron beam lithography system, and the exposure pattern is imported. Exposure parameters are set: accelerating voltage 30kV, beam current 10pA, and exposure dose adjusted according to the photoresist thickness. Precise transfer of the metasurface pattern is achieved through point-by-point scanning with the electron beam. During exposure, substrate displacement needs to be corrected in real time to ensure pattern positioning accuracy ≤5nm. Development and fixing: After exposure, the sample is immersed in the developer for 90s to remove the photoresist in the exposed areas; then it is immersed in the fixer for 30s to terminate the development reaction; finally, it is rinsed with isopropanol for 1min and dried with nitrogen. At this point, a photoresist mask consistent with the metasurface pattern is formed on the Au film surface.

[0125] Finally, reactive ion beam etching (RIE) was used to etch the Au film using Ar gas at a power of 150 W and a working pressure of 0.1 Pa to 0.5 Pa, specifically 0.3 Pa. The etching rate was approximately 5 nm / min. The etching depth was monitored in real time using an optical interferometer, and etching was stopped immediately when the VO2 film surface was reached to avoid damaging the VO2 layer. Residual photoresist was then removed to complete the fabrication of the metasurface on top of the VO2 layer.

[0126] Finally, it should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems or apparatus disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0127] The above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit it. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

Claims

1. A high-sensitivity, ultrawideband uncooled infrared detector based on MEMS, characterized in that, The high-sensitivity, ultra-wideband uncooled infrared detector includes: Thermosensitive phase change material layer, configured to absorb infrared light to achieve phase change; A micro / nano heater, located below and supporting the temperature-sensitive phase change material layer, is configured to provide heat to keep the temperature-sensitive phase change material layer at its critical phase change temperature; and An infrared enhancement absorption layer is disposed above the temperature-sensitive phase change material layer to increase the spectral absorption width of infrared light, with an average absorption rate of greater than 0.85 for the mid-to-long-wave infrared band with a spectral range of 3-20μm. Substrate with a hollow region; Electrodes, disposed on the substrate, are electrically connected to the micro / nano heater and the temperature-sensitive phase change material layer via conductive beams. This allows the stacked micro / nano heater, temperature-sensitive phase change material layer, and infrared enhancement absorption layer to be suspended in the hollow region. The conductive beam includes a release window, configured to provide an etchant entry channel for sacrificial layer etching or wet release when the hollow region is formed using deep silicon etching in MEMS processes. The micro / nano heater includes a polycrystalline silicon resistance wire, the electrodes include a first electrode and a second electrode, and the conductive beam includes a first conductive beam and a second conductive beam. The first electrode is electrically connected to a first end of the polycrystalline silicon resistance wire through the first conductive beam, and the second electrode is electrically connected to a second end of the polycrystalline silicon resistance wire through the second conductive beam. The first electrode and the second electrode are respectively configured as positive and negative terminals connected to an external voltage source. The electrode includes a third electrode and a fourth electrode, and the conductive beam includes a third conductive beam and a fourth conductive beam. The third electrode is electrically connected to the first end of the temperature-sensitive phase change material layer through the third conductive beam, and the fourth electrode is electrically connected to the second end of the temperature-sensitive phase change material layer through the fourth conductive beam. The third electrode and the fourth electrode are respectively configured to monitor the resistance change of the temperature-sensitive phase change material layer.

2. The high-sensitivity ultrawideband uncooled infrared detector according to claim 1, characterized in that, The temperature-sensitive phase change material layer includes a vanadium dioxide film layer with a thickness of 180~220nm.

3. The high-sensitivity ultrawideband uncooled infrared detector according to claim 1, characterized in that, The infrared enhancement absorption layer includes a metasurface made of gold, comprising an array of monolithic structures, including cross-shaped, cylindrical, and square columnar structures. The characteristic dimensions of the monolithic structures are obtained by parametrically scanning the absorption peaks of infrared radiation.

4. A method for fabricating a high-sensitivity ultrawideband uncooled infrared detector based on MEMS as described in any one of claims 1 to 3, characterized in that, The preparation method includes the following steps: Fabrication of micro / nano heaters; A temperature-sensitive phase change material layer is fabricated on the micro / nano heater; and An infrared enhancement absorption layer is prepared on the temperature-sensitive phase change material layer.

5. The preparation method according to claim 4, characterized in that, The fabrication of the micro / nano heater includes the following steps: Resistance wires for micro / nano heaters are fabricated on SOI substrates; Prepare a conductive beam to connect the resistance wire; Performing deep silicon etching suspends the micro / nano heater from the conductive beam.

6. The preparation method according to claim 4, characterized in that, The fabrication of a temperature-sensitive phase change material layer on the micro / nano heater includes the following steps: Photoresist is applied to expose the micro / nano heater area; Vanadium dioxide thin films were deposited using reactive magnetron sputtering. Remove the photoresist and anneal at high temperature.

7. The preparation method according to claim 5, characterized in that, The preparation of an infrared enhancement absorption layer on the temperature-sensitive phase change material layer includes the following steps: Apply photoresist to expose the infrared enhancement absorption layer area; Vacuum evaporation of metal thin films; Patterning is performed on the metal thin film.

Images